blob: 4048a19d13ce7a05aa5c06653743c46811c756fa [file] [log] [blame]
Thierry Reding280921d2013-08-30 15:10:14 +02001/*
2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#include <linux/backlight.h>
Alexandre Courbotcfdf0542014-03-01 14:00:58 +090025#include <linux/gpio/consumer.h>
Thierry Reding280921d2013-08-30 15:10:14 +020026#include <linux/module.h>
Thierry Reding280921d2013-08-30 15:10:14 +020027#include <linux/of_platform.h>
28#include <linux/platform_device.h>
29#include <linux/regulator/consumer.h>
30
31#include <drm/drmP.h>
32#include <drm/drm_crtc.h>
Thierry Reding210fcd92013-11-22 19:27:11 +010033#include <drm/drm_mipi_dsi.h>
Thierry Reding280921d2013-08-30 15:10:14 +020034#include <drm/drm_panel.h>
35
Philipp Zabela5d3e622014-12-11 18:32:45 +010036#include <video/display_timing.h>
37#include <video/videomode.h>
38
Thierry Reding280921d2013-08-30 15:10:14 +020039struct panel_desc {
40 const struct drm_display_mode *modes;
41 unsigned int num_modes;
Philipp Zabela5d3e622014-12-11 18:32:45 +010042 const struct display_timing *timings;
43 unsigned int num_timings;
Thierry Reding280921d2013-08-30 15:10:14 +020044
Stéphane Marchesin0208d512014-06-19 18:18:28 -070045 unsigned int bpc;
46
Ulrich Ölmann85533e32015-12-04 12:31:28 +010047 /**
48 * @width: width (in millimeters) of the panel's active display area
49 * @height: height (in millimeters) of the panel's active display area
50 */
Thierry Reding280921d2013-08-30 15:10:14 +020051 struct {
52 unsigned int width;
53 unsigned int height;
54 } size;
Ajay Kumarf673c372014-07-31 23:12:11 +053055
56 /**
57 * @prepare: the time (in milliseconds) that it takes for the panel to
58 * become ready and start receiving video data
59 * @enable: the time (in milliseconds) that it takes for the panel to
60 * display the first valid frame after starting to receive
61 * video data
62 * @disable: the time (in milliseconds) that it takes for the panel to
63 * turn the display off (no content is visible)
64 * @unprepare: the time (in milliseconds) that it takes for the panel
65 * to power itself down completely
66 */
67 struct {
68 unsigned int prepare;
69 unsigned int enable;
70 unsigned int disable;
71 unsigned int unprepare;
72 } delay;
Boris Brezillon795f7ab2014-07-22 13:33:59 +020073
74 u32 bus_format;
Stefan Agnerf0aa0832016-02-08 11:38:14 -080075 u32 bus_flags;
Thierry Reding280921d2013-08-30 15:10:14 +020076};
77
Thierry Reding280921d2013-08-30 15:10:14 +020078struct panel_simple {
79 struct drm_panel base;
Ajay Kumar613a6332014-07-31 23:12:10 +053080 bool prepared;
Thierry Reding280921d2013-08-30 15:10:14 +020081 bool enabled;
82
83 const struct panel_desc *desc;
84
85 struct backlight_device *backlight;
86 struct regulator *supply;
87 struct i2c_adapter *ddc;
88
Alexandre Courbotcfdf0542014-03-01 14:00:58 +090089 struct gpio_desc *enable_gpio;
Thierry Reding280921d2013-08-30 15:10:14 +020090};
91
92static inline struct panel_simple *to_panel_simple(struct drm_panel *panel)
93{
94 return container_of(panel, struct panel_simple, base);
95}
96
97static int panel_simple_get_fixed_modes(struct panel_simple *panel)
98{
99 struct drm_connector *connector = panel->base.connector;
100 struct drm_device *drm = panel->base.drm;
101 struct drm_display_mode *mode;
102 unsigned int i, num = 0;
103
104 if (!panel->desc)
105 return 0;
106
Philipp Zabela5d3e622014-12-11 18:32:45 +0100107 for (i = 0; i < panel->desc->num_timings; i++) {
108 const struct display_timing *dt = &panel->desc->timings[i];
109 struct videomode vm;
110
111 videomode_from_timing(dt, &vm);
112 mode = drm_mode_create(drm);
113 if (!mode) {
114 dev_err(drm->dev, "failed to add mode %ux%u\n",
115 dt->hactive.typ, dt->vactive.typ);
116 continue;
117 }
118
119 drm_display_mode_from_videomode(&vm, mode);
Boris Brezilloncda55372016-04-15 18:23:33 +0200120
121 mode->type |= DRM_MODE_TYPE_DRIVER;
122
Chen-Yu Tsai230c5b42016-10-24 21:21:15 +0800123 if (panel->desc->num_timings == 1)
Boris Brezilloncda55372016-04-15 18:23:33 +0200124 mode->type |= DRM_MODE_TYPE_PREFERRED;
125
Philipp Zabela5d3e622014-12-11 18:32:45 +0100126 drm_mode_probed_add(connector, mode);
127 num++;
128 }
129
Thierry Reding280921d2013-08-30 15:10:14 +0200130 for (i = 0; i < panel->desc->num_modes; i++) {
131 const struct drm_display_mode *m = &panel->desc->modes[i];
132
133 mode = drm_mode_duplicate(drm, m);
134 if (!mode) {
135 dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
136 m->hdisplay, m->vdisplay, m->vrefresh);
137 continue;
138 }
139
Boris Brezilloncda55372016-04-15 18:23:33 +0200140 mode->type |= DRM_MODE_TYPE_DRIVER;
141
142 if (panel->desc->num_modes == 1)
143 mode->type |= DRM_MODE_TYPE_PREFERRED;
144
Thierry Reding280921d2013-08-30 15:10:14 +0200145 drm_mode_set_name(mode);
146
147 drm_mode_probed_add(connector, mode);
148 num++;
149 }
150
Stéphane Marchesin0208d512014-06-19 18:18:28 -0700151 connector->display_info.bpc = panel->desc->bpc;
Thierry Reding280921d2013-08-30 15:10:14 +0200152 connector->display_info.width_mm = panel->desc->size.width;
153 connector->display_info.height_mm = panel->desc->size.height;
Boris Brezillon795f7ab2014-07-22 13:33:59 +0200154 if (panel->desc->bus_format)
155 drm_display_info_set_bus_formats(&connector->display_info,
156 &panel->desc->bus_format, 1);
Stefan Agnerf0aa0832016-02-08 11:38:14 -0800157 connector->display_info.bus_flags = panel->desc->bus_flags;
Thierry Reding280921d2013-08-30 15:10:14 +0200158
159 return num;
160}
161
162static int panel_simple_disable(struct drm_panel *panel)
163{
164 struct panel_simple *p = to_panel_simple(panel);
165
166 if (!p->enabled)
167 return 0;
168
169 if (p->backlight) {
170 p->backlight->props.power = FB_BLANK_POWERDOWN;
Thierry Redinge4aa3422016-06-17 19:11:53 +0200171 p->backlight->props.state |= BL_CORE_FBBLANK;
Thierry Reding280921d2013-08-30 15:10:14 +0200172 backlight_update_status(p->backlight);
173 }
174
Ajay Kumarf673c372014-07-31 23:12:11 +0530175 if (p->desc->delay.disable)
176 msleep(p->desc->delay.disable);
177
Thierry Reding280921d2013-08-30 15:10:14 +0200178 p->enabled = false;
179
180 return 0;
181}
182
Ajay Kumarc0e1d172014-07-31 23:12:04 +0530183static int panel_simple_unprepare(struct drm_panel *panel)
184{
Ajay Kumar613a6332014-07-31 23:12:10 +0530185 struct panel_simple *p = to_panel_simple(panel);
186
187 if (!p->prepared)
188 return 0;
189
190 if (p->enable_gpio)
191 gpiod_set_value_cansleep(p->enable_gpio, 0);
192
193 regulator_disable(p->supply);
194
Ajay Kumarf673c372014-07-31 23:12:11 +0530195 if (p->desc->delay.unprepare)
196 msleep(p->desc->delay.unprepare);
197
Ajay Kumar613a6332014-07-31 23:12:10 +0530198 p->prepared = false;
199
Ajay Kumarc0e1d172014-07-31 23:12:04 +0530200 return 0;
201}
202
203static int panel_simple_prepare(struct drm_panel *panel)
204{
Thierry Reding280921d2013-08-30 15:10:14 +0200205 struct panel_simple *p = to_panel_simple(panel);
206 int err;
207
Ajay Kumar613a6332014-07-31 23:12:10 +0530208 if (p->prepared)
Thierry Reding280921d2013-08-30 15:10:14 +0200209 return 0;
210
211 err = regulator_enable(p->supply);
212 if (err < 0) {
213 dev_err(panel->dev, "failed to enable supply: %d\n", err);
214 return err;
215 }
216
Alexandre Courbotcfdf0542014-03-01 14:00:58 +0900217 if (p->enable_gpio)
Thierry Reding15c1a912014-03-14 12:03:47 +0100218 gpiod_set_value_cansleep(p->enable_gpio, 1);
Thierry Reding280921d2013-08-30 15:10:14 +0200219
Ajay Kumarf673c372014-07-31 23:12:11 +0530220 if (p->desc->delay.prepare)
221 msleep(p->desc->delay.prepare);
222
Ajay Kumar613a6332014-07-31 23:12:10 +0530223 p->prepared = true;
224
225 return 0;
226}
227
228static int panel_simple_enable(struct drm_panel *panel)
229{
230 struct panel_simple *p = to_panel_simple(panel);
231
232 if (p->enabled)
233 return 0;
234
Ajay Kumarf673c372014-07-31 23:12:11 +0530235 if (p->desc->delay.enable)
236 msleep(p->desc->delay.enable);
237
Thierry Reding280921d2013-08-30 15:10:14 +0200238 if (p->backlight) {
Thierry Redinge4aa3422016-06-17 19:11:53 +0200239 p->backlight->props.state &= ~BL_CORE_FBBLANK;
Thierry Reding280921d2013-08-30 15:10:14 +0200240 p->backlight->props.power = FB_BLANK_UNBLANK;
241 backlight_update_status(p->backlight);
242 }
243
244 p->enabled = true;
245
246 return 0;
247}
248
249static int panel_simple_get_modes(struct drm_panel *panel)
250{
251 struct panel_simple *p = to_panel_simple(panel);
252 int num = 0;
253
254 /* probe EDID if a DDC bus is available */
255 if (p->ddc) {
256 struct edid *edid = drm_get_edid(panel->connector, p->ddc);
Stephen Warren70bf6872014-01-09 11:37:34 -0700257 drm_mode_connector_update_edid_property(panel->connector, edid);
Thierry Reding280921d2013-08-30 15:10:14 +0200258 if (edid) {
259 num += drm_add_edid_modes(panel->connector, edid);
260 kfree(edid);
261 }
262 }
263
264 /* add hard-coded panel modes */
265 num += panel_simple_get_fixed_modes(p);
266
267 return num;
268}
269
Philipp Zabela5d3e622014-12-11 18:32:45 +0100270static int panel_simple_get_timings(struct drm_panel *panel,
271 unsigned int num_timings,
272 struct display_timing *timings)
273{
274 struct panel_simple *p = to_panel_simple(panel);
275 unsigned int i;
276
277 if (p->desc->num_timings < num_timings)
278 num_timings = p->desc->num_timings;
279
280 if (timings)
281 for (i = 0; i < num_timings; i++)
282 timings[i] = p->desc->timings[i];
283
284 return p->desc->num_timings;
285}
286
Thierry Reding280921d2013-08-30 15:10:14 +0200287static const struct drm_panel_funcs panel_simple_funcs = {
288 .disable = panel_simple_disable,
Ajay Kumarc0e1d172014-07-31 23:12:04 +0530289 .unprepare = panel_simple_unprepare,
290 .prepare = panel_simple_prepare,
Thierry Reding280921d2013-08-30 15:10:14 +0200291 .enable = panel_simple_enable,
292 .get_modes = panel_simple_get_modes,
Philipp Zabela5d3e622014-12-11 18:32:45 +0100293 .get_timings = panel_simple_get_timings,
Thierry Reding280921d2013-08-30 15:10:14 +0200294};
295
296static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
297{
298 struct device_node *backlight, *ddc;
299 struct panel_simple *panel;
Thierry Reding280921d2013-08-30 15:10:14 +0200300 int err;
301
302 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
303 if (!panel)
304 return -ENOMEM;
305
306 panel->enabled = false;
Ajay Kumar613a6332014-07-31 23:12:10 +0530307 panel->prepared = false;
Thierry Reding280921d2013-08-30 15:10:14 +0200308 panel->desc = desc;
309
310 panel->supply = devm_regulator_get(dev, "power");
311 if (IS_ERR(panel->supply))
312 return PTR_ERR(panel->supply);
313
Alexandre Courbota61400d2014-10-23 17:16:58 +0900314 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
315 GPIOD_OUT_LOW);
Alexandre Courbotcfdf0542014-03-01 14:00:58 +0900316 if (IS_ERR(panel->enable_gpio)) {
317 err = PTR_ERR(panel->enable_gpio);
Alexandre Courbot9746c612014-07-25 23:47:25 +0900318 dev_err(dev, "failed to request GPIO: %d\n", err);
319 return err;
320 }
Thierry Reding280921d2013-08-30 15:10:14 +0200321
Thierry Reding280921d2013-08-30 15:10:14 +0200322 backlight = of_parse_phandle(dev->of_node, "backlight", 0);
323 if (backlight) {
324 panel->backlight = of_find_backlight_by_node(backlight);
325 of_node_put(backlight);
326
Alexandre Courbotcfdf0542014-03-01 14:00:58 +0900327 if (!panel->backlight)
328 return -EPROBE_DEFER;
Thierry Reding280921d2013-08-30 15:10:14 +0200329 }
330
331 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
332 if (ddc) {
333 panel->ddc = of_find_i2c_adapter_by_node(ddc);
334 of_node_put(ddc);
335
336 if (!panel->ddc) {
337 err = -EPROBE_DEFER;
338 goto free_backlight;
339 }
340 }
341
342 drm_panel_init(&panel->base);
343 panel->base.dev = dev;
344 panel->base.funcs = &panel_simple_funcs;
345
346 err = drm_panel_add(&panel->base);
347 if (err < 0)
348 goto free_ddc;
349
350 dev_set_drvdata(dev, panel);
351
352 return 0;
353
354free_ddc:
355 if (panel->ddc)
356 put_device(&panel->ddc->dev);
357free_backlight:
358 if (panel->backlight)
359 put_device(&panel->backlight->dev);
Thierry Reding280921d2013-08-30 15:10:14 +0200360
361 return err;
362}
363
364static int panel_simple_remove(struct device *dev)
365{
366 struct panel_simple *panel = dev_get_drvdata(dev);
367
368 drm_panel_detach(&panel->base);
369 drm_panel_remove(&panel->base);
370
371 panel_simple_disable(&panel->base);
372
373 if (panel->ddc)
374 put_device(&panel->ddc->dev);
375
376 if (panel->backlight)
377 put_device(&panel->backlight->dev);
378
Thierry Reding280921d2013-08-30 15:10:14 +0200379 return 0;
380}
381
Thierry Redingd02fd932014-04-29 17:21:21 +0200382static void panel_simple_shutdown(struct device *dev)
383{
384 struct panel_simple *panel = dev_get_drvdata(dev);
385
386 panel_simple_disable(&panel->base);
387}
388
Philipp Zabel1c550fa12015-02-11 18:50:09 +0100389static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = {
390 .clock = 33333,
391 .hdisplay = 800,
392 .hsync_start = 800 + 0,
393 .hsync_end = 800 + 0 + 255,
394 .htotal = 800 + 0 + 255 + 0,
395 .vdisplay = 480,
396 .vsync_start = 480 + 2,
397 .vsync_end = 480 + 2 + 45,
398 .vtotal = 480 + 2 + 45 + 0,
399 .vrefresh = 60,
400 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
401};
402
403static const struct panel_desc ampire_am800480r3tmqwa1h = {
404 .modes = &ampire_am800480r3tmqwa1h_mode,
405 .num_modes = 1,
406 .bpc = 6,
407 .size = {
408 .width = 152,
409 .height = 91,
410 },
411 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
412};
413
Thierry Reding280921d2013-08-30 15:10:14 +0200414static const struct drm_display_mode auo_b101aw03_mode = {
415 .clock = 51450,
416 .hdisplay = 1024,
417 .hsync_start = 1024 + 156,
418 .hsync_end = 1024 + 156 + 8,
419 .htotal = 1024 + 156 + 8 + 156,
420 .vdisplay = 600,
421 .vsync_start = 600 + 16,
422 .vsync_end = 600 + 16 + 6,
423 .vtotal = 600 + 16 + 6 + 16,
424 .vrefresh = 60,
425};
426
427static const struct panel_desc auo_b101aw03 = {
428 .modes = &auo_b101aw03_mode,
429 .num_modes = 1,
Stéphane Marchesin0208d512014-06-19 18:18:28 -0700430 .bpc = 6,
Thierry Reding280921d2013-08-30 15:10:14 +0200431 .size = {
432 .width = 223,
433 .height = 125,
434 },
435};
436
Huang Lina531bc32015-02-28 10:18:58 +0800437static const struct drm_display_mode auo_b101ean01_mode = {
438 .clock = 72500,
439 .hdisplay = 1280,
440 .hsync_start = 1280 + 119,
441 .hsync_end = 1280 + 119 + 32,
442 .htotal = 1280 + 119 + 32 + 21,
443 .vdisplay = 800,
444 .vsync_start = 800 + 4,
445 .vsync_end = 800 + 4 + 20,
446 .vtotal = 800 + 4 + 20 + 8,
447 .vrefresh = 60,
448};
449
450static const struct panel_desc auo_b101ean01 = {
451 .modes = &auo_b101ean01_mode,
452 .num_modes = 1,
453 .bpc = 6,
454 .size = {
455 .width = 217,
456 .height = 136,
457 },
458};
459
Rob Clarkdac746e2014-08-01 17:01:06 -0400460static const struct drm_display_mode auo_b101xtn01_mode = {
461 .clock = 72000,
462 .hdisplay = 1366,
463 .hsync_start = 1366 + 20,
464 .hsync_end = 1366 + 20 + 70,
465 .htotal = 1366 + 20 + 70,
466 .vdisplay = 768,
467 .vsync_start = 768 + 14,
468 .vsync_end = 768 + 14 + 42,
469 .vtotal = 768 + 14 + 42,
470 .vrefresh = 60,
471 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
472};
473
474static const struct panel_desc auo_b101xtn01 = {
475 .modes = &auo_b101xtn01_mode,
476 .num_modes = 1,
477 .bpc = 6,
478 .size = {
479 .width = 223,
480 .height = 125,
481 },
482};
483
Ajay Kumare35e3052014-09-01 15:40:02 +0530484static const struct drm_display_mode auo_b116xw03_mode = {
485 .clock = 70589,
486 .hdisplay = 1366,
487 .hsync_start = 1366 + 40,
488 .hsync_end = 1366 + 40 + 40,
489 .htotal = 1366 + 40 + 40 + 32,
490 .vdisplay = 768,
491 .vsync_start = 768 + 10,
492 .vsync_end = 768 + 10 + 12,
493 .vtotal = 768 + 10 + 12 + 6,
494 .vrefresh = 60,
495};
496
497static const struct panel_desc auo_b116xw03 = {
498 .modes = &auo_b116xw03_mode,
499 .num_modes = 1,
500 .bpc = 6,
501 .size = {
502 .width = 256,
503 .height = 144,
504 },
505};
506
Stéphane Marchesina333f7a2014-05-23 19:27:59 -0700507static const struct drm_display_mode auo_b133xtn01_mode = {
508 .clock = 69500,
509 .hdisplay = 1366,
510 .hsync_start = 1366 + 48,
511 .hsync_end = 1366 + 48 + 32,
512 .htotal = 1366 + 48 + 32 + 20,
513 .vdisplay = 768,
514 .vsync_start = 768 + 3,
515 .vsync_end = 768 + 3 + 6,
516 .vtotal = 768 + 3 + 6 + 13,
517 .vrefresh = 60,
518};
519
520static const struct panel_desc auo_b133xtn01 = {
521 .modes = &auo_b133xtn01_mode,
522 .num_modes = 1,
Stéphane Marchesin0208d512014-06-19 18:18:28 -0700523 .bpc = 6,
Stéphane Marchesina333f7a2014-05-23 19:27:59 -0700524 .size = {
525 .width = 293,
526 .height = 165,
527 },
528};
529
Ajay Kumar3e51d602014-07-31 23:12:12 +0530530static const struct drm_display_mode auo_b133htn01_mode = {
531 .clock = 150660,
532 .hdisplay = 1920,
533 .hsync_start = 1920 + 172,
534 .hsync_end = 1920 + 172 + 80,
535 .htotal = 1920 + 172 + 80 + 60,
536 .vdisplay = 1080,
537 .vsync_start = 1080 + 25,
538 .vsync_end = 1080 + 25 + 10,
539 .vtotal = 1080 + 25 + 10 + 10,
540 .vrefresh = 60,
541};
542
543static const struct panel_desc auo_b133htn01 = {
544 .modes = &auo_b133htn01_mode,
545 .num_modes = 1,
Thierry Redingd7a839c2014-11-06 10:11:01 +0100546 .bpc = 6,
Ajay Kumar3e51d602014-07-31 23:12:12 +0530547 .size = {
548 .width = 293,
549 .height = 165,
550 },
551 .delay = {
552 .prepare = 105,
553 .enable = 20,
554 .unprepare = 50,
555 },
556};
557
Lucas Stach697035c2016-11-30 14:09:55 +0100558static const struct display_timing auo_g133han01_timings = {
559 .pixelclock = { 134000000, 141200000, 149000000 },
560 .hactive = { 1920, 1920, 1920 },
561 .hfront_porch = { 39, 58, 77 },
562 .hback_porch = { 59, 88, 117 },
563 .hsync_len = { 28, 42, 56 },
564 .vactive = { 1080, 1080, 1080 },
565 .vfront_porch = { 3, 8, 11 },
566 .vback_porch = { 5, 14, 19 },
567 .vsync_len = { 4, 14, 19 },
568};
569
570static const struct panel_desc auo_g133han01 = {
571 .timings = &auo_g133han01_timings,
572 .num_timings = 1,
573 .bpc = 8,
574 .size = {
575 .width = 293,
576 .height = 165,
577 },
578 .delay = {
579 .prepare = 200,
580 .enable = 50,
581 .disable = 50,
582 .unprepare = 1000,
583 },
584 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA,
585};
586
Haixia Shi7ee933a2016-10-11 14:59:16 -0700587static const struct drm_display_mode auo_t215hvn01_mode = {
588 .clock = 148800,
589 .hdisplay = 1920,
590 .hsync_start = 1920 + 88,
591 .hsync_end = 1920 + 88 + 44,
592 .htotal = 1920 + 88 + 44 + 148,
593 .vdisplay = 1080,
594 .vsync_start = 1080 + 4,
595 .vsync_end = 1080 + 4 + 5,
596 .vtotal = 1080 + 4 + 5 + 36,
597 .vrefresh = 60,
598};
599
600static const struct panel_desc auo_t215hvn01 = {
601 .modes = &auo_t215hvn01_mode,
602 .num_modes = 1,
603 .bpc = 8,
604 .size = {
605 .width = 430,
606 .height = 270,
607 },
608 .delay = {
609 .disable = 5,
610 .unprepare = 1000,
611 }
612};
613
Philipp Zabeld47df632014-12-18 16:43:43 +0100614static const struct drm_display_mode avic_tm070ddh03_mode = {
615 .clock = 51200,
616 .hdisplay = 1024,
617 .hsync_start = 1024 + 160,
618 .hsync_end = 1024 + 160 + 4,
619 .htotal = 1024 + 160 + 4 + 156,
620 .vdisplay = 600,
621 .vsync_start = 600 + 17,
622 .vsync_end = 600 + 17 + 1,
623 .vtotal = 600 + 17 + 1 + 17,
624 .vrefresh = 60,
625};
626
627static const struct panel_desc avic_tm070ddh03 = {
628 .modes = &avic_tm070ddh03_mode,
629 .num_modes = 1,
630 .bpc = 8,
631 .size = {
632 .width = 154,
633 .height = 90,
634 },
635 .delay = {
636 .prepare = 20,
637 .enable = 200,
638 .disable = 200,
639 },
640};
641
Randy Li2cb35c82016-09-20 03:02:51 +0800642static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
643 .clock = 66770,
644 .hdisplay = 800,
645 .hsync_start = 800 + 49,
646 .hsync_end = 800 + 49 + 33,
647 .htotal = 800 + 49 + 33 + 17,
648 .vdisplay = 1280,
649 .vsync_start = 1280 + 1,
650 .vsync_end = 1280 + 1 + 7,
651 .vtotal = 1280 + 1 + 7 + 15,
652 .vrefresh = 60,
653 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
654};
655
656static const struct panel_desc chunghwa_claa070wp03xg = {
657 .modes = &chunghwa_claa070wp03xg_mode,
658 .num_modes = 1,
659 .bpc = 6,
660 .size = {
661 .width = 94,
662 .height = 150,
663 },
664};
665
Stephen Warren4c930752014-01-07 16:46:26 -0700666static const struct drm_display_mode chunghwa_claa101wa01a_mode = {
667 .clock = 72070,
668 .hdisplay = 1366,
669 .hsync_start = 1366 + 58,
670 .hsync_end = 1366 + 58 + 58,
671 .htotal = 1366 + 58 + 58 + 58,
672 .vdisplay = 768,
673 .vsync_start = 768 + 4,
674 .vsync_end = 768 + 4 + 4,
675 .vtotal = 768 + 4 + 4 + 4,
676 .vrefresh = 60,
677};
678
679static const struct panel_desc chunghwa_claa101wa01a = {
680 .modes = &chunghwa_claa101wa01a_mode,
681 .num_modes = 1,
Stéphane Marchesin0208d512014-06-19 18:18:28 -0700682 .bpc = 6,
Stephen Warren4c930752014-01-07 16:46:26 -0700683 .size = {
684 .width = 220,
685 .height = 120,
686 },
687};
688
Thierry Reding280921d2013-08-30 15:10:14 +0200689static const struct drm_display_mode chunghwa_claa101wb01_mode = {
690 .clock = 69300,
691 .hdisplay = 1366,
692 .hsync_start = 1366 + 48,
693 .hsync_end = 1366 + 48 + 32,
694 .htotal = 1366 + 48 + 32 + 20,
695 .vdisplay = 768,
696 .vsync_start = 768 + 16,
697 .vsync_end = 768 + 16 + 8,
698 .vtotal = 768 + 16 + 8 + 16,
699 .vrefresh = 60,
700};
701
702static const struct panel_desc chunghwa_claa101wb01 = {
703 .modes = &chunghwa_claa101wb01_mode,
704 .num_modes = 1,
Stéphane Marchesin0208d512014-06-19 18:18:28 -0700705 .bpc = 6,
Thierry Reding280921d2013-08-30 15:10:14 +0200706 .size = {
707 .width = 223,
708 .height = 125,
709 },
710};
711
Stefan Agner26ab0062014-05-15 11:38:45 +0200712static const struct drm_display_mode edt_et057090dhu_mode = {
713 .clock = 25175,
714 .hdisplay = 640,
715 .hsync_start = 640 + 16,
716 .hsync_end = 640 + 16 + 30,
717 .htotal = 640 + 16 + 30 + 114,
718 .vdisplay = 480,
719 .vsync_start = 480 + 10,
720 .vsync_end = 480 + 10 + 3,
721 .vtotal = 480 + 10 + 3 + 32,
722 .vrefresh = 60,
723 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
724};
725
726static const struct panel_desc edt_et057090dhu = {
727 .modes = &edt_et057090dhu_mode,
728 .num_modes = 1,
Stéphane Marchesin0208d512014-06-19 18:18:28 -0700729 .bpc = 6,
Stefan Agner26ab0062014-05-15 11:38:45 +0200730 .size = {
731 .width = 115,
732 .height = 86,
733 },
734};
735
Philipp Zabelfff5de42014-05-15 12:25:47 +0200736static const struct drm_display_mode edt_etm0700g0dh6_mode = {
737 .clock = 33260,
738 .hdisplay = 800,
739 .hsync_start = 800 + 40,
740 .hsync_end = 800 + 40 + 128,
741 .htotal = 800 + 40 + 128 + 88,
742 .vdisplay = 480,
743 .vsync_start = 480 + 10,
744 .vsync_end = 480 + 10 + 2,
745 .vtotal = 480 + 10 + 2 + 33,
746 .vrefresh = 60,
747 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
748};
749
750static const struct panel_desc edt_etm0700g0dh6 = {
751 .modes = &edt_etm0700g0dh6_mode,
752 .num_modes = 1,
Stéphane Marchesin0208d512014-06-19 18:18:28 -0700753 .bpc = 6,
Philipp Zabelfff5de42014-05-15 12:25:47 +0200754 .size = {
755 .width = 152,
756 .height = 91,
757 },
758};
759
Boris BREZILLON102932b2014-06-05 15:53:32 +0200760static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
761 .clock = 32260,
762 .hdisplay = 800,
763 .hsync_start = 800 + 168,
764 .hsync_end = 800 + 168 + 64,
765 .htotal = 800 + 168 + 64 + 88,
766 .vdisplay = 480,
767 .vsync_start = 480 + 37,
768 .vsync_end = 480 + 37 + 2,
769 .vtotal = 480 + 37 + 2 + 8,
770 .vrefresh = 60,
771};
772
773static const struct panel_desc foxlink_fl500wvr00_a0t = {
774 .modes = &foxlink_fl500wvr00_a0t_mode,
775 .num_modes = 1,
Thierry Redingd7a839c2014-11-06 10:11:01 +0100776 .bpc = 8,
Boris BREZILLON102932b2014-06-05 15:53:32 +0200777 .size = {
778 .width = 108,
779 .height = 65,
780 },
Boris Brezillonbb276cb2014-07-22 13:35:47 +0200781 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Boris BREZILLON102932b2014-06-05 15:53:32 +0200782};
783
Philipp Zabeld435a2a2014-11-19 10:29:55 +0100784static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
785 .clock = 9000,
786 .hdisplay = 480,
787 .hsync_start = 480 + 5,
788 .hsync_end = 480 + 5 + 1,
789 .htotal = 480 + 5 + 1 + 40,
790 .vdisplay = 272,
791 .vsync_start = 272 + 8,
792 .vsync_end = 272 + 8 + 1,
793 .vtotal = 272 + 8 + 1 + 8,
794 .vrefresh = 60,
795};
796
797static const struct panel_desc giantplus_gpg482739qs5 = {
798 .modes = &giantplus_gpg482739qs5_mode,
799 .num_modes = 1,
800 .bpc = 8,
801 .size = {
802 .width = 95,
803 .height = 54,
804 },
Philipp Zabel33536a02015-02-11 18:50:07 +0100805 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Philipp Zabeld435a2a2014-11-19 10:29:55 +0100806};
807
Philipp Zabelab077252014-12-11 18:32:46 +0100808static const struct display_timing hannstar_hsd070pww1_timing = {
809 .pixelclock = { 64300000, 71100000, 82000000 },
810 .hactive = { 1280, 1280, 1280 },
811 .hfront_porch = { 1, 1, 10 },
812 .hback_porch = { 1, 1, 10 },
Philipp Zabeld901d2b2015-08-12 12:32:13 +0200813 /*
814 * According to the data sheet, the minimum horizontal blanking interval
815 * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
816 * minimum working horizontal blanking interval to be 60 clocks.
817 */
818 .hsync_len = { 58, 158, 661 },
Philipp Zabelab077252014-12-11 18:32:46 +0100819 .vactive = { 800, 800, 800 },
820 .vfront_porch = { 1, 1, 10 },
821 .vback_porch = { 1, 1, 10 },
822 .vsync_len = { 1, 21, 203 },
823 .flags = DISPLAY_FLAGS_DE_HIGH,
Philipp Zabela8532052014-10-23 16:31:06 +0200824};
825
826static const struct panel_desc hannstar_hsd070pww1 = {
Philipp Zabelab077252014-12-11 18:32:46 +0100827 .timings = &hannstar_hsd070pww1_timing,
828 .num_timings = 1,
Philipp Zabela8532052014-10-23 16:31:06 +0200829 .bpc = 6,
830 .size = {
831 .width = 151,
832 .height = 94,
833 },
Philipp Zabel58d6a7b2015-08-12 12:32:12 +0200834 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
Philipp Zabela8532052014-10-23 16:31:06 +0200835};
836
Eric Nelsonc0d607e2015-04-13 15:09:26 -0700837static const struct display_timing hannstar_hsd100pxn1_timing = {
838 .pixelclock = { 55000000, 65000000, 75000000 },
839 .hactive = { 1024, 1024, 1024 },
840 .hfront_porch = { 40, 40, 40 },
841 .hback_porch = { 220, 220, 220 },
842 .hsync_len = { 20, 60, 100 },
843 .vactive = { 768, 768, 768 },
844 .vfront_porch = { 7, 7, 7 },
845 .vback_porch = { 21, 21, 21 },
846 .vsync_len = { 10, 10, 10 },
847 .flags = DISPLAY_FLAGS_DE_HIGH,
848};
849
850static const struct panel_desc hannstar_hsd100pxn1 = {
851 .timings = &hannstar_hsd100pxn1_timing,
852 .num_timings = 1,
853 .bpc = 6,
854 .size = {
855 .width = 203,
856 .height = 152,
857 },
Philipp Zabel4946b042015-05-20 11:34:08 +0200858 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
Eric Nelsonc0d607e2015-04-13 15:09:26 -0700859};
860
Lucas Stach61ac0bf2014-11-06 17:44:35 +0100861static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
862 .clock = 33333,
863 .hdisplay = 800,
864 .hsync_start = 800 + 85,
865 .hsync_end = 800 + 85 + 86,
866 .htotal = 800 + 85 + 86 + 85,
867 .vdisplay = 480,
868 .vsync_start = 480 + 16,
869 .vsync_end = 480 + 16 + 13,
870 .vtotal = 480 + 16 + 13 + 16,
871 .vrefresh = 60,
872};
873
874static const struct panel_desc hitachi_tx23d38vm0caa = {
875 .modes = &hitachi_tx23d38vm0caa_mode,
876 .num_modes = 1,
877 .bpc = 6,
878 .size = {
879 .width = 195,
880 .height = 117,
881 },
882};
883
Nicolas Ferre41bcceb2015-03-19 14:43:01 +0100884static const struct drm_display_mode innolux_at043tn24_mode = {
885 .clock = 9000,
886 .hdisplay = 480,
887 .hsync_start = 480 + 2,
888 .hsync_end = 480 + 2 + 41,
889 .htotal = 480 + 2 + 41 + 2,
890 .vdisplay = 272,
891 .vsync_start = 272 + 2,
892 .vsync_end = 272 + 2 + 11,
893 .vtotal = 272 + 2 + 11 + 2,
894 .vrefresh = 60,
895 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
896};
897
898static const struct panel_desc innolux_at043tn24 = {
899 .modes = &innolux_at043tn24_mode,
900 .num_modes = 1,
901 .bpc = 8,
902 .size = {
903 .width = 95,
904 .height = 54,
905 },
906 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
907};
908
Riccardo Bortolato4fc24ab2016-04-20 15:37:15 +0200909static const struct drm_display_mode innolux_at070tn92_mode = {
910 .clock = 33333,
911 .hdisplay = 800,
912 .hsync_start = 800 + 210,
913 .hsync_end = 800 + 210 + 20,
914 .htotal = 800 + 210 + 20 + 46,
915 .vdisplay = 480,
916 .vsync_start = 480 + 22,
917 .vsync_end = 480 + 22 + 10,
918 .vtotal = 480 + 22 + 23 + 10,
919 .vrefresh = 60,
920};
921
922static const struct panel_desc innolux_at070tn92 = {
923 .modes = &innolux_at070tn92_mode,
924 .num_modes = 1,
925 .size = {
926 .width = 154,
927 .height = 86,
928 },
929 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
930};
931
Michael Olbrich1e29b842016-08-15 14:32:02 +0200932static const struct display_timing innolux_g101ice_l01_timing = {
933 .pixelclock = { 60400000, 71100000, 74700000 },
934 .hactive = { 1280, 1280, 1280 },
935 .hfront_porch = { 41, 80, 100 },
936 .hback_porch = { 40, 79, 99 },
937 .hsync_len = { 1, 1, 1 },
938 .vactive = { 800, 800, 800 },
939 .vfront_porch = { 5, 11, 14 },
940 .vback_porch = { 4, 11, 14 },
941 .vsync_len = { 1, 1, 1 },
942 .flags = DISPLAY_FLAGS_DE_HIGH,
943};
944
945static const struct panel_desc innolux_g101ice_l01 = {
946 .timings = &innolux_g101ice_l01_timing,
947 .num_timings = 1,
948 .bpc = 8,
949 .size = {
950 .width = 217,
951 .height = 135,
952 },
953 .delay = {
954 .enable = 200,
955 .disable = 200,
956 },
957 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
958};
959
Lucas Stach4ae13e42016-11-30 14:09:54 +0100960static const struct display_timing innolux_g121i1_l01_timing = {
961 .pixelclock = { 67450000, 71000000, 74550000 },
962 .hactive = { 1280, 1280, 1280 },
963 .hfront_porch = { 40, 80, 160 },
964 .hback_porch = { 39, 79, 159 },
965 .hsync_len = { 1, 1, 1 },
966 .vactive = { 800, 800, 800 },
967 .vfront_porch = { 5, 11, 100 },
968 .vback_porch = { 4, 11, 99 },
969 .vsync_len = { 1, 1, 1 },
Lucas Stachd731f662014-11-06 17:44:33 +0100970};
971
972static const struct panel_desc innolux_g121i1_l01 = {
Lucas Stach4ae13e42016-11-30 14:09:54 +0100973 .timings = &innolux_g121i1_l01_timing,
974 .num_timings = 1,
Lucas Stachd731f662014-11-06 17:44:33 +0100975 .bpc = 6,
976 .size = {
977 .width = 261,
978 .height = 163,
979 },
Lucas Stach4ae13e42016-11-30 14:09:54 +0100980 .delay = {
981 .enable = 200,
982 .disable = 20,
983 },
984 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Lucas Stachd731f662014-11-06 17:44:33 +0100985};
986
Akshay Bhatf8fa17b2015-11-18 15:57:47 -0500987static const struct drm_display_mode innolux_g121x1_l03_mode = {
988 .clock = 65000,
989 .hdisplay = 1024,
990 .hsync_start = 1024 + 0,
991 .hsync_end = 1024 + 1,
992 .htotal = 1024 + 0 + 1 + 320,
993 .vdisplay = 768,
994 .vsync_start = 768 + 38,
995 .vsync_end = 768 + 38 + 1,
996 .vtotal = 768 + 38 + 1 + 0,
997 .vrefresh = 60,
Akshay Bhat2e8c5eb2016-03-01 18:06:54 -0500998 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
Akshay Bhatf8fa17b2015-11-18 15:57:47 -0500999};
1000
1001static const struct panel_desc innolux_g121x1_l03 = {
1002 .modes = &innolux_g121x1_l03_mode,
1003 .num_modes = 1,
1004 .bpc = 6,
1005 .size = {
1006 .width = 246,
1007 .height = 185,
1008 },
1009 .delay = {
1010 .enable = 200,
1011 .unprepare = 200,
1012 .disable = 400,
1013 },
1014};
1015
Thierry Reding0a2288c2014-07-03 14:02:59 +02001016static const struct drm_display_mode innolux_n116bge_mode = {
Daniel Kurtz7fe8c772014-09-02 10:56:46 +08001017 .clock = 76420,
Thierry Reding0a2288c2014-07-03 14:02:59 +02001018 .hdisplay = 1366,
Daniel Kurtz7fe8c772014-09-02 10:56:46 +08001019 .hsync_start = 1366 + 136,
1020 .hsync_end = 1366 + 136 + 30,
1021 .htotal = 1366 + 136 + 30 + 60,
Thierry Reding0a2288c2014-07-03 14:02:59 +02001022 .vdisplay = 768,
1023 .vsync_start = 768 + 8,
Daniel Kurtz7fe8c772014-09-02 10:56:46 +08001024 .vsync_end = 768 + 8 + 12,
1025 .vtotal = 768 + 8 + 12 + 12,
Thierry Reding0a2288c2014-07-03 14:02:59 +02001026 .vrefresh = 60,
1027 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1028};
1029
1030static const struct panel_desc innolux_n116bge = {
1031 .modes = &innolux_n116bge_mode,
1032 .num_modes = 1,
1033 .bpc = 6,
1034 .size = {
1035 .width = 256,
1036 .height = 144,
1037 },
1038};
1039
Alban Bedelea447392014-07-22 08:38:55 +02001040static const struct drm_display_mode innolux_n156bge_l21_mode = {
1041 .clock = 69300,
1042 .hdisplay = 1366,
1043 .hsync_start = 1366 + 16,
1044 .hsync_end = 1366 + 16 + 34,
1045 .htotal = 1366 + 16 + 34 + 50,
1046 .vdisplay = 768,
1047 .vsync_start = 768 + 2,
1048 .vsync_end = 768 + 2 + 6,
1049 .vtotal = 768 + 2 + 6 + 12,
1050 .vrefresh = 60,
1051};
1052
1053static const struct panel_desc innolux_n156bge_l21 = {
1054 .modes = &innolux_n156bge_l21_mode,
1055 .num_modes = 1,
Stéphane Marchesin0208d512014-06-19 18:18:28 -07001056 .bpc = 6,
Alban Bedelea447392014-07-22 08:38:55 +02001057 .size = {
1058 .width = 344,
1059 .height = 193,
1060 },
1061};
1062
Michael Grzeschikbccac3f2015-03-19 12:22:44 +01001063static const struct drm_display_mode innolux_zj070na_01p_mode = {
1064 .clock = 51501,
1065 .hdisplay = 1024,
1066 .hsync_start = 1024 + 128,
1067 .hsync_end = 1024 + 128 + 64,
1068 .htotal = 1024 + 128 + 64 + 128,
1069 .vdisplay = 600,
1070 .vsync_start = 600 + 16,
1071 .vsync_end = 600 + 16 + 4,
1072 .vtotal = 600 + 16 + 4 + 16,
1073 .vrefresh = 60,
1074};
1075
1076static const struct panel_desc innolux_zj070na_01p = {
1077 .modes = &innolux_zj070na_01p_mode,
1078 .num_modes = 1,
1079 .bpc = 6,
1080 .size = {
Thierry Reding81598842016-06-10 15:33:13 +02001081 .width = 154,
1082 .height = 90,
Michael Grzeschikbccac3f2015-03-19 12:22:44 +01001083 },
1084};
1085
Lucas Stach8def22e2015-12-02 19:41:11 +01001086static const struct display_timing kyo_tcg121xglp_timing = {
1087 .pixelclock = { 52000000, 65000000, 71000000 },
1088 .hactive = { 1024, 1024, 1024 },
1089 .hfront_porch = { 2, 2, 2 },
1090 .hback_porch = { 2, 2, 2 },
1091 .hsync_len = { 86, 124, 244 },
1092 .vactive = { 768, 768, 768 },
1093 .vfront_porch = { 2, 2, 2 },
1094 .vback_porch = { 2, 2, 2 },
1095 .vsync_len = { 6, 34, 73 },
1096 .flags = DISPLAY_FLAGS_DE_HIGH,
1097};
1098
1099static const struct panel_desc kyo_tcg121xglp = {
1100 .timings = &kyo_tcg121xglp_timing,
1101 .num_timings = 1,
1102 .bpc = 8,
1103 .size = {
1104 .width = 246,
1105 .height = 184,
1106 },
1107 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1108};
1109
Heiko Schocherdd015002015-05-22 10:25:57 +02001110static const struct drm_display_mode lg_lb070wv8_mode = {
1111 .clock = 33246,
1112 .hdisplay = 800,
1113 .hsync_start = 800 + 88,
1114 .hsync_end = 800 + 88 + 80,
1115 .htotal = 800 + 88 + 80 + 88,
1116 .vdisplay = 480,
1117 .vsync_start = 480 + 10,
1118 .vsync_end = 480 + 10 + 25,
1119 .vtotal = 480 + 10 + 25 + 10,
1120 .vrefresh = 60,
1121};
1122
1123static const struct panel_desc lg_lb070wv8 = {
1124 .modes = &lg_lb070wv8_mode,
1125 .num_modes = 1,
1126 .bpc = 16,
1127 .size = {
1128 .width = 151,
1129 .height = 91,
1130 },
1131 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1132};
1133
Yakir Yangc5ece402016-06-28 12:51:15 +08001134static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
1135 .clock = 200000,
1136 .hdisplay = 1536,
1137 .hsync_start = 1536 + 12,
1138 .hsync_end = 1536 + 12 + 16,
1139 .htotal = 1536 + 12 + 16 + 48,
1140 .vdisplay = 2048,
1141 .vsync_start = 2048 + 8,
1142 .vsync_end = 2048 + 8 + 4,
1143 .vtotal = 2048 + 8 + 4 + 8,
1144 .vrefresh = 60,
1145 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1146};
1147
1148static const struct panel_desc lg_lp079qx1_sp0v = {
1149 .modes = &lg_lp079qx1_sp0v_mode,
1150 .num_modes = 1,
1151 .size = {
1152 .width = 129,
1153 .height = 171,
1154 },
1155};
1156
Yakir Yang0355dde2016-06-12 10:56:02 +08001157static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
1158 .clock = 205210,
1159 .hdisplay = 2048,
1160 .hsync_start = 2048 + 150,
1161 .hsync_end = 2048 + 150 + 5,
1162 .htotal = 2048 + 150 + 5 + 5,
1163 .vdisplay = 1536,
1164 .vsync_start = 1536 + 3,
1165 .vsync_end = 1536 + 3 + 1,
1166 .vtotal = 1536 + 3 + 1 + 9,
1167 .vrefresh = 60,
1168};
1169
1170static const struct panel_desc lg_lp097qx1_spa1 = {
1171 .modes = &lg_lp097qx1_spa1_mode,
1172 .num_modes = 1,
1173 .size = {
1174 .width = 208,
1175 .height = 147,
1176 },
1177};
1178
Jitao Shi690d8fa2016-02-22 19:01:44 +08001179static const struct drm_display_mode lg_lp120up1_mode = {
1180 .clock = 162300,
1181 .hdisplay = 1920,
1182 .hsync_start = 1920 + 40,
1183 .hsync_end = 1920 + 40 + 40,
1184 .htotal = 1920 + 40 + 40+ 80,
1185 .vdisplay = 1280,
1186 .vsync_start = 1280 + 4,
1187 .vsync_end = 1280 + 4 + 4,
1188 .vtotal = 1280 + 4 + 4 + 12,
1189 .vrefresh = 60,
1190};
1191
1192static const struct panel_desc lg_lp120up1 = {
1193 .modes = &lg_lp120up1_mode,
1194 .num_modes = 1,
1195 .bpc = 8,
1196 .size = {
1197 .width = 267,
1198 .height = 183,
1199 },
1200};
1201
Thierry Redingec7c5652013-11-15 15:59:32 +01001202static const struct drm_display_mode lg_lp129qe_mode = {
1203 .clock = 285250,
1204 .hdisplay = 2560,
1205 .hsync_start = 2560 + 48,
1206 .hsync_end = 2560 + 48 + 32,
1207 .htotal = 2560 + 48 + 32 + 80,
1208 .vdisplay = 1700,
1209 .vsync_start = 1700 + 3,
1210 .vsync_end = 1700 + 3 + 10,
1211 .vtotal = 1700 + 3 + 10 + 36,
1212 .vrefresh = 60,
1213};
1214
1215static const struct panel_desc lg_lp129qe = {
1216 .modes = &lg_lp129qe_mode,
1217 .num_modes = 1,
Stéphane Marchesin0208d512014-06-19 18:18:28 -07001218 .bpc = 8,
Thierry Redingec7c5652013-11-15 15:59:32 +01001219 .size = {
1220 .width = 272,
1221 .height = 181,
1222 },
1223};
1224
jianwei wangc6e87f92015-07-29 16:30:02 +08001225static const struct drm_display_mode nec_nl4827hc19_05b_mode = {
1226 .clock = 10870,
1227 .hdisplay = 480,
1228 .hsync_start = 480 + 2,
1229 .hsync_end = 480 + 2 + 41,
1230 .htotal = 480 + 2 + 41 + 2,
1231 .vdisplay = 272,
1232 .vsync_start = 272 + 2,
1233 .vsync_end = 272 + 2 + 4,
1234 .vtotal = 272 + 2 + 4 + 2,
1235 .vrefresh = 74,
Stefan Agner4bc390c2015-11-17 19:10:29 -08001236 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
jianwei wangc6e87f92015-07-29 16:30:02 +08001237};
1238
1239static const struct panel_desc nec_nl4827hc19_05b = {
1240 .modes = &nec_nl4827hc19_05b_mode,
1241 .num_modes = 1,
1242 .bpc = 8,
1243 .size = {
1244 .width = 95,
1245 .height = 54,
1246 },
Stefan Agner2c806612016-02-08 12:50:13 -08001247 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
1248 .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
jianwei wangc6e87f92015-07-29 16:30:02 +08001249};
1250
Fabien Lahoudere05ec0e42016-10-17 11:38:01 +02001251static const struct drm_display_mode nvd_9128_mode = {
1252 .clock = 29500,
1253 .hdisplay = 800,
1254 .hsync_start = 800 + 130,
1255 .hsync_end = 800 + 130 + 98,
1256 .htotal = 800 + 0 + 130 + 98,
1257 .vdisplay = 480,
1258 .vsync_start = 480 + 10,
1259 .vsync_end = 480 + 10 + 50,
1260 .vtotal = 480 + 0 + 10 + 50,
1261};
1262
1263static const struct panel_desc nvd_9128 = {
1264 .modes = &nvd_9128_mode,
1265 .num_modes = 1,
1266 .bpc = 8,
1267 .size = {
1268 .width = 156,
1269 .height = 88,
1270 },
1271 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1272};
1273
Gary Bissona99fb622015-06-10 18:44:23 +02001274static const struct display_timing okaya_rs800480t_7x0gp_timing = {
1275 .pixelclock = { 30000000, 30000000, 40000000 },
1276 .hactive = { 800, 800, 800 },
1277 .hfront_porch = { 40, 40, 40 },
1278 .hback_porch = { 40, 40, 40 },
1279 .hsync_len = { 1, 48, 48 },
1280 .vactive = { 480, 480, 480 },
1281 .vfront_porch = { 13, 13, 13 },
1282 .vback_porch = { 29, 29, 29 },
1283 .vsync_len = { 3, 3, 3 },
1284 .flags = DISPLAY_FLAGS_DE_HIGH,
1285};
1286
1287static const struct panel_desc okaya_rs800480t_7x0gp = {
1288 .timings = &okaya_rs800480t_7x0gp_timing,
1289 .num_timings = 1,
1290 .bpc = 6,
1291 .size = {
1292 .width = 154,
1293 .height = 87,
1294 },
1295 .delay = {
1296 .prepare = 41,
1297 .enable = 50,
1298 .unprepare = 41,
1299 .disable = 50,
1300 },
1301 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1302};
1303
Maxime Ripardcf5c9e62016-03-23 17:38:34 +01001304static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = {
1305 .clock = 9000,
1306 .hdisplay = 480,
1307 .hsync_start = 480 + 5,
1308 .hsync_end = 480 + 5 + 30,
1309 .htotal = 480 + 5 + 30 + 10,
1310 .vdisplay = 272,
1311 .vsync_start = 272 + 8,
1312 .vsync_end = 272 + 8 + 5,
1313 .vtotal = 272 + 8 + 5 + 3,
1314 .vrefresh = 60,
1315};
1316
1317static const struct panel_desc olimex_lcd_olinuxino_43ts = {
1318 .modes = &olimex_lcd_olinuxino_43ts_mode,
1319 .num_modes = 1,
1320 .size = {
1321 .width = 105,
1322 .height = 67,
1323 },
Jonathan Liu5c2a7c62016-09-11 20:46:55 +10001324 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Maxime Ripardcf5c9e62016-03-23 17:38:34 +01001325};
1326
Eric Anholte8b6f562016-03-24 17:23:48 -07001327/*
1328 * 800x480 CVT. The panel appears to be quite accepting, at least as far as
1329 * pixel clocks, but this is the timing that was being used in the Adafruit
1330 * installation instructions.
1331 */
1332static const struct drm_display_mode ontat_yx700wv03_mode = {
1333 .clock = 29500,
1334 .hdisplay = 800,
1335 .hsync_start = 824,
1336 .hsync_end = 896,
1337 .htotal = 992,
1338 .vdisplay = 480,
1339 .vsync_start = 483,
1340 .vsync_end = 493,
1341 .vtotal = 500,
1342 .vrefresh = 60,
1343 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1344};
1345
1346/*
1347 * Specification at:
1348 * https://www.adafruit.com/images/product-files/2406/c3163.pdf
1349 */
1350static const struct panel_desc ontat_yx700wv03 = {
1351 .modes = &ontat_yx700wv03_mode,
1352 .num_modes = 1,
1353 .bpc = 8,
1354 .size = {
1355 .width = 154,
1356 .height = 83,
1357 },
1358 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
1359};
1360
Philipp Zabel725c9d42015-02-11 18:50:11 +01001361static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
1362 .clock = 25000,
1363 .hdisplay = 480,
1364 .hsync_start = 480 + 10,
1365 .hsync_end = 480 + 10 + 10,
1366 .htotal = 480 + 10 + 10 + 15,
1367 .vdisplay = 800,
1368 .vsync_start = 800 + 3,
1369 .vsync_end = 800 + 3 + 3,
1370 .vtotal = 800 + 3 + 3 + 3,
1371 .vrefresh = 60,
1372};
1373
1374static const struct panel_desc ortustech_com43h4m85ulc = {
1375 .modes = &ortustech_com43h4m85ulc_mode,
1376 .num_modes = 1,
1377 .bpc = 8,
1378 .size = {
1379 .width = 56,
1380 .height = 93,
1381 },
1382 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Marek Vasute0932f92016-08-26 18:26:00 +02001383 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
Philipp Zabel725c9d42015-02-11 18:50:11 +01001384};
1385
Josh Wud2a6f0f2015-10-08 17:42:41 +02001386static const struct drm_display_mode qd43003c0_40_mode = {
1387 .clock = 9000,
1388 .hdisplay = 480,
1389 .hsync_start = 480 + 8,
1390 .hsync_end = 480 + 8 + 4,
1391 .htotal = 480 + 8 + 4 + 39,
1392 .vdisplay = 272,
1393 .vsync_start = 272 + 4,
1394 .vsync_end = 272 + 4 + 10,
1395 .vtotal = 272 + 4 + 10 + 2,
1396 .vrefresh = 60,
1397};
1398
1399static const struct panel_desc qd43003c0_40 = {
1400 .modes = &qd43003c0_40_mode,
1401 .num_modes = 1,
1402 .bpc = 8,
1403 .size = {
1404 .width = 95,
1405 .height = 53,
1406 },
1407 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
1408};
1409
Yakir Yang0330eaf2016-06-12 10:56:13 +08001410static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
1411 .clock = 271560,
1412 .hdisplay = 2560,
1413 .hsync_start = 2560 + 48,
1414 .hsync_end = 2560 + 48 + 32,
1415 .htotal = 2560 + 48 + 32 + 80,
1416 .vdisplay = 1600,
1417 .vsync_start = 1600 + 2,
1418 .vsync_end = 1600 + 2 + 5,
1419 .vtotal = 1600 + 2 + 5 + 57,
1420 .vrefresh = 60,
1421};
1422
1423static const struct panel_desc samsung_lsn122dl01_c01 = {
1424 .modes = &samsung_lsn122dl01_c01_mode,
1425 .num_modes = 1,
1426 .size = {
1427 .width = 263,
1428 .height = 164,
1429 },
1430};
1431
Marc Dietrich6d54e3d2013-12-21 21:38:12 +01001432static const struct drm_display_mode samsung_ltn101nt05_mode = {
1433 .clock = 54030,
1434 .hdisplay = 1024,
1435 .hsync_start = 1024 + 24,
1436 .hsync_end = 1024 + 24 + 136,
1437 .htotal = 1024 + 24 + 136 + 160,
1438 .vdisplay = 600,
1439 .vsync_start = 600 + 3,
1440 .vsync_end = 600 + 3 + 6,
1441 .vtotal = 600 + 3 + 6 + 61,
1442 .vrefresh = 60,
1443};
1444
1445static const struct panel_desc samsung_ltn101nt05 = {
1446 .modes = &samsung_ltn101nt05_mode,
1447 .num_modes = 1,
Stéphane Marchesin0208d512014-06-19 18:18:28 -07001448 .bpc = 6,
Marc Dietrich6d54e3d2013-12-21 21:38:12 +01001449 .size = {
Thierry Reding81598842016-06-10 15:33:13 +02001450 .width = 223,
1451 .height = 125,
Marc Dietrich6d54e3d2013-12-21 21:38:12 +01001452 },
1453};
1454
Stéphane Marchesin0c934302015-03-18 10:52:18 +01001455static const struct drm_display_mode samsung_ltn140at29_301_mode = {
1456 .clock = 76300,
1457 .hdisplay = 1366,
1458 .hsync_start = 1366 + 64,
1459 .hsync_end = 1366 + 64 + 48,
1460 .htotal = 1366 + 64 + 48 + 128,
1461 .vdisplay = 768,
1462 .vsync_start = 768 + 2,
1463 .vsync_end = 768 + 2 + 5,
1464 .vtotal = 768 + 2 + 5 + 17,
1465 .vrefresh = 60,
1466};
1467
1468static const struct panel_desc samsung_ltn140at29_301 = {
1469 .modes = &samsung_ltn140at29_301_mode,
1470 .num_modes = 1,
1471 .bpc = 6,
1472 .size = {
1473 .width = 320,
1474 .height = 187,
1475 },
1476};
1477
Joshua Clayton592aa022016-07-06 15:59:16 -07001478static const struct display_timing sharp_lq101k1ly04_timing = {
1479 .pixelclock = { 60000000, 65000000, 80000000 },
1480 .hactive = { 1280, 1280, 1280 },
1481 .hfront_porch = { 20, 20, 20 },
1482 .hback_porch = { 20, 20, 20 },
1483 .hsync_len = { 10, 10, 10 },
1484 .vactive = { 800, 800, 800 },
1485 .vfront_porch = { 4, 4, 4 },
1486 .vback_porch = { 4, 4, 4 },
1487 .vsync_len = { 4, 4, 4 },
1488 .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE,
1489};
1490
1491static const struct panel_desc sharp_lq101k1ly04 = {
1492 .timings = &sharp_lq101k1ly04_timing,
1493 .num_timings = 1,
1494 .bpc = 8,
1495 .size = {
1496 .width = 217,
1497 .height = 136,
1498 },
1499 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA,
1500};
1501
Yakir Yang739c7de2016-06-12 10:56:35 +08001502static const struct drm_display_mode sharp_lq123p1jx31_mode = {
1503 .clock = 252750,
1504 .hdisplay = 2400,
1505 .hsync_start = 2400 + 48,
1506 .hsync_end = 2400 + 48 + 32,
1507 .htotal = 2400 + 48 + 32 + 80,
1508 .vdisplay = 1600,
1509 .vsync_start = 1600 + 3,
1510 .vsync_end = 1600 + 3 + 10,
1511 .vtotal = 1600 + 3 + 10 + 33,
1512 .vrefresh = 60,
1513 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1514};
1515
1516static const struct panel_desc sharp_lq123p1jx31 = {
1517 .modes = &sharp_lq123p1jx31_mode,
1518 .num_modes = 1,
zain wang5466a632016-11-19 10:27:16 +08001519 .bpc = 8,
Yakir Yang739c7de2016-06-12 10:56:35 +08001520 .size = {
1521 .width = 259,
1522 .height = 173,
1523 },
Yakir Yanga42f6e32016-07-21 21:14:34 +08001524 .delay = {
1525 .prepare = 110,
1526 .enable = 50,
1527 .unprepare = 550,
1528 },
Yakir Yang739c7de2016-06-12 10:56:35 +08001529};
1530
Gustaf Lindström0f9cdd72016-10-04 17:29:21 +02001531static const struct drm_display_mode sharp_lq150x1lg11_mode = {
1532 .clock = 71100,
1533 .hdisplay = 1024,
1534 .hsync_start = 1024 + 168,
1535 .hsync_end = 1024 + 168 + 64,
1536 .htotal = 1024 + 168 + 64 + 88,
1537 .vdisplay = 768,
1538 .vsync_start = 768 + 37,
1539 .vsync_end = 768 + 37 + 2,
1540 .vtotal = 768 + 37 + 2 + 8,
1541 .vrefresh = 60,
1542};
1543
1544static const struct panel_desc sharp_lq150x1lg11 = {
1545 .modes = &sharp_lq150x1lg11_mode,
1546 .num_modes = 1,
1547 .bpc = 6,
1548 .size = {
1549 .width = 304,
1550 .height = 228,
1551 },
1552 .bus_format = MEDIA_BUS_FMT_RGB565_1X16,
1553};
1554
Boris BREZILLON9c6615b2015-03-19 14:43:00 +01001555static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = {
1556 .clock = 33300,
1557 .hdisplay = 800,
1558 .hsync_start = 800 + 1,
1559 .hsync_end = 800 + 1 + 64,
1560 .htotal = 800 + 1 + 64 + 64,
1561 .vdisplay = 480,
1562 .vsync_start = 480 + 1,
1563 .vsync_end = 480 + 1 + 23,
1564 .vtotal = 480 + 1 + 23 + 22,
1565 .vrefresh = 60,
1566};
1567
1568static const struct panel_desc shelly_sca07010_bfn_lnn = {
1569 .modes = &shelly_sca07010_bfn_lnn_mode,
1570 .num_modes = 1,
1571 .size = {
1572 .width = 152,
1573 .height = 91,
1574 },
1575 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1576};
1577
Douglas Anderson9bb34c42016-06-10 10:02:07 -07001578static const struct drm_display_mode starry_kr122ea0sra_mode = {
1579 .clock = 147000,
1580 .hdisplay = 1920,
1581 .hsync_start = 1920 + 16,
1582 .hsync_end = 1920 + 16 + 16,
1583 .htotal = 1920 + 16 + 16 + 32,
1584 .vdisplay = 1200,
1585 .vsync_start = 1200 + 15,
1586 .vsync_end = 1200 + 15 + 2,
1587 .vtotal = 1200 + 15 + 2 + 18,
1588 .vrefresh = 60,
1589 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1590};
1591
1592static const struct panel_desc starry_kr122ea0sra = {
1593 .modes = &starry_kr122ea0sra_mode,
1594 .num_modes = 1,
1595 .size = {
1596 .width = 263,
1597 .height = 164,
1598 },
Brian Norrisc46b9242016-08-26 14:32:14 -07001599 .delay = {
1600 .prepare = 10 + 200,
1601 .enable = 50,
1602 .unprepare = 10 + 500,
1603 },
Douglas Anderson9bb34c42016-06-10 10:02:07 -07001604};
1605
Bhuvanchandra DV227e4f42016-05-05 11:47:07 +05301606static const struct drm_display_mode tpk_f07a_0102_mode = {
1607 .clock = 33260,
1608 .hdisplay = 800,
1609 .hsync_start = 800 + 40,
1610 .hsync_end = 800 + 40 + 128,
1611 .htotal = 800 + 40 + 128 + 88,
1612 .vdisplay = 480,
1613 .vsync_start = 480 + 10,
1614 .vsync_end = 480 + 10 + 2,
1615 .vtotal = 480 + 10 + 2 + 33,
1616 .vrefresh = 60,
1617};
1618
1619static const struct panel_desc tpk_f07a_0102 = {
1620 .modes = &tpk_f07a_0102_mode,
1621 .num_modes = 1,
1622 .size = {
1623 .width = 152,
1624 .height = 91,
1625 },
1626 .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
1627};
1628
1629static const struct drm_display_mode tpk_f10a_0102_mode = {
1630 .clock = 45000,
1631 .hdisplay = 1024,
1632 .hsync_start = 1024 + 176,
1633 .hsync_end = 1024 + 176 + 5,
1634 .htotal = 1024 + 176 + 5 + 88,
1635 .vdisplay = 600,
1636 .vsync_start = 600 + 20,
1637 .vsync_end = 600 + 20 + 5,
1638 .vtotal = 600 + 20 + 5 + 25,
1639 .vrefresh = 60,
1640};
1641
1642static const struct panel_desc tpk_f10a_0102 = {
1643 .modes = &tpk_f10a_0102_mode,
1644 .num_modes = 1,
1645 .size = {
1646 .width = 223,
1647 .height = 125,
1648 },
1649};
1650
Maciej S. Szmigiero06a9dc62016-02-13 22:52:03 +01001651static const struct display_timing urt_umsh_8596md_timing = {
1652 .pixelclock = { 33260000, 33260000, 33260000 },
1653 .hactive = { 800, 800, 800 },
1654 .hfront_porch = { 41, 41, 41 },
1655 .hback_porch = { 216 - 128, 216 - 128, 216 - 128 },
1656 .hsync_len = { 71, 128, 128 },
1657 .vactive = { 480, 480, 480 },
1658 .vfront_porch = { 10, 10, 10 },
1659 .vback_porch = { 35 - 2, 35 - 2, 35 - 2 },
1660 .vsync_len = { 2, 2, 2 },
1661 .flags = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE |
1662 DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
1663};
1664
1665static const struct panel_desc urt_umsh_8596md_lvds = {
1666 .timings = &urt_umsh_8596md_timing,
1667 .num_timings = 1,
1668 .bpc = 6,
1669 .size = {
1670 .width = 152,
1671 .height = 91,
1672 },
1673 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
1674};
1675
1676static const struct panel_desc urt_umsh_8596md_parallel = {
1677 .timings = &urt_umsh_8596md_timing,
1678 .num_timings = 1,
1679 .bpc = 6,
1680 .size = {
1681 .width = 152,
1682 .height = 91,
1683 },
1684 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1685};
1686
Thierry Reding280921d2013-08-30 15:10:14 +02001687static const struct of_device_id platform_of_match[] = {
1688 {
Philipp Zabel1c550fa12015-02-11 18:50:09 +01001689 .compatible = "ampire,am800480r3tmqwa1h",
1690 .data = &ampire_am800480r3tmqwa1h,
1691 }, {
Thierry Reding280921d2013-08-30 15:10:14 +02001692 .compatible = "auo,b101aw03",
1693 .data = &auo_b101aw03,
1694 }, {
Huang Lina531bc32015-02-28 10:18:58 +08001695 .compatible = "auo,b101ean01",
1696 .data = &auo_b101ean01,
1697 }, {
Rob Clarkdac746e2014-08-01 17:01:06 -04001698 .compatible = "auo,b101xtn01",
1699 .data = &auo_b101xtn01,
1700 }, {
Ajay Kumare35e3052014-09-01 15:40:02 +05301701 .compatible = "auo,b116xw03",
1702 .data = &auo_b116xw03,
1703 }, {
Ajay Kumar3e51d602014-07-31 23:12:12 +05301704 .compatible = "auo,b133htn01",
1705 .data = &auo_b133htn01,
1706 }, {
Stéphane Marchesina333f7a2014-05-23 19:27:59 -07001707 .compatible = "auo,b133xtn01",
1708 .data = &auo_b133xtn01,
1709 }, {
Lucas Stach697035c2016-11-30 14:09:55 +01001710 .compatible = "auo,g133han01",
1711 .data = &auo_g133han01,
1712 }, {
Haixia Shi7ee933a2016-10-11 14:59:16 -07001713 .compatible = "auo,t215hvn01",
1714 .data = &auo_t215hvn01,
1715 }, {
Philipp Zabeld47df632014-12-18 16:43:43 +01001716 .compatible = "avic,tm070ddh03",
1717 .data = &avic_tm070ddh03,
1718 }, {
Randy Li2cb35c82016-09-20 03:02:51 +08001719 .compatible = "chunghwa,claa070wp03xg",
1720 .data = &chunghwa_claa070wp03xg,
1721 }, {
Stephen Warren4c930752014-01-07 16:46:26 -07001722 .compatible = "chunghwa,claa101wa01a",
1723 .data = &chunghwa_claa101wa01a
1724 }, {
Thierry Reding280921d2013-08-30 15:10:14 +02001725 .compatible = "chunghwa,claa101wb01",
1726 .data = &chunghwa_claa101wb01
1727 }, {
Stefan Agner26ab0062014-05-15 11:38:45 +02001728 .compatible = "edt,et057090dhu",
1729 .data = &edt_et057090dhu,
1730 }, {
Philipp Zabelfff5de42014-05-15 12:25:47 +02001731 .compatible = "edt,et070080dh6",
1732 .data = &edt_etm0700g0dh6,
1733 }, {
1734 .compatible = "edt,etm0700g0dh6",
1735 .data = &edt_etm0700g0dh6,
1736 }, {
Boris BREZILLON102932b2014-06-05 15:53:32 +02001737 .compatible = "foxlink,fl500wvr00-a0t",
1738 .data = &foxlink_fl500wvr00_a0t,
1739 }, {
Philipp Zabeld435a2a2014-11-19 10:29:55 +01001740 .compatible = "giantplus,gpg482739qs5",
1741 .data = &giantplus_gpg482739qs5
1742 }, {
Philipp Zabela8532052014-10-23 16:31:06 +02001743 .compatible = "hannstar,hsd070pww1",
1744 .data = &hannstar_hsd070pww1,
1745 }, {
Eric Nelsonc0d607e2015-04-13 15:09:26 -07001746 .compatible = "hannstar,hsd100pxn1",
1747 .data = &hannstar_hsd100pxn1,
1748 }, {
Lucas Stach61ac0bf2014-11-06 17:44:35 +01001749 .compatible = "hit,tx23d38vm0caa",
1750 .data = &hitachi_tx23d38vm0caa
1751 }, {
Nicolas Ferre41bcceb2015-03-19 14:43:01 +01001752 .compatible = "innolux,at043tn24",
1753 .data = &innolux_at043tn24,
1754 }, {
Riccardo Bortolato4fc24ab2016-04-20 15:37:15 +02001755 .compatible = "innolux,at070tn92",
1756 .data = &innolux_at070tn92,
1757 }, {
Michael Olbrich1e29b842016-08-15 14:32:02 +02001758 .compatible ="innolux,g101ice-l01",
1759 .data = &innolux_g101ice_l01
1760 }, {
Lucas Stachd731f662014-11-06 17:44:33 +01001761 .compatible ="innolux,g121i1-l01",
1762 .data = &innolux_g121i1_l01
1763 }, {
Akshay Bhatf8fa17b2015-11-18 15:57:47 -05001764 .compatible = "innolux,g121x1-l03",
1765 .data = &innolux_g121x1_l03,
1766 }, {
Thierry Reding0a2288c2014-07-03 14:02:59 +02001767 .compatible = "innolux,n116bge",
1768 .data = &innolux_n116bge,
1769 }, {
Alban Bedelea447392014-07-22 08:38:55 +02001770 .compatible = "innolux,n156bge-l21",
1771 .data = &innolux_n156bge_l21,
1772 }, {
Michael Grzeschikbccac3f2015-03-19 12:22:44 +01001773 .compatible = "innolux,zj070na-01p",
1774 .data = &innolux_zj070na_01p,
1775 }, {
Lucas Stach8def22e2015-12-02 19:41:11 +01001776 .compatible = "kyo,tcg121xglp",
1777 .data = &kyo_tcg121xglp,
1778 }, {
Heiko Schocherdd015002015-05-22 10:25:57 +02001779 .compatible = "lg,lb070wv8",
1780 .data = &lg_lb070wv8,
1781 }, {
Yakir Yangc5ece402016-06-28 12:51:15 +08001782 .compatible = "lg,lp079qx1-sp0v",
1783 .data = &lg_lp079qx1_sp0v,
1784 }, {
Yakir Yang0355dde2016-06-12 10:56:02 +08001785 .compatible = "lg,lp097qx1-spa1",
1786 .data = &lg_lp097qx1_spa1,
1787 }, {
Jitao Shi690d8fa2016-02-22 19:01:44 +08001788 .compatible = "lg,lp120up1",
1789 .data = &lg_lp120up1,
1790 }, {
Thierry Redingec7c5652013-11-15 15:59:32 +01001791 .compatible = "lg,lp129qe",
1792 .data = &lg_lp129qe,
1793 }, {
jianwei wangc6e87f92015-07-29 16:30:02 +08001794 .compatible = "nec,nl4827hc19-05b",
1795 .data = &nec_nl4827hc19_05b,
1796 }, {
Fabien Lahoudere05ec0e42016-10-17 11:38:01 +02001797 .compatible = "nvd,9128",
1798 .data = &nvd_9128,
1799 }, {
Gary Bissona99fb622015-06-10 18:44:23 +02001800 .compatible = "okaya,rs800480t-7x0gp",
1801 .data = &okaya_rs800480t_7x0gp,
1802 }, {
Maxime Ripardcf5c9e62016-03-23 17:38:34 +01001803 .compatible = "olimex,lcd-olinuxino-43-ts",
1804 .data = &olimex_lcd_olinuxino_43ts,
1805 }, {
Eric Anholte8b6f562016-03-24 17:23:48 -07001806 .compatible = "ontat,yx700wv03",
1807 .data = &ontat_yx700wv03,
1808 }, {
Philipp Zabel725c9d42015-02-11 18:50:11 +01001809 .compatible = "ortustech,com43h4m85ulc",
1810 .data = &ortustech_com43h4m85ulc,
1811 }, {
Josh Wud2a6f0f2015-10-08 17:42:41 +02001812 .compatible = "qiaodian,qd43003c0-40",
1813 .data = &qd43003c0_40,
1814 }, {
Yakir Yang0330eaf2016-06-12 10:56:13 +08001815 .compatible = "samsung,lsn122dl01-c01",
1816 .data = &samsung_lsn122dl01_c01,
1817 }, {
Marc Dietrich6d54e3d2013-12-21 21:38:12 +01001818 .compatible = "samsung,ltn101nt05",
1819 .data = &samsung_ltn101nt05,
1820 }, {
Stéphane Marchesin0c934302015-03-18 10:52:18 +01001821 .compatible = "samsung,ltn140at29-301",
1822 .data = &samsung_ltn140at29_301,
1823 }, {
Joshua Clayton592aa022016-07-06 15:59:16 -07001824 .compatible = "sharp,lq101k1ly04",
1825 .data = &sharp_lq101k1ly04,
1826 }, {
Yakir Yang739c7de2016-06-12 10:56:35 +08001827 .compatible = "sharp,lq123p1jx31",
1828 .data = &sharp_lq123p1jx31,
1829 }, {
Gustaf Lindström0f9cdd72016-10-04 17:29:21 +02001830 .compatible = "sharp,lq150x1lg11",
1831 .data = &sharp_lq150x1lg11,
1832 }, {
Boris BREZILLON9c6615b2015-03-19 14:43:00 +01001833 .compatible = "shelly,sca07010-bfn-lnn",
1834 .data = &shelly_sca07010_bfn_lnn,
1835 }, {
Douglas Anderson9bb34c42016-06-10 10:02:07 -07001836 .compatible = "starry,kr122ea0sra",
1837 .data = &starry_kr122ea0sra,
1838 }, {
Bhuvanchandra DV227e4f42016-05-05 11:47:07 +05301839 .compatible = "tpk,f07a-0102",
1840 .data = &tpk_f07a_0102,
1841 }, {
1842 .compatible = "tpk,f10a-0102",
1843 .data = &tpk_f10a_0102,
1844 }, {
Maciej S. Szmigiero06a9dc62016-02-13 22:52:03 +01001845 .compatible = "urt,umsh-8596md-t",
1846 .data = &urt_umsh_8596md_parallel,
1847 }, {
1848 .compatible = "urt,umsh-8596md-1t",
1849 .data = &urt_umsh_8596md_parallel,
1850 }, {
1851 .compatible = "urt,umsh-8596md-7t",
1852 .data = &urt_umsh_8596md_parallel,
1853 }, {
1854 .compatible = "urt,umsh-8596md-11t",
1855 .data = &urt_umsh_8596md_lvds,
1856 }, {
1857 .compatible = "urt,umsh-8596md-19t",
1858 .data = &urt_umsh_8596md_lvds,
1859 }, {
1860 .compatible = "urt,umsh-8596md-20t",
1861 .data = &urt_umsh_8596md_parallel,
1862 }, {
Thierry Reding280921d2013-08-30 15:10:14 +02001863 /* sentinel */
1864 }
1865};
1866MODULE_DEVICE_TABLE(of, platform_of_match);
1867
1868static int panel_simple_platform_probe(struct platform_device *pdev)
1869{
1870 const struct of_device_id *id;
1871
1872 id = of_match_node(platform_of_match, pdev->dev.of_node);
1873 if (!id)
1874 return -ENODEV;
1875
1876 return panel_simple_probe(&pdev->dev, id->data);
1877}
1878
1879static int panel_simple_platform_remove(struct platform_device *pdev)
1880{
1881 return panel_simple_remove(&pdev->dev);
1882}
1883
Thierry Redingd02fd932014-04-29 17:21:21 +02001884static void panel_simple_platform_shutdown(struct platform_device *pdev)
1885{
1886 panel_simple_shutdown(&pdev->dev);
1887}
1888
Thierry Reding280921d2013-08-30 15:10:14 +02001889static struct platform_driver panel_simple_platform_driver = {
1890 .driver = {
1891 .name = "panel-simple",
Thierry Reding280921d2013-08-30 15:10:14 +02001892 .of_match_table = platform_of_match,
1893 },
1894 .probe = panel_simple_platform_probe,
1895 .remove = panel_simple_platform_remove,
Thierry Redingd02fd932014-04-29 17:21:21 +02001896 .shutdown = panel_simple_platform_shutdown,
Thierry Reding280921d2013-08-30 15:10:14 +02001897};
1898
Thierry Reding210fcd92013-11-22 19:27:11 +01001899struct panel_desc_dsi {
1900 struct panel_desc desc;
1901
Thierry Reding462658b2014-03-14 11:24:57 +01001902 unsigned long flags;
Thierry Reding210fcd92013-11-22 19:27:11 +01001903 enum mipi_dsi_pixel_format format;
1904 unsigned int lanes;
1905};
1906
Thierry Redingd718d792015-04-08 16:52:33 +02001907static const struct drm_display_mode auo_b080uan01_mode = {
1908 .clock = 154500,
1909 .hdisplay = 1200,
1910 .hsync_start = 1200 + 62,
1911 .hsync_end = 1200 + 62 + 4,
1912 .htotal = 1200 + 62 + 4 + 62,
1913 .vdisplay = 1920,
1914 .vsync_start = 1920 + 9,
1915 .vsync_end = 1920 + 9 + 2,
1916 .vtotal = 1920 + 9 + 2 + 8,
1917 .vrefresh = 60,
1918};
1919
1920static const struct panel_desc_dsi auo_b080uan01 = {
1921 .desc = {
1922 .modes = &auo_b080uan01_mode,
1923 .num_modes = 1,
1924 .bpc = 8,
1925 .size = {
1926 .width = 108,
1927 .height = 272,
1928 },
1929 },
1930 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
1931 .format = MIPI_DSI_FMT_RGB888,
1932 .lanes = 4,
1933};
1934
Chris Zhongc8521962015-11-20 16:15:37 +08001935static const struct drm_display_mode boe_tv080wum_nl0_mode = {
1936 .clock = 160000,
1937 .hdisplay = 1200,
1938 .hsync_start = 1200 + 120,
1939 .hsync_end = 1200 + 120 + 20,
1940 .htotal = 1200 + 120 + 20 + 21,
1941 .vdisplay = 1920,
1942 .vsync_start = 1920 + 21,
1943 .vsync_end = 1920 + 21 + 3,
1944 .vtotal = 1920 + 21 + 3 + 18,
1945 .vrefresh = 60,
1946 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1947};
1948
1949static const struct panel_desc_dsi boe_tv080wum_nl0 = {
1950 .desc = {
1951 .modes = &boe_tv080wum_nl0_mode,
1952 .num_modes = 1,
1953 .size = {
1954 .width = 107,
1955 .height = 172,
1956 },
1957 },
1958 .flags = MIPI_DSI_MODE_VIDEO |
1959 MIPI_DSI_MODE_VIDEO_BURST |
1960 MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
1961 .format = MIPI_DSI_FMT_RGB888,
1962 .lanes = 4,
1963};
1964
Alexandre Courbot712ac1b2014-01-21 18:57:10 +09001965static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
1966 .clock = 71000,
1967 .hdisplay = 800,
1968 .hsync_start = 800 + 32,
1969 .hsync_end = 800 + 32 + 1,
1970 .htotal = 800 + 32 + 1 + 57,
1971 .vdisplay = 1280,
1972 .vsync_start = 1280 + 28,
1973 .vsync_end = 1280 + 28 + 1,
1974 .vtotal = 1280 + 28 + 1 + 14,
1975 .vrefresh = 60,
1976};
1977
1978static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
1979 .desc = {
1980 .modes = &lg_ld070wx3_sl01_mode,
1981 .num_modes = 1,
Thierry Redingd7a839c2014-11-06 10:11:01 +01001982 .bpc = 8,
Alexandre Courbot712ac1b2014-01-21 18:57:10 +09001983 .size = {
1984 .width = 94,
1985 .height = 151,
1986 },
1987 },
Alexandre Courbot5e4cc272014-07-08 21:32:12 +09001988 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
Alexandre Courbot712ac1b2014-01-21 18:57:10 +09001989 .format = MIPI_DSI_FMT_RGB888,
1990 .lanes = 4,
1991};
1992
Alexandre Courbot499ce852014-01-21 18:57:09 +09001993static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
1994 .clock = 67000,
1995 .hdisplay = 720,
1996 .hsync_start = 720 + 12,
1997 .hsync_end = 720 + 12 + 4,
1998 .htotal = 720 + 12 + 4 + 112,
1999 .vdisplay = 1280,
2000 .vsync_start = 1280 + 8,
2001 .vsync_end = 1280 + 8 + 4,
2002 .vtotal = 1280 + 8 + 4 + 12,
2003 .vrefresh = 60,
2004};
2005
2006static const struct panel_desc_dsi lg_lh500wx1_sd03 = {
2007 .desc = {
2008 .modes = &lg_lh500wx1_sd03_mode,
2009 .num_modes = 1,
Thierry Redingd7a839c2014-11-06 10:11:01 +01002010 .bpc = 8,
Alexandre Courbot499ce852014-01-21 18:57:09 +09002011 .size = {
2012 .width = 62,
2013 .height = 110,
2014 },
2015 },
2016 .flags = MIPI_DSI_MODE_VIDEO,
2017 .format = MIPI_DSI_FMT_RGB888,
2018 .lanes = 4,
2019};
2020
Thierry Reding280921d2013-08-30 15:10:14 +02002021static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
2022 .clock = 157200,
2023 .hdisplay = 1920,
2024 .hsync_start = 1920 + 154,
2025 .hsync_end = 1920 + 154 + 16,
2026 .htotal = 1920 + 154 + 16 + 32,
2027 .vdisplay = 1200,
2028 .vsync_start = 1200 + 17,
2029 .vsync_end = 1200 + 17 + 2,
2030 .vtotal = 1200 + 17 + 2 + 16,
2031 .vrefresh = 60,
2032};
2033
Thierry Reding210fcd92013-11-22 19:27:11 +01002034static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
2035 .desc = {
2036 .modes = &panasonic_vvx10f004b00_mode,
2037 .num_modes = 1,
Thierry Redingd7a839c2014-11-06 10:11:01 +01002038 .bpc = 8,
Thierry Reding210fcd92013-11-22 19:27:11 +01002039 .size = {
2040 .width = 217,
2041 .height = 136,
2042 },
Thierry Reding280921d2013-08-30 15:10:14 +02002043 },
Alexandre Courbot5e4cc272014-07-08 21:32:12 +09002044 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
2045 MIPI_DSI_CLOCK_NON_CONTINUOUS,
Thierry Reding210fcd92013-11-22 19:27:11 +01002046 .format = MIPI_DSI_FMT_RGB888,
2047 .lanes = 4,
2048};
2049
2050static const struct of_device_id dsi_of_match[] = {
2051 {
Thierry Redingd718d792015-04-08 16:52:33 +02002052 .compatible = "auo,b080uan01",
2053 .data = &auo_b080uan01
2054 }, {
Chris Zhongc8521962015-11-20 16:15:37 +08002055 .compatible = "boe,tv080wum-nl0",
2056 .data = &boe_tv080wum_nl0
2057 }, {
Alexandre Courbot712ac1b2014-01-21 18:57:10 +09002058 .compatible = "lg,ld070wx3-sl01",
2059 .data = &lg_ld070wx3_sl01
2060 }, {
Alexandre Courbot499ce852014-01-21 18:57:09 +09002061 .compatible = "lg,lh500wx1-sd03",
2062 .data = &lg_lh500wx1_sd03
2063 }, {
Thierry Reding210fcd92013-11-22 19:27:11 +01002064 .compatible = "panasonic,vvx10f004b00",
2065 .data = &panasonic_vvx10f004b00
2066 }, {
2067 /* sentinel */
2068 }
2069};
2070MODULE_DEVICE_TABLE(of, dsi_of_match);
2071
2072static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi)
2073{
2074 const struct panel_desc_dsi *desc;
2075 const struct of_device_id *id;
2076 int err;
2077
2078 id = of_match_node(dsi_of_match, dsi->dev.of_node);
2079 if (!id)
2080 return -ENODEV;
2081
2082 desc = id->data;
2083
2084 err = panel_simple_probe(&dsi->dev, &desc->desc);
2085 if (err < 0)
2086 return err;
2087
Thierry Reding462658b2014-03-14 11:24:57 +01002088 dsi->mode_flags = desc->flags;
Thierry Reding210fcd92013-11-22 19:27:11 +01002089 dsi->format = desc->format;
2090 dsi->lanes = desc->lanes;
2091
2092 return mipi_dsi_attach(dsi);
2093}
2094
2095static int panel_simple_dsi_remove(struct mipi_dsi_device *dsi)
2096{
2097 int err;
2098
2099 err = mipi_dsi_detach(dsi);
2100 if (err < 0)
2101 dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
2102
2103 return panel_simple_remove(&dsi->dev);
2104}
2105
Thierry Redingd02fd932014-04-29 17:21:21 +02002106static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi)
2107{
2108 panel_simple_shutdown(&dsi->dev);
2109}
2110
Thierry Reding210fcd92013-11-22 19:27:11 +01002111static struct mipi_dsi_driver panel_simple_dsi_driver = {
2112 .driver = {
2113 .name = "panel-simple-dsi",
Thierry Reding210fcd92013-11-22 19:27:11 +01002114 .of_match_table = dsi_of_match,
2115 },
2116 .probe = panel_simple_dsi_probe,
2117 .remove = panel_simple_dsi_remove,
Thierry Redingd02fd932014-04-29 17:21:21 +02002118 .shutdown = panel_simple_dsi_shutdown,
Thierry Reding280921d2013-08-30 15:10:14 +02002119};
2120
2121static int __init panel_simple_init(void)
2122{
Thierry Reding210fcd92013-11-22 19:27:11 +01002123 int err;
2124
2125 err = platform_driver_register(&panel_simple_platform_driver);
2126 if (err < 0)
2127 return err;
2128
2129 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
2130 err = mipi_dsi_driver_register(&panel_simple_dsi_driver);
2131 if (err < 0)
2132 return err;
2133 }
2134
2135 return 0;
Thierry Reding280921d2013-08-30 15:10:14 +02002136}
2137module_init(panel_simple_init);
2138
2139static void __exit panel_simple_exit(void)
2140{
Thierry Reding210fcd92013-11-22 19:27:11 +01002141 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
2142 mipi_dsi_driver_unregister(&panel_simple_dsi_driver);
2143
Thierry Reding280921d2013-08-30 15:10:14 +02002144 platform_driver_unregister(&panel_simple_platform_driver);
2145}
2146module_exit(panel_simple_exit);
2147
2148MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
2149MODULE_DESCRIPTION("DRM Driver for Simple Panels");
2150MODULE_LICENSE("GPL and additional rights");