David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Texas Instruments ADS7950 SPI ADC driver |
| 3 | * |
| 4 | * Copyright 2016 David Lechner <david@lechnology.com> |
| 5 | * |
| 6 | * Based on iio/ad7923.c: |
| 7 | * Copyright 2011 Analog Devices Inc |
| 8 | * Copyright 2012 CS Systemes d'Information |
| 9 | * |
| 10 | * And also on hwmon/ads79xx.c |
| 11 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ |
| 12 | * Nishanth Menon |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or |
| 15 | * modify it under the terms of the GNU General Public License as |
| 16 | * published by the Free Software Foundation version 2. |
| 17 | * |
| 18 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any |
| 19 | * kind, whether express or implied; without even the implied warranty |
| 20 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | */ |
| 23 | |
Andy Shevchenko | 8cfa26a | 2017-07-29 01:20:14 +0300 | [diff] [blame^] | 24 | #include <linux/acpi.h> |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 25 | #include <linux/bitops.h> |
| 26 | #include <linux/device.h> |
| 27 | #include <linux/err.h> |
| 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/kernel.h> |
| 30 | #include <linux/module.h> |
| 31 | #include <linux/regulator/consumer.h> |
| 32 | #include <linux/slab.h> |
| 33 | #include <linux/spi/spi.h> |
| 34 | |
| 35 | #include <linux/iio/buffer.h> |
| 36 | #include <linux/iio/iio.h> |
| 37 | #include <linux/iio/sysfs.h> |
| 38 | #include <linux/iio/trigger_consumer.h> |
| 39 | #include <linux/iio/triggered_buffer.h> |
| 40 | |
Andy Shevchenko | 8cfa26a | 2017-07-29 01:20:14 +0300 | [diff] [blame^] | 41 | /* |
| 42 | * In case of ACPI, we use the 5000 mV as default for the reference pin. |
| 43 | * Device tree users encode that via the vref-supply regulator. |
| 44 | */ |
| 45 | #define TI_ADS7950_VA_MV_ACPI_DEFAULT 5000 |
| 46 | |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 47 | #define TI_ADS7950_CR_MANUAL BIT(12) |
| 48 | #define TI_ADS7950_CR_WRITE BIT(11) |
| 49 | #define TI_ADS7950_CR_CHAN(ch) ((ch) << 7) |
| 50 | #define TI_ADS7950_CR_RANGE_5V BIT(6) |
| 51 | |
| 52 | #define TI_ADS7950_MAX_CHAN 16 |
| 53 | |
| 54 | #define TI_ADS7950_TIMESTAMP_SIZE (sizeof(int64_t) / sizeof(__be16)) |
| 55 | |
| 56 | /* val = value, dec = left shift, bits = number of bits of the mask */ |
| 57 | #define TI_ADS7950_EXTRACT(val, dec, bits) \ |
| 58 | (((val) >> (dec)) & ((1 << (bits)) - 1)) |
| 59 | |
| 60 | struct ti_ads7950_state { |
| 61 | struct spi_device *spi; |
| 62 | struct spi_transfer ring_xfer[TI_ADS7950_MAX_CHAN + 2]; |
| 63 | struct spi_transfer scan_single_xfer[3]; |
| 64 | struct spi_message ring_msg; |
| 65 | struct spi_message scan_single_msg; |
| 66 | |
| 67 | struct regulator *reg; |
Andy Shevchenko | 8cfa26a | 2017-07-29 01:20:14 +0300 | [diff] [blame^] | 68 | unsigned int vref_mv; |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 69 | |
| 70 | unsigned int settings; |
| 71 | |
| 72 | /* |
| 73 | * DMA (thus cache coherency maintenance) requires the |
| 74 | * transfer buffers to live in their own cache lines. |
| 75 | */ |
| 76 | __be16 rx_buf[TI_ADS7950_MAX_CHAN + TI_ADS7950_TIMESTAMP_SIZE] |
| 77 | ____cacheline_aligned; |
| 78 | __be16 tx_buf[TI_ADS7950_MAX_CHAN]; |
| 79 | }; |
| 80 | |
| 81 | struct ti_ads7950_chip_info { |
| 82 | const struct iio_chan_spec *channels; |
| 83 | unsigned int num_channels; |
| 84 | }; |
| 85 | |
| 86 | enum ti_ads7950_id { |
| 87 | TI_ADS7950, |
| 88 | TI_ADS7951, |
| 89 | TI_ADS7952, |
| 90 | TI_ADS7953, |
| 91 | TI_ADS7954, |
| 92 | TI_ADS7955, |
| 93 | TI_ADS7956, |
| 94 | TI_ADS7957, |
| 95 | TI_ADS7958, |
| 96 | TI_ADS7959, |
| 97 | TI_ADS7960, |
| 98 | TI_ADS7961, |
| 99 | }; |
| 100 | |
| 101 | #define TI_ADS7950_V_CHAN(index, bits) \ |
| 102 | { \ |
| 103 | .type = IIO_VOLTAGE, \ |
| 104 | .indexed = 1, \ |
| 105 | .channel = index, \ |
| 106 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ |
| 107 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ |
| 108 | .address = index, \ |
| 109 | .datasheet_name = "CH##index", \ |
| 110 | .scan_index = index, \ |
| 111 | .scan_type = { \ |
| 112 | .sign = 'u', \ |
| 113 | .realbits = bits, \ |
| 114 | .storagebits = 16, \ |
| 115 | .shift = 12 - (bits), \ |
| 116 | .endianness = IIO_BE, \ |
| 117 | }, \ |
| 118 | } |
| 119 | |
| 120 | #define DECLARE_TI_ADS7950_4_CHANNELS(name, bits) \ |
| 121 | const struct iio_chan_spec name ## _channels[] = { \ |
| 122 | TI_ADS7950_V_CHAN(0, bits), \ |
| 123 | TI_ADS7950_V_CHAN(1, bits), \ |
| 124 | TI_ADS7950_V_CHAN(2, bits), \ |
| 125 | TI_ADS7950_V_CHAN(3, bits), \ |
| 126 | IIO_CHAN_SOFT_TIMESTAMP(4), \ |
| 127 | } |
| 128 | |
| 129 | #define DECLARE_TI_ADS7950_8_CHANNELS(name, bits) \ |
| 130 | const struct iio_chan_spec name ## _channels[] = { \ |
| 131 | TI_ADS7950_V_CHAN(0, bits), \ |
| 132 | TI_ADS7950_V_CHAN(1, bits), \ |
| 133 | TI_ADS7950_V_CHAN(2, bits), \ |
| 134 | TI_ADS7950_V_CHAN(3, bits), \ |
| 135 | TI_ADS7950_V_CHAN(4, bits), \ |
| 136 | TI_ADS7950_V_CHAN(5, bits), \ |
| 137 | TI_ADS7950_V_CHAN(6, bits), \ |
| 138 | TI_ADS7950_V_CHAN(7, bits), \ |
| 139 | IIO_CHAN_SOFT_TIMESTAMP(8), \ |
| 140 | } |
| 141 | |
| 142 | #define DECLARE_TI_ADS7950_12_CHANNELS(name, bits) \ |
| 143 | const struct iio_chan_spec name ## _channels[] = { \ |
| 144 | TI_ADS7950_V_CHAN(0, bits), \ |
| 145 | TI_ADS7950_V_CHAN(1, bits), \ |
| 146 | TI_ADS7950_V_CHAN(2, bits), \ |
| 147 | TI_ADS7950_V_CHAN(3, bits), \ |
| 148 | TI_ADS7950_V_CHAN(4, bits), \ |
| 149 | TI_ADS7950_V_CHAN(5, bits), \ |
| 150 | TI_ADS7950_V_CHAN(6, bits), \ |
| 151 | TI_ADS7950_V_CHAN(7, bits), \ |
| 152 | TI_ADS7950_V_CHAN(8, bits), \ |
| 153 | TI_ADS7950_V_CHAN(9, bits), \ |
| 154 | TI_ADS7950_V_CHAN(10, bits), \ |
| 155 | TI_ADS7950_V_CHAN(11, bits), \ |
| 156 | IIO_CHAN_SOFT_TIMESTAMP(12), \ |
| 157 | } |
| 158 | |
| 159 | #define DECLARE_TI_ADS7950_16_CHANNELS(name, bits) \ |
| 160 | const struct iio_chan_spec name ## _channels[] = { \ |
| 161 | TI_ADS7950_V_CHAN(0, bits), \ |
| 162 | TI_ADS7950_V_CHAN(1, bits), \ |
| 163 | TI_ADS7950_V_CHAN(2, bits), \ |
| 164 | TI_ADS7950_V_CHAN(3, bits), \ |
| 165 | TI_ADS7950_V_CHAN(4, bits), \ |
| 166 | TI_ADS7950_V_CHAN(5, bits), \ |
| 167 | TI_ADS7950_V_CHAN(6, bits), \ |
| 168 | TI_ADS7950_V_CHAN(7, bits), \ |
| 169 | TI_ADS7950_V_CHAN(8, bits), \ |
| 170 | TI_ADS7950_V_CHAN(9, bits), \ |
| 171 | TI_ADS7950_V_CHAN(10, bits), \ |
| 172 | TI_ADS7950_V_CHAN(11, bits), \ |
| 173 | TI_ADS7950_V_CHAN(12, bits), \ |
| 174 | TI_ADS7950_V_CHAN(13, bits), \ |
| 175 | TI_ADS7950_V_CHAN(14, bits), \ |
| 176 | TI_ADS7950_V_CHAN(15, bits), \ |
| 177 | IIO_CHAN_SOFT_TIMESTAMP(16), \ |
| 178 | } |
| 179 | |
| 180 | static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7950, 12); |
| 181 | static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7951, 12); |
| 182 | static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7952, 12); |
| 183 | static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7953, 12); |
| 184 | static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7954, 10); |
| 185 | static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7955, 10); |
| 186 | static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7956, 10); |
| 187 | static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7957, 10); |
| 188 | static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7958, 8); |
| 189 | static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7959, 8); |
| 190 | static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7960, 8); |
| 191 | static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7961, 8); |
| 192 | |
| 193 | static const struct ti_ads7950_chip_info ti_ads7950_chip_info[] = { |
| 194 | [TI_ADS7950] = { |
| 195 | .channels = ti_ads7950_channels, |
| 196 | .num_channels = ARRAY_SIZE(ti_ads7950_channels), |
| 197 | }, |
| 198 | [TI_ADS7951] = { |
| 199 | .channels = ti_ads7951_channels, |
| 200 | .num_channels = ARRAY_SIZE(ti_ads7951_channels), |
| 201 | }, |
| 202 | [TI_ADS7952] = { |
| 203 | .channels = ti_ads7952_channels, |
| 204 | .num_channels = ARRAY_SIZE(ti_ads7952_channels), |
| 205 | }, |
| 206 | [TI_ADS7953] = { |
| 207 | .channels = ti_ads7953_channels, |
| 208 | .num_channels = ARRAY_SIZE(ti_ads7953_channels), |
| 209 | }, |
| 210 | [TI_ADS7954] = { |
| 211 | .channels = ti_ads7954_channels, |
| 212 | .num_channels = ARRAY_SIZE(ti_ads7954_channels), |
| 213 | }, |
| 214 | [TI_ADS7955] = { |
| 215 | .channels = ti_ads7955_channels, |
| 216 | .num_channels = ARRAY_SIZE(ti_ads7955_channels), |
| 217 | }, |
| 218 | [TI_ADS7956] = { |
| 219 | .channels = ti_ads7956_channels, |
| 220 | .num_channels = ARRAY_SIZE(ti_ads7956_channels), |
| 221 | }, |
| 222 | [TI_ADS7957] = { |
| 223 | .channels = ti_ads7957_channels, |
| 224 | .num_channels = ARRAY_SIZE(ti_ads7957_channels), |
| 225 | }, |
| 226 | [TI_ADS7958] = { |
| 227 | .channels = ti_ads7958_channels, |
| 228 | .num_channels = ARRAY_SIZE(ti_ads7958_channels), |
| 229 | }, |
| 230 | [TI_ADS7959] = { |
| 231 | .channels = ti_ads7959_channels, |
| 232 | .num_channels = ARRAY_SIZE(ti_ads7959_channels), |
| 233 | }, |
| 234 | [TI_ADS7960] = { |
| 235 | .channels = ti_ads7960_channels, |
| 236 | .num_channels = ARRAY_SIZE(ti_ads7960_channels), |
| 237 | }, |
| 238 | [TI_ADS7961] = { |
| 239 | .channels = ti_ads7961_channels, |
| 240 | .num_channels = ARRAY_SIZE(ti_ads7961_channels), |
| 241 | }, |
| 242 | }; |
| 243 | |
| 244 | /* |
| 245 | * ti_ads7950_update_scan_mode() setup the spi transfer buffer for the new |
| 246 | * scan mask |
| 247 | */ |
| 248 | static int ti_ads7950_update_scan_mode(struct iio_dev *indio_dev, |
| 249 | const unsigned long *active_scan_mask) |
| 250 | { |
| 251 | struct ti_ads7950_state *st = iio_priv(indio_dev); |
| 252 | int i, cmd, len; |
| 253 | |
| 254 | len = 0; |
| 255 | for_each_set_bit(i, active_scan_mask, indio_dev->num_channels) { |
| 256 | cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(i) | st->settings; |
| 257 | st->tx_buf[len++] = cpu_to_be16(cmd); |
| 258 | } |
| 259 | |
| 260 | /* Data for the 1st channel is not returned until the 3rd transfer */ |
| 261 | len += 2; |
| 262 | for (i = 0; i < len; i++) { |
| 263 | if ((i + 2) < len) |
| 264 | st->ring_xfer[i].tx_buf = &st->tx_buf[i]; |
| 265 | if (i >= 2) |
| 266 | st->ring_xfer[i].rx_buf = &st->rx_buf[i - 2]; |
| 267 | st->ring_xfer[i].len = 2; |
| 268 | st->ring_xfer[i].cs_change = 1; |
| 269 | } |
| 270 | /* make sure last transfer's cs_change is not set */ |
| 271 | st->ring_xfer[len - 1].cs_change = 0; |
| 272 | |
| 273 | spi_message_init_with_transfers(&st->ring_msg, st->ring_xfer, len); |
| 274 | |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | static irqreturn_t ti_ads7950_trigger_handler(int irq, void *p) |
| 279 | { |
| 280 | struct iio_poll_func *pf = p; |
| 281 | struct iio_dev *indio_dev = pf->indio_dev; |
| 282 | struct ti_ads7950_state *st = iio_priv(indio_dev); |
| 283 | int ret; |
| 284 | |
| 285 | ret = spi_sync(st->spi, &st->ring_msg); |
| 286 | if (ret < 0) |
| 287 | goto out; |
| 288 | |
| 289 | iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf, |
| 290 | iio_get_time_ns(indio_dev)); |
| 291 | |
| 292 | out: |
| 293 | iio_trigger_notify_done(indio_dev->trig); |
| 294 | |
| 295 | return IRQ_HANDLED; |
| 296 | } |
| 297 | |
| 298 | static int ti_ads7950_scan_direct(struct ti_ads7950_state *st, unsigned int ch) |
| 299 | { |
| 300 | int ret, cmd; |
| 301 | |
| 302 | cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(ch) | st->settings; |
| 303 | st->tx_buf[0] = cpu_to_be16(cmd); |
| 304 | |
| 305 | ret = spi_sync(st->spi, &st->scan_single_msg); |
| 306 | if (ret) |
| 307 | return ret; |
| 308 | |
| 309 | return be16_to_cpu(st->rx_buf[0]); |
| 310 | } |
| 311 | |
| 312 | static int ti_ads7950_get_range(struct ti_ads7950_state *st) |
| 313 | { |
| 314 | int vref; |
| 315 | |
Andy Shevchenko | 8cfa26a | 2017-07-29 01:20:14 +0300 | [diff] [blame^] | 316 | if (st->vref_mv) { |
| 317 | vref = st->vref_mv; |
| 318 | } else { |
| 319 | vref = regulator_get_voltage(st->reg); |
| 320 | if (vref < 0) |
| 321 | return vref; |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 322 | |
Andy Shevchenko | 8cfa26a | 2017-07-29 01:20:14 +0300 | [diff] [blame^] | 323 | vref /= 1000; |
| 324 | } |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 325 | |
| 326 | if (st->settings & TI_ADS7950_CR_RANGE_5V) |
| 327 | vref *= 2; |
| 328 | |
| 329 | return vref; |
| 330 | } |
| 331 | |
| 332 | static int ti_ads7950_read_raw(struct iio_dev *indio_dev, |
| 333 | struct iio_chan_spec const *chan, |
| 334 | int *val, int *val2, long m) |
| 335 | { |
| 336 | struct ti_ads7950_state *st = iio_priv(indio_dev); |
| 337 | int ret; |
| 338 | |
| 339 | switch (m) { |
| 340 | case IIO_CHAN_INFO_RAW: |
| 341 | |
| 342 | ret = iio_device_claim_direct_mode(indio_dev); |
| 343 | if (ret < 0) |
| 344 | return ret; |
| 345 | |
| 346 | ret = ti_ads7950_scan_direct(st, chan->address); |
| 347 | iio_device_release_direct_mode(indio_dev); |
| 348 | if (ret < 0) |
| 349 | return ret; |
| 350 | |
| 351 | if (chan->address != TI_ADS7950_EXTRACT(ret, 12, 4)) |
| 352 | return -EIO; |
| 353 | |
| 354 | *val = TI_ADS7950_EXTRACT(ret, chan->scan_type.shift, |
| 355 | chan->scan_type.realbits); |
| 356 | |
| 357 | return IIO_VAL_INT; |
| 358 | case IIO_CHAN_INFO_SCALE: |
| 359 | ret = ti_ads7950_get_range(st); |
| 360 | if (ret < 0) |
| 361 | return ret; |
| 362 | |
| 363 | *val = ret; |
| 364 | *val2 = (1 << chan->scan_type.realbits) - 1; |
| 365 | |
| 366 | return IIO_VAL_FRACTIONAL; |
| 367 | } |
| 368 | |
| 369 | return -EINVAL; |
| 370 | } |
| 371 | |
| 372 | static const struct iio_info ti_ads7950_info = { |
| 373 | .read_raw = &ti_ads7950_read_raw, |
| 374 | .update_scan_mode = ti_ads7950_update_scan_mode, |
| 375 | .driver_module = THIS_MODULE, |
| 376 | }; |
| 377 | |
| 378 | static int ti_ads7950_probe(struct spi_device *spi) |
| 379 | { |
| 380 | struct ti_ads7950_state *st; |
| 381 | struct iio_dev *indio_dev; |
| 382 | const struct ti_ads7950_chip_info *info; |
| 383 | int ret; |
| 384 | |
| 385 | indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); |
| 386 | if (!indio_dev) |
| 387 | return -ENOMEM; |
| 388 | |
| 389 | st = iio_priv(indio_dev); |
| 390 | |
| 391 | spi_set_drvdata(spi, indio_dev); |
| 392 | |
| 393 | st->spi = spi; |
| 394 | st->settings = TI_ADS7950_CR_MANUAL | TI_ADS7950_CR_RANGE_5V; |
| 395 | |
| 396 | info = &ti_ads7950_chip_info[spi_get_device_id(spi)->driver_data]; |
| 397 | |
| 398 | indio_dev->name = spi_get_device_id(spi)->name; |
| 399 | indio_dev->dev.parent = &spi->dev; |
| 400 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 401 | indio_dev->channels = info->channels; |
| 402 | indio_dev->num_channels = info->num_channels; |
| 403 | indio_dev->info = &ti_ads7950_info; |
| 404 | |
| 405 | /* |
| 406 | * Setup default message. The sample is read at the end of the first |
| 407 | * transfer, then it takes one full cycle to convert the sample and one |
| 408 | * more cycle to send the value. The conversion process is driven by |
| 409 | * the SPI clock, which is why we have 3 transfers. The middle one is |
| 410 | * just dummy data sent while the chip is converting the sample that |
| 411 | * was read at the end of the first transfer. |
| 412 | */ |
| 413 | |
| 414 | st->scan_single_xfer[0].tx_buf = &st->tx_buf[0]; |
| 415 | st->scan_single_xfer[0].len = 2; |
| 416 | st->scan_single_xfer[0].cs_change = 1; |
| 417 | st->scan_single_xfer[1].tx_buf = &st->tx_buf[0]; |
| 418 | st->scan_single_xfer[1].len = 2; |
| 419 | st->scan_single_xfer[1].cs_change = 1; |
| 420 | st->scan_single_xfer[2].rx_buf = &st->rx_buf[0]; |
| 421 | st->scan_single_xfer[2].len = 2; |
| 422 | |
| 423 | spi_message_init_with_transfers(&st->scan_single_msg, |
| 424 | st->scan_single_xfer, 3); |
| 425 | |
Andy Shevchenko | 8cfa26a | 2017-07-29 01:20:14 +0300 | [diff] [blame^] | 426 | /* Use hard coded value for reference voltage in ACPI case */ |
| 427 | if (ACPI_COMPANION(&spi->dev)) |
| 428 | st->vref_mv = TI_ADS7950_VA_MV_ACPI_DEFAULT; |
| 429 | |
David Lechner | 0bf1a2a | 2017-01-11 11:52:51 -0600 | [diff] [blame] | 430 | st->reg = devm_regulator_get(&spi->dev, "vref"); |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 431 | if (IS_ERR(st->reg)) { |
David Lechner | 0bf1a2a | 2017-01-11 11:52:51 -0600 | [diff] [blame] | 432 | dev_err(&spi->dev, "Failed get get regulator \"vref\"\n"); |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 433 | return PTR_ERR(st->reg); |
| 434 | } |
| 435 | |
| 436 | ret = regulator_enable(st->reg); |
| 437 | if (ret) { |
David Lechner | 0bf1a2a | 2017-01-11 11:52:51 -0600 | [diff] [blame] | 438 | dev_err(&spi->dev, "Failed to enable regulator \"vref\"\n"); |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 439 | return ret; |
| 440 | } |
| 441 | |
| 442 | ret = iio_triggered_buffer_setup(indio_dev, NULL, |
| 443 | &ti_ads7950_trigger_handler, NULL); |
| 444 | if (ret) { |
| 445 | dev_err(&spi->dev, "Failed to setup triggered buffer\n"); |
| 446 | goto error_disable_reg; |
| 447 | } |
| 448 | |
| 449 | ret = iio_device_register(indio_dev); |
| 450 | if (ret) { |
| 451 | dev_err(&spi->dev, "Failed to register iio device\n"); |
| 452 | goto error_cleanup_ring; |
| 453 | } |
| 454 | |
| 455 | return 0; |
| 456 | |
| 457 | error_cleanup_ring: |
| 458 | iio_triggered_buffer_cleanup(indio_dev); |
| 459 | error_disable_reg: |
| 460 | regulator_disable(st->reg); |
| 461 | |
| 462 | return ret; |
| 463 | } |
| 464 | |
| 465 | static int ti_ads7950_remove(struct spi_device *spi) |
| 466 | { |
| 467 | struct iio_dev *indio_dev = spi_get_drvdata(spi); |
| 468 | struct ti_ads7950_state *st = iio_priv(indio_dev); |
| 469 | |
| 470 | iio_device_unregister(indio_dev); |
| 471 | iio_triggered_buffer_cleanup(indio_dev); |
| 472 | regulator_disable(st->reg); |
| 473 | |
| 474 | return 0; |
| 475 | } |
| 476 | |
| 477 | static const struct spi_device_id ti_ads7950_id[] = { |
David Lechner | 2b84f4d | 2017-01-11 11:52:50 -0600 | [diff] [blame] | 478 | { "ads7950", TI_ADS7950 }, |
| 479 | { "ads7951", TI_ADS7951 }, |
| 480 | { "ads7952", TI_ADS7952 }, |
| 481 | { "ads7953", TI_ADS7953 }, |
| 482 | { "ads7954", TI_ADS7954 }, |
| 483 | { "ads7955", TI_ADS7955 }, |
| 484 | { "ads7956", TI_ADS7956 }, |
| 485 | { "ads7957", TI_ADS7957 }, |
| 486 | { "ads7958", TI_ADS7958 }, |
| 487 | { "ads7959", TI_ADS7959 }, |
| 488 | { "ads7960", TI_ADS7960 }, |
| 489 | { "ads7961", TI_ADS7961 }, |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 490 | { } |
| 491 | }; |
| 492 | MODULE_DEVICE_TABLE(spi, ti_ads7950_id); |
| 493 | |
Andy Shevchenko | fb4b6f9 | 2017-07-29 01:20:15 +0300 | [diff] [blame] | 494 | static const struct of_device_id ads7950_of_table[] = { |
| 495 | { .compatible = "ti,ads7950", .data = &ti_ads7950_chip_info[TI_ADS7950] }, |
| 496 | { .compatible = "ti,ads7951", .data = &ti_ads7950_chip_info[TI_ADS7951] }, |
| 497 | { .compatible = "ti,ads7952", .data = &ti_ads7950_chip_info[TI_ADS7952] }, |
| 498 | { .compatible = "ti,ads7953", .data = &ti_ads7950_chip_info[TI_ADS7953] }, |
| 499 | { .compatible = "ti,ads7954", .data = &ti_ads7950_chip_info[TI_ADS7954] }, |
| 500 | { .compatible = "ti,ads7955", .data = &ti_ads7950_chip_info[TI_ADS7955] }, |
| 501 | { .compatible = "ti,ads7956", .data = &ti_ads7950_chip_info[TI_ADS7956] }, |
| 502 | { .compatible = "ti,ads7957", .data = &ti_ads7950_chip_info[TI_ADS7957] }, |
| 503 | { .compatible = "ti,ads7958", .data = &ti_ads7950_chip_info[TI_ADS7958] }, |
| 504 | { .compatible = "ti,ads7959", .data = &ti_ads7950_chip_info[TI_ADS7959] }, |
| 505 | { .compatible = "ti,ads7960", .data = &ti_ads7950_chip_info[TI_ADS7960] }, |
| 506 | { .compatible = "ti,ads7961", .data = &ti_ads7950_chip_info[TI_ADS7961] }, |
| 507 | { }, |
| 508 | }; |
| 509 | MODULE_DEVICE_TABLE(of, ads7950_of_table); |
| 510 | |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 511 | static struct spi_driver ti_ads7950_driver = { |
| 512 | .driver = { |
David Lechner | 2b84f4d | 2017-01-11 11:52:50 -0600 | [diff] [blame] | 513 | .name = "ads7950", |
Andy Shevchenko | fb4b6f9 | 2017-07-29 01:20:15 +0300 | [diff] [blame] | 514 | .of_match_table = ads7950_of_table, |
David Lechner | 902c4b2 | 2016-11-28 10:58:15 -0600 | [diff] [blame] | 515 | }, |
| 516 | .probe = ti_ads7950_probe, |
| 517 | .remove = ti_ads7950_remove, |
| 518 | .id_table = ti_ads7950_id, |
| 519 | }; |
| 520 | module_spi_driver(ti_ads7950_driver); |
| 521 | |
| 522 | MODULE_AUTHOR("David Lechner <david@lechnology.com>"); |
| 523 | MODULE_DESCRIPTION("TI TI_ADS7950 ADC"); |
| 524 | MODULE_LICENSE("GPL v2"); |