blob: 50742990a136f07a02f0e2f99d4debdc9257f5ae [file] [log] [blame]
Shawn Guo9daaf312011-10-17 08:42:17 +08001/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/irq.h>
Shawn Guo9daaf312011-10-17 08:42:17 +080014#include <linux/of_irq.h>
15#include <linux/of_platform.h>
16#include <asm/mach/arch.h>
17#include <asm/mach/time.h>
Shawn Guo9daaf312011-10-17 08:42:17 +080018
Shawn Guoe3372472012-09-13 21:01:00 +080019#include "common.h"
Shawn Guo50f2de62012-09-14 14:14:45 +080020#include "mx51.h"
Shawn Guoe3372472012-09-13 21:01:00 +080021
Shawn Guo9daaf312011-10-17 08:42:17 +080022/*
23 * Lookup table for attaching a specific name and platform_data pointer to
24 * devices as they get created by of_platform_populate(). Ideally this table
25 * would not exist, but the current clock implementation depends on some devices
26 * having a specific name.
27 */
28static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
29 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART1_BASE_ADDR, "imx21-uart.0", NULL),
30 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART2_BASE_ADDR, "imx21-uart.1", NULL),
31 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART3_BASE_ADDR, "imx21-uart.2", NULL),
32 OF_DEV_AUXDATA("fsl,imx51-fec", MX51_FEC_BASE_ADDR, "imx27-fec.0", NULL),
33 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx51.0", NULL),
34 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx51.1", NULL),
35 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx51.2", NULL),
36 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx51.3", NULL),
37 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
38 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
39 OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
Shawn Guo5bdfba22012-09-14 15:19:00 +080040 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
41 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
Shawn Guo9daaf312011-10-17 08:42:17 +080042 OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
43 OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
44 { /* sentinel */ }
45};
46
Shawn Guo9daaf312011-10-17 08:42:17 +080047static void __init imx51_dt_init(void)
48{
Shawn Guo9daaf312011-10-17 08:42:17 +080049 of_platform_populate(NULL, of_default_bus_match_table,
50 imx51_auxdata_lookup, NULL);
51}
52
53static void __init imx51_timer_init(void)
54{
55 mx51_clocks_init_dt();
56}
57
58static struct sys_timer imx51_timer = {
59 .init = imx51_timer_init,
60};
61
62static const char *imx51_dt_board_compat[] __initdata = {
Sascha Hauer3f8976d2012-02-17 12:07:00 +010063 "fsl,imx51",
Shawn Guo9daaf312011-10-17 08:42:17 +080064 NULL
65};
66
67DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
68 .map_io = mx51_map_io,
69 .init_early = imx51_init_early,
70 .init_irq = mx51_init_irq,
71 .handle_irq = imx51_handle_irq,
72 .timer = &imx51_timer,
73 .init_machine = imx51_dt_init,
Shawn Guo8321b752012-04-26 11:42:34 +080074 .init_late = imx51_init_late,
Shawn Guo9daaf312011-10-17 08:42:17 +080075 .dt_compat = imx51_dt_board_compat,
Russell King65ea7882011-11-06 17:12:08 +000076 .restart = mxc_restart,
Shawn Guo9daaf312011-10-17 08:42:17 +080077MACHINE_END