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Solomon Peachya910e4a2013-05-24 20:04:38 -04001/*
2 * Mac80211 SPI driver for ST-Ericsson CW1200 device
3 *
4 * Copyright (c) 2011, Sagrad Inc.
5 * Author: Solomon Peachy <speachy@sagrad.com>
6 *
7 * Based on cw1200_sdio.c
8 * Copyright (c) 2010, ST-Ericsson
9 * Author: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
Solomon Peachya910e4a2013-05-24 20:04:38 -040016#include <linux/module.h>
17#include <linux/gpio.h>
18#include <linux/delay.h>
19#include <linux/spinlock.h>
20#include <linux/interrupt.h>
21#include <net/mac80211.h>
22
23#include <linux/spi/spi.h>
24#include <linux/device.h>
25
26#include "cw1200.h"
Solomon Peachy911373c2013-06-01 08:08:42 -040027#include "hwbus.h"
Solomon Peachy4da2a54a2013-06-02 11:35:32 -040028#include <linux/platform_data/net-cw1200.h>
Solomon Peachya910e4a2013-05-24 20:04:38 -040029#include "hwio.h"
30
31MODULE_AUTHOR("Solomon Peachy <speachy@sagrad.com>");
32MODULE_DESCRIPTION("mac80211 ST-Ericsson CW1200 SPI driver");
33MODULE_LICENSE("GPL");
34MODULE_ALIAS("spi:cw1200_wlan_spi");
35
36/* #define SPI_DEBUG */
37
Solomon Peachy911373c2013-06-01 08:08:42 -040038struct hwbus_priv {
Solomon Peachya910e4a2013-05-24 20:04:38 -040039 struct spi_device *func;
40 struct cw1200_common *core;
41 const struct cw1200_platform_data_spi *pdata;
42 spinlock_t lock; /* Serialize all bus operations */
Solomon Peachy85ba8f52013-08-27 20:29:47 -040043 wait_queue_head_t wq;
Solomon Peachya910e4a2013-05-24 20:04:38 -040044 int claimed;
45};
46
47#define SDIO_TO_SPI_ADDR(addr) ((addr & 0x1f)>>2)
48#define SET_WRITE 0x7FFF /* usage: and operation */
49#define SET_READ 0x8000 /* usage: or operation */
50
Solomon Peachy8b3e7be2013-06-11 09:49:40 -040051/* Notes on byte ordering:
Solomon Peachya910e4a2013-05-24 20:04:38 -040052 LE: B0 B1 B2 B3
53 BE: B3 B2 B1 B0
54
55 Hardware expects 32-bit data to be written as 16-bit BE words:
56
57 B1 B0 B3 B2
Solomon Peachya910e4a2013-05-24 20:04:38 -040058*/
59
Solomon Peachy911373c2013-06-01 08:08:42 -040060static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self,
Solomon Peachya910e4a2013-05-24 20:04:38 -040061 unsigned int addr,
62 void *dst, int count)
63{
64 int ret, i;
Solomon Peachy72584162013-06-20 23:03:12 -040065 u16 regaddr;
Solomon Peachya910e4a2013-05-24 20:04:38 -040066 struct spi_message m;
67
68 struct spi_transfer t_addr = {
69 .tx_buf = &regaddr,
70 .len = sizeof(regaddr),
71 };
72 struct spi_transfer t_msg = {
73 .rx_buf = dst,
74 .len = count,
75 };
76
77 regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
78 regaddr |= SET_READ;
79 regaddr |= (count>>1);
Solomon Peachya910e4a2013-05-24 20:04:38 -040080
81#ifdef SPI_DEBUG
Solomon Peachy72584162013-06-20 23:03:12 -040082 pr_info("READ : %04d from 0x%02x (%04x)\n", count, addr, regaddr);
Solomon Peachya910e4a2013-05-24 20:04:38 -040083#endif
84
Solomon Peachy72584162013-06-20 23:03:12 -040085 /* Header is LE16 */
86 regaddr = cpu_to_le16(regaddr);
87
88 /* We have to byteswap if the SPI bus is limited to 8b operation
89 or we are running on a Big Endian system
90 */
Solomon Peachya910e4a2013-05-24 20:04:38 -040091#if defined(__LITTLE_ENDIAN)
Solomon Peachya910e4a2013-05-24 20:04:38 -040092 if (self->func->bits_per_word == 8)
93#endif
94 regaddr = swab16(regaddr);
95
96 spi_message_init(&m);
97 spi_message_add_tail(&t_addr, &m);
98 spi_message_add_tail(&t_msg, &m);
99 ret = spi_sync(self->func, &m);
100
101#ifdef SPI_DEBUG
102 pr_info("READ : ");
103 for (i = 0; i < t_addr.len; i++)
104 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
105 printk(" : ");
106 for (i = 0; i < t_msg.len; i++)
107 printk("%02x ", ((u8 *)t_msg.rx_buf)[i]);
108 printk("\n");
109#endif
110
Solomon Peachy72584162013-06-20 23:03:12 -0400111 /* We have to byteswap if the SPI bus is limited to 8b operation
112 or we are running on a Big Endian system
113 */
Solomon Peachya910e4a2013-05-24 20:04:38 -0400114#if defined(__LITTLE_ENDIAN)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400115 if (self->func->bits_per_word == 8)
116#endif
117 {
118 uint16_t *buf = (uint16_t *)dst;
119 for (i = 0; i < ((count + 1) >> 1); i++)
120 buf[i] = swab16(buf[i]);
121 }
122
123 return ret;
124}
125
Solomon Peachy911373c2013-06-01 08:08:42 -0400126static int cw1200_spi_memcpy_toio(struct hwbus_priv *self,
Solomon Peachya910e4a2013-05-24 20:04:38 -0400127 unsigned int addr,
128 const void *src, int count)
129{
130 int rval, i;
Solomon Peachy72584162013-06-20 23:03:12 -0400131 u16 regaddr;
Solomon Peachya910e4a2013-05-24 20:04:38 -0400132 struct spi_transfer t_addr = {
133 .tx_buf = &regaddr,
134 .len = sizeof(regaddr),
135 };
136 struct spi_transfer t_msg = {
137 .tx_buf = src,
138 .len = count,
139 };
140 struct spi_message m;
141
142 regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
143 regaddr &= SET_WRITE;
144 regaddr |= (count>>1);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400145
146#ifdef SPI_DEBUG
Solomon Peachy72584162013-06-20 23:03:12 -0400147 pr_info("WRITE: %04d to 0x%02x (%04x)\n", count, addr, regaddr);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400148#endif
149
Solomon Peachy72584162013-06-20 23:03:12 -0400150 /* Header is LE16 */
151 regaddr = cpu_to_le16(regaddr);
152
153 /* We have to byteswap if the SPI bus is limited to 8b operation
154 or we are running on a Big Endian system
155 */
Solomon Peachya910e4a2013-05-24 20:04:38 -0400156#if defined(__LITTLE_ENDIAN)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400157 if (self->func->bits_per_word == 8)
158#endif
159 {
160 uint16_t *buf = (uint16_t *)src;
Solomon Peachy72584162013-06-20 23:03:12 -0400161 regaddr = swab16(regaddr);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400162 for (i = 0; i < ((count + 1) >> 1); i++)
163 buf[i] = swab16(buf[i]);
164 }
165
166#ifdef SPI_DEBUG
167 pr_info("WRITE: ");
168 for (i = 0; i < t_addr.len; i++)
169 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
170 printk(" : ");
171 for (i = 0; i < t_msg.len; i++)
172 printk("%02x ", ((u8 *)t_msg.tx_buf)[i]);
173 printk("\n");
174#endif
175
176 spi_message_init(&m);
177 spi_message_add_tail(&t_addr, &m);
178 spi_message_add_tail(&t_msg, &m);
179 rval = spi_sync(self->func, &m);
180
181#ifdef SPI_DEBUG
182 pr_info("WROTE: %d\n", m.actual_length);
183#endif
184
185#if defined(__LITTLE_ENDIAN)
186 /* We have to byteswap if the SPI bus is limited to 8b operation */
187 if (self->func->bits_per_word == 8)
188#endif
189 {
190 uint16_t *buf = (uint16_t *)src;
191 for (i = 0; i < ((count + 1) >> 1); i++)
192 buf[i] = swab16(buf[i]);
193 }
194 return rval;
195}
196
Solomon Peachy911373c2013-06-01 08:08:42 -0400197static void cw1200_spi_lock(struct hwbus_priv *self)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400198{
199 unsigned long flags;
200
Solomon Peachy85ba8f52013-08-27 20:29:47 -0400201 DECLARE_WAITQUEUE(wait, current);
202
Solomon Peachya910e4a2013-05-24 20:04:38 -0400203 might_sleep();
204
Solomon Peachy85ba8f52013-08-27 20:29:47 -0400205 add_wait_queue(&self->wq, &wait);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400206 spin_lock_irqsave(&self->lock, flags);
207 while (1) {
208 set_current_state(TASK_UNINTERRUPTIBLE);
209 if (!self->claimed)
210 break;
211 spin_unlock_irqrestore(&self->lock, flags);
212 schedule();
213 spin_lock_irqsave(&self->lock, flags);
214 }
215 set_current_state(TASK_RUNNING);
216 self->claimed = 1;
217 spin_unlock_irqrestore(&self->lock, flags);
Solomon Peachy85ba8f52013-08-27 20:29:47 -0400218 remove_wait_queue(&self->wq, &wait);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400219
220 return;
221}
222
Solomon Peachy911373c2013-06-01 08:08:42 -0400223static void cw1200_spi_unlock(struct hwbus_priv *self)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400224{
225 unsigned long flags;
226
227 spin_lock_irqsave(&self->lock, flags);
228 self->claimed = 0;
229 spin_unlock_irqrestore(&self->lock, flags);
Solomon Peachy85ba8f52013-08-27 20:29:47 -0400230 wake_up(&self->wq);
231
Solomon Peachya910e4a2013-05-24 20:04:38 -0400232 return;
233}
234
235static irqreturn_t cw1200_spi_irq_handler(int irq, void *dev_id)
236{
Solomon Peachy911373c2013-06-01 08:08:42 -0400237 struct hwbus_priv *self = dev_id;
Solomon Peachya910e4a2013-05-24 20:04:38 -0400238
239 if (self->core) {
Solomon Peachy49787052013-10-09 12:15:11 -0400240 cw1200_spi_lock(self);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400241 cw1200_irq_handler(self->core);
Solomon Peachy49787052013-10-09 12:15:11 -0400242 cw1200_spi_unlock(self);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400243 return IRQ_HANDLED;
244 } else {
245 return IRQ_NONE;
246 }
247}
248
Solomon Peachy911373c2013-06-01 08:08:42 -0400249static int cw1200_spi_irq_subscribe(struct hwbus_priv *self)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400250{
251 int ret;
252
253 pr_debug("SW IRQ subscribe\n");
254
Solomon Peachy87421cb2013-09-23 16:00:04 -0400255 ret = request_threaded_irq(self->func->irq, NULL,
256 cw1200_spi_irq_handler,
257 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
258 "cw1200_wlan_irq", self);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400259 if (WARN_ON(ret < 0))
260 goto exit;
261
262 ret = enable_irq_wake(self->func->irq);
263 if (WARN_ON(ret))
264 goto free_irq;
265
266 return 0;
267
268free_irq:
269 free_irq(self->func->irq, self);
270exit:
271 return ret;
272}
273
Solomon Peachy911373c2013-06-01 08:08:42 -0400274static int cw1200_spi_irq_unsubscribe(struct hwbus_priv *self)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400275{
Solomon Peachyc4fb19d2013-09-23 16:00:03 -0400276 int ret = 0;
277
Solomon Peachya910e4a2013-05-24 20:04:38 -0400278 pr_debug("SW IRQ unsubscribe\n");
279 disable_irq_wake(self->func->irq);
280 free_irq(self->func->irq, self);
281
Solomon Peachyc4fb19d2013-09-23 16:00:03 -0400282 return ret;
Solomon Peachya910e4a2013-05-24 20:04:38 -0400283}
284
285static int cw1200_spi_off(const struct cw1200_platform_data_spi *pdata)
286{
Solomon Peachy6dd64a32013-06-02 09:53:03 -0400287 if (pdata->reset) {
288 gpio_set_value(pdata->reset, 0);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400289 msleep(30); /* Min is 2 * CLK32K cycles */
Solomon Peachy6dd64a32013-06-02 09:53:03 -0400290 gpio_free(pdata->reset);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400291 }
292
293 if (pdata->power_ctrl)
294 pdata->power_ctrl(pdata, false);
295 if (pdata->clk_ctrl)
296 pdata->clk_ctrl(pdata, false);
297
298 return 0;
299}
300
301static int cw1200_spi_on(const struct cw1200_platform_data_spi *pdata)
302{
Solomon Peachya910e4a2013-05-24 20:04:38 -0400303 /* Ensure I/Os are pulled low */
Solomon Peachy6dd64a32013-06-02 09:53:03 -0400304 if (pdata->reset) {
305 gpio_request(pdata->reset, "cw1200_wlan_reset");
306 gpio_direction_output(pdata->reset, 0);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400307 }
Solomon Peachy6dd64a32013-06-02 09:53:03 -0400308 if (pdata->powerup) {
309 gpio_request(pdata->powerup, "cw1200_wlan_powerup");
310 gpio_direction_output(pdata->powerup, 0);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400311 }
Solomon Peachy6dd64a32013-06-02 09:53:03 -0400312 if (pdata->reset || pdata->powerup)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400313 msleep(10); /* Settle time? */
314
315 /* Enable 3v3 and 1v8 to hardware */
316 if (pdata->power_ctrl) {
317 if (pdata->power_ctrl(pdata, true)) {
318 pr_err("power_ctrl() failed!\n");
319 return -1;
320 }
321 }
322
323 /* Enable CLK32K */
324 if (pdata->clk_ctrl) {
325 if (pdata->clk_ctrl(pdata, true)) {
326 pr_err("clk_ctrl() failed!\n");
327 return -1;
328 }
329 msleep(10); /* Delay until clock is stable for 2 cycles */
330 }
331
332 /* Enable POWERUP signal */
Solomon Peachy6dd64a32013-06-02 09:53:03 -0400333 if (pdata->powerup) {
334 gpio_set_value(pdata->powerup, 1);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400335 msleep(250); /* or more..? */
336 }
337 /* Enable RSTn signal */
Solomon Peachy6dd64a32013-06-02 09:53:03 -0400338 if (pdata->reset) {
339 gpio_set_value(pdata->reset, 1);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400340 msleep(50); /* Or more..? */
341 }
342 return 0;
343}
344
Solomon Peachy911373c2013-06-01 08:08:42 -0400345static size_t cw1200_spi_align_size(struct hwbus_priv *self, size_t size)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400346{
347 return size & 1 ? size + 1 : size;
348}
349
Solomon Peachy911373c2013-06-01 08:08:42 -0400350static int cw1200_spi_pm(struct hwbus_priv *self, bool suspend)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400351{
352 return irq_set_irq_wake(self->func->irq, suspend);
353}
354
Solomon Peachy911373c2013-06-01 08:08:42 -0400355static struct hwbus_ops cw1200_spi_hwbus_ops = {
356 .hwbus_memcpy_fromio = cw1200_spi_memcpy_fromio,
357 .hwbus_memcpy_toio = cw1200_spi_memcpy_toio,
Solomon Peachya910e4a2013-05-24 20:04:38 -0400358 .lock = cw1200_spi_lock,
359 .unlock = cw1200_spi_unlock,
360 .align_size = cw1200_spi_align_size,
361 .power_mgmt = cw1200_spi_pm,
362};
363
364/* Probe Function to be called by SPI stack when device is discovered */
365static int cw1200_spi_probe(struct spi_device *func)
366{
367 const struct cw1200_platform_data_spi *plat_data =
Jingoo Han3ec8a8d2013-09-10 17:55:41 +0900368 dev_get_platdata(&func->dev);
Solomon Peachy911373c2013-06-01 08:08:42 -0400369 struct hwbus_priv *self;
Solomon Peachya910e4a2013-05-24 20:04:38 -0400370 int status;
371
372 /* Sanity check speed */
373 if (func->max_speed_hz > 52000000)
374 func->max_speed_hz = 52000000;
375 if (func->max_speed_hz < 1000000)
376 func->max_speed_hz = 1000000;
377
378 /* Fix up transfer size */
379 if (plat_data->spi_bits_per_word)
380 func->bits_per_word = plat_data->spi_bits_per_word;
381 if (!func->bits_per_word)
382 func->bits_per_word = 16;
383
384 /* And finally.. */
385 func->mode = SPI_MODE_0;
386
387 pr_info("cw1200_wlan_spi: Probe called (CS %d M %d BPW %d CLK %d)\n",
388 func->chip_select, func->mode, func->bits_per_word,
389 func->max_speed_hz);
390
391 if (cw1200_spi_on(plat_data)) {
392 pr_err("spi_on() failed!\n");
393 return -1;
394 }
395
396 if (spi_setup(func)) {
397 pr_err("spi_setup() failed!\n");
398 return -1;
399 }
400
Himangi Saraogi26c06042014-08-02 20:22:46 +0530401 self = devm_kzalloc(&func->dev, sizeof(*self), GFP_KERNEL);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400402 if (!self) {
Solomon Peachy911373c2013-06-01 08:08:42 -0400403 pr_err("Can't allocate SPI hwbus_priv.");
Solomon Peachya910e4a2013-05-24 20:04:38 -0400404 return -ENOMEM;
405 }
406
407 self->pdata = plat_data;
408 self->func = func;
409 spin_lock_init(&self->lock);
410
411 spi_set_drvdata(func, self);
412
Solomon Peachy85ba8f52013-08-27 20:29:47 -0400413 init_waitqueue_head(&self->wq);
414
Solomon Peachya910e4a2013-05-24 20:04:38 -0400415 status = cw1200_spi_irq_subscribe(self);
416
Solomon Peachy911373c2013-06-01 08:08:42 -0400417 status = cw1200_core_probe(&cw1200_spi_hwbus_ops,
Solomon Peachya910e4a2013-05-24 20:04:38 -0400418 self, &func->dev, &self->core,
419 self->pdata->ref_clk,
420 self->pdata->macaddr,
421 self->pdata->sdd_file,
422 self->pdata->have_5ghz);
423
424 if (status) {
425 cw1200_spi_irq_unsubscribe(self);
426 cw1200_spi_off(plat_data);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400427 }
428
429 return status;
430}
431
432/* Disconnect Function to be called by SPI stack when device is disconnected */
433static int cw1200_spi_disconnect(struct spi_device *func)
434{
Solomon Peachy911373c2013-06-01 08:08:42 -0400435 struct hwbus_priv *self = spi_get_drvdata(func);
Solomon Peachya910e4a2013-05-24 20:04:38 -0400436
437 if (self) {
438 cw1200_spi_irq_unsubscribe(self);
439 if (self->core) {
440 cw1200_core_release(self->core);
441 self->core = NULL;
442 }
Solomon Peachya910e4a2013-05-24 20:04:38 -0400443 }
Jingoo Han3ec8a8d2013-09-10 17:55:41 +0900444 cw1200_spi_off(dev_get_platdata(&func->dev));
Solomon Peachya910e4a2013-05-24 20:04:38 -0400445
446 return 0;
447}
448
Solomon Peachy4e17b872013-05-29 22:22:05 -0400449#ifdef CONFIG_PM
Lars-Peter Clausen8fbb2e92015-03-15 14:26:20 +0100450static int cw1200_spi_suspend(struct device *dev)
Solomon Peachya910e4a2013-05-24 20:04:38 -0400451{
Solomon Peachy911373c2013-06-01 08:08:42 -0400452 struct hwbus_priv *self = spi_get_drvdata(to_spi_device(dev));
Solomon Peachya910e4a2013-05-24 20:04:38 -0400453
454 if (!cw1200_can_suspend(self->core))
455 return -EAGAIN;
456
457 /* XXX notify host that we have to keep CW1200 powered on? */
458 return 0;
459}
460
Lars-Peter Clausen8fbb2e92015-03-15 14:26:20 +0100461static SIMPLE_DEV_PM_OPS(cw1200_pm_ops, cw1200_spi_suspend, NULL);
462
Solomon Peachy4e17b872013-05-29 22:22:05 -0400463#endif
Solomon Peachya910e4a2013-05-24 20:04:38 -0400464
465static struct spi_driver spi_driver = {
466 .probe = cw1200_spi_probe,
467 .remove = cw1200_spi_disconnect,
468 .driver = {
469 .name = "cw1200_wlan_spi",
470 .bus = &spi_bus_type,
471 .owner = THIS_MODULE,
Solomon Peachy4e17b872013-05-29 22:22:05 -0400472#ifdef CONFIG_PM
Lars-Peter Clausen8fbb2e92015-03-15 14:26:20 +0100473 .pm = &cw1200_pm_ops,
Solomon Peachy4e17b872013-05-29 22:22:05 -0400474#endif
Solomon Peachya910e4a2013-05-24 20:04:38 -0400475 },
476};
477
Wei Yongjund071c042013-05-30 19:42:54 +0800478module_spi_driver(spi_driver);