blob: 34c381f009b77b13aa90e67be90b25b45375552f [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +01001/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
Ben Hutchings906bb262009-11-29 15:16:19 +00004 * Copyright 2005-2009 Solarflare Communications Inc.
Ben Hutchings8ceee662008-04-27 12:55:59 +01005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11/* Common definitions for all Efx net driver code */
12
13#ifndef EFX_NET_DRIVER_H
14#define EFX_NET_DRIVER_H
15
16#include <linux/version.h>
17#include <linux/netdevice.h>
18#include <linux/etherdevice.h>
19#include <linux/ethtool.h>
20#include <linux/if_vlan.h>
21#include <linux/timer.h>
Ben Hutchings68e7f452009-04-29 08:05:08 +000022#include <linux/mdio.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010023#include <linux/list.h>
24#include <linux/pci.h>
25#include <linux/device.h>
26#include <linux/highmem.h>
27#include <linux/workqueue.h>
Ben Hutchings37b5a602008-05-30 22:27:04 +010028#include <linux/i2c.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010029
30#include "enum.h"
31#include "bitfield.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010032
Ben Hutchings8ceee662008-04-27 12:55:59 +010033/**************************************************************************
34 *
35 * Build definitions
36 *
37 **************************************************************************/
38#ifndef EFX_DRIVER_NAME
39#define EFX_DRIVER_NAME "sfc"
40#endif
Ben Hutchings906bb262009-11-29 15:16:19 +000041#define EFX_DRIVER_VERSION "3.0"
Ben Hutchings8ceee662008-04-27 12:55:59 +010042
43#ifdef EFX_ENABLE_DEBUG
44#define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
45#define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
46#else
47#define EFX_BUG_ON_PARANOID(x) do {} while (0)
48#define EFX_WARN_ON_PARANOID(x) do {} while (0)
49#endif
50
Ben Hutchings8ceee662008-04-27 12:55:59 +010051/* Un-rate-limited logging */
52#define EFX_ERR(efx, fmt, args...) \
Ben Hutchings55668612008-05-16 21:16:10 +010053dev_err(&((efx)->pci_dev->dev), "ERR: %s " fmt, efx_dev_name(efx), ##args)
Ben Hutchings8ceee662008-04-27 12:55:59 +010054
55#define EFX_INFO(efx, fmt, args...) \
Ben Hutchings55668612008-05-16 21:16:10 +010056dev_info(&((efx)->pci_dev->dev), "INFO: %s " fmt, efx_dev_name(efx), ##args)
Ben Hutchings8ceee662008-04-27 12:55:59 +010057
58#ifdef EFX_ENABLE_DEBUG
59#define EFX_LOG(efx, fmt, args...) \
Ben Hutchings55668612008-05-16 21:16:10 +010060dev_info(&((efx)->pci_dev->dev), "DBG: %s " fmt, efx_dev_name(efx), ##args)
Ben Hutchings8ceee662008-04-27 12:55:59 +010061#else
62#define EFX_LOG(efx, fmt, args...) \
Ben Hutchings55668612008-05-16 21:16:10 +010063dev_dbg(&((efx)->pci_dev->dev), "DBG: %s " fmt, efx_dev_name(efx), ##args)
Ben Hutchings8ceee662008-04-27 12:55:59 +010064#endif
65
66#define EFX_TRACE(efx, fmt, args...) do {} while (0)
67
68#define EFX_REGDUMP(efx, fmt, args...) do {} while (0)
69
70/* Rate-limited logging */
71#define EFX_ERR_RL(efx, fmt, args...) \
72do {if (net_ratelimit()) EFX_ERR(efx, fmt, ##args); } while (0)
73
74#define EFX_INFO_RL(efx, fmt, args...) \
75do {if (net_ratelimit()) EFX_INFO(efx, fmt, ##args); } while (0)
76
77#define EFX_LOG_RL(efx, fmt, args...) \
78do {if (net_ratelimit()) EFX_LOG(efx, fmt, ##args); } while (0)
79
Ben Hutchings8ceee662008-04-27 12:55:59 +010080/**************************************************************************
81 *
82 * Efx data structures
83 *
84 **************************************************************************/
85
86#define EFX_MAX_CHANNELS 32
Ben Hutchings8ceee662008-04-27 12:55:59 +010087#define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
88
Ben Hutchings60ac1062008-09-01 12:44:59 +010089#define EFX_TX_QUEUE_OFFLOAD_CSUM 0
90#define EFX_TX_QUEUE_NO_CSUM 1
91#define EFX_TX_QUEUE_COUNT 2
92
Ben Hutchings8ceee662008-04-27 12:55:59 +010093/**
94 * struct efx_special_buffer - An Efx special buffer
95 * @addr: CPU base address of the buffer
96 * @dma_addr: DMA base address of the buffer
97 * @len: Buffer length, in bytes
98 * @index: Buffer index within controller;s buffer table
99 * @entries: Number of buffer table entries
100 *
101 * Special buffers are used for the event queues and the TX and RX
102 * descriptor queues for each channel. They are *not* used for the
103 * actual transmit and receive buffers.
104 *
105 * Note that for Falcon, TX and RX descriptor queues live in host memory.
106 * Allocation and freeing procedures must take this into account.
107 */
108struct efx_special_buffer {
109 void *addr;
110 dma_addr_t dma_addr;
111 unsigned int len;
112 int index;
113 int entries;
114};
115
Ben Hutchings127e6e12009-11-25 16:09:55 +0000116enum efx_flush_state {
117 FLUSH_NONE,
118 FLUSH_PENDING,
119 FLUSH_FAILED,
120 FLUSH_DONE,
121};
122
Ben Hutchings8ceee662008-04-27 12:55:59 +0100123/**
124 * struct efx_tx_buffer - An Efx TX buffer
125 * @skb: The associated socket buffer.
126 * Set only on the final fragment of a packet; %NULL for all other
127 * fragments. When this fragment completes, then we can free this
128 * skb.
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100129 * @tsoh: The associated TSO header structure, or %NULL if this
130 * buffer is not a TSO header.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100131 * @dma_addr: DMA address of the fragment.
132 * @len: Length of this fragment.
133 * This field is zero when the queue slot is empty.
134 * @continuation: True if this fragment is not the end of a packet.
135 * @unmap_single: True if pci_unmap_single should be used.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100136 * @unmap_len: Length of this fragment to unmap
137 */
138struct efx_tx_buffer {
139 const struct sk_buff *skb;
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100140 struct efx_tso_header *tsoh;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100141 dma_addr_t dma_addr;
142 unsigned short len;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100143 bool continuation;
144 bool unmap_single;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100145 unsigned short unmap_len;
146};
147
148/**
149 * struct efx_tx_queue - An Efx TX queue
150 *
151 * This is a ring buffer of TX fragments.
152 * Since the TX completion path always executes on the same
153 * CPU and the xmit path can operate on different CPUs,
154 * performance is increased by ensuring that the completion
155 * path and the xmit path operate on different cache lines.
156 * This is particularly important if the xmit path is always
157 * executing on one CPU which is different from the completion
158 * path. There is also a cache line for members which are
159 * read but not written on the fast path.
160 *
161 * @efx: The associated Efx NIC
162 * @queue: DMA queue number
Ben Hutchings8ceee662008-04-27 12:55:59 +0100163 * @channel: The associated channel
164 * @buffer: The software buffer ring
165 * @txd: The hardware descriptor ring
Ben Hutchings6bc5d3a2008-09-01 12:49:37 +0100166 * @flushed: Used when handling queue flushing
Ben Hutchings8ceee662008-04-27 12:55:59 +0100167 * @read_count: Current read pointer.
168 * This is the number of buffers that have been removed from both rings.
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100169 * @stopped: Stopped count.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100170 * Set if this TX queue is currently stopping its port.
171 * @insert_count: Current insert pointer
172 * This is the number of buffers that have been added to the
173 * software ring.
174 * @write_count: Current write pointer
175 * This is the number of buffers that have been added to the
176 * hardware ring.
177 * @old_read_count: The value of read_count when last checked.
178 * This is here for performance reasons. The xmit path will
179 * only get the up-to-date value of read_count if this
180 * variable indicates that the queue is full. This is to
181 * avoid cache-line ping-pong between the xmit path and the
182 * completion path.
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100183 * @tso_headers_free: A list of TSO headers allocated for this TX queue
184 * that are not in use, and so available for new TSO sends. The list
185 * is protected by the TX queue lock.
186 * @tso_bursts: Number of times TSO xmit invoked by kernel
187 * @tso_long_headers: Number of packets with headers too long for standard
188 * blocks
189 * @tso_packets: Number of packets via the TSO xmit path
Ben Hutchings8ceee662008-04-27 12:55:59 +0100190 */
191struct efx_tx_queue {
192 /* Members which don't change on the fast path */
193 struct efx_nic *efx ____cacheline_aligned_in_smp;
194 int queue;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100195 struct efx_channel *channel;
196 struct efx_nic *nic;
197 struct efx_tx_buffer *buffer;
198 struct efx_special_buffer txd;
Ben Hutchings127e6e12009-11-25 16:09:55 +0000199 enum efx_flush_state flushed;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100200
201 /* Members used mainly on the completion path */
202 unsigned int read_count ____cacheline_aligned_in_smp;
203 int stopped;
204
205 /* Members used only on the xmit path */
206 unsigned int insert_count ____cacheline_aligned_in_smp;
207 unsigned int write_count;
208 unsigned int old_read_count;
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100209 struct efx_tso_header *tso_headers_free;
210 unsigned int tso_bursts;
211 unsigned int tso_long_headers;
212 unsigned int tso_packets;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100213};
214
215/**
216 * struct efx_rx_buffer - An Efx RX data buffer
217 * @dma_addr: DMA base address of the buffer
218 * @skb: The associated socket buffer, if any.
219 * If both this and page are %NULL, the buffer slot is currently free.
220 * @page: The associated page buffer, if any.
221 * If both this and skb are %NULL, the buffer slot is currently free.
222 * @data: Pointer to ethernet header
223 * @len: Buffer length, in bytes.
224 * @unmap_addr: DMA address to unmap
225 */
226struct efx_rx_buffer {
227 dma_addr_t dma_addr;
228 struct sk_buff *skb;
229 struct page *page;
230 char *data;
231 unsigned int len;
232 dma_addr_t unmap_addr;
233};
234
235/**
236 * struct efx_rx_queue - An Efx RX queue
237 * @efx: The associated Efx NIC
238 * @queue: DMA queue number
Ben Hutchings8ceee662008-04-27 12:55:59 +0100239 * @channel: The associated channel
240 * @buffer: The software buffer ring
241 * @rxd: The hardware descriptor ring
242 * @added_count: Number of buffers added to the receive queue.
243 * @notified_count: Number of buffers given to NIC (<= @added_count).
244 * @removed_count: Number of buffers removed from the receive queue.
245 * @add_lock: Receive queue descriptor add spin lock.
246 * This lock must be held in order to add buffers to the RX
247 * descriptor ring (rxd and buffer) and to update added_count (but
248 * not removed_count).
249 * @max_fill: RX descriptor maximum fill level (<= ring size)
250 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
251 * (<= @max_fill)
252 * @fast_fill_limit: The level to which a fast fill will fill
253 * (@fast_fill_trigger <= @fast_fill_limit <= @max_fill)
254 * @min_fill: RX descriptor minimum non-zero fill level.
255 * This records the minimum fill level observed when a ring
256 * refill was triggered.
257 * @min_overfill: RX descriptor minimum overflow fill level.
258 * This records the minimum fill level at which RX queue
259 * overflow was observed. It should never be set.
260 * @alloc_page_count: RX allocation strategy counter.
261 * @alloc_skb_count: RX allocation strategy counter.
262 * @work: Descriptor push work thread
263 * @buf_page: Page for next RX buffer.
264 * We can use a single page for multiple RX buffers. This tracks
265 * the remaining space in the allocation.
266 * @buf_dma_addr: Page's DMA address.
267 * @buf_data: Page's host address.
Ben Hutchings6bc5d3a2008-09-01 12:49:37 +0100268 * @flushed: Use when handling queue flushing
Ben Hutchings8ceee662008-04-27 12:55:59 +0100269 */
270struct efx_rx_queue {
271 struct efx_nic *efx;
272 int queue;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100273 struct efx_channel *channel;
274 struct efx_rx_buffer *buffer;
275 struct efx_special_buffer rxd;
276
277 int added_count;
278 int notified_count;
279 int removed_count;
280 spinlock_t add_lock;
281 unsigned int max_fill;
282 unsigned int fast_fill_trigger;
283 unsigned int fast_fill_limit;
284 unsigned int min_fill;
285 unsigned int min_overfill;
286 unsigned int alloc_page_count;
287 unsigned int alloc_skb_count;
288 struct delayed_work work;
289 unsigned int slow_fill_count;
290
291 struct page *buf_page;
292 dma_addr_t buf_dma_addr;
293 char *buf_data;
Ben Hutchings127e6e12009-11-25 16:09:55 +0000294 enum efx_flush_state flushed;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100295};
296
297/**
298 * struct efx_buffer - An Efx general-purpose buffer
299 * @addr: host base address of the buffer
300 * @dma_addr: DMA base address of the buffer
301 * @len: Buffer length, in bytes
302 *
303 * Falcon uses these buffers for its interrupt status registers and
304 * MAC stats dumps.
305 */
306struct efx_buffer {
307 void *addr;
308 dma_addr_t dma_addr;
309 unsigned int len;
310};
311
312
313/* Flags for channel->used_flags */
314#define EFX_USED_BY_RX 1
315#define EFX_USED_BY_TX 2
316#define EFX_USED_BY_RX_TX (EFX_USED_BY_RX | EFX_USED_BY_TX)
317
318enum efx_rx_alloc_method {
319 RX_ALLOC_METHOD_AUTO = 0,
320 RX_ALLOC_METHOD_SKB = 1,
321 RX_ALLOC_METHOD_PAGE = 2,
322};
323
324/**
325 * struct efx_channel - An Efx channel
326 *
327 * A channel comprises an event queue, at least one TX queue, at least
328 * one RX queue, and an associated tasklet for processing the event
329 * queue.
330 *
331 * @efx: Associated Efx NIC
Ben Hutchings8ceee662008-04-27 12:55:59 +0100332 * @channel: Channel instance number
Ben Hutchings56536e92008-12-12 21:37:02 -0800333 * @name: Name for channel and IRQ
Ben Hutchings8ceee662008-04-27 12:55:59 +0100334 * @used_flags: Channel is used by net driver
335 * @enabled: Channel enabled indicator
336 * @irq: IRQ number (MSI and MSI-X only)
Ben Hutchings0d86ebd2009-10-23 08:32:13 +0000337 * @irq_moderation: IRQ moderation value (in hardware ticks)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100338 * @napi_dev: Net device used with NAPI
339 * @napi_str: NAPI control structure
340 * @reset_work: Scheduled reset work thread
341 * @work_pending: Is work pending via NAPI?
342 * @eventq: Event queue buffer
343 * @eventq_read_ptr: Event queue read pointer
344 * @last_eventq_read_ptr: Last event queue read pointer value.
345 * @eventq_magic: Event queue magic value for driver-generated test events
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000346 * @irq_count: Number of IRQs since last adaptive moderation decision
347 * @irq_mod_score: IRQ moderation score
Ben Hutchings8ceee662008-04-27 12:55:59 +0100348 * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors
349 * and diagnostic counters
350 * @rx_alloc_push_pages: RX allocation method currently in use for pushing
351 * descriptors
Ben Hutchings8ceee662008-04-27 12:55:59 +0100352 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
Ben Hutchings8ceee662008-04-27 12:55:59 +0100353 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
354 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
Ben Hutchingsc1ac4032009-11-28 05:36:29 +0000355 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
Ben Hutchings8ceee662008-04-27 12:55:59 +0100356 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
357 * @n_rx_overlength: Count of RX_OVERLENGTH errors
358 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
359 */
360struct efx_channel {
361 struct efx_nic *efx;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100362 int channel;
Ben Hutchings56536e92008-12-12 21:37:02 -0800363 char name[IFNAMSIZ + 6];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100364 int used_flags;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100365 bool enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100366 int irq;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100367 unsigned int irq_moderation;
368 struct net_device *napi_dev;
369 struct napi_struct napi_str;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100370 bool work_pending;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100371 struct efx_special_buffer eventq;
372 unsigned int eventq_read_ptr;
373 unsigned int last_eventq_read_ptr;
374 unsigned int eventq_magic;
375
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000376 unsigned int irq_count;
377 unsigned int irq_mod_score;
378
Ben Hutchings8ceee662008-04-27 12:55:59 +0100379 int rx_alloc_level;
380 int rx_alloc_push_pages;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100381
382 unsigned n_rx_tobe_disc;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100383 unsigned n_rx_ip_hdr_chksum_err;
384 unsigned n_rx_tcp_udp_chksum_err;
Ben Hutchingsc1ac4032009-11-28 05:36:29 +0000385 unsigned n_rx_mcast_mismatch;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100386 unsigned n_rx_frm_trunc;
387 unsigned n_rx_overlength;
388 unsigned n_skbuff_leaks;
389
390 /* Used to pipeline received packets in order to optimise memory
391 * access with prefetches.
392 */
393 struct efx_rx_buffer *rx_pkt;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100394 bool rx_pkt_csummed;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100395
396};
397
Ben Hutchings398468e2009-11-23 16:03:45 +0000398enum efx_led_mode {
399 EFX_LED_OFF = 0,
400 EFX_LED_ON = 1,
401 EFX_LED_DEFAULT = 2
402};
403
Ben Hutchingsc4593022009-11-23 16:08:17 +0000404#define STRING_TABLE_LOOKUP(val, member) \
405 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
406
407extern const char *efx_loopback_mode_names[];
408extern const unsigned int efx_loopback_mode_max;
409#define LOOPBACK_MODE(efx) \
410 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
411
412extern const char *efx_interrupt_mode_names[];
413extern const unsigned int efx_interrupt_mode_max;
414#define INT_MODE(efx) \
415 STRING_TABLE_LOOKUP(efx->interrupt_mode, efx_interrupt_mode)
416
417extern const char *efx_reset_type_names[];
418extern const unsigned int efx_reset_type_max;
419#define RESET_TYPE(type) \
420 STRING_TABLE_LOOKUP(type, efx_reset_type)
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100421
Ben Hutchings8ceee662008-04-27 12:55:59 +0100422enum efx_int_mode {
423 /* Be careful if altering to correct macro below */
424 EFX_INT_MODE_MSIX = 0,
425 EFX_INT_MODE_MSI = 1,
426 EFX_INT_MODE_LEGACY = 2,
427 EFX_INT_MODE_MAX /* Insert any new items before this */
428};
429#define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
430
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000431#define EFX_IS10G(efx) ((efx)->link_state.speed == 10000)
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800432
Ben Hutchings8ceee662008-04-27 12:55:59 +0100433enum nic_state {
434 STATE_INIT = 0,
435 STATE_RUNNING = 1,
436 STATE_FINI = 2,
Ben Hutchings3c787082008-09-01 12:49:08 +0100437 STATE_DISABLED = 3,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100438 STATE_MAX,
439};
440
441/*
442 * Alignment of page-allocated RX buffers
443 *
444 * Controls the number of bytes inserted at the start of an RX buffer.
445 * This is the equivalent of NET_IP_ALIGN [which controls the alignment
446 * of the skb->head for hardware DMA].
447 */
Ben Hutchings13e9ab12008-09-01 12:50:28 +0100448#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
Ben Hutchings8ceee662008-04-27 12:55:59 +0100449#define EFX_PAGE_IP_ALIGN 0
450#else
451#define EFX_PAGE_IP_ALIGN NET_IP_ALIGN
452#endif
453
454/*
455 * Alignment of the skb->head which wraps a page-allocated RX buffer
456 *
457 * The skb allocated to wrap an rx_buffer can have this alignment. Since
458 * the data is memcpy'd from the rx_buf, it does not need to be equal to
459 * EFX_PAGE_IP_ALIGN.
460 */
461#define EFX_PAGE_SKB_ALIGN 2
462
463/* Forward declaration */
464struct efx_nic;
465
466/* Pseudo bit-mask flow control field */
467enum efx_fc_type {
Ben Hutchings3f926da2009-04-29 08:20:37 +0000468 EFX_FC_RX = FLOW_CTRL_RX,
469 EFX_FC_TX = FLOW_CTRL_TX,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100470 EFX_FC_AUTO = 4,
471};
472
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800473/**
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000474 * struct efx_link_state - Current state of the link
475 * @up: Link is up
476 * @fd: Link is full-duplex
477 * @fc: Actual flow control flags
478 * @speed: Link speed (Mbps)
479 */
480struct efx_link_state {
481 bool up;
482 bool fd;
483 enum efx_fc_type fc;
484 unsigned int speed;
485};
486
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000487static inline bool efx_link_state_equal(const struct efx_link_state *left,
488 const struct efx_link_state *right)
489{
490 return left->up == right->up && left->fd == right->fd &&
491 left->fc == right->fc && left->speed == right->speed;
492}
493
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000494/**
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800495 * struct efx_mac_operations - Efx MAC operations table
496 * @reconfigure: Reconfigure MAC. Serialised by the mac_lock
497 * @update_stats: Update statistics
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000498 * @check_fault: Check fault state. True if fault present.
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800499 */
500struct efx_mac_operations {
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000501 int (*reconfigure) (struct efx_nic *efx);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800502 void (*update_stats) (struct efx_nic *efx);
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000503 bool (*check_fault)(struct efx_nic *efx);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800504};
505
Ben Hutchings8ceee662008-04-27 12:55:59 +0100506/**
507 * struct efx_phy_operations - Efx PHY operations table
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000508 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
509 * efx->loopback_modes.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100510 * @init: Initialise PHY
511 * @fini: Shut down PHY
512 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000513 * @poll: Update @link_state and report whether it changed.
514 * Serialised by the mac_lock.
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800515 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
516 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000517 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800518 * (only needed where AN bit is set in mmds)
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000519 * @test_name: Get the name of a PHY-specific test/result
Ben Hutchings17967212008-12-26 13:47:25 -0800520 * @run_tests: Run tests and record results as appropriate.
521 * Flags are the ethtool tests flags.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100522 */
523struct efx_phy_operations {
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000524 int (*probe) (struct efx_nic *efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100525 int (*init) (struct efx_nic *efx);
526 void (*fini) (struct efx_nic *efx);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000527 int (*reconfigure) (struct efx_nic *efx);
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000528 bool (*poll) (struct efx_nic *efx);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800529 void (*get_settings) (struct efx_nic *efx,
530 struct ethtool_cmd *ecmd);
531 int (*set_settings) (struct efx_nic *efx,
532 struct ethtool_cmd *ecmd);
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000533 void (*set_npage_adv) (struct efx_nic *efx, u32);
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000534 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
Ben Hutchings17967212008-12-26 13:47:25 -0800535 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100536};
537
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100538/**
539 * @enum efx_phy_mode - PHY operating mode flags
540 * @PHY_MODE_NORMAL: on and should pass traffic
541 * @PHY_MODE_TX_DISABLED: on with TX disabled
Ben Hutchings3e133c42008-11-04 20:34:56 +0000542 * @PHY_MODE_LOW_POWER: set to low power through MDIO
543 * @PHY_MODE_OFF: switched off through external control
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100544 * @PHY_MODE_SPECIAL: on but will not pass traffic
545 */
546enum efx_phy_mode {
547 PHY_MODE_NORMAL = 0,
548 PHY_MODE_TX_DISABLED = 1,
Ben Hutchings3e133c42008-11-04 20:34:56 +0000549 PHY_MODE_LOW_POWER = 2,
550 PHY_MODE_OFF = 4,
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100551 PHY_MODE_SPECIAL = 8,
552};
553
554static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
555{
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100556 return !!(mode & ~PHY_MODE_TX_DISABLED);
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100557}
558
Ben Hutchings8ceee662008-04-27 12:55:59 +0100559/*
560 * Efx extended statistics
561 *
562 * Not all statistics are provided by all supported MACs. The purpose
563 * is this structure is to contain the raw statistics provided by each
564 * MAC.
565 */
566struct efx_mac_stats {
567 u64 tx_bytes;
568 u64 tx_good_bytes;
569 u64 tx_bad_bytes;
570 unsigned long tx_packets;
571 unsigned long tx_bad;
572 unsigned long tx_pause;
573 unsigned long tx_control;
574 unsigned long tx_unicast;
575 unsigned long tx_multicast;
576 unsigned long tx_broadcast;
577 unsigned long tx_lt64;
578 unsigned long tx_64;
579 unsigned long tx_65_to_127;
580 unsigned long tx_128_to_255;
581 unsigned long tx_256_to_511;
582 unsigned long tx_512_to_1023;
583 unsigned long tx_1024_to_15xx;
584 unsigned long tx_15xx_to_jumbo;
585 unsigned long tx_gtjumbo;
586 unsigned long tx_collision;
587 unsigned long tx_single_collision;
588 unsigned long tx_multiple_collision;
589 unsigned long tx_excessive_collision;
590 unsigned long tx_deferred;
591 unsigned long tx_late_collision;
592 unsigned long tx_excessive_deferred;
593 unsigned long tx_non_tcpudp;
594 unsigned long tx_mac_src_error;
595 unsigned long tx_ip_src_error;
596 u64 rx_bytes;
597 u64 rx_good_bytes;
598 u64 rx_bad_bytes;
599 unsigned long rx_packets;
600 unsigned long rx_good;
601 unsigned long rx_bad;
602 unsigned long rx_pause;
603 unsigned long rx_control;
604 unsigned long rx_unicast;
605 unsigned long rx_multicast;
606 unsigned long rx_broadcast;
607 unsigned long rx_lt64;
608 unsigned long rx_64;
609 unsigned long rx_65_to_127;
610 unsigned long rx_128_to_255;
611 unsigned long rx_256_to_511;
612 unsigned long rx_512_to_1023;
613 unsigned long rx_1024_to_15xx;
614 unsigned long rx_15xx_to_jumbo;
615 unsigned long rx_gtjumbo;
616 unsigned long rx_bad_lt64;
617 unsigned long rx_bad_64_to_15xx;
618 unsigned long rx_bad_15xx_to_jumbo;
619 unsigned long rx_bad_gtjumbo;
620 unsigned long rx_overflow;
621 unsigned long rx_missed;
622 unsigned long rx_false_carrier;
623 unsigned long rx_symbol_error;
624 unsigned long rx_align_error;
625 unsigned long rx_length_error;
626 unsigned long rx_internal_error;
627 unsigned long rx_good_lt64;
628};
629
630/* Number of bits used in a multicast filter hash address */
631#define EFX_MCAST_HASH_BITS 8
632
633/* Number of (single-bit) entries in a multicast filter hash */
634#define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
635
636/* An Efx multicast filter hash */
637union efx_multicast_hash {
638 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
639 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
640};
641
642/**
643 * struct efx_nic - an Efx NIC
644 * @name: Device name (net device name or bus id before net device registered)
645 * @pci_dev: The PCI device
646 * @type: Controller type attributes
647 * @legacy_irq: IRQ number
Ben Hutchings8d9853d2008-07-18 19:01:20 +0100648 * @workqueue: Workqueue for port reconfigures and the HW monitor.
649 * Work items do not hold and must not acquire RTNL.
Ben Hutchings6977dc62008-12-26 13:44:39 -0800650 * @workqueue_name: Name of workqueue
Ben Hutchings8ceee662008-04-27 12:55:59 +0100651 * @reset_work: Scheduled reset workitem
652 * @monitor_work: Hardware monitor workitem
653 * @membase_phys: Memory BAR value as physical address
654 * @membase: Memory BAR value
655 * @biu_lock: BIU (bus interface unit) lock
656 * @interrupt_mode: Interrupt mode
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000657 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
658 * @irq_rx_moderation: IRQ moderation time for RX event queues
Ben Hutchings8ceee662008-04-27 12:55:59 +0100659 * @state: Device state flag. Serialised by the rtnl_lock.
660 * @reset_pending: Pending reset method (normally RESET_TYPE_NONE)
661 * @tx_queue: TX DMA queues
662 * @rx_queue: RX DMA queues
663 * @channel: Channels
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000664 * @next_buffer_table: First available buffer table id
Ben Hutchings8831da72008-09-01 12:47:48 +0100665 * @n_rx_queues: Number of RX queues
Neil Turton28b581a2008-12-12 21:41:06 -0800666 * @n_channels: Number of channels in use
Ben Hutchings8ceee662008-04-27 12:55:59 +0100667 * @rx_buffer_len: RX buffer length
668 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000669 * @int_error_count: Number of internal errors seen recently
670 * @int_error_expire: Time at which error count will be expired
Ben Hutchings8ceee662008-04-27 12:55:59 +0100671 * @irq_status: Interrupt status buffer
672 * @last_irq_cpu: Last CPU to handle interrupt.
673 * This register is written with the SMP processor ID whenever an
674 * interrupt is handled. It is used by falcon_test_interrupt()
675 * to verify that an interrupt has occurred.
Ben Hutchings4a5b5042008-09-01 12:47:16 +0100676 * @spi_flash: SPI flash device
Ben Hutchings76884832009-11-29 15:10:44 +0000677 * This field will be %NULL if no flash device is present (or for Siena).
Ben Hutchings4a5b5042008-09-01 12:47:16 +0100678 * @spi_eeprom: SPI EEPROM device
Ben Hutchings76884832009-11-29 15:10:44 +0000679 * This field will be %NULL if no EEPROM device is present (or for Siena).
Ben Hutchingsf4150722008-11-04 20:34:28 +0000680 * @spi_lock: SPI bus lock
Ben Hutchings76884832009-11-29 15:10:44 +0000681 * @mtd_list: List of MTDs attached to the NIC
Ben Hutchings8ceee662008-04-27 12:55:59 +0100682 * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
683 * @nic_data: Hardware dependant state
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100684 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
685 * @port_inhibited, efx_monitor() and efx_reconfigure_port()
Ben Hutchings8ceee662008-04-27 12:55:59 +0100686 * @port_enabled: Port enabled indicator.
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000687 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
688 * efx_mac_work() with kernel interfaces. Safe to read under any
689 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
690 * be held to modify it.
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100691 * @port_inhibited: If set, the netif_carrier is always off. Hold the mac_lock
Ben Hutchings8ceee662008-04-27 12:55:59 +0100692 * @port_initialized: Port initialized?
693 * @net_dev: Operating system network device. Consider holding the rtnl lock
694 * @rx_checksum_enabled: RX checksumming enabled
695 * @netif_stop_count: Port stop count
696 * @netif_stop_lock: Port stop lock
697 * @mac_stats: MAC statistics. These include all statistics the MACs
698 * can provide. Generic code converts these into a standard
699 * &struct net_device_stats.
700 * @stats_buffer: DMA buffer for statistics
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100701 * @stats_lock: Statistics update lock. Serialises statistics fetches
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800702 * @mac_op: MAC interface
Ben Hutchings8ceee662008-04-27 12:55:59 +0100703 * @mac_address: Permanent MAC address
704 * @phy_type: PHY type
Steve Hodgsonab867462009-11-28 05:34:44 +0000705 * @mdio_lock: MDIO lock
Ben Hutchings8ceee662008-04-27 12:55:59 +0100706 * @phy_op: PHY interface
707 * @phy_data: PHY private data (including PHY-specific stats)
Ben Hutchings68e7f452009-04-29 08:05:08 +0000708 * @mdio: PHY MDIO interface
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000709 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100710 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000711 * @xmac_poll_required: XMAC link state needs polling
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000712 * @link_advertising: Autonegotiation advertising flags
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000713 * @link_state: Current state of the link
Ben Hutchings8ceee662008-04-27 12:55:59 +0100714 * @n_link_state_changes: Number of times the link has changed state
715 * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
716 * @multicast_hash: Multicast hash table
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800717 * @wanted_fc: Wanted flow control flags
Ben Hutchings8be4f3e2009-11-25 16:12:16 +0000718 * @mac_work: Work item for changing MAC promiscuity and multicast hash
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100719 * @loopback_mode: Loopback status
720 * @loopback_modes: Supported loopback mode bitmask
721 * @loopback_selftest: Offline self-test private state
Ben Hutchings8ceee662008-04-27 12:55:59 +0100722 *
723 * The @priv field of the corresponding &struct net_device points to
724 * this.
725 */
726struct efx_nic {
727 char name[IFNAMSIZ];
728 struct pci_dev *pci_dev;
729 const struct efx_nic_type *type;
730 int legacy_irq;
731 struct workqueue_struct *workqueue;
Ben Hutchings6977dc62008-12-26 13:44:39 -0800732 char workqueue_name[16];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100733 struct work_struct reset_work;
734 struct delayed_work monitor_work;
Ben Hutchings086ea352008-05-16 21:17:06 +0100735 resource_size_t membase_phys;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100736 void __iomem *membase;
737 spinlock_t biu_lock;
738 enum efx_int_mode interrupt_mode;
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000739 bool irq_rx_adaptive;
740 unsigned int irq_rx_moderation;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100741
Ben Hutchings8ceee662008-04-27 12:55:59 +0100742 enum nic_state state;
743 enum reset_type reset_pending;
744
Ben Hutchings60ac1062008-09-01 12:44:59 +0100745 struct efx_tx_queue tx_queue[EFX_TX_QUEUE_COUNT];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100746 struct efx_rx_queue rx_queue[EFX_MAX_RX_QUEUES];
747 struct efx_channel channel[EFX_MAX_CHANNELS];
748
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000749 unsigned next_buffer_table;
Ben Hutchings8831da72008-09-01 12:47:48 +0100750 int n_rx_queues;
Neil Turton28b581a2008-12-12 21:41:06 -0800751 int n_channels;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100752 unsigned int rx_buffer_len;
753 unsigned int rx_buffer_order;
754
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000755 unsigned int_error_count;
756 unsigned long int_error_expire;
757
Ben Hutchings8ceee662008-04-27 12:55:59 +0100758 struct efx_buffer irq_status;
759 volatile signed int last_irq_cpu;
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000760 unsigned long irq_zero_count;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100761
Ben Hutchings4a5b5042008-09-01 12:47:16 +0100762 struct efx_spi_device *spi_flash;
763 struct efx_spi_device *spi_eeprom;
Ben Hutchingsf4150722008-11-04 20:34:28 +0000764 struct mutex spi_lock;
Ben Hutchings76884832009-11-29 15:10:44 +0000765#ifdef CONFIG_SFC_MTD
766 struct list_head mtd_list;
767#endif
Ben Hutchings4a5b5042008-09-01 12:47:16 +0100768
Ben Hutchings8ceee662008-04-27 12:55:59 +0100769 unsigned n_rx_nodesc_drop_cnt;
770
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000771 void *nic_data;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100772
773 struct mutex mac_lock;
Ben Hutchings766ca0f2008-12-12 21:59:24 -0800774 struct work_struct mac_work;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100775 bool port_enabled;
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100776 bool port_inhibited;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100777
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100778 bool port_initialized;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100779 struct net_device *net_dev;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100780 bool rx_checksum_enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100781
782 atomic_t netif_stop_count;
783 spinlock_t netif_stop_lock;
784
785 struct efx_mac_stats mac_stats;
786 struct efx_buffer stats_buffer;
787 spinlock_t stats_lock;
788
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800789 struct efx_mac_operations *mac_op;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100790 unsigned char mac_address[ETH_ALEN];
791
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000792 unsigned int phy_type;
Steve Hodgsonab867462009-11-28 05:34:44 +0000793 struct mutex mdio_lock;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100794 struct efx_phy_operations *phy_op;
795 void *phy_data;
Ben Hutchings68e7f452009-04-29 08:05:08 +0000796 struct mdio_if_info mdio;
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000797 unsigned int mdio_bus;
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100798 enum efx_phy_mode phy_mode;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100799
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000800 bool xmac_poll_required;
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000801 u32 link_advertising;
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000802 struct efx_link_state link_state;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100803 unsigned int n_link_state_changes;
804
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100805 bool promiscuous;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100806 union efx_multicast_hash multicast_hash;
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800807 enum efx_fc_type wanted_fc;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100808
809 atomic_t rx_reset;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100810 enum efx_loopback_mode loopback_mode;
Ben Hutchingse58f69f2009-11-29 15:08:41 +0000811 u64 loopback_modes;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100812
813 void *loopback_selftest;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100814};
815
Ben Hutchings55668612008-05-16 21:16:10 +0100816static inline int efx_dev_registered(struct efx_nic *efx)
817{
818 return efx->net_dev->reg_state == NETREG_REGISTERED;
819}
820
821/* Net device name, for inclusion in log messages if it has been registered.
822 * Use efx->name not efx->net_dev->name so that races with (un)registration
823 * are harmless.
824 */
825static inline const char *efx_dev_name(struct efx_nic *efx)
826{
827 return efx_dev_registered(efx) ? efx->name : "";
828}
829
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000830static inline unsigned int efx_port_num(struct efx_nic *efx)
831{
832 return PCI_FUNC(efx->pci_dev->devfn);
833}
834
Ben Hutchings8ceee662008-04-27 12:55:59 +0100835/**
836 * struct efx_nic_type - Efx device type definition
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000837 * @probe: Probe the controller
838 * @remove: Free resources allocated by probe()
839 * @init: Initialise the controller
840 * @fini: Shut down the controller
841 * @monitor: Periodic function for polling link state and hardware monitor
842 * @reset: Reset the controller hardware and possibly the PHY. This will
843 * be called while the controller is uninitialised.
844 * @probe_port: Probe the MAC and PHY
845 * @remove_port: Free resources allocated by probe_port()
846 * @prepare_flush: Prepare the hardware for flushing the DMA queues
847 * @update_stats: Update statistics not provided by event handling
848 * @start_stats: Start the regular fetching of statistics
849 * @stop_stats: Stop the regular fetching of statistics
Ben Hutchings06629f02009-11-29 03:43:43 +0000850 * @set_id_led: Set state of identifying LED or revert to automatic function
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000851 * @push_irq_moderation: Apply interrupt moderation value
852 * @push_multicast_hash: Apply multicast hash table
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000853 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
Ben Hutchings89c758f2009-11-29 03:43:07 +0000854 * @get_wol: Get WoL configuration from driver state
855 * @set_wol: Push WoL configuration to the NIC
856 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
Ben Hutchings9bfc4bb2009-11-29 03:43:23 +0000857 * @test_registers: Test read/write functionality of control registers
Ben Hutchings0aa3fba2009-11-29 03:43:33 +0000858 * @test_nvram: Test validity of NVRAM contents
Steve Hodgsonb895d732009-11-28 05:35:00 +0000859 * @default_mac_ops: efx_mac_operations to set at startup
Ben Hutchingsdaeda632009-11-28 05:36:04 +0000860 * @revision: Hardware architecture revision
Ben Hutchings8ceee662008-04-27 12:55:59 +0100861 * @mem_map_size: Memory BAR mapped size
862 * @txd_ptr_tbl_base: TX descriptor ring base address
863 * @rxd_ptr_tbl_base: RX descriptor ring base address
864 * @buf_tbl_base: Buffer table base address
865 * @evq_ptr_tbl_base: Event queue pointer table base address
866 * @evq_rptr_tbl_base: Event queue read-pointer table base address
Ben Hutchings8ceee662008-04-27 12:55:59 +0100867 * @max_dma_mask: Maximum possible DMA mask
Ben Hutchings8ceee662008-04-27 12:55:59 +0100868 * @rx_buffer_padding: Padding added to each RX buffer
869 * @max_interrupt_mode: Highest capability interrupt mode supported
870 * from &enum efx_init_mode.
871 * @phys_addr_channels: Number of channels with physically addressed
872 * descriptors
Ben Hutchings0228f5cdb02009-11-28 05:36:12 +0000873 * @tx_dc_base: Base address in SRAM of TX queue descriptor caches
874 * @rx_dc_base: Base address in SRAM of RX queue descriptor caches
Ben Hutchingsc383b532009-11-29 15:11:02 +0000875 * @offload_features: net_device feature flags for protocol offload
876 * features implemented in hardware
Ben Hutchingseb9f6742009-11-29 03:43:15 +0000877 * @reset_world_flags: Flags for additional components covered by
878 * reset method RESET_TYPE_WORLD
Ben Hutchings8ceee662008-04-27 12:55:59 +0100879 */
880struct efx_nic_type {
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000881 int (*probe)(struct efx_nic *efx);
882 void (*remove)(struct efx_nic *efx);
883 int (*init)(struct efx_nic *efx);
884 void (*fini)(struct efx_nic *efx);
885 void (*monitor)(struct efx_nic *efx);
886 int (*reset)(struct efx_nic *efx, enum reset_type method);
887 int (*probe_port)(struct efx_nic *efx);
888 void (*remove_port)(struct efx_nic *efx);
889 void (*prepare_flush)(struct efx_nic *efx);
890 void (*update_stats)(struct efx_nic *efx);
891 void (*start_stats)(struct efx_nic *efx);
892 void (*stop_stats)(struct efx_nic *efx);
Ben Hutchings06629f02009-11-29 03:43:43 +0000893 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000894 void (*push_irq_moderation)(struct efx_channel *channel);
895 void (*push_multicast_hash)(struct efx_nic *efx);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000896 int (*reconfigure_port)(struct efx_nic *efx);
Ben Hutchings89c758f2009-11-29 03:43:07 +0000897 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
898 int (*set_wol)(struct efx_nic *efx, u32 type);
899 void (*resume_wol)(struct efx_nic *efx);
Ben Hutchings9bfc4bb2009-11-29 03:43:23 +0000900 int (*test_registers)(struct efx_nic *efx);
Ben Hutchings0aa3fba2009-11-29 03:43:33 +0000901 int (*test_nvram)(struct efx_nic *efx);
Steve Hodgsonb895d732009-11-28 05:35:00 +0000902 struct efx_mac_operations *default_mac_ops;
903
Ben Hutchingsdaeda632009-11-28 05:36:04 +0000904 int revision;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100905 unsigned int mem_map_size;
906 unsigned int txd_ptr_tbl_base;
907 unsigned int rxd_ptr_tbl_base;
908 unsigned int buf_tbl_base;
909 unsigned int evq_ptr_tbl_base;
910 unsigned int evq_rptr_tbl_base;
Ben Hutchings9bbd7d92008-05-16 21:18:48 +0100911 u64 max_dma_mask;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100912 unsigned int rx_buffer_padding;
913 unsigned int max_interrupt_mode;
914 unsigned int phys_addr_channels;
Ben Hutchings0228f5cdb02009-11-28 05:36:12 +0000915 unsigned int tx_dc_base;
916 unsigned int rx_dc_base;
Ben Hutchingsc383b532009-11-29 15:11:02 +0000917 unsigned long offload_features;
Ben Hutchingseb9f6742009-11-29 03:43:15 +0000918 u32 reset_world_flags;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100919};
920
921/**************************************************************************
922 *
923 * Prototypes and inline functions
924 *
925 *************************************************************************/
926
927/* Iterate over all used channels */
928#define efx_for_each_channel(_channel, _efx) \
929 for (_channel = &_efx->channel[0]; \
930 _channel < &_efx->channel[EFX_MAX_CHANNELS]; \
931 _channel++) \
932 if (!_channel->used_flags) \
933 continue; \
934 else
935
Ben Hutchings8ceee662008-04-27 12:55:59 +0100936/* Iterate over all used TX queues */
937#define efx_for_each_tx_queue(_tx_queue, _efx) \
938 for (_tx_queue = &_efx->tx_queue[0]; \
Ben Hutchings60ac1062008-09-01 12:44:59 +0100939 _tx_queue < &_efx->tx_queue[EFX_TX_QUEUE_COUNT]; \
940 _tx_queue++)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100941
942/* Iterate over all TX queues belonging to a channel */
943#define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
944 for (_tx_queue = &_channel->efx->tx_queue[0]; \
Ben Hutchings60ac1062008-09-01 12:44:59 +0100945 _tx_queue < &_channel->efx->tx_queue[EFX_TX_QUEUE_COUNT]; \
Ben Hutchings8ceee662008-04-27 12:55:59 +0100946 _tx_queue++) \
Ben Hutchings60ac1062008-09-01 12:44:59 +0100947 if (_tx_queue->channel != _channel) \
Ben Hutchings8ceee662008-04-27 12:55:59 +0100948 continue; \
949 else
950
951/* Iterate over all used RX queues */
952#define efx_for_each_rx_queue(_rx_queue, _efx) \
953 for (_rx_queue = &_efx->rx_queue[0]; \
Ben Hutchings8831da72008-09-01 12:47:48 +0100954 _rx_queue < &_efx->rx_queue[_efx->n_rx_queues]; \
955 _rx_queue++)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100956
957/* Iterate over all RX queues belonging to a channel */
958#define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
Ben Hutchingsa2589022008-09-01 12:47:57 +0100959 for (_rx_queue = &_channel->efx->rx_queue[_channel->channel]; \
960 _rx_queue; \
961 _rx_queue = NULL) \
Ben Hutchings8831da72008-09-01 12:47:48 +0100962 if (_rx_queue->channel != _channel) \
Ben Hutchings8ceee662008-04-27 12:55:59 +0100963 continue; \
964 else
965
966/* Returns a pointer to the specified receive buffer in the RX
967 * descriptor queue.
968 */
969static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
970 unsigned int index)
971{
972 return (&rx_queue->buffer[index]);
973}
974
975/* Set bit in a little-endian bitfield */
Ben Hutchings18c2fc02008-09-01 12:43:39 +0100976static inline void set_bit_le(unsigned nr, unsigned char *addr)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100977{
978 addr[nr / 8] |= (1 << (nr % 8));
979}
980
981/* Clear bit in a little-endian bitfield */
Ben Hutchings18c2fc02008-09-01 12:43:39 +0100982static inline void clear_bit_le(unsigned nr, unsigned char *addr)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100983{
984 addr[nr / 8] &= ~(1 << (nr % 8));
985}
986
987
988/**
989 * EFX_MAX_FRAME_LEN - calculate maximum frame length
990 *
991 * This calculates the maximum frame length that will be used for a
992 * given MTU. The frame length will be equal to the MTU plus a
993 * constant amount of header space and padding. This is the quantity
994 * that the net driver will program into the MAC as the maximum frame
995 * length.
996 *
997 * The 10G MAC used in Falcon requires 8-byte alignment on the frame
998 * length, so we round up to the nearest 8.
Ben Hutchingscc117632009-08-26 08:17:59 +0000999 *
1000 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1001 * XGMII cycle). If the frame length reaches the maximum value in the
1002 * same cycle, the XMAC can miss the IPG altogether. We work around
1003 * this by adding a further 16 bytes.
Ben Hutchings8ceee662008-04-27 12:55:59 +01001004 */
1005#define EFX_MAX_FRAME_LEN(mtu) \
Ben Hutchingscc117632009-08-26 08:17:59 +00001006 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001007
1008
1009#endif /* EFX_NET_DRIVER_H */