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Jan Engelhardtb5114312007-07-15 23:39:36 -07001
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
Jan Engelhardt06bfb7e2007-08-18 12:56:21 +02005 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
Jan Engelhardtb5114312007-07-15 23:39:36 -070010
11if CRYPTO_HW
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13config CRYPTO_DEV_PADLOCK
Herbert Xud1583252007-05-18 13:17:22 +100014 tristate "Support for VIA PadLock ACE"
Herbert Xu2f817412009-04-22 13:00:15 +080015 depends on X86 && !UML
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
Michal Ludvig1191f0a2006-08-06 22:46:20 +100019 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22 The instructions are used only when the CPU supports them.
Michal Ludvig5644bda2006-08-06 22:50:30 +100023 Otherwise software encryption is used.
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025config CRYPTO_DEV_PADLOCK_AES
Michal Ludvig1191f0a2006-08-06 22:46:20 +100026 tristate "PadLock driver for AES algorithm"
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 depends on CRYPTO_DEV_PADLOCK
Herbert Xu28ce7282006-08-21 21:38:42 +100028 select CRYPTO_BLKCIPHER
Sebastian Siewior7dc748e2008-04-01 21:24:50 +080029 select CRYPTO_AES
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 help
31 Use VIA PadLock for AES algorithm.
32
Michal Ludvig1191f0a2006-08-06 22:46:20 +100033 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020036 called padlock-aes.
Michal Ludvig1191f0a2006-08-06 22:46:20 +100037
Michal Ludvig6c833272006-07-12 12:29:38 +100038config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
Herbert Xubbbee462009-07-11 18:16:16 +080041 select CRYPTO_HASH
Michal Ludvig6c833272006-07-12 12:29:38 +100042 select CRYPTO_SHA1
43 select CRYPTO_SHA256
Michal Ludvig6c833272006-07-12 12:29:38 +100044 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020050 called padlock-sha.
Michal Ludvig6c833272006-07-12 12:29:38 +100051
Jordan Crouse9fe757b2006-10-04 18:48:57 +100052config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
Simon Arlottf6259de2007-05-02 22:08:26 +100054 depends on X86_32 && PCI
Jordan Crouse9fe757b2006-10-04 18:48:57 +100055 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
Jordan Crouse9fe757b2006-10-04 18:48:57 +100057 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
David Sterba3dde6ad2007-05-09 07:12:20 +020059 engine for the CryptoAPI AES algorithm.
Jordan Crouse9fe757b2006-10-04 18:48:57 +100060
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020064config ZCRYPT
65 tristate "Support for PCI-attached cryptographic adapters"
66 depends on S390
Ralph Wuerthner2f7c8bd2008-04-17 07:46:15 +020067 select HW_RANDOM
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020068 help
69 Select this option if you want to use a PCI-attached cryptographic
70 adapter like:
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
Holger Denglercf2d0072011-05-23 10:24:30 +020076 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020078
Jan Glauber3f5615e2008-01-26 14:11:07 +010079config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
81 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110082 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010083 help
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
86
Jan Glauberd393d9b2011-04-19 21:29:19 +020087 It is available as of z990.
88
Jan Glauber3f5615e2008-01-26 14:11:07 +010089config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
91 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110092 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010093 help
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
96
Jan Glauberd393d9b2011-04-19 21:29:19 +020097 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +010098
Jan Glauber291dc7c2008-03-06 19:52:00 +080099config CRYPTO_SHA512_S390
Jan Glauber4e2c6d72008-03-06 19:53:50 +0800100 tristate "SHA384 and SHA512 digest algorithm"
Jan Glauber291dc7c2008-03-06 19:52:00 +0800101 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100102 select CRYPTO_HASH
Jan Glauber291dc7c2008-03-06 19:52:00 +0800103 help
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
106
Jan Glauberd393d9b2011-04-19 21:29:19 +0200107 It is available as of z10.
Jan Glauber291dc7c2008-03-06 19:52:00 +0800108
Jan Glauber3f5615e2008-01-26 14:11:07 +0100109config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
111 depends on S390
112 select CRYPTO_ALGAPI
113 select CRYPTO_BLKCIPHER
Heiko Carstens63291d42012-05-09 16:27:35 +0200114 select CRYPTO_DES
Jan Glauber3f5615e2008-01-26 14:11:07 +0100115 help
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000116 This is the s390 hardware accelerated implementation of the
Jan Glauber3f5615e2008-01-26 14:11:07 +0100117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
118
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
121
Jan Glauber3f5615e2008-01-26 14:11:07 +0100122config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
124 depends on S390
125 select CRYPTO_ALGAPI
126 select CRYPTO_BLKCIPHER
127 help
128 This is the s390 hardware accelerated implementation of the
Gerald Schaefer99d97222011-04-26 16:12:42 +1000129 AES cipher algorithms (FIPS-197).
Jan Glauber3f5615e2008-01-26 14:11:07 +0100130
Gerald Schaefer99d97222011-04-26 16:12:42 +1000131 As of z9 the ECB and CBC modes are hardware accelerated
132 for 128 bit keys.
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
Gerald Schaefer99d97222011-04-26 16:12:42 +1000137 512 bit keys.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100138
139config S390_PRNG
140 tristate "Pseudo random number generator device driver"
141 depends on S390
142 default "m"
143 help
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
Jan Glauberd393d9b2011-04-19 21:29:19 +0200147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
149
150 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100151
Gerald Schaeferdf1309c2011-04-19 21:29:18 +0200152config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
154 depends on S390
155 select CRYPTO_HASH
156 help
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
159
160 It is available as of z196.
161
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000162config CRYPTO_DEV_MV_CESA
163 tristate "Marvell's Cryptographic Engine"
164 depends on PLAT_ORION
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000165 select CRYPTO_AES
Herbert Xu596103c2015-06-17 14:58:24 +0800166 select CRYPTO_BLKCIPHER
Alexander Clouter1ebfefc2012-05-12 09:45:08 +0100167 select CRYPTO_HASH
Boris BREZILLON51b44fc2015-06-18 15:46:18 +0200168 select SRAM
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000169 help
170 This driver allows you to utilize the Cryptographic Engines and
171 Security Accelerator (CESA) which can be found on the Marvell Orion
172 and Kirkwood SoCs, such as QNAP's TS-209.
173
174 Currently the driver supports AES in ECB and CBC mode without DMA.
175
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200176config CRYPTO_DEV_MARVELL_CESA
177 tristate "New Marvell's Cryptographic Engine driver"
Boris Brezillonfe55dfd2015-06-22 09:22:14 +0200178 depends on PLAT_ORION || ARCH_MVEBU
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200179 select CRYPTO_AES
180 select CRYPTO_DES
181 select CRYPTO_BLKCIPHER
182 select CRYPTO_HASH
183 select SRAM
184 help
185 This driver allows you to utilize the Cryptographic Engines and
186 Security Accelerator (CESA) which can be found on the Armada 370.
Boris BREZILLONdb509a42015-06-18 15:46:21 +0200187 This driver supports CPU offload through DMA transfers.
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200188
189 This driver is aimed at replacing the mv_cesa driver. This will only
190 happen once it has received proper testing.
191
David S. Miller0a625fd22010-05-19 14:14:04 +1000192config CRYPTO_DEV_NIAGARA2
193 tristate "Niagara2 Stream Processing Unit driver"
David S. Miller50e78162010-09-12 10:44:21 +0800194 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800195 select CRYPTO_BLKCIPHER
196 select CRYPTO_HASH
LABBE Corentin8054b802015-12-17 13:45:40 +0100197 select CRYPTO_MD5
198 select CRYPTO_SHA1
199 select CRYPTO_SHA256
David S. Miller0a625fd22010-05-19 14:14:04 +1000200 depends on SPARC64
201 help
202 Each core of a Niagara2 processor contains a Stream
203 Processing Unit, which itself contains several cryptographic
204 sub-units. One set provides the Modular Arithmetic Unit,
205 used for SSL offload. The other set provides the Cipher
206 Group, which can perform encryption, decryption, hashing,
207 checksumming, and raw copies.
208
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800209config CRYPTO_DEV_HIFN_795X
210 tristate "Driver HIFN 795x crypto accelerator chips"
Evgeniy Polyakovc3041f92007-10-11 19:58:16 +0800211 select CRYPTO_DES
Herbert Xu653ebd92007-11-27 19:48:27 +0800212 select CRYPTO_BLKCIPHER
Herbert Xu946fef42008-01-26 09:48:44 +1100213 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
Jan Glauber2707b932007-11-12 21:56:38 +0800214 depends on PCI
Richard Weinberger75b76622011-10-10 12:55:41 +0200215 depends on !ARCH_DMA_ADDR_T_64BIT
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800216 help
217 This option allows you to have support for HIFN 795x crypto adapters.
218
Herbert Xu946fef42008-01-26 09:48:44 +1100219config CRYPTO_DEV_HIFN_795X_RNG
220 bool "HIFN 795x random number generator"
221 depends on CRYPTO_DEV_HIFN_795X
222 help
223 Select this option if you want to enable the random number generator
224 on the HIFN 795x crypto adapters.
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800225
Kim Phillips8e8ec592011-03-13 16:54:26 +0800226source drivers/crypto/caam/Kconfig
227
Kim Phillips9c4a7962008-06-23 19:50:15 +0800228config CRYPTO_DEV_TALITOS
229 tristate "Talitos Freescale Security Engine (SEC)"
Herbert Xu596103c2015-06-17 14:58:24 +0800230 select CRYPTO_AEAD
Kim Phillips9c4a7962008-06-23 19:50:15 +0800231 select CRYPTO_AUTHENC
Herbert Xu596103c2015-06-17 14:58:24 +0800232 select CRYPTO_BLKCIPHER
233 select CRYPTO_HASH
Kim Phillips9c4a7962008-06-23 19:50:15 +0800234 select HW_RANDOM
235 depends on FSL_SOC
236 help
237 Say 'Y' here to use the Freescale Security Engine (SEC)
238 to offload cryptographic algorithm computation.
239
240 The Freescale SEC is present on PowerQUICC 'E' processors, such
241 as the MPC8349E and MPC8548E.
242
243 To compile this driver as a module, choose M here: the module
244 will be called talitos.
245
LEROY Christophe5b841a62015-04-17 16:32:03 +0200246config CRYPTO_DEV_TALITOS1
247 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
248 depends on CRYPTO_DEV_TALITOS
249 depends on PPC_8xx || PPC_82xx
250 default y
251 help
252 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
253 found on MPC82xx or the Freescale Security Engine (SEC Lite)
254 version 1.2 found on MPC8xx
255
256config CRYPTO_DEV_TALITOS2
257 bool "SEC2+ (SEC version 2.0 or upper)"
258 depends on CRYPTO_DEV_TALITOS
259 default y if !PPC_8xx
260 help
261 Say 'Y' here to use the Freescale Security Engine (SEC)
262 version 2 and following as found on MPC83xx, MPC85xx, etc ...
263
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800264config CRYPTO_DEV_IXP4XX
265 tristate "Driver for IXP4xx crypto hardware acceleration"
Krzysztof Hałasa9665c522010-03-25 23:56:05 +0100266 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800267 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800268 select CRYPTO_AEAD
Imre Kaloz090657e2008-07-13 20:12:11 +0800269 select CRYPTO_AUTHENC
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800270 select CRYPTO_BLKCIPHER
271 help
272 Driver for the IXP4xx NPE crypto engine.
273
James Hsiao049359d2009-02-05 16:18:13 +1100274config CRYPTO_DEV_PPC4XX
275 tristate "Driver AMCC PPC4xx crypto accelerator"
276 depends on PPC && 4xx
277 select CRYPTO_HASH
James Hsiao049359d2009-02-05 16:18:13 +1100278 select CRYPTO_BLKCIPHER
279 help
280 This option allows you to have support for AMCC crypto acceleration.
281
Christian Lamparter5343e672016-04-18 12:57:41 +0200282config HW_RANDOM_PPC4XX
283 bool "PowerPC 4xx generic true random number generator support"
284 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
285 default y
286 ---help---
287 This option provides the kernel-side support for the TRNG hardware
288 found in the security function of some PowerPC 4xx SoCs.
289
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800290config CRYPTO_DEV_OMAP_SHAM
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530291 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
292 depends on ARCH_OMAP2PLUS
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800293 select CRYPTO_SHA1
294 select CRYPTO_MD5
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530295 select CRYPTO_SHA256
296 select CRYPTO_SHA512
297 select CRYPTO_HMAC
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800298 help
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530299 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
300 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800301
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800302config CRYPTO_DEV_OMAP_AES
303 tristate "Support for OMAP AES hw engine"
Joel Fernandes1bbf6432013-08-17 21:42:35 -0500304 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800305 select CRYPTO_AES
Herbert Xu596103c2015-06-17 14:58:24 +0800306 select CRYPTO_BLKCIPHER
Baolin Wang05299002016-01-26 20:25:40 +0800307 select CRYPTO_ENGINE
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800308 help
309 OMAP processors have AES module accelerator. Select this if you
310 want to use the OMAP module for AES algorithms.
311
Joel Fernandes701d0f12014-02-14 10:49:47 -0600312config CRYPTO_DEV_OMAP_DES
Peter Meerwald97ee7ed2016-03-13 16:15:37 +0100313 tristate "Support for OMAP DES/3DES hw engine"
Joel Fernandes701d0f12014-02-14 10:49:47 -0600314 depends on ARCH_OMAP2PLUS
315 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800316 select CRYPTO_BLKCIPHER
Baolin Wangf1b77aa2016-04-28 14:11:51 +0800317 select CRYPTO_ENGINE
Joel Fernandes701d0f12014-02-14 10:49:47 -0600318 help
319 OMAP processors have DES/3DES module accelerator. Select this if you
320 want to use the OMAP module for DES and 3DES algorithms. Currently
Peter Meerwald97ee7ed2016-03-13 16:15:37 +0100321 the ECB and CBC modes of operation are supported by the driver. Also
322 accesses made on unaligned boundaries are supported.
Joel Fernandes701d0f12014-02-14 10:49:47 -0600323
Jamie Ilesce921362011-02-21 16:43:21 +1100324config CRYPTO_DEV_PICOXCELL
325 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
Jamie Ilesfad8fa42011-10-20 14:10:26 +0200326 depends on ARCH_PICOXCELL && HAVE_CLK
Herbert Xu596103c2015-06-17 14:58:24 +0800327 select CRYPTO_AEAD
Jamie Ilesce921362011-02-21 16:43:21 +1100328 select CRYPTO_AES
329 select CRYPTO_AUTHENC
Herbert Xu596103c2015-06-17 14:58:24 +0800330 select CRYPTO_BLKCIPHER
Jamie Ilesce921362011-02-21 16:43:21 +1100331 select CRYPTO_DES
332 select CRYPTO_CBC
333 select CRYPTO_ECB
334 select CRYPTO_SEQIV
335 help
336 This option enables support for the hardware offload engines in the
337 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
338 and for 3gpp Layer 2 ciphering support.
339
340 Saying m here will build a module named pipcoxcell_crypto.
341
Javier Martin5de88752013-03-01 12:37:53 +0100342config CRYPTO_DEV_SAHARA
343 tristate "Support for SAHARA crypto accelerator"
Paul Bolle74d24d82013-05-12 13:57:19 +0200344 depends on ARCH_MXC && OF
Javier Martin5de88752013-03-01 12:37:53 +0100345 select CRYPTO_BLKCIPHER
346 select CRYPTO_AES
347 select CRYPTO_ECB
348 help
349 This option enables support for the SAHARA HW crypto accelerator
350 found in some Freescale i.MX chips.
351
Steffen Trumtrard293b642016-04-12 11:04:26 +0200352config CRYPTO_DEV_MXC_SCC
353 tristate "Support for Freescale Security Controller (SCC)"
354 depends on ARCH_MXC && OF
355 select CRYPTO_BLKCIPHER
356 select CRYPTO_DES
357 help
358 This option enables support for the Security Controller (SCC)
359 found in Freescale i.MX25 chips.
360
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800361config CRYPTO_DEV_S5P
Naveen Krishna Chatradhie922e962014-05-08 21:58:14 +0800362 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
Krzysztof Kozlowskidc1d9de2016-03-14 13:20:18 +0900363 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
364 depends on HAS_IOMEM && HAS_DMA
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800365 select CRYPTO_AES
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800366 select CRYPTO_BLKCIPHER
367 help
368 This option allows you to have support for S5P crypto acceleration.
Naveen Krishna Chatradhie922e962014-05-08 21:58:14 +0800369 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800370 algorithms execution.
371
Kent Yoderaef7b312012-04-12 05:39:26 +0000372config CRYPTO_DEV_NX
Dan Streetman7011a122015-05-07 13:49:17 -0400373 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
374 depends on PPC64
Kent Yoderaef7b312012-04-12 05:39:26 +0000375 help
Dan Streetman7011a122015-05-07 13:49:17 -0400376 This enables support for the NX hardware cryptographic accelerator
377 coprocessor that is in IBM PowerPC P7+ or later processors. This
378 does not actually enable any drivers, it only allows you to select
379 which acceleration type (encryption and/or compression) to enable.
Seth Jennings322cacc2012-07-19 09:42:38 -0500380
381if CRYPTO_DEV_NX
382 source "drivers/crypto/nx/Kconfig"
383endif
Kent Yoderaef7b312012-04-12 05:39:26 +0000384
Andreas Westin2789c082012-04-30 10:11:17 +0200385config CRYPTO_DEV_UX500
386 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
387 depends on ARCH_U8500
Andreas Westin2789c082012-04-30 10:11:17 +0200388 help
389 Driver for ST-Ericsson UX500 crypto engine.
390
391if CRYPTO_DEV_UX500
392 source "drivers/crypto/ux500/Kconfig"
393endif # if CRYPTO_DEV_UX500
394
Sonic Zhangb8840092012-06-04 12:24:47 +0800395config CRYPTO_DEV_BFIN_CRC
396 tristate "Support for Blackfin CRC hardware"
397 depends on BF60x
398 help
399 Newer Blackfin processors have CRC hardware. Select this if you
400 want to use the Blackfin CRC module.
401
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200402config CRYPTO_DEV_ATMEL_AES
403 tristate "Support for Atmel AES hw accelerator"
Geert Uytterhoevencbafd642016-01-15 14:48:06 +0100404 depends on HAS_DMA
Arnd Bergmann56b85c92015-01-27 22:34:04 +0100405 depends on AT_XDMAC || AT_HDMAC || COMPILE_TEST
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200406 select CRYPTO_AES
Cyrille Pitchend4419542015-12-17 18:13:07 +0100407 select CRYPTO_AEAD
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200408 select CRYPTO_BLKCIPHER
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200409 help
410 Some Atmel processors have AES hw accelerator.
411 Select this if you want to use the Atmel module for
412 AES algorithms.
413
414 To compile this driver as a module, choose M here: the module
415 will be called atmel-aes.
416
Nicolas Royer13802002012-07-01 19:19:45 +0200417config CRYPTO_DEV_ATMEL_TDES
418 tristate "Support for Atmel DES/TDES hw accelerator"
419 depends on ARCH_AT91
420 select CRYPTO_DES
Nicolas Royer13802002012-07-01 19:19:45 +0200421 select CRYPTO_BLKCIPHER
422 help
423 Some Atmel processors have DES/TDES hw accelerator.
424 Select this if you want to use the Atmel module for
425 DES/TDES algorithms.
426
427 To compile this driver as a module, choose M here: the module
428 will be called atmel-tdes.
429
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200430config CRYPTO_DEV_ATMEL_SHA
Nicolas Royerd4905b32013-02-20 17:10:26 +0100431 tristate "Support for Atmel SHA hw accelerator"
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200432 depends on ARCH_AT91
Herbert Xu596103c2015-06-17 14:58:24 +0800433 select CRYPTO_HASH
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200434 help
Nicolas Royerd4905b32013-02-20 17:10:26 +0100435 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
436 hw accelerator.
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200437 Select this if you want to use the Atmel module for
Nicolas Royerd4905b32013-02-20 17:10:26 +0100438 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200439
440 To compile this driver as a module, choose M here: the module
441 will be called atmel-sha.
442
Tom Lendackyf1147662013-11-12 11:46:51 -0600443config CRYPTO_DEV_CCP
444 bool "Support for AMD Cryptographic Coprocessor"
Tom Lendacky6c506342015-02-03 13:07:29 -0600445 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
Tom Lendackyf1147662013-11-12 11:46:51 -0600446 help
Tom Lendacky21dc9e82015-10-01 16:32:44 -0500447 The AMD Cryptographic Coprocessor provides hardware offload support
Tom Lendackyf1147662013-11-12 11:46:51 -0600448 for encryption, hashing and related operations.
449
450if CRYPTO_DEV_CCP
451 source "drivers/crypto/ccp/Kconfig"
452endif
453
Marek Vasut15b59e72013-12-10 20:26:21 +0100454config CRYPTO_DEV_MXS_DCP
455 tristate "Support for Freescale MXS DCP"
Fabio Estevama2712e62015-09-02 12:05:18 -0300456 depends on (ARCH_MXS || ARCH_MXC)
Arnd Bergmanndc97fa02015-10-12 15:52:34 +0200457 select STMP_DEVICE
Marek Vasut15b59e72013-12-10 20:26:21 +0100458 select CRYPTO_CBC
459 select CRYPTO_ECB
460 select CRYPTO_AES
461 select CRYPTO_BLKCIPHER
Herbert Xu596103c2015-06-17 14:58:24 +0800462 select CRYPTO_HASH
Marek Vasut15b59e72013-12-10 20:26:21 +0100463 help
464 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
465 co-processor on the die.
466
467 To compile this driver as a module, choose M here: the module
468 will be called mxs-dcp.
469
Tadeusz Strukcea40012014-06-05 13:44:39 -0700470source "drivers/crypto/qat/Kconfig"
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300471
472config CRYPTO_DEV_QCE
473 tristate "Qualcomm crypto engine accelerator"
Chen Gang71d932d2014-07-13 11:01:38 +0800474 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300475 select CRYPTO_AES
476 select CRYPTO_DES
477 select CRYPTO_ECB
478 select CRYPTO_CBC
479 select CRYPTO_XTS
480 select CRYPTO_CTR
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300481 select CRYPTO_BLKCIPHER
482 help
483 This driver supports Qualcomm crypto engine accelerator
484 hardware. To compile this driver as a module, choose M here. The
485 module will be called qcrypto.
486
Leonidas S. Barbosad2e3ae62015-02-06 14:59:48 -0200487config CRYPTO_DEV_VMX
488 bool "Support for VMX cryptographic acceleration instructions"
Michael Ellermanf1ab4282015-09-09 18:22:35 +1000489 depends on PPC64 && VSX
Leonidas S. Barbosad2e3ae62015-02-06 14:59:48 -0200490 help
491 Support for VMX cryptographic acceleration instructions.
492
493source "drivers/crypto/vmx/Kconfig"
494
James Hartleyd358f1a2015-03-12 23:17:26 +0000495config CRYPTO_DEV_IMGTEC_HASH
James Hartleyd358f1a2015-03-12 23:17:26 +0000496 tristate "Imagination Technologies hardware hash accelerator"
Geert Uytterhoeven8c98ebd2015-04-23 20:03:58 +0200497 depends on MIPS || COMPILE_TEST
498 depends on HAS_DMA
James Hartleyd358f1a2015-03-12 23:17:26 +0000499 select CRYPTO_MD5
500 select CRYPTO_SHA1
James Hartleyd358f1a2015-03-12 23:17:26 +0000501 select CRYPTO_SHA256
502 select CRYPTO_HASH
503 help
504 This driver interfaces with the Imagination Technologies
505 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
506 hashing algorithms.
507
LABBE Corentin6298e942015-07-17 16:39:41 +0200508config CRYPTO_DEV_SUN4I_SS
509 tristate "Support for Allwinner Security System cryptographic accelerator"
Andre Przywaraf823ab92016-02-01 17:39:21 +0000510 depends on ARCH_SUNXI && !64BIT
LABBE Corentin6298e942015-07-17 16:39:41 +0200511 select CRYPTO_MD5
512 select CRYPTO_SHA1
513 select CRYPTO_AES
514 select CRYPTO_DES
515 select CRYPTO_BLKCIPHER
516 help
517 Some Allwinner SoC have a crypto accelerator named
518 Security System. Select this if you want to use it.
519 The Security System handle AES/DES/3DES ciphers in CBC mode
520 and SHA1 and MD5 hash algorithms.
521
522 To compile this driver as a module, choose M here: the module
523 will be called sun4i-ss.
524
Zain Wang433cd2c2015-11-25 13:43:32 +0800525config CRYPTO_DEV_ROCKCHIP
526 tristate "Rockchip's Cryptographic Engine driver"
527 depends on OF && ARCH_ROCKCHIP
528 select CRYPTO_AES
529 select CRYPTO_DES
Zain Wangbfd927f2016-02-16 10:15:01 +0800530 select CRYPTO_MD5
531 select CRYPTO_SHA1
532 select CRYPTO_SHA256
533 select CRYPTO_HASH
Zain Wang433cd2c2015-11-25 13:43:32 +0800534 select CRYPTO_BLKCIPHER
535
536 help
537 This driver interfaces with the hardware crypto accelerator.
538 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
539
Jan Engelhardtb5114312007-07-15 23:39:36 -0700540endif # CRYPTO_HW