Srinidhi Kasagar | c6b503c | 2009-11-28 08:15:01 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2009 ST-Ericsson |
| 3 | * heavily based on realview platform |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | */ |
| 9 | #include <linux/module.h> |
| 10 | #include <linux/kernel.h> |
| 11 | #include <linux/list.h> |
| 12 | #include <linux/errno.h> |
| 13 | #include <linux/err.h> |
| 14 | #include <linux/clk.h> |
| 15 | #include <linux/mutex.h> |
| 16 | |
| 17 | #include <asm/clkdev.h> |
| 18 | |
| 19 | /* currently the clk structure |
| 20 | * just supports rate. This would |
| 21 | * be extended as and when new devices are |
| 22 | * added - TODO |
| 23 | */ |
| 24 | struct clk { |
| 25 | unsigned long rate; |
| 26 | }; |
| 27 | |
| 28 | int clk_enable(struct clk *clk) |
| 29 | { |
| 30 | return 0; |
| 31 | } |
| 32 | EXPORT_SYMBOL(clk_enable); |
| 33 | |
| 34 | void clk_disable(struct clk *clk) |
| 35 | { |
| 36 | } |
| 37 | EXPORT_SYMBOL(clk_disable); |
| 38 | |
| 39 | unsigned long clk_get_rate(struct clk *clk) |
| 40 | { |
| 41 | return clk->rate; |
| 42 | } |
| 43 | EXPORT_SYMBOL(clk_get_rate); |
| 44 | |
| 45 | long clk_round_rate(struct clk *clk, unsigned long rate) |
| 46 | { |
| 47 | /*TODO*/ |
| 48 | return rate; |
| 49 | } |
| 50 | EXPORT_SYMBOL(clk_round_rate); |
| 51 | |
| 52 | int clk_set_rate(struct clk *clk, unsigned long rate) |
| 53 | { |
| 54 | clk->rate = rate; |
| 55 | return 0; |
| 56 | } |
| 57 | EXPORT_SYMBOL(clk_set_rate); |
| 58 | |
| 59 | /* ssp clock */ |
| 60 | static struct clk ssp_clk = { |
| 61 | .rate = 48000000, |
| 62 | }; |
| 63 | |
| 64 | /* fixed clock */ |
| 65 | static struct clk f38_clk = { |
| 66 | .rate = 38400000, |
| 67 | }; |
| 68 | |
| 69 | static struct clk_lookup lookups[] = { |
| 70 | { |
| 71 | /* UART0 */ |
| 72 | .dev_id = "uart0", |
| 73 | .clk = &f38_clk, |
| 74 | }, { /* UART1 */ |
| 75 | .dev_id = "uart1", |
| 76 | .clk = &f38_clk, |
| 77 | }, { /* UART2 */ |
| 78 | .dev_id = "uart2", |
| 79 | .clk = &f38_clk, |
| 80 | }, { /* SSP */ |
| 81 | .dev_id = "pl022", |
| 82 | .clk = &ssp_clk, |
| 83 | } |
| 84 | }; |
| 85 | |
| 86 | static int __init clk_init(void) |
| 87 | { |
| 88 | int i; |
| 89 | |
| 90 | /* register the clock lookups */ |
| 91 | for (i = 0; i < ARRAY_SIZE(lookups); i++) |
| 92 | clkdev_add(&lookups[i]); |
| 93 | return 0; |
| 94 | } |
| 95 | arch_initcall(clk_init); |