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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
2 * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All rights reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Authors:
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 * Rewritten by:
32 * Gareth Hughes <gareth@valinux.com>
33 */
34
35#ifndef __MGA_DRM_H__
36#define __MGA_DRM_H__
37
38/* WARNING: If you change any of these defines, make sure to change the
39 * defines in the Xserver file (mga_sarea.h)
40 */
41
42#ifndef __MGA_SAREA_DEFINES__
43#define __MGA_SAREA_DEFINES__
44
45/* WARP pipe flags
46 */
47#define MGA_F 0x1 /* fog */
48#define MGA_A 0x2 /* alpha */
49#define MGA_S 0x4 /* specular */
50#define MGA_T2 0x8 /* multitexture */
51
52#define MGA_WARP_TGZ 0
53#define MGA_WARP_TGZF (MGA_F)
54#define MGA_WARP_TGZA (MGA_A)
55#define MGA_WARP_TGZAF (MGA_F|MGA_A)
56#define MGA_WARP_TGZS (MGA_S)
57#define MGA_WARP_TGZSF (MGA_S|MGA_F)
58#define MGA_WARP_TGZSA (MGA_S|MGA_A)
59#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A)
60#define MGA_WARP_T2GZ (MGA_T2)
61#define MGA_WARP_T2GZF (MGA_T2|MGA_F)
62#define MGA_WARP_T2GZA (MGA_T2|MGA_A)
63#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F)
64#define MGA_WARP_T2GZS (MGA_T2|MGA_S)
65#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F)
66#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
67#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
68
69#define MGA_MAX_G200_PIPES 8 /* no multitex */
70#define MGA_MAX_G400_PIPES 16
71#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
72#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */
73
74#define MGA_CARD_TYPE_G200 1
75#define MGA_CARD_TYPE_G400 2
Dave Airlie93f453f2005-07-10 17:45:34 +100076#define MGA_CARD_TYPE_G450 3 /* not currently used */
77#define MGA_CARD_TYPE_G550 4
Linus Torvalds1da177e2005-04-16 15:20:36 -070078
79#define MGA_FRONT 0x1
80#define MGA_BACK 0x2
81#define MGA_DEPTH 0x4
82
83/* What needs to be changed for the current vertex dma buffer?
84 */
85#define MGA_UPLOAD_CONTEXT 0x1
86#define MGA_UPLOAD_TEX0 0x2
87#define MGA_UPLOAD_TEX1 0x4
88#define MGA_UPLOAD_PIPE 0x8
89#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */
90#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */
91#define MGA_UPLOAD_2D 0x40
92#define MGA_WAIT_AGE 0x80 /* handled client-side */
93#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
94#if 0
95#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
96 quiescent */
97#endif
98
99/* 32 buffers of 64k each, total 2 meg.
100 */
101#define MGA_BUFFER_SIZE (1 << 16)
102#define MGA_NUM_BUFFERS 128
103
104/* Keep these small for testing.
105 */
106#define MGA_NR_SAREA_CLIPRECTS 8
107
108/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
109 * regions, subject to a minimum region size of (1<<16) == 64k.
110 *
111 * Clients may subdivide regions internally, but when sharing between
112 * clients, the region size is the minimum granularity.
113 */
114
115#define MGA_CARD_HEAP 0
116#define MGA_AGP_HEAP 1
117#define MGA_NR_TEX_HEAPS 2
118#define MGA_NR_TEX_REGIONS 16
119#define MGA_LOG_MIN_TEX_REGION_SIZE 16
120
121#define DRM_MGA_IDLE_RETRY 2048
122
123#endif /* __MGA_SAREA_DEFINES__ */
124
125
126/* Setup registers for 3D context
127 */
128typedef struct {
129 unsigned int dstorg;
130 unsigned int maccess;
131 unsigned int plnwt;
132 unsigned int dwgctl;
133 unsigned int alphactrl;
134 unsigned int fogcolor;
135 unsigned int wflag;
136 unsigned int tdualstage0;
137 unsigned int tdualstage1;
138 unsigned int fcol;
139 unsigned int stencil;
140 unsigned int stencilctl;
141} drm_mga_context_regs_t;
142
143/* Setup registers for 2D, X server
144 */
145typedef struct {
146 unsigned int pitch;
147} drm_mga_server_regs_t;
148
149/* Setup registers for each texture unit
150 */
151typedef struct {
152 unsigned int texctl;
153 unsigned int texctl2;
154 unsigned int texfilter;
155 unsigned int texbordercol;
156 unsigned int texorg;
157 unsigned int texwidth;
158 unsigned int texheight;
159 unsigned int texorg1;
160 unsigned int texorg2;
161 unsigned int texorg3;
162 unsigned int texorg4;
163} drm_mga_texture_regs_t;
164
165/* General aging mechanism
166 */
167typedef struct {
168 unsigned int head; /* Position of head pointer */
169 unsigned int wrap; /* Primary DMA wrap count */
170} drm_mga_age_t;
171
172typedef struct _drm_mga_sarea {
173 /* The channel for communication of state information to the kernel
174 * on firing a vertex dma buffer.
175 */
176 drm_mga_context_regs_t context_state;
177 drm_mga_server_regs_t server_state;
178 drm_mga_texture_regs_t tex_state[2];
179 unsigned int warp_pipe;
180 unsigned int dirty;
181 unsigned int vertsize;
182
183 /* The current cliprects, or a subset thereof.
184 */
185 drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
186 unsigned int nbox;
187
188 /* Information about the most recently used 3d drawable. The
189 * client fills in the req_* fields, the server fills in the
190 * exported_ fields and puts the cliprects into boxes, above.
191 *
192 * The client clears the exported_drawable field before
193 * clobbering the boxes data.
194 */
195 unsigned int req_drawable; /* the X drawable id */
196 unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
197
198 unsigned int exported_drawable;
199 unsigned int exported_index;
200 unsigned int exported_stamp;
201 unsigned int exported_buffers;
202 unsigned int exported_nfront;
203 unsigned int exported_nback;
204 int exported_back_x, exported_front_x, exported_w;
205 int exported_back_y, exported_front_y, exported_h;
206 drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
207
208 /* Counters for aging textures and for client-side throttling.
209 */
210 unsigned int status[4];
211 unsigned int last_wrap;
212
213 drm_mga_age_t last_frame;
214 unsigned int last_enqueue; /* last time a buffer was enqueued */
215 unsigned int last_dispatch; /* age of the most recently dispatched buffer */
216 unsigned int last_quiescent; /* */
217
218 /* LRU lists for texture memory in agp space and on the card.
219 */
220 drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
221 unsigned int texAge[MGA_NR_TEX_HEAPS];
222
223 /* Mechanism to validate card state.
224 */
225 int ctxOwner;
226} drm_mga_sarea_t;
227
228
229/* WARNING: If you change any of these defines, make sure to change the
230 * defines in the Xserver file (xf86drmMga.h)
231 */
232
233/* MGA specific ioctls
234 * The device specific ioctl range is 0x40 to 0x79.
235 */
236#define DRM_MGA_INIT 0x00
237#define DRM_MGA_FLUSH 0x01
238#define DRM_MGA_RESET 0x02
239#define DRM_MGA_SWAP 0x03
240#define DRM_MGA_CLEAR 0x04
241#define DRM_MGA_VERTEX 0x05
242#define DRM_MGA_INDICES 0x06
243#define DRM_MGA_ILOAD 0x07
244#define DRM_MGA_BLIT 0x08
245#define DRM_MGA_GETPARAM 0x09
246
247#define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t)
248#define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t)
249#define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET)
250#define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP)
251#define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t)
252#define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t)
253#define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t)
254#define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t)
255#define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t)
256#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
257
258typedef struct _drm_mga_warp_index {
259 int installed;
260 unsigned long phys_addr;
261 int size;
262} drm_mga_warp_index_t;
263
264typedef struct drm_mga_init {
265 enum {
266 MGA_INIT_DMA = 0x01,
267 MGA_CLEANUP_DMA = 0x02
268 } func;
269
270 unsigned long sarea_priv_offset;
271
272 int chipset;
273 int sgram;
274
275 unsigned int maccess;
276
277 unsigned int fb_cpp;
278 unsigned int front_offset, front_pitch;
279 unsigned int back_offset, back_pitch;
280
281 unsigned int depth_cpp;
282 unsigned int depth_offset, depth_pitch;
283
284 unsigned int texture_offset[MGA_NR_TEX_HEAPS];
285 unsigned int texture_size[MGA_NR_TEX_HEAPS];
286
287 unsigned long fb_offset;
288 unsigned long mmio_offset;
289 unsigned long status_offset;
290 unsigned long warp_offset;
291 unsigned long primary_offset;
292 unsigned long buffers_offset;
293} drm_mga_init_t;
294
295typedef struct drm_mga_fullscreen {
296 enum {
297 MGA_INIT_FULLSCREEN = 0x01,
298 MGA_CLEANUP_FULLSCREEN = 0x02
299 } func;
300} drm_mga_fullscreen_t;
301
302typedef struct drm_mga_clear {
303 unsigned int flags;
304 unsigned int clear_color;
305 unsigned int clear_depth;
306 unsigned int color_mask;
307 unsigned int depth_mask;
308} drm_mga_clear_t;
309
310typedef struct drm_mga_vertex {
311 int idx; /* buffer to queue */
312 int used; /* bytes in use */
313 int discard; /* client finished with buffer? */
314} drm_mga_vertex_t;
315
316typedef struct drm_mga_indices {
317 int idx; /* buffer to queue */
318 unsigned int start;
319 unsigned int end;
320 int discard; /* client finished with buffer? */
321} drm_mga_indices_t;
322
323typedef struct drm_mga_iload {
324 int idx;
325 unsigned int dstorg;
326 unsigned int length;
327} drm_mga_iload_t;
328
329typedef struct _drm_mga_blit {
330 unsigned int planemask;
331 unsigned int srcorg;
332 unsigned int dstorg;
333 int src_pitch, dst_pitch;
334 int delta_sx, delta_sy;
335 int delta_dx, delta_dy;
336 int height, ydir; /* flip image vertically */
337 int source_pitch, dest_pitch;
338} drm_mga_blit_t;
339
340/* 3.1: An ioctl to get parameters that aren't available to the 3d
341 * client any other way.
342 */
343#define MGA_PARAM_IRQ_NR 1
344
345typedef struct drm_mga_getparam {
346 int param;
347 void __user *value;
348} drm_mga_getparam_t;
349
350#endif