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gerrit-public.fairphone.software / kernel / msm-4.19 / 7ed47ef1c98ca7f846b75f45cb927b8ee27f78e5 / . / arch / arm / boot / dts / imx6qdl-phytec-pfla02.dtsi
blob: 8ab2c448b56c48ddc9469a76dab934bc29aa3a17 [file] [log] [blame]
Philipp Zabel4fe69a92014-04-14 17:37:23 +0200[diff] [blame]1/*
2 * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/ {
13 model = "Phytec phyFLEX-i.MX6 Ouad";
14 compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
15
16 memory {
17 reg = <0x10000000 0x80000000>;
18 };
19
20 regulators {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <0>;
24
25 reg_usb_otg_vbus: regulator@0 {
26 compatible = "regulator-fixed";
27 reg = <0>;
28 regulator-name = "usb_otg_vbus";
29 regulator-min-microvolt = <5000000>;
30 regulator-max-microvolt = <5000000>;
31 gpio = <&gpio4 15 0>;
32 };
33
34 reg_usb_h1_vbus: regulator@1 {
35 compatible = "regulator-fixed";
36 reg = <1>;
37 regulator-name = "usb_h1_vbus";
38 regulator-min-microvolt = <5000000>;
39 regulator-max-microvolt = <5000000>;
40 gpio = <&gpio1 0 0>;
41 };
42 };
43};
44
45&ecspi3 {
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_ecspi3>;
48 status = "okay";
49 fsl,spi-num-chipselects = <1>;
50 cs-gpios = <&gpio4 24 0>;
51
52 flash@0 {
53 compatible = "m25p80";
54 spi-max-frequency = <20000000>;
55 reg = <0>;
56 };
57};
58
59&i2c1 {
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_i2c1>;
62 status = "okay";
63
64 eeprom@50 {
65 compatible = "atmel,24c32";
66 reg = <0x50>;
67 };
68
69 pmic@58 {
70 compatible = "dialog,da9063";
71 reg = <0x58>;
72 interrupt-parent = <&gpio4>;
73 interrupts = <17 0x8>; /* active-low GPIO4_17 */
74
75 regulators {
76 vddcore_reg: bcore1 {
77 regulator-min-microvolt = <730000>;
78 regulator-max-microvolt = <1380000>;
79 regulator-always-on;
80 };
81
82 vddsoc_reg: bcore2 {
83 regulator-min-microvolt = <730000>;
84 regulator-max-microvolt = <1380000>;
85 regulator-always-on;
86 };
87
88 vdd_ddr3_reg: bpro {
89 regulator-min-microvolt = <1500000>;
90 regulator-max-microvolt = <1500000>;
91 regulator-always-on;
92 };
93
94 vdd_3v3_reg: bperi {
95 regulator-min-microvolt = <3300000>;
96 regulator-max-microvolt = <3300000>;
97 regulator-always-on;
98 };
99
100 vdd_buckmem_reg: bmem {
101 regulator-min-microvolt = <3300000>;
102 regulator-max-microvolt = <3300000>;
103 regulator-always-on;
104 };
105
106 vdd_eth_reg: bio {
107 regulator-min-microvolt = <1200000>;
108 regulator-max-microvolt = <1200000>;
109 regulator-always-on;
110 };
111
112 vdd_eth_io_reg: ldo4 {
113 regulator-min-microvolt = <2500000>;
114 regulator-max-microvolt = <2500000>;
115 regulator-always-on;
116 };
117
118 vdd_mx6_snvs_reg: ldo5 {
119 regulator-min-microvolt = <3000000>;
120 regulator-max-microvolt = <3000000>;
121 regulator-always-on;
122 };
123
124 vdd_3v3_pmic_io_reg: ldo6 {
125 regulator-min-microvolt = <3300000>;
126 regulator-max-microvolt = <3300000>;
127 regulator-always-on;
128 };
129
130 vdd_sd0_reg: ldo9 {
131 regulator-min-microvolt = <3300000>;
132 regulator-max-microvolt = <3300000>;
133 };
134
135 vdd_sd1_reg: ldo10 {
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
138 };
139
140 vdd_mx6_high_reg: ldo11 {
141 regulator-min-microvolt = <3000000>;
142 regulator-max-microvolt = <3000000>;
143 regulator-always-on;
144 };
145 };
146 };
147};
148
149&iomuxc {
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_hog>;
152
153 imx6q-phytec-pfla02 {
154 pinctrl_hog: hoggrp {
155 fsl,pins = <
156 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
157 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
158 MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000 /* PMIC interrupt */
159 >;
160 };
161
162 pinctrl_ecspi3: ecspi3grp {
163 fsl,pins = <
164 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
165 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
166 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
167 >;
168 };
169
170 pinctrl_enet: enetgrp {
171 fsl,pins = <
172 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
173 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
174 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
175 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
176 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
177 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
178 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
179 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
180 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
181 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
182 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
183 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
184 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
185 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
186 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
187 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
188 >;
189 };
190
191 pinctrl_gpmi_nand: gpminandgrp {
192 fsl,pins = <
193 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
194 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
195 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
196 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
197 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
198 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
199 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
200 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
201 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
202 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
203 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
204 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
205 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
206 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
207 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
208 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
209 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
210 >;
211 };
212
213 pinctrl_i2c1: i2c1grp {
214 fsl,pins = <
215 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
216 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
217 >;
218 };
219
220 pinctrl_uart4: uart4grp {
221 fsl,pins = <
222 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
223 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
224 >;
225 };
226
227 pinctrl_usbh1: usbh1grp {
228 fsl,pins = <
229 MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x80000000
230 >;
231 };
232
233 pinctrl_usbotg: usbotggrp {
234 fsl,pins = <
235 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
236 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
237 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000
238 >;
239 };
240
241 pinctrl_usdhc2: usdhc2grp {
242 fsl,pins = <
243 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
244 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
245 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
246 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
247 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
248 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
249 >;
250 };
251
252 pinctrl_usdhc3: usdhc3grp {
253 fsl,pins = <
254 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
255 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
256 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
257 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
258 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
259 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
260 >;
261 };
262
263 pinctrl_usdhc3_cdwp: usdhc3cdwp {
264 fsl,pins = <
265 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
266 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
267 >;
268 };
269 };
270};
271
272&fec {
273 pinctrl-names = "default";
274 pinctrl-0 = <&pinctrl_enet>;
275 phy-mode = "rgmii";
276 phy-reset-gpios = <&gpio3 23 0>;
277 status = "disabled";
278};
279
280&gpmi {
281 pinctrl-names = "default";
282 pinctrl-0 = <&pinctrl_gpmi_nand>;
283 nand-on-flash-bbt;
284 status = "disabled";
285};
286
287&uart4 {
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_uart4>;
290 status = "disabled";
291};
292
293&usbh1 {
294 vbus-supply = <&reg_usb_h1_vbus>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&pinctrl_usbh1>;
297 status = "disabled";
298};
299
300&usbotg {
301 vbus-supply = <&reg_usb_otg_vbus>;
302 pinctrl-names = "default";
303 pinctrl-0 = <&pinctrl_usbotg>;
304 disable-over-current;
305 status = "disabled";
306};
307
308&usdhc2 {
309 pinctrl-names = "default";
310 pinctrl-0 = <&pinctrl_usdhc2>;
311 cd-gpios = <&gpio1 4 0>;
312 wp-gpios = <&gpio1 2 0>;
313 status = "disabled";
314};
315
316&usdhc3 {
317 pinctrl-names = "default";
318 pinctrl-0 = <&pinctrl_usdhc3
319 &pinctrl_usdhc3_cdwp>;
320 cd-gpios = <&gpio1 27 0>;
321 wp-gpios = <&gpio1 29 0>;
322 status = "disabled";
323};