Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 1 | # |
| 2 | # FPGA framework configuration |
| 3 | # |
| 4 | |
| 5 | menu "FPGA Configuration Support" |
| 6 | |
| 7 | config FPGA |
| 8 | tristate "FPGA Configuration Framework" |
| 9 | help |
| 10 | Say Y here if you want support for configuring FPGAs from the |
| 11 | kernel. The FPGA framework adds a FPGA manager class and FPGA |
| 12 | manager drivers. |
| 13 | |
Alan Tull | fab6266 | 2015-10-07 16:36:29 +0100 | [diff] [blame] | 14 | if FPGA |
| 15 | |
Alan Tull | 0fa20cd | 2016-11-01 14:14:29 -0500 | [diff] [blame] | 16 | config FPGA_REGION |
| 17 | tristate "FPGA Region" |
| 18 | depends on OF && FPGA_BRIDGE |
| 19 | help |
| 20 | FPGA Regions allow loading FPGA images under control of |
| 21 | the Device Tree. |
| 22 | |
Alan Tull | fab6266 | 2015-10-07 16:36:29 +0100 | [diff] [blame] | 23 | config FPGA_MGR_SOCFPGA |
| 24 | tristate "Altera SOCFPGA FPGA Manager" |
| 25 | depends on ARCH_SOCFPGA |
| 26 | help |
| 27 | FPGA manager driver support for Altera SOCFPGA. |
| 28 | |
Alan Tull | acbb910a | 2016-11-01 14:14:32 -0500 | [diff] [blame] | 29 | config FPGA_MGR_SOCFPGA_A10 |
| 30 | tristate "Altera SoCFPGA Arria10" |
| 31 | depends on ARCH_SOCFPGA |
| 32 | help |
| 33 | FPGA manager driver support for Altera Arria10 SoCFPGA. |
| 34 | |
Moritz Fischer | 3778470 | 2015-10-16 15:42:30 -0700 | [diff] [blame] | 35 | config FPGA_MGR_ZYNQ_FPGA |
| 36 | tristate "Xilinx Zynq FPGA" |
Jean Delvare | 54e9b09 | 2016-09-08 09:38:05 -0500 | [diff] [blame] | 37 | depends on ARCH_ZYNQ || COMPILE_TEST |
Sudip Mukherjee | 1c8cb40 | 2016-08-03 13:45:46 -0700 | [diff] [blame] | 38 | depends on HAS_DMA |
Moritz Fischer | 3778470 | 2015-10-16 15:42:30 -0700 | [diff] [blame] | 39 | help |
| 40 | FPGA manager driver support for Xilinx Zynq FPGAs. |
| 41 | |
Alan Tull | 21aeda9 | 2016-11-01 14:14:28 -0500 | [diff] [blame] | 42 | config FPGA_BRIDGE |
| 43 | tristate "FPGA Bridge Framework" |
| 44 | depends on OF |
| 45 | help |
| 46 | Say Y here if you want to support bridges connected between host |
| 47 | processors and FPGAs or between FPGAs. |
| 48 | |
Alan Tull | e5f8efa | 2016-11-01 14:14:30 -0500 | [diff] [blame] | 49 | config SOCFPGA_FPGA_BRIDGE |
| 50 | tristate "Altera SoCFPGA FPGA Bridges" |
| 51 | depends on ARCH_SOCFPGA && FPGA_BRIDGE |
| 52 | help |
| 53 | Say Y to enable drivers for FPGA bridges for Altera SOCFPGA |
| 54 | devices. |
| 55 | |
Alan Tull | ca24a64 | 2016-11-01 14:14:31 -0500 | [diff] [blame] | 56 | config ALTERA_FREEZE_BRIDGE |
| 57 | tristate "Altera FPGA Freeze Bridge" |
| 58 | depends on ARCH_SOCFPGA && FPGA_BRIDGE |
| 59 | help |
| 60 | Say Y to enable drivers for Altera FPGA Freeze bridges. A |
| 61 | freeze bridge is a bridge that exists in the FPGA fabric to |
| 62 | isolate one region of the FPGA from the busses while that |
| 63 | region is being reprogrammed. |
| 64 | |
Alan Tull | fab6266 | 2015-10-07 16:36:29 +0100 | [diff] [blame] | 65 | endif # FPGA |
| 66 | |
Alan Tull | 6a8c3be | 2015-10-07 16:36:28 +0100 | [diff] [blame] | 67 | endmenu |