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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +01007 depends on MMU
Joerg Roedel68255b62011-06-14 15:51:54 +02008 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
Will Deaconfdb1d7b2014-11-14 17:16:49 +000017menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
Will Deacone1d3c0f2014-11-14 17:18:23 +000023config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
26 help
27 Enable support for the ARM long descriptor pagetable format.
28 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
29 sizes at both stage-1 and stage-2, as well as address spaces
30 up to 48-bits in size.
31
Will Deaconfe4b9912014-11-17 23:31:12 +000032config IOMMU_IO_PGTABLE_LPAE_SELFTEST
33 bool "LPAE selftests"
34 depends on IOMMU_IO_PGTABLE_LPAE
35 help
36 Enable self-tests for LPAE page table allocator. This performs
37 a series of page-table consistency checks during boot.
38
39 If unsure, say N here.
40
Will Deaconfdb1d7b2014-11-14 17:16:49 +000041endmenu
42
Robin Murphy114150d2015-01-12 17:51:13 +000043config IOMMU_IOVA
44 bool
45
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030046config OF_IOMMU
47 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010048 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030049
Varun Sethi695093e2013-07-15 10:20:57 +053050config FSL_PAMU
51 bool "Freescale IOMMU support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010052 depends on PPC32
53 depends on PPC_E500MC || COMPILE_TEST
Varun Sethi695093e2013-07-15 10:20:57 +053054 select IOMMU_API
55 select GENERIC_ALLOCATOR
56 help
57 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
58 PAMU can authorize memory access, remap the memory address, and remap I/O
59 transaction types.
60
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030061# MSM IOMMU support
62config MSM_IOMMU
63 bool "MSM IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010064 depends on ARM
65 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030066 select IOMMU_API
67 help
68 Support for the IOMMUs found on certain Qualcomm SOCs.
69 These IOMMUs allow virtualization of the address space used by most
70 cores within the multimedia subsystem.
71
72 If unsure, say N here.
73
74config IOMMU_PGTABLES_L2
75 def_bool y
76 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030077
78# AMD IOMMU support
79config AMD_IOMMU
80 bool "AMD IOMMU support"
81 select SWIOTLB
82 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010083 select PCI_ATS
84 select PCI_PRI
85 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030086 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020087 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030088 ---help---
89 With this option you can enable support for AMD IOMMU hardware in
90 your system. An IOMMU is a hardware component which provides
91 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090092 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030093 system from misbehaving device drivers or hardware.
94
95 You can find out if your system has an AMD IOMMU if you look into
96 your BIOS for an option to enable it or if you have an IVRS ACPI
97 table.
98
99config AMD_IOMMU_STATS
100 bool "Export AMD IOMMU statistics to debugfs"
101 depends on AMD_IOMMU
102 select DEBUG_FS
103 ---help---
104 This option enables code in the AMD IOMMU driver to collect various
105 statistics about whats happening in the driver and exports that
106 information to userspace via debugfs.
107 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300108
Joerg Roedele3c495c2011-11-09 12:31:15 +0100109config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -0800110 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +0200111 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100112 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100113 ---help---
114 This option enables support for the AMD IOMMUv2 features of the IOMMU
115 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +0900116 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +0100117
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300118# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700119config DMAR_TABLE
120 bool
121
122config INTEL_IOMMU
123 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300124 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
125 select IOMMU_API
Robin Murphy114150d2015-01-12 17:51:13 +0000126 select IOMMU_IOVA
Suresh Siddhad3f13812011-08-23 17:05:25 -0700127 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300128 help
129 DMA remapping (DMAR) devices support enables independent address
130 translations for Direct Memory Access (DMA) from devices.
131 These DMA remapping devices are reported via ACPI tables
132 and include PCI device scope covered by these DMA
133 remapping devices.
134
Suresh Siddhad3f13812011-08-23 17:05:25 -0700135config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300136 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700137 prompt "Enable Intel DMA Remapping Devices by default"
138 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300139 help
140 Selecting this option will enable a DMAR device at boot time if
141 one is found. If this option is not selected, DMAR support can
142 be enabled by passing intel_iommu=on to the kernel.
143
Suresh Siddhad3f13812011-08-23 17:05:25 -0700144config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300145 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700146 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300147 ---help---
148 Current Graphics drivers tend to use physical address
149 for DMA and avoid using DMA APIs. Setting this config
150 option permits the IOMMU driver to set a unity map for
151 all the OS-visible memory. Hence the driver can continue
152 to use physical addresses for DMA, at least until this
153 option is removed in the 2.6.32 kernel.
154
Suresh Siddhad3f13812011-08-23 17:05:25 -0700155config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300156 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700157 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300158 ---help---
159 Floppy disk drivers are known to bypass DMA API calls
160 thereby failing to work when IOMMU is enabled. This
161 workaround will setup a 1:1 mapping for the first
162 16MiB to make floppy (an ISA device) work.
163
Suresh Siddhad3f13812011-08-23 17:05:25 -0700164config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800165 bool "Support for Interrupt Remapping"
166 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700167 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300168 ---help---
169 Supports Interrupt remapping for IO-APIC and MSI devices.
170 To use x2apic mode in the CPU's which support x2APIC enhancements or
171 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200172
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300173# OMAP IOMMU support
174config OMAP_IOMMU
175 bool "OMAP IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +0100176 depends on ARM && MMU
177 depends on ARCH_OMAP2PLUS || COMPILE_TEST
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300178 select IOMMU_API
179
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300180config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500181 bool "Export OMAP IOMMU internals in DebugFS"
182 depends on OMAP_IOMMU && DEBUG_FS
183 ---help---
184 Select this to see extensive information about
185 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300186
Suman Anna61c75352014-10-22 17:22:30 -0500187 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300188
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800189config ROCKCHIP_IOMMU
190 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100191 depends on ARM
192 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800193 select IOMMU_API
194 select ARM_DMA_USE_IOMMU
195 help
196 Support for IOMMUs found on Rockchip rk32xx SOCs.
197 These IOMMUs allow virtualization of the address space used by most
198 cores within the multimedia subsystem.
199 Say Y here if you are using a Rockchip SoC that includes an IOMMU
200 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300201
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200202config TEGRA_IOMMU_GART
203 bool "Tegra GART IOMMU Support"
204 depends on ARCH_TEGRA_2x_SOC
205 select IOMMU_API
206 help
207 Enables support for remapping discontiguous physical memory
208 shared with the operating system into contiguous I/O virtual
209 space through the GART (Graphics Address Relocation Table)
210 hardware included on Tegra SoCs.
211
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200212config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200213 bool "NVIDIA Tegra SMMU Support"
214 depends on ARCH_TEGRA
215 depends on TEGRA_AHB
216 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200217 select IOMMU_API
218 help
Thierry Reding89184652014-04-16 09:24:44 +0200219 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
220 SoCs (Tegra30 up to Tegra124).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200221
KyongHo Cho2a965362012-05-12 05:56:09 +0900222config EXYNOS_IOMMU
223 bool "Exynos IOMMU Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100224 depends on ARCH_EXYNOS && ARM && MMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900225 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530226 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900227 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530228 Support for the IOMMU (System MMU) of Samsung Exynos application
229 processor family. This enables H/W multimedia accelerators to see
230 non-linear physical memory chunks as linear memory in their
231 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900232
233 If unsure, say N here.
234
235config EXYNOS_IOMMU_DEBUG
236 bool "Debugging log for Exynos IOMMU"
237 depends on EXYNOS_IOMMU
238 help
239 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530240 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900241
Sachin Kamat5455d702014-05-22 09:50:55 +0530242 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900243
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900244config SHMOBILE_IPMMU
245 bool
246
247config SHMOBILE_IPMMU_TLB
248 bool
249
250config SHMOBILE_IOMMU
251 bool "IOMMU for Renesas IPMMU/IPMMUI"
252 default n
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100253 depends on ARM && MMU
Paul Bolleb8354432014-02-08 22:21:54 +0100254 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900255 select IOMMU_API
256 select ARM_DMA_USE_IOMMU
257 select SHMOBILE_IPMMU
258 select SHMOBILE_IPMMU_TLB
259 help
260 Support for Renesas IPMMU/IPMMUI. This option enables
261 remapping of DMA memory accesses from all of the IP blocks
262 on the ICB.
263
264 Warning: Drivers (including userspace drivers of UIO
265 devices) of the IP blocks on the ICB *must* use addresses
266 allocated from the IPMMU (iova) for DMA with this option
267 enabled.
268
269 If unsure, say N.
270
271choice
272 prompt "IPMMU/IPMMUI address space size"
273 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
274 depends on SHMOBILE_IOMMU
275 help
276 This option sets IPMMU/IPMMUI address space size by
277 adjusting the 1st level page table size. The page table size
278 is calculated as follows:
279
280 page table size = number of page table entries * 4 bytes
281 number of page table entries = address space size / 1 MiB
282
283 For example, when the address space size is 2048 MiB, the
284 1st level page table size is 8192 bytes.
285
286 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
287 bool "2 GiB"
288
289 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
290 bool "1 GiB"
291
292 config SHMOBILE_IOMMU_ADDRSIZE_512MB
293 bool "512 MiB"
294
295 config SHMOBILE_IOMMU_ADDRSIZE_256MB
296 bool "256 MiB"
297
298 config SHMOBILE_IOMMU_ADDRSIZE_128MB
299 bool "128 MiB"
300
301 config SHMOBILE_IOMMU_ADDRSIZE_64MB
302 bool "64 MiB"
303
304 config SHMOBILE_IOMMU_ADDRSIZE_32MB
305 bool "32 MiB"
306
307endchoice
308
309config SHMOBILE_IOMMU_L1SIZE
310 int
311 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
312 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
313 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
314 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
315 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
316 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
317 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
318
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200319config IPMMU_VMSA
320 bool "Renesas VMSA-compatible IPMMU"
321 depends on ARM_LPAE
322 depends on ARCH_SHMOBILE || COMPILE_TEST
323 select IOMMU_API
Laurent Pinchartf20ed392015-01-20 18:30:04 +0200324 select IOMMU_IO_PGTABLE_LPAE
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200325 select ARM_DMA_USE_IOMMU
326 help
327 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
328 R-Mobile APE6 and R-Car H2/M2 SoCs.
329
330 If unsure, say N.
331
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000332config SPAPR_TCE_IOMMU
333 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000334 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000335 select IOMMU_API
336 help
337 Enables bits of IOMMU API required by VFIO. The iommu_ops
338 is not implemented as it is not necessary for VFIO.
339
Will Deacon45ae7cf2013-06-24 18:31:25 +0100340config ARM_SMMU
341 bool "ARM Ltd. System MMU (SMMU) Support"
Joerg Roedela20cc762015-02-04 16:53:44 +0100342 depends on (ARM64 || ARM) && MMU
Will Deacon45ae7cf2013-06-24 18:31:25 +0100343 select IOMMU_API
Will Deacon518f7132014-11-14 17:17:54 +0000344 select IOMMU_IO_PGTABLE_LPAE
Will Deacon45ae7cf2013-06-24 18:31:25 +0100345 select ARM_DMA_USE_IOMMU if ARM
346 help
347 Support for implementations of the ARM System MMU architecture
Will Deacon518f7132014-11-14 17:17:54 +0000348 versions 1 and 2.
Will Deacon45ae7cf2013-06-24 18:31:25 +0100349
350 Say Y here if your SoC includes an IOMMU device implementing
351 the ARM SMMU architecture.
352
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300353endif # IOMMU_SUPPORT