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Bryan Wue190d6b2007-07-17 14:43:44 +08001/*
Mike Frysinger2fb9d6f2008-01-30 16:52:24 +08002 * Blackfin On-Chip MAC Driver
Bryan Wue190d6b2007-07-17 14:43:44 +08003 *
Sonic Zhang02460d02010-06-11 10:44:22 +00004 * Copyright 2004-2010 Analog Devices Inc.
Bryan Wue190d6b2007-07-17 14:43:44 +08005 *
Mike Frysinger2fb9d6f2008-01-30 16:52:24 +08006 * Enter bugs at http://blackfin.uclinux.org/
Bryan Wue190d6b2007-07-17 14:43:44 +08007 *
Mike Frysinger2fb9d6f2008-01-30 16:52:24 +08008 * Licensed under the GPL-2 or later.
Bryan Wue190d6b2007-07-17 14:43:44 +08009 */
10
Mike Frysingerc6dd5092011-01-10 02:54:29 +000011#define DRV_VERSION "1.1"
12#define DRV_DESC "Blackfin on-chip Ethernet MAC driver"
13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
Bryan Wue190d6b2007-07-17 14:43:44 +080016#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/slab.h>
21#include <linux/delay.h>
22#include <linux/timer.h>
23#include <linux/errno.h>
24#include <linux/irq.h>
25#include <linux/io.h>
26#include <linux/ioport.h>
27#include <linux/crc32.h>
28#include <linux/device.h>
29#include <linux/spinlock.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080030#include <linux/mii.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080031#include <linux/netdevice.h>
32#include <linux/etherdevice.h>
Bryan Wu679dce32008-04-25 11:53:11 +080033#include <linux/ethtool.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080034#include <linux/skbuff.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080035#include <linux/platform_device.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080036
37#include <asm/dma.h>
38#include <linux/dma-mapping.h>
39
Barry Songfe92afe2010-05-17 17:19:40 -070040#include <asm/div64.h>
Mike Frysinger98f672c2010-01-18 21:14:12 +000041#include <asm/dpmc.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080042#include <asm/blackfin.h>
43#include <asm/cacheflush.h>
44#include <asm/portmux.h>
David Howells3dcc1e72010-10-07 14:08:49 +010045#include <mach/pll.h>
Bryan Wue190d6b2007-07-17 14:43:44 +080046
47#include "bfin_mac.h"
48
Mike Frysingerc6dd5092011-01-10 02:54:29 +000049MODULE_AUTHOR("Bryan Wu, Luke Yang");
Bryan Wue190d6b2007-07-17 14:43:44 +080050MODULE_LICENSE("GPL");
51MODULE_DESCRIPTION(DRV_DESC);
Kay Sievers72abb462008-04-18 13:50:44 -070052MODULE_ALIAS("platform:bfin_mac");
Bryan Wue190d6b2007-07-17 14:43:44 +080053
54#if defined(CONFIG_BFIN_MAC_USE_L1)
55# define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
56# define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
57#else
58# define bfin_mac_alloc(dma_handle, size) \
59 dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
60# define bfin_mac_free(dma_handle, ptr) \
61 dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
62#endif
63
64#define PKT_BUF_SZ 1580
65
66#define MAX_TIMEOUT_CNT 500
67
68/* pointers to maintain transmit list */
69static struct net_dma_desc_tx *tx_list_head;
70static struct net_dma_desc_tx *tx_list_tail;
71static struct net_dma_desc_rx *rx_list_head;
72static struct net_dma_desc_rx *rx_list_tail;
73static struct net_dma_desc_rx *current_rx_ptr;
74static struct net_dma_desc_tx *current_tx_ptr;
75static struct net_dma_desc_tx *tx_desc;
76static struct net_dma_desc_rx *rx_desc;
77
78static void desc_list_free(void)
79{
80 struct net_dma_desc_rx *r;
81 struct net_dma_desc_tx *t;
82 int i;
83#if !defined(CONFIG_BFIN_MAC_USE_L1)
84 dma_addr_t dma_handle = 0;
85#endif
86
87 if (tx_desc) {
88 t = tx_list_head;
89 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
90 if (t) {
91 if (t->skb) {
92 dev_kfree_skb(t->skb);
93 t->skb = NULL;
94 }
95 t = t->next;
96 }
97 }
98 bfin_mac_free(dma_handle, tx_desc);
99 }
100
101 if (rx_desc) {
102 r = rx_list_head;
103 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
104 if (r) {
105 if (r->skb) {
106 dev_kfree_skb(r->skb);
107 r->skb = NULL;
108 }
109 r = r->next;
110 }
111 }
112 bfin_mac_free(dma_handle, rx_desc);
113 }
114}
115
116static int desc_list_init(void)
117{
118 int i;
119 struct sk_buff *new_skb;
120#if !defined(CONFIG_BFIN_MAC_USE_L1)
121 /*
122 * This dma_handle is useless in Blackfin dma_alloc_coherent().
123 * The real dma handler is the return value of dma_alloc_coherent().
124 */
125 dma_addr_t dma_handle;
126#endif
127
128 tx_desc = bfin_mac_alloc(&dma_handle,
129 sizeof(struct net_dma_desc_tx) *
130 CONFIG_BFIN_TX_DESC_NUM);
131 if (tx_desc == NULL)
132 goto init_error;
133
134 rx_desc = bfin_mac_alloc(&dma_handle,
135 sizeof(struct net_dma_desc_rx) *
136 CONFIG_BFIN_RX_DESC_NUM);
137 if (rx_desc == NULL)
138 goto init_error;
139
140 /* init tx_list */
141 tx_list_head = tx_list_tail = tx_desc;
142
143 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
144 struct net_dma_desc_tx *t = tx_desc + i;
145 struct dma_descriptor *a = &(t->desc_a);
146 struct dma_descriptor *b = &(t->desc_b);
147
148 /*
149 * disable DMA
150 * read from memory WNR = 0
151 * wordsize is 32 bits
152 * 6 half words is desc size
153 * large desc flow
154 */
155 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
156 a->start_addr = (unsigned long)t->packet;
157 a->x_count = 0;
158 a->next_dma_desc = b;
159
160 /*
161 * enabled DMA
162 * write to memory WNR = 1
163 * wordsize is 32 bits
164 * disable interrupt
165 * 6 half words is desc size
166 * large desc flow
167 */
168 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
169 b->start_addr = (unsigned long)(&(t->status));
170 b->x_count = 0;
171
172 t->skb = NULL;
173 tx_list_tail->desc_b.next_dma_desc = a;
174 tx_list_tail->next = t;
175 tx_list_tail = t;
176 }
177 tx_list_tail->next = tx_list_head; /* tx_list is a circle */
178 tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
179 current_tx_ptr = tx_list_head;
180
181 /* init rx_list */
182 rx_list_head = rx_list_tail = rx_desc;
183
184 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
185 struct net_dma_desc_rx *r = rx_desc + i;
186 struct dma_descriptor *a = &(r->desc_a);
187 struct dma_descriptor *b = &(r->desc_b);
188
189 /* allocate a new skb for next time receive */
Michael Hennerich015dac82009-05-29 03:41:15 +0000190 new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
Bryan Wue190d6b2007-07-17 14:43:44 +0800191 if (!new_skb) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000192 pr_notice("init: low on mem - packet dropped\n");
Bryan Wue190d6b2007-07-17 14:43:44 +0800193 goto init_error;
194 }
Michael Hennerich015dac82009-05-29 03:41:15 +0000195 skb_reserve(new_skb, NET_IP_ALIGN);
Sonic Zhangf6e1e4f2010-05-10 05:39:08 +0000196 /* Invidate the data cache of skb->data range when it is write back
197 * cache. It will prevent overwritting the new data from DMA
198 */
199 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
200 (unsigned long)new_skb->end);
Bryan Wue190d6b2007-07-17 14:43:44 +0800201 r->skb = new_skb;
202
203 /*
204 * enabled DMA
205 * write to memory WNR = 1
206 * wordsize is 32 bits
207 * disable interrupt
208 * 6 half words is desc size
209 * large desc flow
210 */
211 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
212 /* since RXDWA is enabled */
213 a->start_addr = (unsigned long)new_skb->data - 2;
214 a->x_count = 0;
215 a->next_dma_desc = b;
216
217 /*
218 * enabled DMA
219 * write to memory WNR = 1
220 * wordsize is 32 bits
221 * enable interrupt
222 * 6 half words is desc size
223 * large desc flow
224 */
225 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
226 NDSIZE_6 | DMAFLOW_LARGE;
227 b->start_addr = (unsigned long)(&(r->status));
228 b->x_count = 0;
229
230 rx_list_tail->desc_b.next_dma_desc = a;
231 rx_list_tail->next = r;
232 rx_list_tail = r;
233 }
234 rx_list_tail->next = rx_list_head; /* rx_list is a circle */
235 rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
236 current_rx_ptr = rx_list_head;
237
238 return 0;
239
240init_error:
241 desc_list_free();
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000242 pr_err("kmalloc failed\n");
Bryan Wue190d6b2007-07-17 14:43:44 +0800243 return -ENOMEM;
244}
245
246
247/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
248
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800249/*
250 * MII operations
251 */
Bryan Wue190d6b2007-07-17 14:43:44 +0800252/* Wait until the previous MDC/MDIO transaction has completed */
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000253static int bfin_mdio_poll(void)
Bryan Wue190d6b2007-07-17 14:43:44 +0800254{
255 int timeout_cnt = MAX_TIMEOUT_CNT;
256
257 /* poll the STABUSY bit */
258 while ((bfin_read_EMAC_STAADD()) & STABUSY) {
Bryan Wu6db9e462008-01-30 16:52:21 +0800259 udelay(1);
Bryan Wue190d6b2007-07-17 14:43:44 +0800260 if (timeout_cnt-- < 0) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000261 pr_err("wait MDC/MDIO transaction to complete timeout\n");
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000262 return -ETIMEDOUT;
Bryan Wue190d6b2007-07-17 14:43:44 +0800263 }
264 }
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000265
266 return 0;
Bryan Wue190d6b2007-07-17 14:43:44 +0800267}
268
269/* Read an off-chip register in a PHY through the MDC/MDIO port */
Adrian Bunk0ed05632008-10-12 21:15:17 -0700270static int bfin_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
Bryan Wue190d6b2007-07-17 14:43:44 +0800271{
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000272 int ret;
273
274 ret = bfin_mdio_poll();
275 if (ret)
276 return ret;
Bryan Wue190d6b2007-07-17 14:43:44 +0800277
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800278 /* read mode */
279 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
280 SET_REGAD((u16) regnum) |
281 STABUSY);
282
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000283 ret = bfin_mdio_poll();
284 if (ret)
285 return ret;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800286
287 return (int) bfin_read_EMAC_STADAT();
Bryan Wue190d6b2007-07-17 14:43:44 +0800288}
289
290/* Write an off-chip register in a PHY through the MDC/MDIO port */
Adrian Bunk0ed05632008-10-12 21:15:17 -0700291static int bfin_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
292 u16 value)
Bryan Wue190d6b2007-07-17 14:43:44 +0800293{
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000294 int ret;
295
296 ret = bfin_mdio_poll();
297 if (ret)
298 return ret;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800299
300 bfin_write_EMAC_STADAT((u32) value);
Bryan Wue190d6b2007-07-17 14:43:44 +0800301
302 /* write mode */
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800303 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
304 SET_REGAD((u16) regnum) |
Bryan Wue190d6b2007-07-17 14:43:44 +0800305 STAOP |
306 STABUSY);
307
Mike Frysinger2bfa0f02010-05-10 05:39:13 +0000308 return bfin_mdio_poll();
Bryan Wue190d6b2007-07-17 14:43:44 +0800309}
310
Adrian Bunk0ed05632008-10-12 21:15:17 -0700311static int bfin_mdiobus_reset(struct mii_bus *bus)
Bryan Wue190d6b2007-07-17 14:43:44 +0800312{
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800313 return 0;
Bryan Wue190d6b2007-07-17 14:43:44 +0800314}
315
Bryan Wu7ef0a7e2008-04-25 11:53:10 +0800316static void bfin_mac_adjust_link(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +0800317{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +0800318 struct bfin_mac_local *lp = netdev_priv(dev);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800319 struct phy_device *phydev = lp->phydev;
320 unsigned long flags;
321 int new_state = 0;
Bryan Wue190d6b2007-07-17 14:43:44 +0800322
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800323 spin_lock_irqsave(&lp->lock, flags);
324 if (phydev->link) {
325 /* Now we make sure that we can be in full duplex mode.
326 * If not, we operate in half-duplex mode. */
327 if (phydev->duplex != lp->old_duplex) {
328 u32 opmode = bfin_read_EMAC_OPMODE();
329 new_state = 1;
Bryan Wue190d6b2007-07-17 14:43:44 +0800330
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800331 if (phydev->duplex)
332 opmode |= FDMODE;
333 else
334 opmode &= ~(FDMODE);
Bryan Wue190d6b2007-07-17 14:43:44 +0800335
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800336 bfin_write_EMAC_OPMODE(opmode);
337 lp->old_duplex = phydev->duplex;
338 }
Bryan Wue190d6b2007-07-17 14:43:44 +0800339
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800340 if (phydev->speed != lp->old_speed) {
Sonic Zhang02460d02010-06-11 10:44:22 +0000341 if (phydev->interface == PHY_INTERFACE_MODE_RMII) {
342 u32 opmode = bfin_read_EMAC_OPMODE();
343 switch (phydev->speed) {
344 case 10:
345 opmode |= RMII_10;
346 break;
347 case 100:
348 opmode &= ~RMII_10;
349 break;
350 default:
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000351 netdev_warn(dev,
352 "Ack! Speed (%d) is not 10/100!\n",
353 phydev->speed);
Sonic Zhang02460d02010-06-11 10:44:22 +0000354 break;
355 }
356 bfin_write_EMAC_OPMODE(opmode);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800357 }
Bryan Wue190d6b2007-07-17 14:43:44 +0800358
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800359 new_state = 1;
360 lp->old_speed = phydev->speed;
361 }
Bryan Wue190d6b2007-07-17 14:43:44 +0800362
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800363 if (!lp->old_link) {
364 new_state = 1;
365 lp->old_link = 1;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800366 }
367 } else if (lp->old_link) {
368 new_state = 1;
369 lp->old_link = 0;
370 lp->old_speed = 0;
371 lp->old_duplex = -1;
Bryan Wue190d6b2007-07-17 14:43:44 +0800372 }
373
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800374 if (new_state) {
375 u32 opmode = bfin_read_EMAC_OPMODE();
376 phy_print_status(phydev);
377 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
Bryan Wue190d6b2007-07-17 14:43:44 +0800378 }
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800379
380 spin_unlock_irqrestore(&lp->lock, flags);
381}
382
Bryan Wu7cc8f382008-01-30 16:52:22 +0800383/* MDC = 2.5 MHz */
384#define MDC_CLK 2500000
385
Sonic Zhang02460d02010-06-11 10:44:22 +0000386static int mii_probe(struct net_device *dev, int phy_mode)
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800387{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +0800388 struct bfin_mac_local *lp = netdev_priv(dev);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800389 struct phy_device *phydev = NULL;
390 unsigned short sysctl;
391 int i;
Bryan Wu7cc8f382008-01-30 16:52:22 +0800392 u32 sclk, mdc_div;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800393
394 /* Enable PHY output early */
Mike Frysinger98f672c2010-01-18 21:14:12 +0000395 if (!(bfin_read_VR_CTL() & CLKBUFOE))
396 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800397
Bryan Wu7cc8f382008-01-30 16:52:22 +0800398 sclk = get_sclk();
399 mdc_div = ((sclk / MDC_CLK) / 2) - 1;
400
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800401 sysctl = bfin_read_EMAC_SYSCTL();
Bryan Wu9dc7f302008-01-30 16:52:28 +0800402 sysctl = (sysctl & ~MDCDIV) | SET_MDCDIV(mdc_div);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800403 bfin_write_EMAC_SYSCTL(sysctl);
404
Sonic Zhang02460d02010-06-11 10:44:22 +0000405 /* search for connected PHY device */
406 for (i = 0; i < PHY_MAX_ADDR; ++i) {
Lennert Buytenhek298cf9b2008-10-08 16:29:57 -0700407 struct phy_device *const tmp_phydev = lp->mii_bus->phy_map[i];
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800408
409 if (!tmp_phydev)
410 continue; /* no PHY here... */
411
412 phydev = tmp_phydev;
413 break; /* found it */
414 }
415
416 /* now we are supposed to have a proper phydev, to attach to... */
417 if (!phydev) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000418 netdev_err(dev, "no phy device found\n");
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800419 return -ENODEV;
420 }
421
Sonic Zhang02460d02010-06-11 10:44:22 +0000422 if (phy_mode != PHY_INTERFACE_MODE_RMII &&
423 phy_mode != PHY_INTERFACE_MODE_MII) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000424 netdev_err(dev, "invalid phy interface mode\n");
Sonic Zhang02460d02010-06-11 10:44:22 +0000425 return -EINVAL;
426 }
427
Kay Sieversc2313552009-03-24 16:38:22 -0700428 phydev = phy_connect(dev, dev_name(&phydev->dev), &bfin_mac_adjust_link,
Sonic Zhang02460d02010-06-11 10:44:22 +0000429 0, phy_mode);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800430
431 if (IS_ERR(phydev)) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000432 netdev_err(dev, "could not attach PHY\n");
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800433 return PTR_ERR(phydev);
434 }
435
436 /* mask with MAC supported features */
437 phydev->supported &= (SUPPORTED_10baseT_Half
438 | SUPPORTED_10baseT_Full
439 | SUPPORTED_100baseT_Half
440 | SUPPORTED_100baseT_Full
441 | SUPPORTED_Autoneg
442 | SUPPORTED_Pause | SUPPORTED_Asym_Pause
443 | SUPPORTED_MII
444 | SUPPORTED_TP);
445
446 phydev->advertising = phydev->supported;
447
448 lp->old_link = 0;
449 lp->old_speed = 0;
450 lp->old_duplex = -1;
451 lp->phydev = phydev;
452
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000453 pr_info("attached PHY driver [%s] "
454 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)@sclk=%dMHz)\n",
455 phydev->drv->name, dev_name(&phydev->dev), phydev->irq,
456 MDC_CLK, mdc_div, sclk/1000000);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800457
458 return 0;
Bryan Wue190d6b2007-07-17 14:43:44 +0800459}
460
Bryan Wu679dce32008-04-25 11:53:11 +0800461/*
462 * Ethtool support
463 */
464
Michael Hennerich53fd3f22010-05-10 05:39:11 +0000465/*
466 * interrupt routine for magic packet wakeup
467 */
468static irqreturn_t bfin_mac_wake_interrupt(int irq, void *dev_id)
469{
470 return IRQ_HANDLED;
471}
472
Bryan Wu679dce32008-04-25 11:53:11 +0800473static int
474bfin_mac_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
475{
476 struct bfin_mac_local *lp = netdev_priv(dev);
477
478 if (lp->phydev)
479 return phy_ethtool_gset(lp->phydev, cmd);
480
481 return -EINVAL;
482}
483
484static int
485bfin_mac_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
486{
487 struct bfin_mac_local *lp = netdev_priv(dev);
488
489 if (!capable(CAP_NET_ADMIN))
490 return -EPERM;
491
492 if (lp->phydev)
493 return phy_ethtool_sset(lp->phydev, cmd);
494
495 return -EINVAL;
496}
497
498static void bfin_mac_ethtool_getdrvinfo(struct net_device *dev,
499 struct ethtool_drvinfo *info)
500{
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000501 strcpy(info->driver, KBUILD_MODNAME);
Bryan Wu679dce32008-04-25 11:53:11 +0800502 strcpy(info->version, DRV_VERSION);
503 strcpy(info->fw_version, "N/A");
Kay Sieversc2313552009-03-24 16:38:22 -0700504 strcpy(info->bus_info, dev_name(&dev->dev));
Bryan Wu679dce32008-04-25 11:53:11 +0800505}
506
Michael Hennerich53fd3f22010-05-10 05:39:11 +0000507static void bfin_mac_ethtool_getwol(struct net_device *dev,
508 struct ethtool_wolinfo *wolinfo)
509{
510 struct bfin_mac_local *lp = netdev_priv(dev);
511
512 wolinfo->supported = WAKE_MAGIC;
513 wolinfo->wolopts = lp->wol;
514}
515
516static int bfin_mac_ethtool_setwol(struct net_device *dev,
517 struct ethtool_wolinfo *wolinfo)
518{
519 struct bfin_mac_local *lp = netdev_priv(dev);
520 int rc;
521
522 if (wolinfo->wolopts & (WAKE_MAGICSECURE |
523 WAKE_UCAST |
524 WAKE_MCAST |
525 WAKE_BCAST |
526 WAKE_ARP))
527 return -EOPNOTSUPP;
528
529 lp->wol = wolinfo->wolopts;
530
531 if (lp->wol && !lp->irq_wake_requested) {
532 /* register wake irq handler */
533 rc = request_irq(IRQ_MAC_WAKEDET, bfin_mac_wake_interrupt,
534 IRQF_DISABLED, "EMAC_WAKE", dev);
535 if (rc)
536 return rc;
537 lp->irq_wake_requested = true;
538 }
539
540 if (!lp->wol && lp->irq_wake_requested) {
541 free_irq(IRQ_MAC_WAKEDET, dev);
542 lp->irq_wake_requested = false;
543 }
544
545 /* Make sure the PHY driver doesn't suspend */
546 device_init_wakeup(&dev->dev, lp->wol);
547
548 return 0;
549}
550
Stephen Hemminger0fc0b732009-09-02 01:03:33 -0700551static const struct ethtool_ops bfin_mac_ethtool_ops = {
Bryan Wu679dce32008-04-25 11:53:11 +0800552 .get_settings = bfin_mac_ethtool_getsettings,
553 .set_settings = bfin_mac_ethtool_setsettings,
554 .get_link = ethtool_op_get_link,
555 .get_drvinfo = bfin_mac_ethtool_getdrvinfo,
Michael Hennerich53fd3f22010-05-10 05:39:11 +0000556 .get_wol = bfin_mac_ethtool_getwol,
557 .set_wol = bfin_mac_ethtool_setwol,
Bryan Wu679dce32008-04-25 11:53:11 +0800558};
559
Bryan Wue190d6b2007-07-17 14:43:44 +0800560/**************************************************************************/
Mike Frysinger5ca1bb52011-01-10 02:54:30 +0000561static void setup_system_regs(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +0800562{
Sonic Zhang02460d02010-06-11 10:44:22 +0000563 struct bfin_mac_local *lp = netdev_priv(dev);
564 int i;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800565 unsigned short sysctl;
Bryan Wue190d6b2007-07-17 14:43:44 +0800566
Bryan Wu4ae5a3a2007-09-19 23:37:36 +0800567 /*
568 * Odd word alignment for Receive Frame DMA word
569 * Configure checksum support and rcve frame word alignment
570 */
571 sysctl = bfin_read_EMAC_SYSCTL();
Sonic Zhang02460d02010-06-11 10:44:22 +0000572 /*
573 * check if interrupt is requested for any PHY,
574 * enable PHY interrupt only if needed
575 */
576 for (i = 0; i < PHY_MAX_ADDR; ++i)
577 if (lp->mii_bus->irq[i] != PHY_POLL)
578 break;
579 if (i < PHY_MAX_ADDR)
580 sysctl |= PHYIE;
Bryan Wue190d6b2007-07-17 14:43:44 +0800581 sysctl |= RXDWA;
Sonic Zhang812a9de2010-05-10 05:39:10 +0000582#if defined(BFIN_MAC_CSUM_OFFLOAD)
583 sysctl |= RXCKS;
584#else
585 sysctl &= ~RXCKS;
Bryan Wue190d6b2007-07-17 14:43:44 +0800586#endif
587 bfin_write_EMAC_SYSCTL(sysctl);
Bryan Wue190d6b2007-07-17 14:43:44 +0800588
589 bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
590
Mike Frysingerc599bd62011-01-10 02:54:32 +0000591 /* Set vlan regs to let 1522 bytes long packets pass through */
592 bfin_write_EMAC_VLAN1(lp->vlan1_mask);
593 bfin_write_EMAC_VLAN2(lp->vlan2_mask);
594
Bryan Wue190d6b2007-07-17 14:43:44 +0800595 /* Initialize the TX DMA channel registers */
596 bfin_write_DMA2_X_COUNT(0);
597 bfin_write_DMA2_X_MODIFY(4);
598 bfin_write_DMA2_Y_COUNT(0);
599 bfin_write_DMA2_Y_MODIFY(0);
600
601 /* Initialize the RX DMA channel registers */
602 bfin_write_DMA1_X_COUNT(0);
603 bfin_write_DMA1_X_MODIFY(4);
604 bfin_write_DMA1_Y_COUNT(0);
605 bfin_write_DMA1_Y_MODIFY(0);
606}
607
Alex Landau73f83182007-09-19 23:14:18 +0800608static void setup_mac_addr(u8 *mac_addr)
Bryan Wue190d6b2007-07-17 14:43:44 +0800609{
610 u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
611 u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
612
613 /* this depends on a little-endian machine */
614 bfin_write_EMAC_ADDRLO(addr_low);
615 bfin_write_EMAC_ADDRHI(addr_hi);
616}
617
Bryan Wu7ef0a7e2008-04-25 11:53:10 +0800618static int bfin_mac_set_mac_address(struct net_device *dev, void *p)
Alex Landau73f83182007-09-19 23:14:18 +0800619{
620 struct sockaddr *addr = p;
621 if (netif_running(dev))
622 return -EBUSY;
623 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
624 setup_mac_addr(dev->dev_addr);
625 return 0;
626}
627
Barry Songfe92afe2010-05-17 17:19:40 -0700628#ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
629#define bfin_mac_hwtstamp_is_none(cfg) ((cfg) == HWTSTAMP_FILTER_NONE)
630
631static int bfin_mac_hwtstamp_ioctl(struct net_device *netdev,
632 struct ifreq *ifr, int cmd)
633{
634 struct hwtstamp_config config;
635 struct bfin_mac_local *lp = netdev_priv(netdev);
636 u16 ptpctl;
637 u32 ptpfv1, ptpfv2, ptpfv3, ptpfoff;
638
639 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
640 return -EFAULT;
641
642 pr_debug("%s config flag:0x%x, tx_type:0x%x, rx_filter:0x%x\n",
643 __func__, config.flags, config.tx_type, config.rx_filter);
644
645 /* reserved for future extensions */
646 if (config.flags)
647 return -EINVAL;
648
649 if ((config.tx_type != HWTSTAMP_TX_OFF) &&
650 (config.tx_type != HWTSTAMP_TX_ON))
651 return -ERANGE;
652
653 ptpctl = bfin_read_EMAC_PTP_CTL();
654
655 switch (config.rx_filter) {
656 case HWTSTAMP_FILTER_NONE:
657 /*
658 * Dont allow any timestamping
659 */
660 ptpfv3 = 0xFFFFFFFF;
661 bfin_write_EMAC_PTP_FV3(ptpfv3);
662 break;
663 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
664 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
665 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
666 /*
667 * Clear the five comparison mask bits (bits[12:8]) in EMAC_PTP_CTL)
668 * to enable all the field matches.
669 */
670 ptpctl &= ~0x1F00;
671 bfin_write_EMAC_PTP_CTL(ptpctl);
672 /*
673 * Keep the default values of the EMAC_PTP_FOFF register.
674 */
675 ptpfoff = 0x4A24170C;
676 bfin_write_EMAC_PTP_FOFF(ptpfoff);
677 /*
678 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
679 * registers.
680 */
681 ptpfv1 = 0x11040800;
682 bfin_write_EMAC_PTP_FV1(ptpfv1);
683 ptpfv2 = 0x0140013F;
684 bfin_write_EMAC_PTP_FV2(ptpfv2);
685 /*
686 * The default value (0xFFFC) allows the timestamping of both
687 * received Sync messages and Delay_Req messages.
688 */
689 ptpfv3 = 0xFFFFFFFC;
690 bfin_write_EMAC_PTP_FV3(ptpfv3);
691
692 config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
693 break;
694 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
695 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
696 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
697 /* Clear all five comparison mask bits (bits[12:8]) in the
698 * EMAC_PTP_CTL register to enable all the field matches.
699 */
700 ptpctl &= ~0x1F00;
701 bfin_write_EMAC_PTP_CTL(ptpctl);
702 /*
703 * Keep the default values of the EMAC_PTP_FOFF register, except set
704 * the PTPCOF field to 0x2A.
705 */
706 ptpfoff = 0x2A24170C;
707 bfin_write_EMAC_PTP_FOFF(ptpfoff);
708 /*
709 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
710 * registers.
711 */
712 ptpfv1 = 0x11040800;
713 bfin_write_EMAC_PTP_FV1(ptpfv1);
714 ptpfv2 = 0x0140013F;
715 bfin_write_EMAC_PTP_FV2(ptpfv2);
716 /*
717 * To allow the timestamping of Pdelay_Req and Pdelay_Resp, set
718 * the value to 0xFFF0.
719 */
720 ptpfv3 = 0xFFFFFFF0;
721 bfin_write_EMAC_PTP_FV3(ptpfv3);
722
723 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
724 break;
725 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
726 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
727 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
728 /*
729 * Clear bits 8 and 12 of the EMAC_PTP_CTL register to enable only the
730 * EFTM and PTPCM field comparison.
731 */
732 ptpctl &= ~0x1100;
733 bfin_write_EMAC_PTP_CTL(ptpctl);
734 /*
735 * Keep the default values of all the fields of the EMAC_PTP_FOFF
736 * register, except set the PTPCOF field to 0x0E.
737 */
738 ptpfoff = 0x0E24170C;
739 bfin_write_EMAC_PTP_FOFF(ptpfoff);
740 /*
741 * Program bits [15:0] of the EMAC_PTP_FV1 register to 0x88F7, which
742 * corresponds to PTP messages on the MAC layer.
743 */
744 ptpfv1 = 0x110488F7;
745 bfin_write_EMAC_PTP_FV1(ptpfv1);
746 ptpfv2 = 0x0140013F;
747 bfin_write_EMAC_PTP_FV2(ptpfv2);
748 /*
749 * To allow the timestamping of Pdelay_Req and Pdelay_Resp
750 * messages, set the value to 0xFFF0.
751 */
752 ptpfv3 = 0xFFFFFFF0;
753 bfin_write_EMAC_PTP_FV3(ptpfv3);
754
755 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
756 break;
757 default:
758 return -ERANGE;
759 }
760
761 if (config.tx_type == HWTSTAMP_TX_OFF &&
762 bfin_mac_hwtstamp_is_none(config.rx_filter)) {
763 ptpctl &= ~PTP_EN;
764 bfin_write_EMAC_PTP_CTL(ptpctl);
765
766 SSYNC();
767 } else {
768 ptpctl |= PTP_EN;
769 bfin_write_EMAC_PTP_CTL(ptpctl);
770
771 /*
772 * clear any existing timestamp
773 */
774 bfin_read_EMAC_PTP_RXSNAPLO();
775 bfin_read_EMAC_PTP_RXSNAPHI();
776
777 bfin_read_EMAC_PTP_TXSNAPLO();
778 bfin_read_EMAC_PTP_TXSNAPHI();
779
780 /*
781 * Set registers so that rollover occurs soon to test this.
782 */
783 bfin_write_EMAC_PTP_TIMELO(0x00000000);
784 bfin_write_EMAC_PTP_TIMEHI(0xFF800000);
785
786 SSYNC();
787
788 lp->compare.last_update = 0;
789 timecounter_init(&lp->clock,
790 &lp->cycles,
791 ktime_to_ns(ktime_get_real()));
792 timecompare_update(&lp->compare, 0);
793 }
794
795 lp->stamp_cfg = config;
796 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
797 -EFAULT : 0;
798}
799
800static void bfin_dump_hwtamp(char *s, ktime_t *hw, ktime_t *ts, struct timecompare *cmp)
801{
802 ktime_t sys = ktime_get_real();
803
804 pr_debug("%s %s hardware:%d,%d transform system:%d,%d system:%d,%d, cmp:%lld, %lld\n",
805 __func__, s, hw->tv.sec, hw->tv.nsec, ts->tv.sec, ts->tv.nsec, sys.tv.sec,
806 sys.tv.nsec, cmp->offset, cmp->skew);
807}
808
809static void bfin_tx_hwtstamp(struct net_device *netdev, struct sk_buff *skb)
810{
811 struct bfin_mac_local *lp = netdev_priv(netdev);
Barry Songfe92afe2010-05-17 17:19:40 -0700812
Oliver Hartkopp2244d072010-08-17 08:59:14 +0000813 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
Barry Songfe92afe2010-05-17 17:19:40 -0700814 int timeout_cnt = MAX_TIMEOUT_CNT;
815
816 /* When doing time stamping, keep the connection to the socket
817 * a while longer
818 */
Oliver Hartkopp2244d072010-08-17 08:59:14 +0000819 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
Barry Songfe92afe2010-05-17 17:19:40 -0700820
821 /*
822 * The timestamping is done at the EMAC module's MII/RMII interface
823 * when the module sees the Start of Frame of an event message packet. This
824 * interface is the closest possible place to the physical Ethernet transmission
825 * medium, providing the best timing accuracy.
826 */
827 while ((!(bfin_read_EMAC_PTP_ISTAT() & TXTL)) && (--timeout_cnt))
828 udelay(1);
829 if (timeout_cnt == 0)
Mike Frysingerc6dd5092011-01-10 02:54:29 +0000830 netdev_err(netdev, "timestamp the TX packet failed\n");
Barry Songfe92afe2010-05-17 17:19:40 -0700831 else {
832 struct skb_shared_hwtstamps shhwtstamps;
833 u64 ns;
834 u64 regval;
835
836 regval = bfin_read_EMAC_PTP_TXSNAPLO();
837 regval |= (u64)bfin_read_EMAC_PTP_TXSNAPHI() << 32;
838 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
839 ns = timecounter_cyc2time(&lp->clock,
840 regval);
841 timecompare_update(&lp->compare, ns);
842 shhwtstamps.hwtstamp = ns_to_ktime(ns);
843 shhwtstamps.syststamp =
844 timecompare_transform(&lp->compare, ns);
845 skb_tstamp_tx(skb, &shhwtstamps);
846
847 bfin_dump_hwtamp("TX", &shhwtstamps.hwtstamp, &shhwtstamps.syststamp, &lp->compare);
848 }
849 }
850}
851
852static void bfin_rx_hwtstamp(struct net_device *netdev, struct sk_buff *skb)
853{
854 struct bfin_mac_local *lp = netdev_priv(netdev);
855 u32 valid;
856 u64 regval, ns;
857 struct skb_shared_hwtstamps *shhwtstamps;
858
859 if (bfin_mac_hwtstamp_is_none(lp->stamp_cfg.rx_filter))
860 return;
861
862 valid = bfin_read_EMAC_PTP_ISTAT() & RXEL;
863 if (!valid)
864 return;
865
866 shhwtstamps = skb_hwtstamps(skb);
867
868 regval = bfin_read_EMAC_PTP_RXSNAPLO();
869 regval |= (u64)bfin_read_EMAC_PTP_RXSNAPHI() << 32;
870 ns = timecounter_cyc2time(&lp->clock, regval);
871 timecompare_update(&lp->compare, ns);
872 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
873 shhwtstamps->hwtstamp = ns_to_ktime(ns);
874 shhwtstamps->syststamp = timecompare_transform(&lp->compare, ns);
875
876 bfin_dump_hwtamp("RX", &shhwtstamps->hwtstamp, &shhwtstamps->syststamp, &lp->compare);
877}
878
879/*
880 * bfin_read_clock - read raw cycle counter (to be used by time counter)
881 */
882static cycle_t bfin_read_clock(const struct cyclecounter *tc)
883{
884 u64 stamp;
885
886 stamp = bfin_read_EMAC_PTP_TIMELO();
887 stamp |= (u64)bfin_read_EMAC_PTP_TIMEHI() << 32ULL;
888
889 return stamp;
890}
891
892#define PTP_CLK 25000000
893
894static void bfin_mac_hwtstamp_init(struct net_device *netdev)
895{
896 struct bfin_mac_local *lp = netdev_priv(netdev);
897 u64 append;
898
899 /* Initialize hardware timer */
900 append = PTP_CLK * (1ULL << 32);
901 do_div(append, get_sclk());
902 bfin_write_EMAC_PTP_ADDEND((u32)append);
903
904 memset(&lp->cycles, 0, sizeof(lp->cycles));
905 lp->cycles.read = bfin_read_clock;
906 lp->cycles.mask = CLOCKSOURCE_MASK(64);
907 lp->cycles.mult = 1000000000 / PTP_CLK;
908 lp->cycles.shift = 0;
909
910 /* Synchronize our NIC clock against system wall clock */
911 memset(&lp->compare, 0, sizeof(lp->compare));
912 lp->compare.source = &lp->clock;
913 lp->compare.target = ktime_get_real;
914 lp->compare.num_samples = 10;
915
916 /* Initialize hwstamp config */
917 lp->stamp_cfg.rx_filter = HWTSTAMP_FILTER_NONE;
918 lp->stamp_cfg.tx_type = HWTSTAMP_TX_OFF;
919}
920
921#else
922# define bfin_mac_hwtstamp_is_none(cfg) 0
923# define bfin_mac_hwtstamp_init(dev)
924# define bfin_mac_hwtstamp_ioctl(dev, ifr, cmd) (-EOPNOTSUPP)
925# define bfin_rx_hwtstamp(dev, skb)
926# define bfin_tx_hwtstamp(dev, skb)
927#endif
928
Sonic Zhang4fcc3d32010-06-11 17:44:31 +0800929static inline void _tx_reclaim_skb(void)
Bryan Wue190d6b2007-07-17 14:43:44 +0800930{
Bryan Wue190d6b2007-07-17 14:43:44 +0800931 do {
932 tx_list_head->desc_a.config &= ~DMAEN;
933 tx_list_head->status.status_word = 0;
934 if (tx_list_head->skb) {
935 dev_kfree_skb(tx_list_head->skb);
936 tx_list_head->skb = NULL;
Bryan Wue190d6b2007-07-17 14:43:44 +0800937 }
938 tx_list_head = tx_list_head->next;
Bryan Wue190d6b2007-07-17 14:43:44 +0800939
Sonic Zhang4fcc3d32010-06-11 17:44:31 +0800940 } while (tx_list_head->status.status_word != 0);
941}
942
943static void tx_reclaim_skb(struct bfin_mac_local *lp)
944{
945 int timeout_cnt = MAX_TIMEOUT_CNT;
946
947 if (tx_list_head->status.status_word != 0)
948 _tx_reclaim_skb();
949
950 if (current_tx_ptr->next == tx_list_head) {
951 while (tx_list_head->status.status_word == 0) {
952 /* slow down polling to avoid too many queue stop. */
953 udelay(10);
954 /* reclaim skb if DMA is not running. */
955 if (!(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN))
956 break;
957 if (timeout_cnt-- < 0)
958 break;
959 }
960
961 if (timeout_cnt >= 0)
962 _tx_reclaim_skb();
963 else
964 netif_stop_queue(lp->ndev);
965 }
966
967 if (current_tx_ptr->next != tx_list_head &&
968 netif_queue_stopped(lp->ndev))
969 netif_wake_queue(lp->ndev);
970
971 if (tx_list_head != current_tx_ptr) {
972 /* shorten the timer interval if tx queue is stopped */
973 if (netif_queue_stopped(lp->ndev))
974 lp->tx_reclaim_timer.expires =
975 jiffies + (TX_RECLAIM_JIFFIES >> 4);
976 else
977 lp->tx_reclaim_timer.expires =
978 jiffies + TX_RECLAIM_JIFFIES;
979
980 mod_timer(&lp->tx_reclaim_timer,
981 lp->tx_reclaim_timer.expires);
982 }
983
984 return;
985}
986
987static void tx_reclaim_skb_timeout(unsigned long lp)
988{
989 tx_reclaim_skb((struct bfin_mac_local *)lp);
Bryan Wue190d6b2007-07-17 14:43:44 +0800990}
991
Bryan Wu7ef0a7e2008-04-25 11:53:10 +0800992static int bfin_mac_hard_start_xmit(struct sk_buff *skb,
Bryan Wue190d6b2007-07-17 14:43:44 +0800993 struct net_device *dev)
994{
Sonic Zhang4fcc3d32010-06-11 17:44:31 +0800995 struct bfin_mac_local *lp = netdev_priv(dev);
Bryan Wua50c0c02008-07-27 22:45:04 +0800996 u16 *data;
Michael Hennerich015dac82009-05-29 03:41:15 +0000997 u32 data_align = (unsigned long)(skb->data) & 0x3;
Barry Songfe92afe2010-05-17 17:19:40 -0700998
Bryan Wue190d6b2007-07-17 14:43:44 +0800999 current_tx_ptr->skb = skb;
1000
Michael Hennerich015dac82009-05-29 03:41:15 +00001001 if (data_align == 0x2) {
1002 /* move skb->data to current_tx_ptr payload */
1003 data = (u16 *)(skb->data) - 1;
Barry Songfe92afe2010-05-17 17:19:40 -07001004 *data = (u16)(skb->len);
1005 /*
1006 * When transmitting an Ethernet packet, the PTP_TSYNC module requires
1007 * a DMA_Length_Word field associated with the packet. The lower 12 bits
1008 * of this field are the length of the packet payload in bytes and the higher
1009 * 4 bits are the timestamping enable field.
1010 */
Oliver Hartkopp2244d072010-08-17 08:59:14 +00001011 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
Barry Songfe92afe2010-05-17 17:19:40 -07001012 *data |= 0x1000;
1013
Michael Hennerich015dac82009-05-29 03:41:15 +00001014 current_tx_ptr->desc_a.start_addr = (u32)data;
1015 /* this is important! */
1016 blackfin_dcache_flush_range((u32)data,
1017 (u32)((u8 *)data + skb->len + 4));
Bryan Wue190d6b2007-07-17 14:43:44 +08001018 } else {
Michael Hennerich015dac82009-05-29 03:41:15 +00001019 *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len);
Barry Songfe92afe2010-05-17 17:19:40 -07001020 /* enable timestamping for the sent packet */
Oliver Hartkopp2244d072010-08-17 08:59:14 +00001021 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
Barry Songfe92afe2010-05-17 17:19:40 -07001022 *((u16 *)(current_tx_ptr->packet)) |= 0x1000;
Michael Hennerich015dac82009-05-29 03:41:15 +00001023 memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data,
1024 skb->len);
1025 current_tx_ptr->desc_a.start_addr =
1026 (u32)current_tx_ptr->packet;
Michael Hennerich015dac82009-05-29 03:41:15 +00001027 blackfin_dcache_flush_range(
1028 (u32)current_tx_ptr->packet,
1029 (u32)(current_tx_ptr->packet + skb->len + 2));
Bryan Wue190d6b2007-07-17 14:43:44 +08001030 }
1031
Sonic Zhang805a8ab2009-05-29 03:40:43 +00001032 /* make sure the internal data buffers in the core are drained
1033 * so that the DMA descriptors are completely written when the
1034 * DMA engine goes to fetch them below
1035 */
1036 SSYNC();
1037
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001038 /* always clear status buffer before start tx dma */
1039 current_tx_ptr->status.status_word = 0;
1040
Bryan Wue190d6b2007-07-17 14:43:44 +08001041 /* enable this packet's dma */
1042 current_tx_ptr->desc_a.config |= DMAEN;
1043
1044 /* tx dma is running, just return */
Michael Hennerich015dac82009-05-29 03:41:15 +00001045 if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)
Bryan Wue190d6b2007-07-17 14:43:44 +08001046 goto out;
1047
1048 /* tx dma is not running */
1049 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
1050 /* dma enabled, read from memory, size is 6 */
1051 bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
1052 /* Turn on the EMAC tx */
1053 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
1054
1055out:
Barry Songfe92afe2010-05-17 17:19:40 -07001056 bfin_tx_hwtstamp(dev, skb);
1057
Bryan Wue190d6b2007-07-17 14:43:44 +08001058 current_tx_ptr = current_tx_ptr->next;
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001059 dev->stats.tx_packets++;
1060 dev->stats.tx_bytes += (skb->len);
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001061
1062 tx_reclaim_skb(lp);
1063
Patrick McHardy6ed10652009-06-23 06:03:08 +00001064 return NETDEV_TX_OK;
Bryan Wue190d6b2007-07-17 14:43:44 +08001065}
1066
Sonic Zhangad2864d2010-05-10 05:39:09 +00001067#define IP_HEADER_OFF 0
Peter Meerwaldec497b32010-05-17 17:20:50 -07001068#define RX_ERROR_MASK (RX_LONG | RX_ALIGN | RX_CRC | RX_LEN | \
1069 RX_FRAG | RX_ADDR | RX_DMAO | RX_PHY | RX_LATE | RX_RANGE)
1070
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001071static void bfin_mac_rx(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001072{
1073 struct sk_buff *skb, *new_skb;
Bryan Wue190d6b2007-07-17 14:43:44 +08001074 unsigned short len;
Barry Songfe92afe2010-05-17 17:19:40 -07001075 struct bfin_mac_local *lp __maybe_unused = netdev_priv(dev);
Sonic Zhangad2864d2010-05-10 05:39:09 +00001076#if defined(BFIN_MAC_CSUM_OFFLOAD)
1077 unsigned int i;
1078 unsigned char fcs[ETH_FCS_LEN + 1];
1079#endif
Bryan Wue190d6b2007-07-17 14:43:44 +08001080
Peter Meerwaldec497b32010-05-17 17:20:50 -07001081 /* check if frame status word reports an error condition
1082 * we which case we simply drop the packet
1083 */
1084 if (current_rx_ptr->status.status_word & RX_ERROR_MASK) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001085 netdev_notice(dev, "rx: receive error - packet dropped\n");
Peter Meerwaldec497b32010-05-17 17:20:50 -07001086 dev->stats.rx_dropped++;
1087 goto out;
1088 }
1089
Bryan Wue190d6b2007-07-17 14:43:44 +08001090 /* allocate a new skb for next time receive */
1091 skb = current_rx_ptr->skb;
Barry Songfe92afe2010-05-17 17:19:40 -07001092
Michael Hennerich015dac82009-05-29 03:41:15 +00001093 new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
Bryan Wue190d6b2007-07-17 14:43:44 +08001094 if (!new_skb) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001095 netdev_notice(dev, "rx: low on mem - packet dropped\n");
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001096 dev->stats.rx_dropped++;
Bryan Wue190d6b2007-07-17 14:43:44 +08001097 goto out;
1098 }
1099 /* reserve 2 bytes for RXDWA padding */
Michael Hennerich015dac82009-05-29 03:41:15 +00001100 skb_reserve(new_skb, NET_IP_ALIGN);
Alexey Demin6e01d1a2008-01-30 16:52:27 +08001101 /* Invidate the data cache of skb->data range when it is write back
1102 * cache. It will prevent overwritting the new data from DMA
1103 */
1104 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
1105 (unsigned long)new_skb->end);
1106
Sonic Zhangf6e1e4f2010-05-10 05:39:08 +00001107 current_rx_ptr->skb = new_skb;
1108 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
1109
Bryan Wue190d6b2007-07-17 14:43:44 +08001110 len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
Sonic Zhangad2864d2010-05-10 05:39:09 +00001111 /* Deduce Ethernet FCS length from Ethernet payload length */
1112 len -= ETH_FCS_LEN;
Bryan Wue190d6b2007-07-17 14:43:44 +08001113 skb_put(skb, len);
Bryan Wue190d6b2007-07-17 14:43:44 +08001114
Bryan Wue190d6b2007-07-17 14:43:44 +08001115 skb->protocol = eth_type_trans(skb, dev);
Barry Songfe92afe2010-05-17 17:19:40 -07001116
1117 bfin_rx_hwtstamp(dev, skb);
1118
Bryan Wue190d6b2007-07-17 14:43:44 +08001119#if defined(BFIN_MAC_CSUM_OFFLOAD)
Sonic Zhangad2864d2010-05-10 05:39:09 +00001120 /* Checksum offloading only works for IPv4 packets with the standard IP header
1121 * length of 20 bytes, because the blackfin MAC checksum calculation is
1122 * based on that assumption. We must NOT use the calculated checksum if our
1123 * IP version or header break that assumption.
1124 */
1125 if (skb->data[IP_HEADER_OFF] == 0x45) {
1126 skb->csum = current_rx_ptr->status.ip_payload_csum;
1127 /*
1128 * Deduce Ethernet FCS from hardware generated IP payload checksum.
1129 * IP checksum is based on 16-bit one's complement algorithm.
1130 * To deduce a value from checksum is equal to add its inversion.
1131 * If the IP payload len is odd, the inversed FCS should also
1132 * begin from odd address and leave first byte zero.
1133 */
1134 if (skb->len % 2) {
1135 fcs[0] = 0;
1136 for (i = 0; i < ETH_FCS_LEN; i++)
1137 fcs[i + 1] = ~skb->data[skb->len + i];
1138 skb->csum = csum_partial(fcs, ETH_FCS_LEN + 1, skb->csum);
1139 } else {
1140 for (i = 0; i < ETH_FCS_LEN; i++)
1141 fcs[i] = ~skb->data[skb->len + i];
1142 skb->csum = csum_partial(fcs, ETH_FCS_LEN, skb->csum);
1143 }
1144 skb->ip_summed = CHECKSUM_COMPLETE;
1145 }
Bryan Wue190d6b2007-07-17 14:43:44 +08001146#endif
1147
1148 netif_rx(skb);
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001149 dev->stats.rx_packets++;
1150 dev->stats.rx_bytes += len;
Peter Meerwaldec497b32010-05-17 17:20:50 -07001151out:
Bryan Wue190d6b2007-07-17 14:43:44 +08001152 current_rx_ptr->status.status_word = 0x00000000;
1153 current_rx_ptr = current_rx_ptr->next;
Bryan Wue190d6b2007-07-17 14:43:44 +08001154}
1155
1156/* interrupt routine to handle rx and error signal */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001157static irqreturn_t bfin_mac_interrupt(int irq, void *dev_id)
Bryan Wue190d6b2007-07-17 14:43:44 +08001158{
1159 struct net_device *dev = dev_id;
1160 int number = 0;
1161
1162get_one_packet:
1163 if (current_rx_ptr->status.status_word == 0) {
1164 /* no more new packet received */
1165 if (number == 0) {
1166 if (current_rx_ptr->next->status.status_word != 0) {
1167 current_rx_ptr = current_rx_ptr->next;
1168 goto real_rx;
1169 }
1170 }
1171 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
1172 DMA_DONE | DMA_ERR);
1173 return IRQ_HANDLED;
1174 }
1175
1176real_rx:
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001177 bfin_mac_rx(dev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001178 number++;
1179 goto get_one_packet;
1180}
1181
1182#ifdef CONFIG_NET_POLL_CONTROLLER
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001183static void bfin_mac_poll(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001184{
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001185 struct bfin_mac_local *lp = netdev_priv(dev);
1186
Bryan Wue190d6b2007-07-17 14:43:44 +08001187 disable_irq(IRQ_MAC_RX);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001188 bfin_mac_interrupt(IRQ_MAC_RX, dev);
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001189 tx_reclaim_skb(lp);
Bryan Wue190d6b2007-07-17 14:43:44 +08001190 enable_irq(IRQ_MAC_RX);
1191}
1192#endif /* CONFIG_NET_POLL_CONTROLLER */
1193
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001194static void bfin_mac_disable(void)
Bryan Wue190d6b2007-07-17 14:43:44 +08001195{
1196 unsigned int opmode;
1197
1198 opmode = bfin_read_EMAC_OPMODE();
1199 opmode &= (~RE);
1200 opmode &= (~TE);
1201 /* Turn off the EMAC */
1202 bfin_write_EMAC_OPMODE(opmode);
1203}
1204
1205/*
1206 * Enable Interrupts, Receive, and Transmit
1207 */
Sonic Zhang02460d02010-06-11 10:44:22 +00001208static int bfin_mac_enable(struct phy_device *phydev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001209{
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001210 int ret;
Bryan Wue190d6b2007-07-17 14:43:44 +08001211 u32 opmode;
1212
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001213 pr_debug("%s\n", __func__);
Bryan Wue190d6b2007-07-17 14:43:44 +08001214
1215 /* Set RX DMA */
1216 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
1217 bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
1218
1219 /* Wait MII done */
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001220 ret = bfin_mdio_poll();
1221 if (ret)
1222 return ret;
Bryan Wue190d6b2007-07-17 14:43:44 +08001223
1224 /* We enable only RX here */
1225 /* ASTP : Enable Automatic Pad Stripping
1226 PR : Promiscuous Mode for test
1227 PSF : Receive frames with total length less than 64 bytes.
1228 FDMODE : Full Duplex Mode
1229 LB : Internal Loopback for test
1230 RE : Receiver Enable */
1231 opmode = bfin_read_EMAC_OPMODE();
1232 if (opmode & FDMODE)
1233 opmode |= PSF;
1234 else
1235 opmode |= DRO | DC | PSF;
1236 opmode |= RE;
1237
Sonic Zhang02460d02010-06-11 10:44:22 +00001238 if (phydev->interface == PHY_INTERFACE_MODE_RMII) {
1239 opmode |= RMII; /* For Now only 100MBit are supported */
Mike Frysinger72f49052011-03-27 22:33:13 +00001240#if defined(CONFIG_BF537) || defined(CONFIG_BF536)
1241 if (__SILICON_REVISION__ < 3) {
1242 /*
1243 * This isn't publicly documented (fun times!), but in
1244 * silicon <=0.2, the RX and TX pins are clocked together.
1245 * So in order to recv, we must enable the transmit side
1246 * as well. This will cause a spurious TX interrupt too,
1247 * but we can easily consume that.
1248 */
1249 opmode |= TE;
1250 }
Bryan Wue190d6b2007-07-17 14:43:44 +08001251#endif
Sonic Zhang02460d02010-06-11 10:44:22 +00001252 }
1253
Bryan Wue190d6b2007-07-17 14:43:44 +08001254 /* Turn on the EMAC rx */
1255 bfin_write_EMAC_OPMODE(opmode);
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001256
1257 return 0;
Bryan Wue190d6b2007-07-17 14:43:44 +08001258}
1259
1260/* Our watchdog timed out. Called by the networking layer */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001261static void bfin_mac_timeout(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001262{
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001263 struct bfin_mac_local *lp = netdev_priv(dev);
1264
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07001265 pr_debug("%s: %s\n", dev->name, __func__);
Bryan Wue190d6b2007-07-17 14:43:44 +08001266
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001267 bfin_mac_disable();
Bryan Wue190d6b2007-07-17 14:43:44 +08001268
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001269 del_timer(&lp->tx_reclaim_timer);
1270
1271 /* reset tx queue and free skb */
1272 while (tx_list_head != current_tx_ptr) {
1273 tx_list_head->desc_a.config &= ~DMAEN;
1274 tx_list_head->status.status_word = 0;
1275 if (tx_list_head->skb) {
1276 dev_kfree_skb(tx_list_head->skb);
1277 tx_list_head->skb = NULL;
1278 }
1279 tx_list_head = tx_list_head->next;
1280 }
1281
1282 if (netif_queue_stopped(lp->ndev))
1283 netif_wake_queue(lp->ndev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001284
Sonic Zhang02460d02010-06-11 10:44:22 +00001285 bfin_mac_enable(lp->phydev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001286
1287 /* We can accept TX packets again */
Eric Dumazet1ae5dc32010-05-10 05:01:31 -07001288 dev->trans_start = jiffies; /* prevent tx timeout */
Bryan Wue190d6b2007-07-17 14:43:44 +08001289 netif_wake_queue(dev);
1290}
1291
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001292static void bfin_mac_multicast_hash(struct net_device *dev)
Aidan Williams775919b2008-01-30 16:52:23 +08001293{
1294 u32 emac_hashhi, emac_hashlo;
Jiri Pirko22bedad32010-04-01 21:22:57 +00001295 struct netdev_hw_addr *ha;
Aidan Williams775919b2008-01-30 16:52:23 +08001296 u32 crc;
1297
1298 emac_hashhi = emac_hashlo = 0;
1299
Jiri Pirko22bedad32010-04-01 21:22:57 +00001300 netdev_for_each_mc_addr(ha, dev) {
Joe Perchesf767b6d2011-01-12 18:08:04 +00001301 crc = ether_crc(ETH_ALEN, ha->addr);
Aidan Williams775919b2008-01-30 16:52:23 +08001302 crc >>= 26;
1303
1304 if (crc & 0x20)
1305 emac_hashhi |= 1 << (crc & 0x1f);
1306 else
1307 emac_hashlo |= 1 << (crc & 0x1f);
1308 }
1309
1310 bfin_write_EMAC_HASHHI(emac_hashhi);
1311 bfin_write_EMAC_HASHLO(emac_hashlo);
Aidan Williams775919b2008-01-30 16:52:23 +08001312}
1313
Bryan Wue190d6b2007-07-17 14:43:44 +08001314/*
Bryan Wue190d6b2007-07-17 14:43:44 +08001315 * This routine will, depending on the values passed to it,
1316 * either make it accept multicast packets, go into
1317 * promiscuous mode (for TCPDUMP and cousins) or accept
1318 * a select set of multicast packets
1319 */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001320static void bfin_mac_set_multicast_list(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001321{
1322 u32 sysctl;
1323
1324 if (dev->flags & IFF_PROMISC) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001325 netdev_info(dev, "set promisc mode\n");
Bryan Wue190d6b2007-07-17 14:43:44 +08001326 sysctl = bfin_read_EMAC_OPMODE();
Sonic Zhangc0da7762010-05-10 05:39:12 +00001327 sysctl |= PR;
Bryan Wue190d6b2007-07-17 14:43:44 +08001328 bfin_write_EMAC_OPMODE(sysctl);
Aidan Williams775919b2008-01-30 16:52:23 +08001329 } else if (dev->flags & IFF_ALLMULTI) {
Bryan Wue190d6b2007-07-17 14:43:44 +08001330 /* accept all multicast */
1331 sysctl = bfin_read_EMAC_OPMODE();
1332 sysctl |= PAM;
1333 bfin_write_EMAC_OPMODE(sysctl);
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00001334 } else if (!netdev_mc_empty(dev)) {
Aidan Williams775919b2008-01-30 16:52:23 +08001335 /* set up multicast hash table */
1336 sysctl = bfin_read_EMAC_OPMODE();
1337 sysctl |= HM;
1338 bfin_write_EMAC_OPMODE(sysctl);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001339 bfin_mac_multicast_hash(dev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001340 } else {
1341 /* clear promisc or multicast mode */
1342 sysctl = bfin_read_EMAC_OPMODE();
1343 sysctl &= ~(RAF | PAM);
1344 bfin_write_EMAC_OPMODE(sysctl);
1345 }
1346}
1347
Barry Songfe92afe2010-05-17 17:19:40 -07001348static int bfin_mac_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1349{
Sonic Zhang02460d02010-06-11 10:44:22 +00001350 struct bfin_mac_local *lp = netdev_priv(netdev);
1351
1352 if (!netif_running(netdev))
1353 return -EINVAL;
1354
Barry Songfe92afe2010-05-17 17:19:40 -07001355 switch (cmd) {
1356 case SIOCSHWTSTAMP:
1357 return bfin_mac_hwtstamp_ioctl(netdev, ifr, cmd);
1358 default:
Sonic Zhang02460d02010-06-11 10:44:22 +00001359 if (lp->phydev)
1360 return phy_mii_ioctl(lp->phydev, ifr, cmd);
1361 else
1362 return -EOPNOTSUPP;
Barry Songfe92afe2010-05-17 17:19:40 -07001363 }
1364}
1365
Bryan Wue190d6b2007-07-17 14:43:44 +08001366/*
1367 * this puts the device in an inactive state
1368 */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001369static void bfin_mac_shutdown(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001370{
1371 /* Turn off the EMAC */
1372 bfin_write_EMAC_OPMODE(0x00000000);
1373 /* Turn off the EMAC RX DMA */
1374 bfin_write_DMA1_CONFIG(0x0000);
1375 bfin_write_DMA2_CONFIG(0x0000);
1376}
1377
1378/*
1379 * Open and Initialize the interface
1380 *
1381 * Set up everything, reset the card, etc..
1382 */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001383static int bfin_mac_open(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001384{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001385 struct bfin_mac_local *lp = netdev_priv(dev);
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001386 int ret;
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07001387 pr_debug("%s: %s\n", dev->name, __func__);
Bryan Wue190d6b2007-07-17 14:43:44 +08001388
1389 /*
1390 * Check that the address is valid. If its not, refuse
1391 * to bring the device up. The user must specify an
1392 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1393 */
1394 if (!is_valid_ether_addr(dev->dev_addr)) {
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001395 netdev_warn(dev, "no valid ethernet hw addr\n");
Bryan Wue190d6b2007-07-17 14:43:44 +08001396 return -EINVAL;
1397 }
1398
1399 /* initial rx and tx list */
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001400 ret = desc_list_init();
1401 if (ret)
1402 return ret;
Bryan Wue190d6b2007-07-17 14:43:44 +08001403
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001404 phy_start(lp->phydev);
Vitja Makarov136492b2008-01-30 16:52:26 +08001405 phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
Bryan Wue190d6b2007-07-17 14:43:44 +08001406 setup_system_regs(dev);
Michael Hennerichee02fee2008-07-27 22:45:05 +08001407 setup_mac_addr(dev->dev_addr);
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001408
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001409 bfin_mac_disable();
Sonic Zhang02460d02010-06-11 10:44:22 +00001410 ret = bfin_mac_enable(lp->phydev);
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001411 if (ret)
1412 return ret;
Bryan Wue190d6b2007-07-17 14:43:44 +08001413 pr_debug("hardware init finished\n");
Mike Frysinger2bfa0f02010-05-10 05:39:13 +00001414
Bryan Wue190d6b2007-07-17 14:43:44 +08001415 netif_start_queue(dev);
1416 netif_carrier_on(dev);
1417
1418 return 0;
1419}
1420
1421/*
Bryan Wue190d6b2007-07-17 14:43:44 +08001422 * this makes the board clean up everything that it can
1423 * and not talk to the outside world. Caused by
1424 * an 'ifconfig ethX down'
1425 */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001426static int bfin_mac_close(struct net_device *dev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001427{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001428 struct bfin_mac_local *lp = netdev_priv(dev);
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07001429 pr_debug("%s: %s\n", dev->name, __func__);
Bryan Wue190d6b2007-07-17 14:43:44 +08001430
1431 netif_stop_queue(dev);
1432 netif_carrier_off(dev);
1433
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001434 phy_stop(lp->phydev);
Vitja Makarov136492b2008-01-30 16:52:26 +08001435 phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001436
Bryan Wue190d6b2007-07-17 14:43:44 +08001437 /* clear everything */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001438 bfin_mac_shutdown(dev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001439
1440 /* free the rx/tx buffers */
1441 desc_list_free();
1442
1443 return 0;
1444}
1445
Mike Frysingerb63dc8f2009-05-26 20:55:33 -07001446static const struct net_device_ops bfin_mac_netdev_ops = {
1447 .ndo_open = bfin_mac_open,
1448 .ndo_stop = bfin_mac_close,
1449 .ndo_start_xmit = bfin_mac_hard_start_xmit,
1450 .ndo_set_mac_address = bfin_mac_set_mac_address,
1451 .ndo_tx_timeout = bfin_mac_timeout,
1452 .ndo_set_multicast_list = bfin_mac_set_multicast_list,
Barry Songfe92afe2010-05-17 17:19:40 -07001453 .ndo_do_ioctl = bfin_mac_ioctl,
Mike Frysingerb63dc8f2009-05-26 20:55:33 -07001454 .ndo_validate_addr = eth_validate_addr,
1455 .ndo_change_mtu = eth_change_mtu,
1456#ifdef CONFIG_NET_POLL_CONTROLLER
1457 .ndo_poll_controller = bfin_mac_poll,
1458#endif
1459};
1460
Mike Frysingerd7b843d32008-07-27 22:45:03 +08001461static int __devinit bfin_mac_probe(struct platform_device *pdev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001462{
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001463 struct net_device *ndev;
1464 struct bfin_mac_local *lp;
Graf Yang080c8252009-05-29 03:41:48 +00001465 struct platform_device *pd;
Sonic Zhang02460d02010-06-11 10:44:22 +00001466 struct bfin_mii_bus_platform_data *mii_bus_data;
Graf Yang080c8252009-05-29 03:41:48 +00001467 int rc;
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001468
1469 ndev = alloc_etherdev(sizeof(struct bfin_mac_local));
1470 if (!ndev) {
1471 dev_err(&pdev->dev, "Cannot allocate net device!\n");
1472 return -ENOMEM;
1473 }
1474
1475 SET_NETDEV_DEV(ndev, &pdev->dev);
1476 platform_set_drvdata(pdev, ndev);
1477 lp = netdev_priv(ndev);
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001478 lp->ndev = ndev;
Bryan Wue190d6b2007-07-17 14:43:44 +08001479
1480 /* Grab the MAC address in the MAC */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001481 *(__le32 *) (&(ndev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
1482 *(__le16 *) (&(ndev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
Bryan Wue190d6b2007-07-17 14:43:44 +08001483
1484 /* probe mac */
1485 /*todo: how to proble? which is revision_register */
1486 bfin_write_EMAC_ADDRLO(0x12345678);
1487 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001488 dev_err(&pdev->dev, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
1489 rc = -ENODEV;
1490 goto out_err_probe_mac;
Bryan Wue190d6b2007-07-17 14:43:44 +08001491 }
1492
Bryan Wue190d6b2007-07-17 14:43:44 +08001493
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001494 /*
1495 * Is it valid? (Did bootloader initialize it?)
1496 * Grab the MAC from the board somehow
1497 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
1498 */
1499 if (!is_valid_ether_addr(ndev->dev_addr))
1500 bfin_get_ether_addr(ndev->dev_addr);
1501
Bryan Wue190d6b2007-07-17 14:43:44 +08001502 /* If still not valid, get a random one */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001503 if (!is_valid_ether_addr(ndev->dev_addr))
1504 random_ether_addr(ndev->dev_addr);
Bryan Wue190d6b2007-07-17 14:43:44 +08001505
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001506 setup_mac_addr(ndev->dev_addr);
Bryan Wue190d6b2007-07-17 14:43:44 +08001507
Graf Yang080c8252009-05-29 03:41:48 +00001508 if (!pdev->dev.platform_data) {
1509 dev_err(&pdev->dev, "Cannot get platform device bfin_mii_bus!\n");
1510 rc = -ENODEV;
1511 goto out_err_probe_mac;
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001512 }
Graf Yang080c8252009-05-29 03:41:48 +00001513 pd = pdev->dev.platform_data;
1514 lp->mii_bus = platform_get_drvdata(pd);
Sonic Zhang0e995cd2010-05-10 05:39:14 +00001515 if (!lp->mii_bus) {
1516 dev_err(&pdev->dev, "Cannot get mii_bus!\n");
1517 rc = -ENODEV;
Sonic Zhang02460d02010-06-11 10:44:22 +00001518 goto out_err_probe_mac;
Sonic Zhang0e995cd2010-05-10 05:39:14 +00001519 }
Graf Yang080c8252009-05-29 03:41:48 +00001520 lp->mii_bus->priv = ndev;
Sonic Zhang02460d02010-06-11 10:44:22 +00001521 mii_bus_data = pd->dev.platform_data;
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001522
Sonic Zhang02460d02010-06-11 10:44:22 +00001523 rc = mii_probe(ndev, mii_bus_data->phy_mode);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001524 if (rc) {
1525 dev_err(&pdev->dev, "MII Probe failed!\n");
1526 goto out_err_mii_probe;
1527 }
Bryan Wu4ae5a3a2007-09-19 23:37:36 +08001528
Mike Frysingerc599bd62011-01-10 02:54:32 +00001529 lp->vlan1_mask = ETH_P_8021Q | mii_bus_data->vlan1_mask;
1530 lp->vlan2_mask = ETH_P_8021Q | mii_bus_data->vlan2_mask;
1531
Bryan Wue190d6b2007-07-17 14:43:44 +08001532 /* Fill in the fields of the device structure with ethernet values. */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001533 ether_setup(ndev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001534
Alexander Beregalov149da652009-04-14 18:30:24 +00001535 ndev->netdev_ops = &bfin_mac_netdev_ops;
Bryan Wu679dce32008-04-25 11:53:11 +08001536 ndev->ethtool_ops = &bfin_mac_ethtool_ops;
Bryan Wue190d6b2007-07-17 14:43:44 +08001537
Sonic Zhang4fcc3d32010-06-11 17:44:31 +08001538 init_timer(&lp->tx_reclaim_timer);
1539 lp->tx_reclaim_timer.data = (unsigned long)lp;
1540 lp->tx_reclaim_timer.function = tx_reclaim_skb_timeout;
1541
Bryan Wue190d6b2007-07-17 14:43:44 +08001542 spin_lock_init(&lp->lock);
1543
1544 /* now, enable interrupts */
1545 /* register irq handler */
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001546 rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt,
Michael Hennerich91a455f2009-05-29 03:39:45 +00001547 IRQF_DISABLED, "EMAC_RX", ndev);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001548 if (rc) {
1549 dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n");
1550 rc = -EBUSY;
1551 goto out_err_request_irq;
Bryan Wue190d6b2007-07-17 14:43:44 +08001552 }
1553
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001554 rc = register_netdev(ndev);
1555 if (rc) {
1556 dev_err(&pdev->dev, "Cannot register net device!\n");
1557 goto out_err_reg_ndev;
Bryan Wue190d6b2007-07-17 14:43:44 +08001558 }
1559
Barry Songfe92afe2010-05-17 17:19:40 -07001560 bfin_mac_hwtstamp_init(ndev);
1561
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001562 /* now, print out the card info, in a short format.. */
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001563 netdev_info(ndev, "%s, Version %s\n", DRV_DESC, DRV_VERSION);
Bryan Wue190d6b2007-07-17 14:43:44 +08001564
1565 return 0;
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001566
1567out_err_reg_ndev:
1568 free_irq(IRQ_MAC_RX, ndev);
1569out_err_request_irq:
1570out_err_mii_probe:
Lennert Buytenhek298cf9b2008-10-08 16:29:57 -07001571 mdiobus_unregister(lp->mii_bus);
Lennert Buytenhek298cf9b2008-10-08 16:29:57 -07001572 mdiobus_free(lp->mii_bus);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001573out_err_probe_mac:
1574 platform_set_drvdata(pdev, NULL);
1575 free_netdev(ndev);
1576
1577 return rc;
Bryan Wue190d6b2007-07-17 14:43:44 +08001578}
1579
Mike Frysingerd7b843d32008-07-27 22:45:03 +08001580static int __devexit bfin_mac_remove(struct platform_device *pdev)
Bryan Wue190d6b2007-07-17 14:43:44 +08001581{
1582 struct net_device *ndev = platform_get_drvdata(pdev);
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001583 struct bfin_mac_local *lp = netdev_priv(ndev);
Bryan Wue190d6b2007-07-17 14:43:44 +08001584
1585 platform_set_drvdata(pdev, NULL);
1586
Graf Yang080c8252009-05-29 03:41:48 +00001587 lp->mii_bus->priv = NULL;
Bryan Wu7ef0a7e2008-04-25 11:53:10 +08001588
Bryan Wue190d6b2007-07-17 14:43:44 +08001589 unregister_netdev(ndev);
1590
1591 free_irq(IRQ_MAC_RX, ndev);
1592
1593 free_netdev(ndev);
1594
Bryan Wue190d6b2007-07-17 14:43:44 +08001595 return 0;
1596}
1597
Bryan Wu496a34c2007-09-19 23:37:14 +08001598#ifdef CONFIG_PM
1599static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
Bryan Wue190d6b2007-07-17 14:43:44 +08001600{
Bryan Wu496a34c2007-09-19 23:37:14 +08001601 struct net_device *net_dev = platform_get_drvdata(pdev);
Michael Hennerich53fd3f22010-05-10 05:39:11 +00001602 struct bfin_mac_local *lp = netdev_priv(net_dev);
Bryan Wu496a34c2007-09-19 23:37:14 +08001603
Michael Hennerich53fd3f22010-05-10 05:39:11 +00001604 if (lp->wol) {
1605 bfin_write_EMAC_OPMODE((bfin_read_EMAC_OPMODE() & ~TE) | RE);
1606 bfin_write_EMAC_WKUP_CTL(MPKE);
1607 enable_irq_wake(IRQ_MAC_WAKEDET);
1608 } else {
1609 if (netif_running(net_dev))
1610 bfin_mac_close(net_dev);
1611 }
Bryan Wu496a34c2007-09-19 23:37:14 +08001612
Bryan Wue190d6b2007-07-17 14:43:44 +08001613 return 0;
1614}
1615
1616static int bfin_mac_resume(struct platform_device *pdev)
1617{
Bryan Wu496a34c2007-09-19 23:37:14 +08001618 struct net_device *net_dev = platform_get_drvdata(pdev);
Michael Hennerich53fd3f22010-05-10 05:39:11 +00001619 struct bfin_mac_local *lp = netdev_priv(net_dev);
Bryan Wu496a34c2007-09-19 23:37:14 +08001620
Michael Hennerich53fd3f22010-05-10 05:39:11 +00001621 if (lp->wol) {
1622 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
1623 bfin_write_EMAC_WKUP_CTL(0);
1624 disable_irq_wake(IRQ_MAC_WAKEDET);
1625 } else {
1626 if (netif_running(net_dev))
1627 bfin_mac_open(net_dev);
1628 }
Bryan Wu496a34c2007-09-19 23:37:14 +08001629
Bryan Wue190d6b2007-07-17 14:43:44 +08001630 return 0;
1631}
Bryan Wu496a34c2007-09-19 23:37:14 +08001632#else
1633#define bfin_mac_suspend NULL
1634#define bfin_mac_resume NULL
1635#endif /* CONFIG_PM */
Bryan Wue190d6b2007-07-17 14:43:44 +08001636
Graf Yang080c8252009-05-29 03:41:48 +00001637static int __devinit bfin_mii_bus_probe(struct platform_device *pdev)
1638{
1639 struct mii_bus *miibus;
Sonic Zhang02460d02010-06-11 10:44:22 +00001640 struct bfin_mii_bus_platform_data *mii_bus_pd;
1641 const unsigned short *pin_req;
Graf Yang080c8252009-05-29 03:41:48 +00001642 int rc, i;
1643
Sonic Zhang02460d02010-06-11 10:44:22 +00001644 mii_bus_pd = dev_get_platdata(&pdev->dev);
1645 if (!mii_bus_pd) {
1646 dev_err(&pdev->dev, "No peripherals in platform data!\n");
1647 return -EINVAL;
1648 }
1649
Graf Yang080c8252009-05-29 03:41:48 +00001650 /*
1651 * We are setting up a network card,
1652 * so set the GPIO pins to Ethernet mode
1653 */
Sonic Zhang02460d02010-06-11 10:44:22 +00001654 pin_req = mii_bus_pd->mac_peripherals;
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001655 rc = peripheral_request_list(pin_req, KBUILD_MODNAME);
Graf Yang080c8252009-05-29 03:41:48 +00001656 if (rc) {
1657 dev_err(&pdev->dev, "Requesting peripherals failed!\n");
1658 return rc;
1659 }
1660
1661 rc = -ENOMEM;
1662 miibus = mdiobus_alloc();
1663 if (miibus == NULL)
1664 goto out_err_alloc;
1665 miibus->read = bfin_mdiobus_read;
1666 miibus->write = bfin_mdiobus_write;
1667 miibus->reset = bfin_mdiobus_reset;
1668
1669 miibus->parent = &pdev->dev;
1670 miibus->name = "bfin_mii_bus";
Sonic Zhang02460d02010-06-11 10:44:22 +00001671 miibus->phy_mask = mii_bus_pd->phy_mask;
1672
Graf Yang080c8252009-05-29 03:41:48 +00001673 snprintf(miibus->id, MII_BUS_ID_SIZE, "0");
1674 miibus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
Sonic Zhang02460d02010-06-11 10:44:22 +00001675 if (!miibus->irq)
1676 goto out_err_irq_alloc;
1677
1678 for (i = rc; i < PHY_MAX_ADDR; ++i)
Graf Yang080c8252009-05-29 03:41:48 +00001679 miibus->irq[i] = PHY_POLL;
1680
Sonic Zhang02460d02010-06-11 10:44:22 +00001681 rc = clamp(mii_bus_pd->phydev_number, 0, PHY_MAX_ADDR);
1682 if (rc != mii_bus_pd->phydev_number)
1683 dev_err(&pdev->dev, "Invalid number (%i) of phydevs\n",
1684 mii_bus_pd->phydev_number);
1685 for (i = 0; i < rc; ++i) {
1686 unsigned short phyaddr = mii_bus_pd->phydev_data[i].addr;
1687 if (phyaddr < PHY_MAX_ADDR)
1688 miibus->irq[phyaddr] = mii_bus_pd->phydev_data[i].irq;
1689 else
1690 dev_err(&pdev->dev,
1691 "Invalid PHY address %i for phydev %i\n",
1692 phyaddr, i);
1693 }
1694
Graf Yang080c8252009-05-29 03:41:48 +00001695 rc = mdiobus_register(miibus);
1696 if (rc) {
1697 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1698 goto out_err_mdiobus_register;
1699 }
1700
1701 platform_set_drvdata(pdev, miibus);
1702 return 0;
1703
1704out_err_mdiobus_register:
Denis Kirjanov7f267de2010-05-18 01:34:46 +00001705 kfree(miibus->irq);
Sonic Zhang02460d02010-06-11 10:44:22 +00001706out_err_irq_alloc:
Graf Yang080c8252009-05-29 03:41:48 +00001707 mdiobus_free(miibus);
1708out_err_alloc:
1709 peripheral_free_list(pin_req);
1710
1711 return rc;
1712}
1713
1714static int __devexit bfin_mii_bus_remove(struct platform_device *pdev)
1715{
1716 struct mii_bus *miibus = platform_get_drvdata(pdev);
Sonic Zhang02460d02010-06-11 10:44:22 +00001717 struct bfin_mii_bus_platform_data *mii_bus_pd =
1718 dev_get_platdata(&pdev->dev);
1719
Graf Yang080c8252009-05-29 03:41:48 +00001720 platform_set_drvdata(pdev, NULL);
1721 mdiobus_unregister(miibus);
Denis Kirjanov7f267de2010-05-18 01:34:46 +00001722 kfree(miibus->irq);
Graf Yang080c8252009-05-29 03:41:48 +00001723 mdiobus_free(miibus);
Sonic Zhang02460d02010-06-11 10:44:22 +00001724 peripheral_free_list(mii_bus_pd->mac_peripherals);
1725
Graf Yang080c8252009-05-29 03:41:48 +00001726 return 0;
1727}
1728
1729static struct platform_driver bfin_mii_bus_driver = {
1730 .probe = bfin_mii_bus_probe,
1731 .remove = __devexit_p(bfin_mii_bus_remove),
1732 .driver = {
1733 .name = "bfin_mii_bus",
1734 .owner = THIS_MODULE,
1735 },
1736};
1737
Bryan Wue190d6b2007-07-17 14:43:44 +08001738static struct platform_driver bfin_mac_driver = {
1739 .probe = bfin_mac_probe,
Mike Frysingerd7b843d32008-07-27 22:45:03 +08001740 .remove = __devexit_p(bfin_mac_remove),
Bryan Wue190d6b2007-07-17 14:43:44 +08001741 .resume = bfin_mac_resume,
1742 .suspend = bfin_mac_suspend,
1743 .driver = {
Mike Frysingerc6dd5092011-01-10 02:54:29 +00001744 .name = KBUILD_MODNAME,
Kay Sievers72abb462008-04-18 13:50:44 -07001745 .owner = THIS_MODULE,
1746 },
Bryan Wue190d6b2007-07-17 14:43:44 +08001747};
1748
1749static int __init bfin_mac_init(void)
1750{
Graf Yang080c8252009-05-29 03:41:48 +00001751 int ret;
1752 ret = platform_driver_register(&bfin_mii_bus_driver);
1753 if (!ret)
1754 return platform_driver_register(&bfin_mac_driver);
1755 return -ENODEV;
Bryan Wue190d6b2007-07-17 14:43:44 +08001756}
1757
1758module_init(bfin_mac_init);
1759
1760static void __exit bfin_mac_cleanup(void)
1761{
1762 platform_driver_unregister(&bfin_mac_driver);
Graf Yang080c8252009-05-29 03:41:48 +00001763 platform_driver_unregister(&bfin_mii_bus_driver);
Bryan Wue190d6b2007-07-17 14:43:44 +08001764}
1765
1766module_exit(bfin_mac_cleanup);
Kay Sievers72abb462008-04-18 13:50:44 -07001767