Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/mii.h: definitions for MII-compatible transceivers |
| 3 | * Originally drivers/net/sunhme.h. |
| 4 | * |
| 5 | * Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com) |
| 6 | */ |
| 7 | |
| 8 | #ifndef __LINUX_MII_H__ |
| 9 | #define __LINUX_MII_H__ |
| 10 | |
| 11 | #include <linux/types.h> |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 12 | #include <linux/ethtool.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | |
| 14 | /* Generic MII registers. */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 15 | #define MII_BMCR 0x00 /* Basic mode control register */ |
| 16 | #define MII_BMSR 0x01 /* Basic mode status register */ |
| 17 | #define MII_PHYSID1 0x02 /* PHYS ID 1 */ |
| 18 | #define MII_PHYSID2 0x03 /* PHYS ID 2 */ |
| 19 | #define MII_ADVERTISE 0x04 /* Advertisement control reg */ |
| 20 | #define MII_LPA 0x05 /* Link partner ability reg */ |
| 21 | #define MII_EXPANSION 0x06 /* Expansion register */ |
| 22 | #define MII_CTRL1000 0x09 /* 1000BASE-T control */ |
| 23 | #define MII_STAT1000 0x0a /* 1000BASE-T status */ |
Giuseppe CAVALLARO | a59a4d1 | 2012-06-27 21:14:38 +0000 | [diff] [blame^] | 24 | #define MII_MMD_CTRL 0x0d /* MMD Access Control Register */ |
| 25 | #define MII_MMD_DATA 0x0e /* MMD Access Data Register */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 26 | #define MII_ESTATUS 0x0f /* Extended Status */ |
| 27 | #define MII_DCOUNTER 0x12 /* Disconnect counter */ |
| 28 | #define MII_FCSCOUNTER 0x13 /* False carrier counter */ |
| 29 | #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ |
| 30 | #define MII_RERRCOUNTER 0x15 /* Receive error counter */ |
| 31 | #define MII_SREVISION 0x16 /* Silicon revision */ |
| 32 | #define MII_RESV1 0x17 /* Reserved... */ |
| 33 | #define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ |
| 34 | #define MII_PHYADDR 0x19 /* PHY address */ |
| 35 | #define MII_RESV2 0x1a /* Reserved... */ |
| 36 | #define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ |
| 37 | #define MII_NCONFIG 0x1c /* Network interface config */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | |
| 39 | /* Basic mode control register. */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 40 | #define BMCR_RESV 0x003f /* Unused... */ |
| 41 | #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ |
| 42 | #define BMCR_CTST 0x0080 /* Collision test */ |
| 43 | #define BMCR_FULLDPLX 0x0100 /* Full duplex */ |
| 44 | #define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ |
Mark Einon | e8aaebc | 2011-08-31 23:22:17 +0000 | [diff] [blame] | 45 | #define BMCR_ISOLATE 0x0400 /* Isolate data paths from MII */ |
| 46 | #define BMCR_PDOWN 0x0800 /* Enable low power state */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 47 | #define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ |
| 48 | #define BMCR_SPEED100 0x2000 /* Select 100Mbps */ |
| 49 | #define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ |
Mark Einon | e8aaebc | 2011-08-31 23:22:17 +0000 | [diff] [blame] | 50 | #define BMCR_RESET 0x8000 /* Reset to default state */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | |
| 52 | /* Basic mode status register. */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 53 | #define BMSR_ERCAP 0x0001 /* Ext-reg capability */ |
| 54 | #define BMSR_JCD 0x0002 /* Jabber detected */ |
| 55 | #define BMSR_LSTATUS 0x0004 /* Link status */ |
| 56 | #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ |
| 57 | #define BMSR_RFAULT 0x0010 /* Remote fault detected */ |
| 58 | #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ |
| 59 | #define BMSR_RESV 0x00c0 /* Unused... */ |
| 60 | #define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ |
| 61 | #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ |
| 62 | #define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ |
| 63 | #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ |
| 64 | #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ |
| 65 | #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ |
| 66 | #define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ |
| 67 | #define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | |
| 69 | /* Advertisement control register. */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 70 | #define ADVERTISE_SLCT 0x001f /* Selector bits */ |
| 71 | #define ADVERTISE_CSMA 0x0001 /* Only selector supported */ |
| 72 | #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ |
| 73 | #define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ |
| 74 | #define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ |
| 75 | #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ |
| 76 | #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ |
| 77 | #define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ |
| 78 | #define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ |
| 79 | #define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ |
| 80 | #define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ |
| 81 | #define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ |
| 82 | #define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ |
| 83 | #define ADVERTISE_RESV 0x1000 /* Unused... */ |
| 84 | #define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ |
| 85 | #define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ |
| 86 | #define ADVERTISE_NPAGE 0x8000 /* Next page bit */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 88 | #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ |
| 89 | ADVERTISE_CSMA) |
| 90 | #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ |
| 91 | ADVERTISE_100HALF | ADVERTISE_100FULL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | |
| 93 | /* Link partner ability register. */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 94 | #define LPA_SLCT 0x001f /* Same as advertise selector */ |
| 95 | #define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ |
| 96 | #define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ |
| 97 | #define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ |
| 98 | #define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ |
| 99 | #define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ |
| 100 | #define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ |
| 101 | #define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ |
| 102 | #define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ |
| 103 | #define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ |
| 104 | #define LPA_PAUSE_CAP 0x0400 /* Can pause */ |
| 105 | #define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ |
| 106 | #define LPA_RESV 0x1000 /* Unused... */ |
| 107 | #define LPA_RFAULT 0x2000 /* Link partner faulted */ |
| 108 | #define LPA_LPACK 0x4000 /* Link partner acked us */ |
| 109 | #define LPA_NPAGE 0x8000 /* Next page bit */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | |
| 111 | #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) |
| 112 | #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) |
| 113 | |
| 114 | /* Expansion register for auto-negotiation. */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 115 | #define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ |
| 116 | #define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ |
| 117 | #define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ |
| 118 | #define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ |
| 119 | #define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ |
| 120 | #define EXPANSION_RESV 0xffe0 /* Unused... */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 122 | #define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ |
| 123 | #define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 124 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | /* N-way test register. */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 126 | #define NWAYTEST_RESV1 0x00ff /* Unused... */ |
| 127 | #define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ |
| 128 | #define NWAYTEST_RESV2 0xfe00 /* Unused... */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | |
| 130 | /* 1000BASE-T Control register */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 131 | #define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ |
| 132 | #define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ |
Matt Carlson | 221c563 | 2011-06-13 13:39:01 +0000 | [diff] [blame] | 133 | #define CTL1000_AS_MASTER 0x0800 |
| 134 | #define CTL1000_ENABLE_MASTER 0x1000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | |
| 136 | /* 1000BASE-T Status register */ |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 137 | #define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ |
| 138 | #define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ |
| 139 | #define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ |
| 140 | #define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | |
Steve Glendinning | e18ce34 | 2008-12-16 02:00:00 -0800 | [diff] [blame] | 142 | /* Flow control flags */ |
| 143 | #define FLOW_CTRL_TX 0x01 |
| 144 | #define FLOW_CTRL_RX 0x02 |
| 145 | |
Giuseppe CAVALLARO | a59a4d1 | 2012-06-27 21:14:38 +0000 | [diff] [blame^] | 146 | /* MMD Access Control register fields */ |
| 147 | #define MII_MMD_CTRL_DEVAD_MASK 0x1f /* Mask MMD DEVAD*/ |
| 148 | #define MII_MMD_CTRL_ADDR 0x0000 /* Address */ |
| 149 | #define MII_MMD_CTRL_NOINCR 0x4000 /* no post increment */ |
| 150 | #define MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */ |
| 151 | #define MII_MMD_CTRL_INCR_ON_WT 0xC000 /* post increment on writes only */ |
| 152 | |
David Woodhouse | c3ce7e2 | 2006-04-29 01:53:47 +0100 | [diff] [blame] | 153 | /* This structure is used in all SIOCxMIIxxx ioctl calls */ |
| 154 | struct mii_ioctl_data { |
| 155 | __u16 phy_id; |
| 156 | __u16 reg_num; |
| 157 | __u16 val_in; |
| 158 | __u16 val_out; |
| 159 | }; |
| 160 | |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 161 | #ifdef __KERNEL__ |
David Woodhouse | c3ce7e2 | 2006-04-29 01:53:47 +0100 | [diff] [blame] | 162 | |
| 163 | #include <linux/if.h> |
| 164 | |
| 165 | struct ethtool_cmd; |
| 166 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | struct mii_if_info { |
| 168 | int phy_id; |
| 169 | int advertising; |
| 170 | int phy_id_mask; |
| 171 | int reg_num_mask; |
| 172 | |
| 173 | unsigned int full_duplex : 1; /* is full duplex? */ |
| 174 | unsigned int force_media : 1; /* is autoneg. disabled? */ |
| 175 | unsigned int supports_gmii : 1; /* are GMII registers supported? */ |
| 176 | |
| 177 | struct net_device *dev; |
| 178 | int (*mdio_read) (struct net_device *dev, int phy_id, int location); |
| 179 | void (*mdio_write) (struct net_device *dev, int phy_id, int location, int val); |
| 180 | }; |
| 181 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | extern int mii_link_ok (struct mii_if_info *mii); |
| 183 | extern int mii_nway_restart (struct mii_if_info *mii); |
| 184 | extern int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd); |
| 185 | extern int mii_ethtool_sset(struct mii_if_info *mii, struct ethtool_cmd *ecmd); |
Dale Farnsworth | 43ec6e9 | 2005-08-23 10:30:29 -0700 | [diff] [blame] | 186 | extern int mii_check_gmii_support(struct mii_if_info *mii); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | extern void mii_check_link (struct mii_if_info *mii); |
| 188 | extern unsigned int mii_check_media (struct mii_if_info *mii, |
| 189 | unsigned int ok_to_print, |
| 190 | unsigned int init_media); |
| 191 | extern int generic_mii_ioctl(struct mii_if_info *mii_if, |
Mark Einon | c44f7eb | 2011-08-31 23:22:16 +0000 | [diff] [blame] | 192 | struct mii_ioctl_data *mii_data, int cmd, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | unsigned int *duplex_changed); |
| 194 | |
| 195 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | static inline struct mii_ioctl_data *if_mii(struct ifreq *rq) |
| 197 | { |
| 198 | return (struct mii_ioctl_data *) &rq->ifr_ifru; |
| 199 | } |
| 200 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | /** |
| 202 | * mii_nway_result |
| 203 | * @negotiated: value of MII ANAR and'd with ANLPAR |
| 204 | * |
| 205 | * Given a set of MII abilities, check each bit and returns the |
| 206 | * currently supported media, in the priority order defined by |
| 207 | * IEEE 802.3u. We use LPA_xxx constants but note this is not the |
| 208 | * value of LPA solely, as described above. |
| 209 | * |
| 210 | * The one exception to IEEE 802.3u is that 100baseT4 is placed |
| 211 | * between 100T-full and 100T-half. If your phy does not support |
| 212 | * 100T4 this is fine. If your phy places 100T4 elsewhere in the |
| 213 | * priority order, you will need to roll your own function. |
| 214 | */ |
| 215 | static inline unsigned int mii_nway_result (unsigned int negotiated) |
| 216 | { |
| 217 | unsigned int ret; |
| 218 | |
| 219 | if (negotiated & LPA_100FULL) |
| 220 | ret = LPA_100FULL; |
| 221 | else if (negotiated & LPA_100BASE4) |
| 222 | ret = LPA_100BASE4; |
| 223 | else if (negotiated & LPA_100HALF) |
| 224 | ret = LPA_100HALF; |
| 225 | else if (negotiated & LPA_10FULL) |
| 226 | ret = LPA_10FULL; |
| 227 | else |
| 228 | ret = LPA_10HALF; |
| 229 | |
| 230 | return ret; |
| 231 | } |
| 232 | |
| 233 | /** |
| 234 | * mii_duplex |
| 235 | * @duplex_lock: Non-zero if duplex is locked at full |
| 236 | * @negotiated: value of MII ANAR and'd with ANLPAR |
| 237 | * |
| 238 | * A small helper function for a common case. Returns one |
| 239 | * if the media is operating or locked at full duplex, and |
| 240 | * returns zero otherwise. |
| 241 | */ |
| 242 | static inline unsigned int mii_duplex (unsigned int duplex_lock, |
| 243 | unsigned int negotiated) |
| 244 | { |
| 245 | if (duplex_lock) |
| 246 | return 1; |
| 247 | if (mii_nway_result(negotiated) & LPA_DUPLEX) |
| 248 | return 1; |
| 249 | return 0; |
| 250 | } |
| 251 | |
Steve Glendinning | bc02ff9 | 2008-12-16 02:00:48 -0800 | [diff] [blame] | 252 | /** |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 253 | * ethtool_adv_to_mii_adv_t |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 254 | * @ethadv: the ethtool advertisement settings |
| 255 | * |
| 256 | * A small helper function that translates ethtool advertisement |
| 257 | * settings to phy autonegotiation advertisements for the |
| 258 | * MII_ADVERTISE register. |
| 259 | */ |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 260 | static inline u32 ethtool_adv_to_mii_adv_t(u32 ethadv) |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 261 | { |
| 262 | u32 result = 0; |
| 263 | |
| 264 | if (ethadv & ADVERTISED_10baseT_Half) |
| 265 | result |= ADVERTISE_10HALF; |
| 266 | if (ethadv & ADVERTISED_10baseT_Full) |
| 267 | result |= ADVERTISE_10FULL; |
| 268 | if (ethadv & ADVERTISED_100baseT_Half) |
| 269 | result |= ADVERTISE_100HALF; |
| 270 | if (ethadv & ADVERTISED_100baseT_Full) |
| 271 | result |= ADVERTISE_100FULL; |
| 272 | if (ethadv & ADVERTISED_Pause) |
| 273 | result |= ADVERTISE_PAUSE_CAP; |
| 274 | if (ethadv & ADVERTISED_Asym_Pause) |
| 275 | result |= ADVERTISE_PAUSE_ASYM; |
| 276 | |
| 277 | return result; |
| 278 | } |
| 279 | |
| 280 | /** |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 281 | * mii_adv_to_ethtool_adv_t |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 282 | * @adv: value of the MII_ADVERTISE register |
| 283 | * |
| 284 | * A small helper function that translates MII_ADVERTISE bits |
| 285 | * to ethtool advertisement settings. |
| 286 | */ |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 287 | static inline u32 mii_adv_to_ethtool_adv_t(u32 adv) |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 288 | { |
| 289 | u32 result = 0; |
| 290 | |
| 291 | if (adv & ADVERTISE_10HALF) |
| 292 | result |= ADVERTISED_10baseT_Half; |
| 293 | if (adv & ADVERTISE_10FULL) |
| 294 | result |= ADVERTISED_10baseT_Full; |
| 295 | if (adv & ADVERTISE_100HALF) |
| 296 | result |= ADVERTISED_100baseT_Half; |
| 297 | if (adv & ADVERTISE_100FULL) |
| 298 | result |= ADVERTISED_100baseT_Full; |
| 299 | if (adv & ADVERTISE_PAUSE_CAP) |
| 300 | result |= ADVERTISED_Pause; |
| 301 | if (adv & ADVERTISE_PAUSE_ASYM) |
| 302 | result |= ADVERTISED_Asym_Pause; |
| 303 | |
| 304 | return result; |
| 305 | } |
| 306 | |
| 307 | /** |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 308 | * ethtool_adv_to_mii_ctrl1000_t |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 309 | * @ethadv: the ethtool advertisement settings |
| 310 | * |
| 311 | * A small helper function that translates ethtool advertisement |
| 312 | * settings to phy autonegotiation advertisements for the |
| 313 | * MII_CTRL1000 register when in 1000T mode. |
| 314 | */ |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 315 | static inline u32 ethtool_adv_to_mii_ctrl1000_t(u32 ethadv) |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 316 | { |
| 317 | u32 result = 0; |
| 318 | |
| 319 | if (ethadv & ADVERTISED_1000baseT_Half) |
| 320 | result |= ADVERTISE_1000HALF; |
| 321 | if (ethadv & ADVERTISED_1000baseT_Full) |
| 322 | result |= ADVERTISE_1000FULL; |
| 323 | |
| 324 | return result; |
| 325 | } |
| 326 | |
| 327 | /** |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 328 | * mii_ctrl1000_to_ethtool_adv_t |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 329 | * @adv: value of the MII_CTRL1000 register |
| 330 | * |
| 331 | * A small helper function that translates MII_CTRL1000 |
| 332 | * bits, when in 1000Base-T mode, to ethtool |
| 333 | * advertisement settings. |
| 334 | */ |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 335 | static inline u32 mii_ctrl1000_to_ethtool_adv_t(u32 adv) |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 336 | { |
| 337 | u32 result = 0; |
| 338 | |
| 339 | if (adv & ADVERTISE_1000HALF) |
| 340 | result |= ADVERTISED_1000baseT_Half; |
| 341 | if (adv & ADVERTISE_1000FULL) |
| 342 | result |= ADVERTISED_1000baseT_Full; |
| 343 | |
| 344 | return result; |
| 345 | } |
| 346 | |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 347 | /** |
| 348 | * mii_lpa_to_ethtool_lpa_t |
| 349 | * @adv: value of the MII_LPA register |
| 350 | * |
| 351 | * A small helper function that translates MII_LPA |
| 352 | * bits, when in 1000Base-T mode, to ethtool |
| 353 | * LP advertisement settings. |
| 354 | */ |
| 355 | static inline u32 mii_lpa_to_ethtool_lpa_t(u32 lpa) |
| 356 | { |
| 357 | u32 result = 0; |
| 358 | |
| 359 | if (lpa & LPA_LPACK) |
| 360 | result |= ADVERTISED_Autoneg; |
| 361 | |
| 362 | return result | mii_adv_to_ethtool_adv_t(lpa); |
| 363 | } |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 364 | |
| 365 | /** |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 366 | * mii_stat1000_to_ethtool_lpa_t |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 367 | * @adv: value of the MII_STAT1000 register |
| 368 | * |
| 369 | * A small helper function that translates MII_STAT1000 |
| 370 | * bits, when in 1000Base-T mode, to ethtool |
| 371 | * advertisement settings. |
| 372 | */ |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 373 | static inline u32 mii_stat1000_to_ethtool_lpa_t(u32 lpa) |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 374 | { |
| 375 | u32 result = 0; |
| 376 | |
| 377 | if (lpa & LPA_1000HALF) |
| 378 | result |= ADVERTISED_1000baseT_Half; |
| 379 | if (lpa & LPA_1000FULL) |
| 380 | result |= ADVERTISED_1000baseT_Full; |
| 381 | |
| 382 | return result; |
| 383 | } |
| 384 | |
| 385 | /** |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 386 | * ethtool_adv_to_mii_adv_x |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 387 | * @ethadv: the ethtool advertisement settings |
| 388 | * |
| 389 | * A small helper function that translates ethtool advertisement |
| 390 | * settings to phy autonegotiation advertisements for the |
| 391 | * MII_CTRL1000 register when in 1000Base-X mode. |
| 392 | */ |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 393 | static inline u32 ethtool_adv_to_mii_adv_x(u32 ethadv) |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 394 | { |
| 395 | u32 result = 0; |
| 396 | |
| 397 | if (ethadv & ADVERTISED_1000baseT_Half) |
| 398 | result |= ADVERTISE_1000XHALF; |
| 399 | if (ethadv & ADVERTISED_1000baseT_Full) |
| 400 | result |= ADVERTISE_1000XFULL; |
| 401 | if (ethadv & ADVERTISED_Pause) |
| 402 | result |= ADVERTISE_1000XPAUSE; |
| 403 | if (ethadv & ADVERTISED_Asym_Pause) |
| 404 | result |= ADVERTISE_1000XPSE_ASYM; |
| 405 | |
| 406 | return result; |
| 407 | } |
| 408 | |
| 409 | /** |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 410 | * mii_adv_to_ethtool_adv_x |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 411 | * @adv: value of the MII_CTRL1000 register |
| 412 | * |
| 413 | * A small helper function that translates MII_CTRL1000 |
| 414 | * bits, when in 1000Base-X mode, to ethtool |
| 415 | * advertisement settings. |
| 416 | */ |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 417 | static inline u32 mii_adv_to_ethtool_adv_x(u32 adv) |
Matt Carlson | 28011cf | 2011-11-16 18:36:59 -0500 | [diff] [blame] | 418 | { |
| 419 | u32 result = 0; |
| 420 | |
| 421 | if (adv & ADVERTISE_1000XHALF) |
| 422 | result |= ADVERTISED_1000baseT_Half; |
| 423 | if (adv & ADVERTISE_1000XFULL) |
| 424 | result |= ADVERTISED_1000baseT_Full; |
| 425 | if (adv & ADVERTISE_1000XPAUSE) |
| 426 | result |= ADVERTISED_Pause; |
| 427 | if (adv & ADVERTISE_1000XPSE_ASYM) |
| 428 | result |= ADVERTISED_Asym_Pause; |
| 429 | |
| 430 | return result; |
| 431 | } |
| 432 | |
| 433 | /** |
Matt Carlson | 37f0702 | 2011-11-17 14:30:55 +0000 | [diff] [blame] | 434 | * mii_lpa_to_ethtool_lpa_x |
| 435 | * @adv: value of the MII_LPA register |
| 436 | * |
| 437 | * A small helper function that translates MII_LPA |
| 438 | * bits, when in 1000Base-X mode, to ethtool |
| 439 | * LP advertisement settings. |
| 440 | */ |
| 441 | static inline u32 mii_lpa_to_ethtool_lpa_x(u32 lpa) |
| 442 | { |
| 443 | u32 result = 0; |
| 444 | |
| 445 | if (lpa & LPA_LPACK) |
| 446 | result |= ADVERTISED_Autoneg; |
| 447 | |
| 448 | return result | mii_adv_to_ethtool_adv_x(lpa); |
| 449 | } |
| 450 | |
| 451 | /** |
Ben Hutchings | a8c3083 | 2009-04-29 08:19:03 +0000 | [diff] [blame] | 452 | * mii_advertise_flowctrl - get flow control advertisement flags |
| 453 | * @cap: Flow control capabilities (FLOW_CTRL_RX, FLOW_CTRL_TX or both) |
| 454 | */ |
| 455 | static inline u16 mii_advertise_flowctrl(int cap) |
| 456 | { |
| 457 | u16 adv = 0; |
| 458 | |
| 459 | if (cap & FLOW_CTRL_RX) |
| 460 | adv = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
| 461 | if (cap & FLOW_CTRL_TX) |
| 462 | adv ^= ADVERTISE_PAUSE_ASYM; |
| 463 | |
| 464 | return adv; |
| 465 | } |
| 466 | |
| 467 | /** |
Steve Glendinning | bc02ff9 | 2008-12-16 02:00:48 -0800 | [diff] [blame] | 468 | * mii_resolve_flowctrl_fdx |
| 469 | * @lcladv: value of MII ADVERTISE register |
| 470 | * @rmtadv: value of MII LPA register |
| 471 | * |
| 472 | * Resolve full duplex flow control as per IEEE 802.3-2005 table 28B-3 |
| 473 | */ |
| 474 | static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv) |
| 475 | { |
| 476 | u8 cap = 0; |
| 477 | |
Ben Hutchings | 44c22ee | 2009-04-29 08:15:05 +0000 | [diff] [blame] | 478 | if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) { |
| 479 | cap = FLOW_CTRL_TX | FLOW_CTRL_RX; |
| 480 | } else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) { |
| 481 | if (lcladv & ADVERTISE_PAUSE_CAP) |
| 482 | cap = FLOW_CTRL_RX; |
| 483 | else if (rmtadv & ADVERTISE_PAUSE_CAP) |
Steve Glendinning | bc02ff9 | 2008-12-16 02:00:48 -0800 | [diff] [blame] | 484 | cap = FLOW_CTRL_TX; |
| 485 | } |
| 486 | |
| 487 | return cap; |
| 488 | } |
| 489 | |
David Woodhouse | c3ce7e2 | 2006-04-29 01:53:47 +0100 | [diff] [blame] | 490 | #endif /* __KERNEL__ */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 491 | #endif /* __LINUX_MII_H__ */ |