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Tero Kristoa8acecc2013-07-18 11:52:33 +03001/*
2 * TI clock support
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * Tero Kristo <t-kristo@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13 * kind, whether express or implied; without even the implied warranty
14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/clk-provider.h>
19#include <linux/clkdev.h>
20#include <linux/clk/ti.h>
21#include <linux/of.h>
Tero Kristo819b4862013-10-22 11:39:36 +030022#include <linux/of_address.h>
23#include <linux/list.h>
Tero Kristoa8acecc2013-07-18 11:52:33 +030024
Tero Kristoc82f8952014-12-16 18:20:46 +020025#include "clock.h"
26
Tero Kristoa8acecc2013-07-18 11:52:33 +030027#undef pr_fmt
28#define pr_fmt(fmt) "%s: " fmt, __func__
29
Tero Kristo819b4862013-10-22 11:39:36 +030030struct ti_clk_ll_ops *ti_clk_ll_ops;
Tero Kristoc08ee142014-09-12 15:01:57 +030031static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
Tero Kristo819b4862013-10-22 11:39:36 +030032
Tero Kristof3b19aa2015-02-27 17:54:14 +020033struct ti_clk_features ti_clk_features;
34
Tero Kristoa8acecc2013-07-18 11:52:33 +030035/**
36 * ti_dt_clocks_register - register DT alias clocks during boot
37 * @oclks: list of clocks to register
38 *
39 * Register alias or non-standard DT clock entries during boot. By
40 * default, DT clocks are found based on their node name. If any
41 * additional con-id / dev-id -> clock mapping is required, use this
42 * function to list these.
43 */
44void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
45{
46 struct ti_dt_clk *c;
47 struct device_node *node;
48 struct clk *clk;
49 struct of_phandle_args clkspec;
50
51 for (c = oclks; c->node_name != NULL; c++) {
52 node = of_find_node_by_name(NULL, c->node_name);
53 clkspec.np = node;
54 clk = of_clk_get_from_provider(&clkspec);
55
56 if (!IS_ERR(clk)) {
57 c->lk.clk = clk;
58 clkdev_add(&c->lk);
59 } else {
60 pr_warn("failed to lookup clock node %s\n",
61 c->node_name);
62 }
63 }
64}
Tero Kristo819b4862013-10-22 11:39:36 +030065
66struct clk_init_item {
67 struct device_node *node;
68 struct clk_hw *hw;
69 ti_of_clk_init_cb_t func;
70 struct list_head link;
71};
72
73static LIST_HEAD(retry_list);
74
75/**
76 * ti_clk_retry_init - retries a failed clock init at later phase
77 * @node: device not for the clock
78 * @hw: partially initialized clk_hw struct for the clock
79 * @func: init function to be called for the clock
80 *
81 * Adds a failed clock init to the retry list. The retry list is parsed
82 * once all the other clocks have been initialized.
83 */
84int __init ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
85 ti_of_clk_init_cb_t func)
86{
87 struct clk_init_item *retry;
88
89 pr_debug("%s: adding to retry list...\n", node->name);
90 retry = kzalloc(sizeof(*retry), GFP_KERNEL);
91 if (!retry)
92 return -ENOMEM;
93
94 retry->node = node;
95 retry->func = func;
96 retry->hw = hw;
97 list_add(&retry->link, &retry_list);
98
99 return 0;
100}
101
102/**
103 * ti_clk_get_reg_addr - get register address for a clock register
104 * @node: device node for the clock
105 * @index: register index from the clock node
106 *
107 * Builds clock register address from device tree information. This
Tero Kristoc807dbe2015-02-23 21:06:08 +0200108 * is a struct of type clk_omap_reg. Returns a pointer to the register
109 * address, or a pointer error value in failure.
Tero Kristo819b4862013-10-22 11:39:36 +0300110 */
111void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index)
112{
113 struct clk_omap_reg *reg;
114 u32 val;
115 u32 tmp;
Tero Kristoc08ee142014-09-12 15:01:57 +0300116 int i;
Tero Kristo819b4862013-10-22 11:39:36 +0300117
118 reg = (struct clk_omap_reg *)&tmp;
Tero Kristoc08ee142014-09-12 15:01:57 +0300119
120 for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
121 if (clocks_node_ptr[i] == node->parent)
122 break;
123 }
124
125 if (i == CLK_MAX_MEMMAPS) {
126 pr_err("clk-provider not found for %s!\n", node->name);
Tero Kristoc807dbe2015-02-23 21:06:08 +0200127 return ERR_PTR(-ENOENT);
Tero Kristoc08ee142014-09-12 15:01:57 +0300128 }
129
130 reg->index = i;
Tero Kristo819b4862013-10-22 11:39:36 +0300131
132 if (of_property_read_u32_index(node, "reg", index, &val)) {
133 pr_err("%s must have reg[%d]!\n", node->name, index);
Tero Kristoc807dbe2015-02-23 21:06:08 +0200134 return ERR_PTR(-EINVAL);
Tero Kristo819b4862013-10-22 11:39:36 +0300135 }
136
137 reg->offset = val;
138
139 return (void __iomem *)tmp;
140}
141
142/**
143 * ti_dt_clk_init_provider - init master clock provider
144 * @parent: master node
145 * @index: internal index for clk_reg_ops
146 *
Tero Kristoc08ee142014-09-12 15:01:57 +0300147 * Initializes a master clock IP block. This basically sets up the
148 * mapping from clocks node to the memory map index. All the clocks
149 * are then initialized through the common of_clk_init call, and the
150 * clocks will access their memory maps based on the node layout.
Tero Kristo819b4862013-10-22 11:39:36 +0300151 */
152void ti_dt_clk_init_provider(struct device_node *parent, int index)
153{
Tero Kristo819b4862013-10-22 11:39:36 +0300154 struct device_node *clocks;
Tero Kristo819b4862013-10-22 11:39:36 +0300155
156 /* get clocks for this parent */
157 clocks = of_get_child_by_name(parent, "clocks");
158 if (!clocks) {
159 pr_err("%s missing 'clocks' child node.\n", parent->name);
160 return;
161 }
162
Tero Kristoc08ee142014-09-12 15:01:57 +0300163 /* add clocks node info */
164 clocks_node_ptr[index] = clocks;
165}
Tero Kristo819b4862013-10-22 11:39:36 +0300166
Tero Kristoc08ee142014-09-12 15:01:57 +0300167/**
168 * ti_dt_clk_init_retry_clks - init clocks from the retry list
169 *
170 * Initializes any clocks that have failed to initialize before,
171 * reasons being missing parent node(s) during earlier init. This
172 * typically happens only for DPLLs which need to have both of their
173 * parent clocks ready during init.
174 */
175void ti_dt_clk_init_retry_clks(void)
176{
177 struct clk_init_item *retry;
178 struct clk_init_item *tmp;
179 int retries = 5;
180
181 while (!list_empty(&retry_list) && retries) {
182 list_for_each_entry_safe(retry, tmp, &retry_list, link) {
183 pr_debug("retry-init: %s\n", retry->node->name);
184 retry->func(retry->hw, retry->node);
185 list_del(&retry->link);
186 kfree(retry);
187 }
188 retries--;
Tero Kristo819b4862013-10-22 11:39:36 +0300189 }
190}
Tero Kristoc82f8952014-12-16 18:20:46 +0200191
Arnd Bergmann6793a30a2015-02-03 17:59:32 +0100192#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
Tero Kristoc82f8952014-12-16 18:20:46 +0200193void __init ti_clk_patch_legacy_clks(struct ti_clk **patch)
194{
195 while (*patch) {
196 memcpy((*patch)->patch, *patch, sizeof(**patch));
197 patch++;
198 }
199}
200
201struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
202{
203 struct clk *clk;
204 struct ti_clk_fixed *fixed;
205 struct ti_clk_fixed_factor *fixed_factor;
206 struct clk_hw *clk_hw;
207
208 if (setup->clk)
209 return setup->clk;
210
211 switch (setup->type) {
212 case TI_CLK_FIXED:
213 fixed = setup->data;
214
215 clk = clk_register_fixed_rate(NULL, setup->name, NULL,
216 CLK_IS_ROOT, fixed->frequency);
217 break;
Tero Kristo7c18a652014-12-16 18:20:47 +0200218 case TI_CLK_MUX:
219 clk = ti_clk_register_mux(setup);
220 break;
Tero Kristod96f7742014-12-16 18:20:50 +0200221 case TI_CLK_DIVIDER:
222 clk = ti_clk_register_divider(setup);
223 break;
Tero Kristob26bcf92014-12-16 18:20:52 +0200224 case TI_CLK_COMPOSITE:
225 clk = ti_clk_register_composite(setup);
226 break;
Tero Kristoc82f8952014-12-16 18:20:46 +0200227 case TI_CLK_FIXED_FACTOR:
228 fixed_factor = setup->data;
229
230 clk = clk_register_fixed_factor(NULL, setup->name,
231 fixed_factor->parent,
232 0, fixed_factor->mult,
233 fixed_factor->div);
234 break;
Tero Kristof1876162014-12-16 18:20:48 +0200235 case TI_CLK_GATE:
236 clk = ti_clk_register_gate(setup);
237 break;
Tero Kristoed405a22015-01-29 22:24:28 +0200238 case TI_CLK_DPLL:
239 clk = ti_clk_register_dpll(setup);
240 break;
Tero Kristoc82f8952014-12-16 18:20:46 +0200241 default:
242 pr_err("bad type for %s!\n", setup->name);
243 clk = ERR_PTR(-EINVAL);
244 }
245
246 if (!IS_ERR(clk)) {
247 setup->clk = clk;
248 if (setup->clkdm_name) {
249 if (__clk_get_flags(clk) & CLK_IS_BASIC) {
250 pr_warn("can't setup clkdm for basic clk %s\n",
251 setup->name);
252 } else {
253 clk_hw = __clk_get_hw(clk);
254 to_clk_hw_omap(clk_hw)->clkdm_name =
255 setup->clkdm_name;
256 omap2_init_clk_clkdm(clk_hw);
257 }
258 }
259 }
260
261 return clk;
262}
263
264int __init ti_clk_register_legacy_clks(struct ti_clk_alias *clks)
265{
266 struct clk *clk;
267 bool retry;
268 struct ti_clk_alias *retry_clk;
269 struct ti_clk_alias *tmp;
270
271 while (clks->clk) {
272 clk = ti_clk_register_clk(clks->clk);
273 if (IS_ERR(clk)) {
274 if (PTR_ERR(clk) == -EAGAIN) {
275 list_add(&clks->link, &retry_list);
276 } else {
277 pr_err("register for %s failed: %ld\n",
278 clks->clk->name, PTR_ERR(clk));
279 return PTR_ERR(clk);
280 }
281 } else {
282 clks->lk.clk = clk;
283 clkdev_add(&clks->lk);
284 }
285 clks++;
286 }
287
288 retry = true;
289
290 while (!list_empty(&retry_list) && retry) {
291 retry = false;
292 list_for_each_entry_safe(retry_clk, tmp, &retry_list, link) {
293 pr_debug("retry-init: %s\n", retry_clk->clk->name);
294 clk = ti_clk_register_clk(retry_clk->clk);
295 if (IS_ERR(clk)) {
296 if (PTR_ERR(clk) == -EAGAIN) {
297 continue;
298 } else {
299 pr_err("register for %s failed: %ld\n",
300 retry_clk->clk->name,
301 PTR_ERR(clk));
302 return PTR_ERR(clk);
303 }
304 } else {
305 retry = true;
306 retry_clk->lk.clk = clk;
307 clkdev_add(&retry_clk->lk);
308 list_del(&retry_clk->link);
309 }
310 }
311 }
312
313 return 0;
314}
Arnd Bergmann6793a30a2015-02-03 17:59:32 +0100315#endif
Tero Kristof3b19aa2015-02-27 17:54:14 +0200316
317/**
318 * ti_clk_setup_features - setup clock features flags
319 * @features: features definition to use
320 *
321 * Initializes the clock driver features flags based on platform
322 * provided data. No return value.
323 */
324void __init ti_clk_setup_features(struct ti_clk_features *features)
325{
326 memcpy(&ti_clk_features, features, sizeof(*features));
327}
328
329/**
330 * ti_clk_get_features - get clock driver features flags
331 *
332 * Get TI clock driver features description. Returns a pointer
333 * to the current feature setup.
334 */
335const struct ti_clk_features *ti_clk_get_features(void)
336{
337 return &ti_clk_features;
338}
Tero Kristoa5aa8a62015-03-03 10:51:01 +0200339
340/**
341 * omap2_clk_enable_init_clocks - prepare & enable a list of clocks
342 * @clk_names: ptr to an array of strings of clock names to enable
343 * @num_clocks: number of clock names in @clk_names
344 *
345 * Prepare and enable a list of clocks, named by @clk_names. No
346 * return value. XXX Deprecated; only needed until these clocks are
347 * properly claimed and enabled by the drivers or core code that uses
348 * them. XXX What code disables & calls clk_put on these clocks?
349 */
350void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
351{
352 struct clk *init_clk;
353 int i;
354
355 for (i = 0; i < num_clocks; i++) {
356 init_clk = clk_get(NULL, clk_names[i]);
357 if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
358 clk_names[i]))
359 continue;
360 clk_prepare_enable(init_clk);
361 }
362}