Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of version 2 of the GNU General Public License as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | */ |
| 13 | #include <linux/list_sort.h> |
| 14 | #include <linux/libnvdimm.h> |
| 15 | #include <linux/module.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 16 | #include <linux/mutex.h> |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 17 | #include <linux/ndctl.h> |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 18 | #include <linux/delay.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 19 | #include <linux/list.h> |
| 20 | #include <linux/acpi.h> |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 21 | #include <linux/sort.h> |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 22 | #include <linux/pmem.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 23 | #include <linux/io.h> |
Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 24 | #include <asm/cacheflush.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 25 | #include "nfit.h" |
| 26 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 27 | /* |
| 28 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is |
| 29 | * irrelevant. |
| 30 | */ |
Christoph Hellwig | 2f8e2c8 | 2015-08-28 09:27:14 +0200 | [diff] [blame] | 31 | #include <linux/io-64-nonatomic-hi-lo.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 32 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 33 | static bool force_enable_dimms; |
| 34 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); |
| 35 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); |
| 36 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 37 | struct nfit_table_prev { |
| 38 | struct list_head spas; |
| 39 | struct list_head memdevs; |
| 40 | struct list_head dcrs; |
| 41 | struct list_head bdws; |
| 42 | struct list_head idts; |
| 43 | struct list_head flushes; |
| 44 | }; |
| 45 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 46 | static u8 nfit_uuid[NFIT_UUID_MAX][16]; |
| 47 | |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 48 | const u8 *to_nfit_uuid(enum nfit_uuids id) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 49 | { |
| 50 | return nfit_uuid[id]; |
| 51 | } |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 52 | EXPORT_SYMBOL(to_nfit_uuid); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 53 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 54 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
| 55 | struct nvdimm_bus_descriptor *nd_desc) |
| 56 | { |
| 57 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); |
| 58 | } |
| 59 | |
| 60 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) |
| 61 | { |
| 62 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 63 | |
| 64 | /* |
| 65 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct |
| 66 | * acpi_device. |
| 67 | */ |
| 68 | if (!nd_desc->provider_name |
| 69 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) |
| 70 | return NULL; |
| 71 | |
| 72 | return to_acpi_device(acpi_desc->dev); |
| 73 | } |
| 74 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 75 | static int xlat_status(void *buf, unsigned int cmd) |
| 76 | { |
| 77 | struct nd_cmd_ars_status *ars_status; |
| 78 | struct nd_cmd_ars_start *ars_start; |
| 79 | struct nd_cmd_ars_cap *ars_cap; |
| 80 | u16 flags; |
| 81 | |
| 82 | switch (cmd) { |
| 83 | case ND_CMD_ARS_CAP: |
| 84 | ars_cap = buf; |
| 85 | if ((ars_cap->status & 0xffff) == NFIT_ARS_CAP_NONE) |
| 86 | return -ENOTTY; |
| 87 | |
| 88 | /* Command failed */ |
| 89 | if (ars_cap->status & 0xffff) |
| 90 | return -EIO; |
| 91 | |
| 92 | /* No supported scan types for this range */ |
| 93 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; |
| 94 | if ((ars_cap->status >> 16 & flags) == 0) |
| 95 | return -ENOTTY; |
| 96 | break; |
| 97 | case ND_CMD_ARS_START: |
| 98 | ars_start = buf; |
| 99 | /* ARS is in progress */ |
| 100 | if ((ars_start->status & 0xffff) == NFIT_ARS_START_BUSY) |
| 101 | return -EBUSY; |
| 102 | |
| 103 | /* Command failed */ |
| 104 | if (ars_start->status & 0xffff) |
| 105 | return -EIO; |
| 106 | break; |
| 107 | case ND_CMD_ARS_STATUS: |
| 108 | ars_status = buf; |
| 109 | /* Command failed */ |
| 110 | if (ars_status->status & 0xffff) |
| 111 | return -EIO; |
| 112 | /* Check extended status (Upper two bytes) */ |
| 113 | if (ars_status->status == NFIT_ARS_STATUS_DONE) |
| 114 | return 0; |
| 115 | |
| 116 | /* ARS is in progress */ |
| 117 | if (ars_status->status == NFIT_ARS_STATUS_BUSY) |
| 118 | return -EBUSY; |
| 119 | |
| 120 | /* No ARS performed for the current boot */ |
| 121 | if (ars_status->status == NFIT_ARS_STATUS_NONE) |
| 122 | return -EAGAIN; |
| 123 | |
| 124 | /* |
| 125 | * ARS interrupted, either we overflowed or some other |
| 126 | * agent wants the scan to stop. If we didn't overflow |
| 127 | * then just continue with the returned results. |
| 128 | */ |
| 129 | if (ars_status->status == NFIT_ARS_STATUS_INTR) { |
| 130 | if (ars_status->flags & NFIT_ARS_F_OVERFLOW) |
| 131 | return -ENOSPC; |
| 132 | return 0; |
| 133 | } |
| 134 | |
| 135 | /* Unknown status */ |
| 136 | if (ars_status->status >> 16) |
| 137 | return -EIO; |
| 138 | break; |
| 139 | default: |
| 140 | break; |
| 141 | } |
| 142 | |
| 143 | return 0; |
| 144 | } |
| 145 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 146 | static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, |
| 147 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 148 | unsigned int buf_len, int *cmd_rc) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 149 | { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 150 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 151 | const struct nd_cmd_desc *desc = NULL; |
| 152 | union acpi_object in_obj, in_buf, *out_obj; |
| 153 | struct device *dev = acpi_desc->dev; |
| 154 | const char *cmd_name, *dimm_name; |
| 155 | unsigned long dsm_mask; |
| 156 | acpi_handle handle; |
| 157 | const u8 *uuid; |
| 158 | u32 offset; |
| 159 | int rc, i; |
| 160 | |
| 161 | if (nvdimm) { |
| 162 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 163 | struct acpi_device *adev = nfit_mem->adev; |
| 164 | |
| 165 | if (!adev) |
| 166 | return -ENOTTY; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 167 | dimm_name = nvdimm_name(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 168 | cmd_name = nvdimm_cmd_name(cmd); |
| 169 | dsm_mask = nfit_mem->dsm_mask; |
| 170 | desc = nd_cmd_dimm_desc(cmd); |
| 171 | uuid = to_nfit_uuid(NFIT_DEV_DIMM); |
| 172 | handle = adev->handle; |
| 173 | } else { |
| 174 | struct acpi_device *adev = to_acpi_dev(acpi_desc); |
| 175 | |
| 176 | cmd_name = nvdimm_bus_cmd_name(cmd); |
| 177 | dsm_mask = nd_desc->dsm_mask; |
| 178 | desc = nd_cmd_bus_desc(cmd); |
| 179 | uuid = to_nfit_uuid(NFIT_DEV_BUS); |
| 180 | handle = adev->handle; |
| 181 | dimm_name = "bus"; |
| 182 | } |
| 183 | |
| 184 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) |
| 185 | return -ENOTTY; |
| 186 | |
| 187 | if (!test_bit(cmd, &dsm_mask)) |
| 188 | return -ENOTTY; |
| 189 | |
| 190 | in_obj.type = ACPI_TYPE_PACKAGE; |
| 191 | in_obj.package.count = 1; |
| 192 | in_obj.package.elements = &in_buf; |
| 193 | in_buf.type = ACPI_TYPE_BUFFER; |
| 194 | in_buf.buffer.pointer = buf; |
| 195 | in_buf.buffer.length = 0; |
| 196 | |
| 197 | /* libnvdimm has already validated the input envelope */ |
| 198 | for (i = 0; i < desc->in_num; i++) |
| 199 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, |
| 200 | i, buf); |
| 201 | |
| 202 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { |
| 203 | dev_dbg(dev, "%s:%s cmd: %s input length: %d\n", __func__, |
| 204 | dimm_name, cmd_name, in_buf.buffer.length); |
| 205 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, |
| 206 | 4, in_buf.buffer.pointer, min_t(u32, 128, |
| 207 | in_buf.buffer.length), true); |
| 208 | } |
| 209 | |
| 210 | out_obj = acpi_evaluate_dsm(handle, uuid, 1, cmd, &in_obj); |
| 211 | if (!out_obj) { |
| 212 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, |
| 213 | cmd_name); |
| 214 | return -EINVAL; |
| 215 | } |
| 216 | |
| 217 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
| 218 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", |
| 219 | __func__, dimm_name, cmd_name, out_obj->type); |
| 220 | rc = -EINVAL; |
| 221 | goto out; |
| 222 | } |
| 223 | |
| 224 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { |
| 225 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, |
| 226 | dimm_name, cmd_name, out_obj->buffer.length); |
| 227 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, |
| 228 | 4, out_obj->buffer.pointer, min_t(u32, 128, |
| 229 | out_obj->buffer.length), true); |
| 230 | } |
| 231 | |
| 232 | for (i = 0, offset = 0; i < desc->out_num; i++) { |
| 233 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, |
| 234 | (u32 *) out_obj->buffer.pointer); |
| 235 | |
| 236 | if (offset + out_size > out_obj->buffer.length) { |
| 237 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", |
| 238 | __func__, dimm_name, cmd_name, i); |
| 239 | break; |
| 240 | } |
| 241 | |
| 242 | if (in_buf.buffer.length + offset + out_size > buf_len) { |
| 243 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", |
| 244 | __func__, dimm_name, cmd_name, i); |
| 245 | rc = -ENXIO; |
| 246 | goto out; |
| 247 | } |
| 248 | memcpy(buf + in_buf.buffer.length + offset, |
| 249 | out_obj->buffer.pointer + offset, out_size); |
| 250 | offset += out_size; |
| 251 | } |
| 252 | if (offset + in_buf.buffer.length < buf_len) { |
| 253 | if (i >= 1) { |
| 254 | /* |
| 255 | * status valid, return the number of bytes left |
| 256 | * unfilled in the output buffer |
| 257 | */ |
| 258 | rc = buf_len - offset - in_buf.buffer.length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 259 | if (cmd_rc) |
| 260 | *cmd_rc = xlat_status(buf, cmd); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 261 | } else { |
| 262 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", |
| 263 | __func__, dimm_name, cmd_name, buf_len, |
| 264 | offset); |
| 265 | rc = -ENXIO; |
| 266 | } |
| 267 | } else |
| 268 | rc = 0; |
| 269 | |
| 270 | out: |
| 271 | ACPI_FREE(out_obj); |
| 272 | |
| 273 | return rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 274 | } |
| 275 | |
| 276 | static const char *spa_type_name(u16 type) |
| 277 | { |
| 278 | static const char *to_name[] = { |
| 279 | [NFIT_SPA_VOLATILE] = "volatile", |
| 280 | [NFIT_SPA_PM] = "pmem", |
| 281 | [NFIT_SPA_DCR] = "dimm-control-region", |
| 282 | [NFIT_SPA_BDW] = "block-data-window", |
| 283 | [NFIT_SPA_VDISK] = "volatile-disk", |
| 284 | [NFIT_SPA_VCD] = "volatile-cd", |
| 285 | [NFIT_SPA_PDISK] = "persistent-disk", |
| 286 | [NFIT_SPA_PCD] = "persistent-cd", |
| 287 | |
| 288 | }; |
| 289 | |
| 290 | if (type > NFIT_SPA_PCD) |
| 291 | return "unknown"; |
| 292 | |
| 293 | return to_name[type]; |
| 294 | } |
| 295 | |
| 296 | static int nfit_spa_type(struct acpi_nfit_system_address *spa) |
| 297 | { |
| 298 | int i; |
| 299 | |
| 300 | for (i = 0; i < NFIT_UUID_MAX; i++) |
| 301 | if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0) |
| 302 | return i; |
| 303 | return -1; |
| 304 | } |
| 305 | |
| 306 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 307 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 308 | struct acpi_nfit_system_address *spa) |
| 309 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 310 | size_t length = min_t(size_t, sizeof(*spa), spa->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 311 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 312 | struct nfit_spa *nfit_spa; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 313 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 314 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 315 | if (memcmp(nfit_spa->spa, spa, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 316 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
| 317 | return true; |
| 318 | } |
| 319 | } |
| 320 | |
| 321 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 322 | if (!nfit_spa) |
| 323 | return false; |
| 324 | INIT_LIST_HEAD(&nfit_spa->list); |
| 325 | nfit_spa->spa = spa; |
| 326 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
| 327 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, |
| 328 | spa->range_index, |
| 329 | spa_type_name(nfit_spa_type(spa))); |
| 330 | return true; |
| 331 | } |
| 332 | |
| 333 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 334 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 335 | struct acpi_nfit_memory_map *memdev) |
| 336 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 337 | size_t length = min_t(size_t, sizeof(*memdev), memdev->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 338 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 339 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 340 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 341 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 342 | if (memcmp(nfit_memdev->memdev, memdev, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 343 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 344 | return true; |
| 345 | } |
| 346 | |
| 347 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 348 | if (!nfit_memdev) |
| 349 | return false; |
| 350 | INIT_LIST_HEAD(&nfit_memdev->list); |
| 351 | nfit_memdev->memdev = memdev; |
| 352 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 353 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n", |
| 354 | __func__, memdev->device_handle, memdev->range_index, |
| 355 | memdev->region_index); |
| 356 | return true; |
| 357 | } |
| 358 | |
| 359 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 360 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 361 | struct acpi_nfit_control_region *dcr) |
| 362 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 363 | size_t length = min_t(size_t, sizeof(*dcr), dcr->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 364 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 365 | struct nfit_dcr *nfit_dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 366 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 367 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 368 | if (memcmp(nfit_dcr->dcr, dcr, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 369 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 370 | return true; |
| 371 | } |
| 372 | |
| 373 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 374 | if (!nfit_dcr) |
| 375 | return false; |
| 376 | INIT_LIST_HEAD(&nfit_dcr->list); |
| 377 | nfit_dcr->dcr = dcr; |
| 378 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 379 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, |
| 380 | dcr->region_index, dcr->windows); |
| 381 | return true; |
| 382 | } |
| 383 | |
| 384 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 385 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 386 | struct acpi_nfit_data_region *bdw) |
| 387 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 388 | size_t length = min_t(size_t, sizeof(*bdw), bdw->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 389 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 390 | struct nfit_bdw *nfit_bdw; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 391 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 392 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 393 | if (memcmp(nfit_bdw->bdw, bdw, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 394 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 395 | return true; |
| 396 | } |
| 397 | |
| 398 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 399 | if (!nfit_bdw) |
| 400 | return false; |
| 401 | INIT_LIST_HEAD(&nfit_bdw->list); |
| 402 | nfit_bdw->bdw = bdw; |
| 403 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 404 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, |
| 405 | bdw->region_index, bdw->windows); |
| 406 | return true; |
| 407 | } |
| 408 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 409 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 410 | struct nfit_table_prev *prev, |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 411 | struct acpi_nfit_interleave *idt) |
| 412 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 413 | size_t length = min_t(size_t, sizeof(*idt), idt->header.length); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 414 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 415 | struct nfit_idt *nfit_idt; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 416 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 417 | list_for_each_entry(nfit_idt, &prev->idts, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 418 | if (memcmp(nfit_idt->idt, idt, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 419 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
| 420 | return true; |
| 421 | } |
| 422 | |
| 423 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt), GFP_KERNEL); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 424 | if (!nfit_idt) |
| 425 | return false; |
| 426 | INIT_LIST_HEAD(&nfit_idt->list); |
| 427 | nfit_idt->idt = idt; |
| 428 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
| 429 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, |
| 430 | idt->interleave_index, idt->line_count); |
| 431 | return true; |
| 432 | } |
| 433 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 434 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 435 | struct nfit_table_prev *prev, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 436 | struct acpi_nfit_flush_address *flush) |
| 437 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 438 | size_t length = min_t(size_t, sizeof(*flush), flush->header.length); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 439 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 440 | struct nfit_flush *nfit_flush; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 441 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 442 | list_for_each_entry(nfit_flush, &prev->flushes, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 443 | if (memcmp(nfit_flush->flush, flush, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 444 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 445 | return true; |
| 446 | } |
| 447 | |
| 448 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush), GFP_KERNEL); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 449 | if (!nfit_flush) |
| 450 | return false; |
| 451 | INIT_LIST_HEAD(&nfit_flush->list); |
| 452 | nfit_flush->flush = flush; |
| 453 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 454 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, |
| 455 | flush->device_handle, flush->hint_count); |
| 456 | return true; |
| 457 | } |
| 458 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 459 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
| 460 | struct nfit_table_prev *prev, void *table, const void *end) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 461 | { |
| 462 | struct device *dev = acpi_desc->dev; |
| 463 | struct acpi_nfit_header *hdr; |
| 464 | void *err = ERR_PTR(-ENOMEM); |
| 465 | |
| 466 | if (table >= end) |
| 467 | return NULL; |
| 468 | |
| 469 | hdr = table; |
Vishal Verma | 564d501 | 2015-10-27 16:58:26 -0600 | [diff] [blame] | 470 | if (!hdr->length) { |
| 471 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", |
| 472 | hdr->type); |
| 473 | return NULL; |
| 474 | } |
| 475 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 476 | switch (hdr->type) { |
| 477 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 478 | if (!add_spa(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 479 | return err; |
| 480 | break; |
| 481 | case ACPI_NFIT_TYPE_MEMORY_MAP: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 482 | if (!add_memdev(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 483 | return err; |
| 484 | break; |
| 485 | case ACPI_NFIT_TYPE_CONTROL_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 486 | if (!add_dcr(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 487 | return err; |
| 488 | break; |
| 489 | case ACPI_NFIT_TYPE_DATA_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 490 | if (!add_bdw(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 491 | return err; |
| 492 | break; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 493 | case ACPI_NFIT_TYPE_INTERLEAVE: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 494 | if (!add_idt(acpi_desc, prev, table)) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 495 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 496 | break; |
| 497 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 498 | if (!add_flush(acpi_desc, prev, table)) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 499 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 500 | break; |
| 501 | case ACPI_NFIT_TYPE_SMBIOS: |
| 502 | dev_dbg(dev, "%s: smbios\n", __func__); |
| 503 | break; |
| 504 | default: |
| 505 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); |
| 506 | break; |
| 507 | } |
| 508 | |
| 509 | return table + hdr->length; |
| 510 | } |
| 511 | |
| 512 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, |
| 513 | struct nfit_mem *nfit_mem) |
| 514 | { |
| 515 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 516 | u16 dcr = nfit_mem->dcr->region_index; |
| 517 | struct nfit_spa *nfit_spa; |
| 518 | |
| 519 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 520 | u16 range_index = nfit_spa->spa->range_index; |
| 521 | int type = nfit_spa_type(nfit_spa->spa); |
| 522 | struct nfit_memdev *nfit_memdev; |
| 523 | |
| 524 | if (type != NFIT_SPA_BDW) |
| 525 | continue; |
| 526 | |
| 527 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 528 | if (nfit_memdev->memdev->range_index != range_index) |
| 529 | continue; |
| 530 | if (nfit_memdev->memdev->device_handle != device_handle) |
| 531 | continue; |
| 532 | if (nfit_memdev->memdev->region_index != dcr) |
| 533 | continue; |
| 534 | |
| 535 | nfit_mem->spa_bdw = nfit_spa->spa; |
| 536 | return; |
| 537 | } |
| 538 | } |
| 539 | |
| 540 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", |
| 541 | nfit_mem->spa_dcr->range_index); |
| 542 | nfit_mem->bdw = NULL; |
| 543 | } |
| 544 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 545 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 546 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
| 547 | { |
| 548 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 549 | struct nfit_memdev *nfit_memdev; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 550 | struct nfit_flush *nfit_flush; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 551 | struct nfit_bdw *nfit_bdw; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 552 | struct nfit_idt *nfit_idt; |
| 553 | u16 idt_idx, range_index; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 554 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 555 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
| 556 | if (nfit_bdw->bdw->region_index != dcr) |
| 557 | continue; |
| 558 | nfit_mem->bdw = nfit_bdw->bdw; |
| 559 | break; |
| 560 | } |
| 561 | |
| 562 | if (!nfit_mem->bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 563 | return; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 564 | |
| 565 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 566 | |
| 567 | if (!nfit_mem->spa_bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 568 | return; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 569 | |
| 570 | range_index = nfit_mem->spa_bdw->range_index; |
| 571 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 572 | if (nfit_memdev->memdev->range_index != range_index || |
| 573 | nfit_memdev->memdev->region_index != dcr) |
| 574 | continue; |
| 575 | nfit_mem->memdev_bdw = nfit_memdev->memdev; |
| 576 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 577 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 578 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 579 | continue; |
| 580 | nfit_mem->idt_bdw = nfit_idt->idt; |
| 581 | break; |
| 582 | } |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 583 | |
| 584 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
| 585 | if (nfit_flush->flush->device_handle != |
| 586 | nfit_memdev->memdev->device_handle) |
| 587 | continue; |
| 588 | nfit_mem->nfit_flush = nfit_flush; |
| 589 | break; |
| 590 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 591 | break; |
| 592 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 593 | } |
| 594 | |
| 595 | static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc, |
| 596 | struct acpi_nfit_system_address *spa) |
| 597 | { |
| 598 | struct nfit_mem *nfit_mem, *found; |
| 599 | struct nfit_memdev *nfit_memdev; |
| 600 | int type = nfit_spa_type(spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 601 | |
| 602 | switch (type) { |
| 603 | case NFIT_SPA_DCR: |
| 604 | case NFIT_SPA_PM: |
| 605 | break; |
| 606 | default: |
| 607 | return 0; |
| 608 | } |
| 609 | |
| 610 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 611 | struct nfit_dcr *nfit_dcr; |
| 612 | u32 device_handle; |
| 613 | u16 dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 614 | |
| 615 | if (nfit_memdev->memdev->range_index != spa->range_index) |
| 616 | continue; |
| 617 | found = NULL; |
| 618 | dcr = nfit_memdev->memdev->region_index; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 619 | device_handle = nfit_memdev->memdev->device_handle; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 620 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 621 | if (__to_nfit_memdev(nfit_mem)->device_handle |
| 622 | == device_handle) { |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 623 | found = nfit_mem; |
| 624 | break; |
| 625 | } |
| 626 | |
| 627 | if (found) |
| 628 | nfit_mem = found; |
| 629 | else { |
| 630 | nfit_mem = devm_kzalloc(acpi_desc->dev, |
| 631 | sizeof(*nfit_mem), GFP_KERNEL); |
| 632 | if (!nfit_mem) |
| 633 | return -ENOMEM; |
| 634 | INIT_LIST_HEAD(&nfit_mem->list); |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 635 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
| 636 | } |
| 637 | |
| 638 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 639 | if (nfit_dcr->dcr->region_index != dcr) |
| 640 | continue; |
| 641 | /* |
| 642 | * Record the control region for the dimm. For |
| 643 | * the ACPI 6.1 case, where there are separate |
| 644 | * control regions for the pmem vs blk |
| 645 | * interfaces, be sure to record the extended |
| 646 | * blk details. |
| 647 | */ |
| 648 | if (!nfit_mem->dcr) |
| 649 | nfit_mem->dcr = nfit_dcr->dcr; |
| 650 | else if (nfit_mem->dcr->windows == 0 |
| 651 | && nfit_dcr->dcr->windows) |
| 652 | nfit_mem->dcr = nfit_dcr->dcr; |
| 653 | break; |
| 654 | } |
| 655 | |
| 656 | if (dcr && !nfit_mem->dcr) { |
| 657 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", |
| 658 | spa->range_index, dcr); |
| 659 | return -ENODEV; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 660 | } |
| 661 | |
| 662 | if (type == NFIT_SPA_DCR) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 663 | struct nfit_idt *nfit_idt; |
| 664 | u16 idt_idx; |
| 665 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 666 | /* multiple dimms may share a SPA when interleaved */ |
| 667 | nfit_mem->spa_dcr = spa; |
| 668 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 669 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 670 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 671 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 672 | continue; |
| 673 | nfit_mem->idt_dcr = nfit_idt->idt; |
| 674 | break; |
| 675 | } |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 676 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 677 | } else { |
| 678 | /* |
| 679 | * A single dimm may belong to multiple SPA-PM |
| 680 | * ranges, record at least one in addition to |
| 681 | * any SPA-DCR range. |
| 682 | */ |
| 683 | nfit_mem->memdev_pmem = nfit_memdev->memdev; |
| 684 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 685 | } |
| 686 | |
| 687 | return 0; |
| 688 | } |
| 689 | |
| 690 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) |
| 691 | { |
| 692 | struct nfit_mem *a = container_of(_a, typeof(*a), list); |
| 693 | struct nfit_mem *b = container_of(_b, typeof(*b), list); |
| 694 | u32 handleA, handleB; |
| 695 | |
| 696 | handleA = __to_nfit_memdev(a)->device_handle; |
| 697 | handleB = __to_nfit_memdev(b)->device_handle; |
| 698 | if (handleA < handleB) |
| 699 | return -1; |
| 700 | else if (handleA > handleB) |
| 701 | return 1; |
| 702 | return 0; |
| 703 | } |
| 704 | |
| 705 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) |
| 706 | { |
| 707 | struct nfit_spa *nfit_spa; |
| 708 | |
| 709 | /* |
| 710 | * For each SPA-DCR or SPA-PMEM address range find its |
| 711 | * corresponding MEMDEV(s). From each MEMDEV find the |
| 712 | * corresponding DCR. Then, if we're operating on a SPA-DCR, |
| 713 | * try to find a SPA-BDW and a corresponding BDW that references |
| 714 | * the DCR. Throw it all into an nfit_mem object. Note, that |
| 715 | * BDWs are optional. |
| 716 | */ |
| 717 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 718 | int rc; |
| 719 | |
| 720 | rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa); |
| 721 | if (rc) |
| 722 | return rc; |
| 723 | } |
| 724 | |
| 725 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
| 726 | |
| 727 | return 0; |
| 728 | } |
| 729 | |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 730 | static ssize_t revision_show(struct device *dev, |
| 731 | struct device_attribute *attr, char *buf) |
| 732 | { |
| 733 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 734 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 735 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 736 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 737 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 738 | } |
| 739 | static DEVICE_ATTR_RO(revision); |
| 740 | |
| 741 | static struct attribute *acpi_nfit_attributes[] = { |
| 742 | &dev_attr_revision.attr, |
| 743 | NULL, |
| 744 | }; |
| 745 | |
| 746 | static struct attribute_group acpi_nfit_attribute_group = { |
| 747 | .name = "nfit", |
| 748 | .attrs = acpi_nfit_attributes, |
| 749 | }; |
| 750 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame^] | 751 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 752 | &nvdimm_bus_attribute_group, |
| 753 | &acpi_nfit_attribute_group, |
| 754 | NULL, |
| 755 | }; |
| 756 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 757 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
| 758 | { |
| 759 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 760 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 761 | |
| 762 | return __to_nfit_memdev(nfit_mem); |
| 763 | } |
| 764 | |
| 765 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) |
| 766 | { |
| 767 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 768 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 769 | |
| 770 | return nfit_mem->dcr; |
| 771 | } |
| 772 | |
| 773 | static ssize_t handle_show(struct device *dev, |
| 774 | struct device_attribute *attr, char *buf) |
| 775 | { |
| 776 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 777 | |
| 778 | return sprintf(buf, "%#x\n", memdev->device_handle); |
| 779 | } |
| 780 | static DEVICE_ATTR_RO(handle); |
| 781 | |
| 782 | static ssize_t phys_id_show(struct device *dev, |
| 783 | struct device_attribute *attr, char *buf) |
| 784 | { |
| 785 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 786 | |
| 787 | return sprintf(buf, "%#x\n", memdev->physical_id); |
| 788 | } |
| 789 | static DEVICE_ATTR_RO(phys_id); |
| 790 | |
| 791 | static ssize_t vendor_show(struct device *dev, |
| 792 | struct device_attribute *attr, char *buf) |
| 793 | { |
| 794 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 795 | |
| 796 | return sprintf(buf, "%#x\n", dcr->vendor_id); |
| 797 | } |
| 798 | static DEVICE_ATTR_RO(vendor); |
| 799 | |
| 800 | static ssize_t rev_id_show(struct device *dev, |
| 801 | struct device_attribute *attr, char *buf) |
| 802 | { |
| 803 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 804 | |
| 805 | return sprintf(buf, "%#x\n", dcr->revision_id); |
| 806 | } |
| 807 | static DEVICE_ATTR_RO(rev_id); |
| 808 | |
| 809 | static ssize_t device_show(struct device *dev, |
| 810 | struct device_attribute *attr, char *buf) |
| 811 | { |
| 812 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 813 | |
| 814 | return sprintf(buf, "%#x\n", dcr->device_id); |
| 815 | } |
| 816 | static DEVICE_ATTR_RO(device); |
| 817 | |
| 818 | static ssize_t format_show(struct device *dev, |
| 819 | struct device_attribute *attr, char *buf) |
| 820 | { |
| 821 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 822 | |
| 823 | return sprintf(buf, "%#x\n", dcr->code); |
| 824 | } |
| 825 | static DEVICE_ATTR_RO(format); |
| 826 | |
| 827 | static ssize_t serial_show(struct device *dev, |
| 828 | struct device_attribute *attr, char *buf) |
| 829 | { |
| 830 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 831 | |
| 832 | return sprintf(buf, "%#x\n", dcr->serial_number); |
| 833 | } |
| 834 | static DEVICE_ATTR_RO(serial); |
| 835 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 836 | static ssize_t flags_show(struct device *dev, |
| 837 | struct device_attribute *attr, char *buf) |
| 838 | { |
| 839 | u16 flags = to_nfit_memdev(dev)->flags; |
| 840 | |
| 841 | return sprintf(buf, "%s%s%s%s%s\n", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 842 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
| 843 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", |
| 844 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 845 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 846 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 847 | } |
| 848 | static DEVICE_ATTR_RO(flags); |
| 849 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 850 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
| 851 | &dev_attr_handle.attr, |
| 852 | &dev_attr_phys_id.attr, |
| 853 | &dev_attr_vendor.attr, |
| 854 | &dev_attr_device.attr, |
| 855 | &dev_attr_format.attr, |
| 856 | &dev_attr_serial.attr, |
| 857 | &dev_attr_rev_id.attr, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 858 | &dev_attr_flags.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 859 | NULL, |
| 860 | }; |
| 861 | |
| 862 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, |
| 863 | struct attribute *a, int n) |
| 864 | { |
| 865 | struct device *dev = container_of(kobj, struct device, kobj); |
| 866 | |
| 867 | if (to_nfit_dcr(dev)) |
| 868 | return a->mode; |
| 869 | else |
| 870 | return 0; |
| 871 | } |
| 872 | |
| 873 | static struct attribute_group acpi_nfit_dimm_attribute_group = { |
| 874 | .name = "nfit", |
| 875 | .attrs = acpi_nfit_dimm_attributes, |
| 876 | .is_visible = acpi_nfit_dimm_attr_visible, |
| 877 | }; |
| 878 | |
| 879 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 880 | &nvdimm_attribute_group, |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 881 | &nd_device_attribute_group, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 882 | &acpi_nfit_dimm_attribute_group, |
| 883 | NULL, |
| 884 | }; |
| 885 | |
| 886 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, |
| 887 | u32 device_handle) |
| 888 | { |
| 889 | struct nfit_mem *nfit_mem; |
| 890 | |
| 891 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
| 892 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) |
| 893 | return nfit_mem->nvdimm; |
| 894 | |
| 895 | return NULL; |
| 896 | } |
| 897 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 898 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
| 899 | struct nfit_mem *nfit_mem, u32 device_handle) |
| 900 | { |
| 901 | struct acpi_device *adev, *adev_dimm; |
| 902 | struct device *dev = acpi_desc->dev; |
| 903 | const u8 *uuid = to_nfit_uuid(NFIT_DEV_DIMM); |
Linda Knippers | 60e95f4 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 904 | int i; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 905 | |
| 906 | nfit_mem->dsm_mask = acpi_desc->dimm_dsm_force_en; |
| 907 | adev = to_acpi_dev(acpi_desc); |
| 908 | if (!adev) |
| 909 | return 0; |
| 910 | |
| 911 | adev_dimm = acpi_find_child_device(adev, device_handle, false); |
| 912 | nfit_mem->adev = adev_dimm; |
| 913 | if (!adev_dimm) { |
| 914 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", |
| 915 | device_handle); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 916 | return force_enable_dimms ? 0 : -ENODEV; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 917 | } |
| 918 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 919 | for (i = ND_CMD_SMART; i <= ND_CMD_VENDOR; i++) |
| 920 | if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i)) |
| 921 | set_bit(i, &nfit_mem->dsm_mask); |
| 922 | |
Linda Knippers | 60e95f4 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 923 | return 0; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 924 | } |
| 925 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 926 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
| 927 | { |
| 928 | struct nfit_mem *nfit_mem; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 929 | int dimm_count = 0; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 930 | |
| 931 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
| 932 | struct nvdimm *nvdimm; |
| 933 | unsigned long flags = 0; |
| 934 | u32 device_handle; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 935 | u16 mem_flags; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 936 | int rc; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 937 | |
| 938 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 939 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); |
| 940 | if (nvdimm) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 941 | dimm_count++; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 942 | continue; |
| 943 | } |
| 944 | |
| 945 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) |
| 946 | flags |= NDD_ALIASING; |
| 947 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 948 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 949 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 950 | flags |= NDD_UNARMED; |
| 951 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 952 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
| 953 | if (rc) |
| 954 | continue; |
| 955 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 956 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 957 | acpi_nfit_dimm_attribute_groups, |
| 958 | flags, &nfit_mem->dsm_mask); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 959 | if (!nvdimm) |
| 960 | return -ENOMEM; |
| 961 | |
| 962 | nfit_mem->nvdimm = nvdimm; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 963 | dimm_count++; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 964 | |
| 965 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) |
| 966 | continue; |
| 967 | |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 968 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n", |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 969 | nvdimm_name(nvdimm), |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 970 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
| 971 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", |
| 972 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 973 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 974 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 975 | } |
| 976 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 977 | return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 978 | } |
| 979 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 980 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
| 981 | { |
| 982 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 983 | const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS); |
| 984 | struct acpi_device *adev; |
| 985 | int i; |
| 986 | |
Vishal Verma | 39c686b | 2015-07-09 13:25:36 -0600 | [diff] [blame] | 987 | nd_desc->dsm_mask = acpi_desc->bus_dsm_force_en; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 988 | adev = to_acpi_dev(acpi_desc); |
| 989 | if (!adev) |
| 990 | return; |
| 991 | |
| 992 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_ARS_STATUS; i++) |
| 993 | if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i)) |
| 994 | set_bit(i, &nd_desc->dsm_mask); |
| 995 | } |
| 996 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 997 | static ssize_t range_index_show(struct device *dev, |
| 998 | struct device_attribute *attr, char *buf) |
| 999 | { |
| 1000 | struct nd_region *nd_region = to_nd_region(dev); |
| 1001 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); |
| 1002 | |
| 1003 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); |
| 1004 | } |
| 1005 | static DEVICE_ATTR_RO(range_index); |
| 1006 | |
| 1007 | static struct attribute *acpi_nfit_region_attributes[] = { |
| 1008 | &dev_attr_range_index.attr, |
| 1009 | NULL, |
| 1010 | }; |
| 1011 | |
| 1012 | static struct attribute_group acpi_nfit_region_attribute_group = { |
| 1013 | .name = "nfit", |
| 1014 | .attrs = acpi_nfit_region_attributes, |
| 1015 | }; |
| 1016 | |
| 1017 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { |
| 1018 | &nd_region_attribute_group, |
| 1019 | &nd_mapping_attribute_group, |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 1020 | &nd_device_attribute_group, |
Toshi Kani | 74ae66c | 2015-06-19 12:18:34 -0600 | [diff] [blame] | 1021 | &nd_numa_attribute_group, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1022 | &acpi_nfit_region_attribute_group, |
| 1023 | NULL, |
| 1024 | }; |
| 1025 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1026 | /* enough info to uniquely specify an interleave set */ |
| 1027 | struct nfit_set_info { |
| 1028 | struct nfit_set_info_map { |
| 1029 | u64 region_offset; |
| 1030 | u32 serial_number; |
| 1031 | u32 pad; |
| 1032 | } mapping[0]; |
| 1033 | }; |
| 1034 | |
| 1035 | static size_t sizeof_nfit_set_info(int num_mappings) |
| 1036 | { |
| 1037 | return sizeof(struct nfit_set_info) |
| 1038 | + num_mappings * sizeof(struct nfit_set_info_map); |
| 1039 | } |
| 1040 | |
| 1041 | static int cmp_map(const void *m0, const void *m1) |
| 1042 | { |
| 1043 | const struct nfit_set_info_map *map0 = m0; |
| 1044 | const struct nfit_set_info_map *map1 = m1; |
| 1045 | |
| 1046 | return memcmp(&map0->region_offset, &map1->region_offset, |
| 1047 | sizeof(u64)); |
| 1048 | } |
| 1049 | |
| 1050 | /* Retrieve the nth entry referencing this spa */ |
| 1051 | static struct acpi_nfit_memory_map *memdev_from_spa( |
| 1052 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) |
| 1053 | { |
| 1054 | struct nfit_memdev *nfit_memdev; |
| 1055 | |
| 1056 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) |
| 1057 | if (nfit_memdev->memdev->range_index == range_index) |
| 1058 | if (n-- == 0) |
| 1059 | return nfit_memdev->memdev; |
| 1060 | return NULL; |
| 1061 | } |
| 1062 | |
| 1063 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, |
| 1064 | struct nd_region_desc *ndr_desc, |
| 1065 | struct acpi_nfit_system_address *spa) |
| 1066 | { |
| 1067 | int i, spa_type = nfit_spa_type(spa); |
| 1068 | struct device *dev = acpi_desc->dev; |
| 1069 | struct nd_interleave_set *nd_set; |
| 1070 | u16 nr = ndr_desc->num_mappings; |
| 1071 | struct nfit_set_info *info; |
| 1072 | |
| 1073 | if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE) |
| 1074 | /* pass */; |
| 1075 | else |
| 1076 | return 0; |
| 1077 | |
| 1078 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
| 1079 | if (!nd_set) |
| 1080 | return -ENOMEM; |
| 1081 | |
| 1082 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
| 1083 | if (!info) |
| 1084 | return -ENOMEM; |
| 1085 | for (i = 0; i < nr; i++) { |
| 1086 | struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i]; |
| 1087 | struct nfit_set_info_map *map = &info->mapping[i]; |
| 1088 | struct nvdimm *nvdimm = nd_mapping->nvdimm; |
| 1089 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1090 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, |
| 1091 | spa->range_index, i); |
| 1092 | |
| 1093 | if (!memdev || !nfit_mem->dcr) { |
| 1094 | dev_err(dev, "%s: failed to find DCR\n", __func__); |
| 1095 | return -ENODEV; |
| 1096 | } |
| 1097 | |
| 1098 | map->region_offset = memdev->region_offset; |
| 1099 | map->serial_number = nfit_mem->dcr->serial_number; |
| 1100 | } |
| 1101 | |
| 1102 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 1103 | cmp_map, NULL); |
| 1104 | nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
| 1105 | ndr_desc->nd_set = nd_set; |
| 1106 | devm_kfree(dev, info); |
| 1107 | |
| 1108 | return 0; |
| 1109 | } |
| 1110 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1111 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
| 1112 | { |
| 1113 | struct acpi_nfit_interleave *idt = mmio->idt; |
| 1114 | u32 sub_line_offset, line_index, line_offset; |
| 1115 | u64 line_no, table_skip_count, table_offset; |
| 1116 | |
| 1117 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); |
| 1118 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); |
| 1119 | line_offset = idt->line_offset[line_index] |
| 1120 | * mmio->line_size; |
| 1121 | table_offset = table_skip_count * mmio->table_size; |
| 1122 | |
| 1123 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; |
| 1124 | } |
| 1125 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1126 | static void wmb_blk(struct nfit_blk *nfit_blk) |
| 1127 | { |
| 1128 | |
| 1129 | if (nfit_blk->nvdimm_flush) { |
| 1130 | /* |
| 1131 | * The first wmb() is needed to 'sfence' all previous writes |
| 1132 | * such that they are architecturally visible for the platform |
| 1133 | * buffer flush. Note that we've already arranged for pmem |
| 1134 | * writes to avoid the cache via arch_memcpy_to_pmem(). The |
| 1135 | * final wmb() ensures ordering for the NVDIMM flush write. |
| 1136 | */ |
| 1137 | wmb(); |
| 1138 | writeq(1, nfit_blk->nvdimm_flush); |
| 1139 | wmb(); |
| 1140 | } else |
| 1141 | wmb_pmem(); |
| 1142 | } |
| 1143 | |
Ross Zwisler | de4a196 | 2015-08-20 16:27:38 -0600 | [diff] [blame] | 1144 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1145 | { |
| 1146 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 1147 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; |
| 1148 | |
| 1149 | if (mmio->num_lines) |
| 1150 | offset = to_interleave_offset(offset, mmio); |
| 1151 | |
Linus Torvalds | 12f03ee | 2015-09-08 14:35:59 -0700 | [diff] [blame] | 1152 | return readl(mmio->addr.base + offset); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1153 | } |
| 1154 | |
| 1155 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, |
| 1156 | resource_size_t dpa, unsigned int len, unsigned int write) |
| 1157 | { |
| 1158 | u64 cmd, offset; |
| 1159 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 1160 | |
| 1161 | enum { |
| 1162 | BCW_OFFSET_MASK = (1ULL << 48)-1, |
| 1163 | BCW_LEN_SHIFT = 48, |
| 1164 | BCW_LEN_MASK = (1ULL << 8) - 1, |
| 1165 | BCW_CMD_SHIFT = 56, |
| 1166 | }; |
| 1167 | |
| 1168 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; |
| 1169 | len = len >> L1_CACHE_SHIFT; |
| 1170 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; |
| 1171 | cmd |= ((u64) write) << BCW_CMD_SHIFT; |
| 1172 | |
| 1173 | offset = nfit_blk->cmd_offset + mmio->size * bw; |
| 1174 | if (mmio->num_lines) |
| 1175 | offset = to_interleave_offset(offset, mmio); |
| 1176 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1177 | writeq(cmd, mmio->addr.base + offset); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1178 | wmb_blk(nfit_blk); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1179 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1180 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1181 | readq(mmio->addr.base + offset); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1182 | } |
| 1183 | |
| 1184 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, |
| 1185 | resource_size_t dpa, void *iobuf, size_t len, int rw, |
| 1186 | unsigned int lane) |
| 1187 | { |
| 1188 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 1189 | unsigned int copied = 0; |
| 1190 | u64 base_offset; |
| 1191 | int rc; |
| 1192 | |
| 1193 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES |
| 1194 | + lane * mmio->size; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1195 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
| 1196 | while (len) { |
| 1197 | unsigned int c; |
| 1198 | u64 offset; |
| 1199 | |
| 1200 | if (mmio->num_lines) { |
| 1201 | u32 line_offset; |
| 1202 | |
| 1203 | offset = to_interleave_offset(base_offset + copied, |
| 1204 | mmio); |
| 1205 | div_u64_rem(offset, mmio->line_size, &line_offset); |
| 1206 | c = min_t(size_t, len, mmio->line_size - line_offset); |
| 1207 | } else { |
| 1208 | offset = base_offset + nfit_blk->bdw_offset; |
| 1209 | c = len; |
| 1210 | } |
| 1211 | |
| 1212 | if (rw) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1213 | memcpy_to_pmem(mmio->addr.aperture + offset, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1214 | iobuf + copied, c); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1215 | else { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1216 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1217 | mmio_flush_range((void __force *) |
| 1218 | mmio->addr.aperture + offset, c); |
| 1219 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1220 | memcpy_from_pmem(iobuf + copied, |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1221 | mmio->addr.aperture + offset, c); |
| 1222 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1223 | |
| 1224 | copied += c; |
| 1225 | len -= c; |
| 1226 | } |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1227 | |
| 1228 | if (rw) |
| 1229 | wmb_blk(nfit_blk); |
| 1230 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1231 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
| 1232 | return rc; |
| 1233 | } |
| 1234 | |
| 1235 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, |
| 1236 | resource_size_t dpa, void *iobuf, u64 len, int rw) |
| 1237 | { |
| 1238 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); |
| 1239 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 1240 | struct nd_region *nd_region = nfit_blk->nd_region; |
| 1241 | unsigned int lane, copied = 0; |
| 1242 | int rc = 0; |
| 1243 | |
| 1244 | lane = nd_region_acquire_lane(nd_region); |
| 1245 | while (len) { |
| 1246 | u64 c = min(len, mmio->size); |
| 1247 | |
| 1248 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, |
| 1249 | iobuf + copied, c, rw, lane); |
| 1250 | if (rc) |
| 1251 | break; |
| 1252 | |
| 1253 | copied += c; |
| 1254 | len -= c; |
| 1255 | } |
| 1256 | nd_region_release_lane(nd_region, lane); |
| 1257 | |
| 1258 | return rc; |
| 1259 | } |
| 1260 | |
| 1261 | static void nfit_spa_mapping_release(struct kref *kref) |
| 1262 | { |
| 1263 | struct nfit_spa_mapping *spa_map = to_spa_map(kref); |
| 1264 | struct acpi_nfit_system_address *spa = spa_map->spa; |
| 1265 | struct acpi_nfit_desc *acpi_desc = spa_map->acpi_desc; |
| 1266 | |
| 1267 | WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex)); |
| 1268 | dev_dbg(acpi_desc->dev, "%s: SPA%d\n", __func__, spa->range_index); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1269 | if (spa_map->type == SPA_MAP_APERTURE) |
| 1270 | memunmap((void __force *)spa_map->addr.aperture); |
| 1271 | else |
| 1272 | iounmap(spa_map->addr.base); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1273 | release_mem_region(spa->address, spa->length); |
| 1274 | list_del(&spa_map->list); |
| 1275 | kfree(spa_map); |
| 1276 | } |
| 1277 | |
| 1278 | static struct nfit_spa_mapping *find_spa_mapping( |
| 1279 | struct acpi_nfit_desc *acpi_desc, |
| 1280 | struct acpi_nfit_system_address *spa) |
| 1281 | { |
| 1282 | struct nfit_spa_mapping *spa_map; |
| 1283 | |
| 1284 | WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex)); |
| 1285 | list_for_each_entry(spa_map, &acpi_desc->spa_maps, list) |
| 1286 | if (spa_map->spa == spa) |
| 1287 | return spa_map; |
| 1288 | |
| 1289 | return NULL; |
| 1290 | } |
| 1291 | |
| 1292 | static void nfit_spa_unmap(struct acpi_nfit_desc *acpi_desc, |
| 1293 | struct acpi_nfit_system_address *spa) |
| 1294 | { |
| 1295 | struct nfit_spa_mapping *spa_map; |
| 1296 | |
| 1297 | mutex_lock(&acpi_desc->spa_map_mutex); |
| 1298 | spa_map = find_spa_mapping(acpi_desc, spa); |
| 1299 | |
| 1300 | if (spa_map) |
| 1301 | kref_put(&spa_map->kref, nfit_spa_mapping_release); |
| 1302 | mutex_unlock(&acpi_desc->spa_map_mutex); |
| 1303 | } |
| 1304 | |
| 1305 | static void __iomem *__nfit_spa_map(struct acpi_nfit_desc *acpi_desc, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1306 | struct acpi_nfit_system_address *spa, enum spa_map_type type) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1307 | { |
| 1308 | resource_size_t start = spa->address; |
| 1309 | resource_size_t n = spa->length; |
| 1310 | struct nfit_spa_mapping *spa_map; |
| 1311 | struct resource *res; |
| 1312 | |
| 1313 | WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex)); |
| 1314 | |
| 1315 | spa_map = find_spa_mapping(acpi_desc, spa); |
| 1316 | if (spa_map) { |
| 1317 | kref_get(&spa_map->kref); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1318 | return spa_map->addr.base; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1319 | } |
| 1320 | |
| 1321 | spa_map = kzalloc(sizeof(*spa_map), GFP_KERNEL); |
| 1322 | if (!spa_map) |
| 1323 | return NULL; |
| 1324 | |
| 1325 | INIT_LIST_HEAD(&spa_map->list); |
| 1326 | spa_map->spa = spa; |
| 1327 | kref_init(&spa_map->kref); |
| 1328 | spa_map->acpi_desc = acpi_desc; |
| 1329 | |
| 1330 | res = request_mem_region(start, n, dev_name(acpi_desc->dev)); |
| 1331 | if (!res) |
| 1332 | goto err_mem; |
| 1333 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1334 | spa_map->type = type; |
| 1335 | if (type == SPA_MAP_APERTURE) |
| 1336 | spa_map->addr.aperture = (void __pmem *)memremap(start, n, |
| 1337 | ARCH_MEMREMAP_PMEM); |
| 1338 | else |
| 1339 | spa_map->addr.base = ioremap_nocache(start, n); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1340 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1341 | |
| 1342 | if (!spa_map->addr.base) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1343 | goto err_map; |
| 1344 | |
| 1345 | list_add_tail(&spa_map->list, &acpi_desc->spa_maps); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1346 | return spa_map->addr.base; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1347 | |
| 1348 | err_map: |
| 1349 | release_mem_region(start, n); |
| 1350 | err_mem: |
| 1351 | kfree(spa_map); |
| 1352 | return NULL; |
| 1353 | } |
| 1354 | |
| 1355 | /** |
| 1356 | * nfit_spa_map - interleave-aware managed-mappings of acpi_nfit_system_address ranges |
| 1357 | * @nvdimm_bus: NFIT-bus that provided the spa table entry |
| 1358 | * @nfit_spa: spa table to map |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1359 | * @type: aperture or control region |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1360 | * |
| 1361 | * In the case where block-data-window apertures and |
| 1362 | * dimm-control-regions are interleaved they will end up sharing a |
| 1363 | * single request_mem_region() + ioremap() for the address range. In |
| 1364 | * the style of devm nfit_spa_map() mappings are automatically dropped |
| 1365 | * when all region devices referencing the same mapping are disabled / |
| 1366 | * unbound. |
| 1367 | */ |
| 1368 | static void __iomem *nfit_spa_map(struct acpi_nfit_desc *acpi_desc, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1369 | struct acpi_nfit_system_address *spa, enum spa_map_type type) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1370 | { |
| 1371 | void __iomem *iomem; |
| 1372 | |
| 1373 | mutex_lock(&acpi_desc->spa_map_mutex); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1374 | iomem = __nfit_spa_map(acpi_desc, spa, type); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1375 | mutex_unlock(&acpi_desc->spa_map_mutex); |
| 1376 | |
| 1377 | return iomem; |
| 1378 | } |
| 1379 | |
| 1380 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
| 1381 | struct acpi_nfit_interleave *idt, u16 interleave_ways) |
| 1382 | { |
| 1383 | if (idt) { |
| 1384 | mmio->num_lines = idt->line_count; |
| 1385 | mmio->line_size = idt->line_size; |
| 1386 | if (interleave_ways == 0) |
| 1387 | return -ENXIO; |
| 1388 | mmio->table_size = mmio->num_lines * interleave_ways |
| 1389 | * mmio->line_size; |
| 1390 | } |
| 1391 | |
| 1392 | return 0; |
| 1393 | } |
| 1394 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1395 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
| 1396 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) |
| 1397 | { |
| 1398 | struct nd_cmd_dimm_flags flags; |
| 1399 | int rc; |
| 1400 | |
| 1401 | memset(&flags, 0, sizeof(flags)); |
| 1402 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1403 | sizeof(flags), NULL); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1404 | |
| 1405 | if (rc >= 0 && flags.status == 0) |
| 1406 | nfit_blk->dimm_flags = flags.flags; |
| 1407 | else if (rc == -ENOTTY) { |
| 1408 | /* fall back to a conservative default */ |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1409 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1410 | rc = 0; |
| 1411 | } else |
| 1412 | rc = -ENXIO; |
| 1413 | |
| 1414 | return rc; |
| 1415 | } |
| 1416 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1417 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
| 1418 | struct device *dev) |
| 1419 | { |
| 1420 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1421 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1422 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1423 | struct nfit_flush *nfit_flush; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1424 | struct nfit_blk_mmio *mmio; |
| 1425 | struct nfit_blk *nfit_blk; |
| 1426 | struct nfit_mem *nfit_mem; |
| 1427 | struct nvdimm *nvdimm; |
| 1428 | int rc; |
| 1429 | |
| 1430 | nvdimm = nd_blk_region_to_dimm(ndbr); |
| 1431 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1432 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { |
| 1433 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, |
| 1434 | nfit_mem ? "" : " nfit_mem", |
Dan Williams | 193ccca | 2015-06-30 16:09:39 -0400 | [diff] [blame] | 1435 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
| 1436 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1437 | return -ENXIO; |
| 1438 | } |
| 1439 | |
| 1440 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); |
| 1441 | if (!nfit_blk) |
| 1442 | return -ENOMEM; |
| 1443 | nd_blk_region_set_provider_data(ndbr, nfit_blk); |
| 1444 | nfit_blk->nd_region = to_nd_region(dev); |
| 1445 | |
| 1446 | /* map block aperture memory */ |
| 1447 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; |
| 1448 | mmio = &nfit_blk->mmio[BDW]; |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1449 | mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_bdw, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1450 | SPA_MAP_APERTURE); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1451 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1452 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
| 1453 | nvdimm_name(nvdimm)); |
| 1454 | return -ENOMEM; |
| 1455 | } |
| 1456 | mmio->size = nfit_mem->bdw->size; |
| 1457 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; |
| 1458 | mmio->idt = nfit_mem->idt_bdw; |
| 1459 | mmio->spa = nfit_mem->spa_bdw; |
| 1460 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, |
| 1461 | nfit_mem->memdev_bdw->interleave_ways); |
| 1462 | if (rc) { |
| 1463 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", |
| 1464 | __func__, nvdimm_name(nvdimm)); |
| 1465 | return rc; |
| 1466 | } |
| 1467 | |
| 1468 | /* map block control memory */ |
| 1469 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; |
| 1470 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; |
| 1471 | mmio = &nfit_blk->mmio[DCR]; |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1472 | mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_dcr, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1473 | SPA_MAP_CONTROL); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1474 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1475 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
| 1476 | nvdimm_name(nvdimm)); |
| 1477 | return -ENOMEM; |
| 1478 | } |
| 1479 | mmio->size = nfit_mem->dcr->window_size; |
| 1480 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; |
| 1481 | mmio->idt = nfit_mem->idt_dcr; |
| 1482 | mmio->spa = nfit_mem->spa_dcr; |
| 1483 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, |
| 1484 | nfit_mem->memdev_dcr->interleave_ways); |
| 1485 | if (rc) { |
| 1486 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", |
| 1487 | __func__, nvdimm_name(nvdimm)); |
| 1488 | return rc; |
| 1489 | } |
| 1490 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1491 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
| 1492 | if (rc < 0) { |
| 1493 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", |
| 1494 | __func__, nvdimm_name(nvdimm)); |
| 1495 | return rc; |
| 1496 | } |
| 1497 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1498 | nfit_flush = nfit_mem->nfit_flush; |
| 1499 | if (nfit_flush && nfit_flush->flush->hint_count != 0) { |
| 1500 | nfit_blk->nvdimm_flush = devm_ioremap_nocache(dev, |
| 1501 | nfit_flush->flush->hint_address[0], 8); |
| 1502 | if (!nfit_blk->nvdimm_flush) |
| 1503 | return -ENOMEM; |
| 1504 | } |
| 1505 | |
Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 1506 | if (!arch_has_wmb_pmem() && !nfit_blk->nvdimm_flush) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1507 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
| 1508 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1509 | if (mmio->line_size == 0) |
| 1510 | return 0; |
| 1511 | |
| 1512 | if ((u32) nfit_blk->cmd_offset % mmio->line_size |
| 1513 | + 8 > mmio->line_size) { |
| 1514 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); |
| 1515 | return -ENXIO; |
| 1516 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size |
| 1517 | + 8 > mmio->line_size) { |
| 1518 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); |
| 1519 | return -ENXIO; |
| 1520 | } |
| 1521 | |
| 1522 | return 0; |
| 1523 | } |
| 1524 | |
| 1525 | static void acpi_nfit_blk_region_disable(struct nvdimm_bus *nvdimm_bus, |
| 1526 | struct device *dev) |
| 1527 | { |
| 1528 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1529 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1530 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
| 1531 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); |
| 1532 | int i; |
| 1533 | |
| 1534 | if (!nfit_blk) |
| 1535 | return; /* never enabled */ |
| 1536 | |
| 1537 | /* auto-free BLK spa mappings */ |
| 1538 | for (i = 0; i < 2; i++) { |
| 1539 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[i]; |
| 1540 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1541 | if (mmio->addr.base) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1542 | nfit_spa_unmap(acpi_desc, mmio->spa); |
| 1543 | } |
| 1544 | nd_blk_region_set_provider_data(ndbr, NULL); |
| 1545 | /* devm will free nfit_blk */ |
| 1546 | } |
| 1547 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1548 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1549 | struct nd_cmd_ars_cap *cmd, u64 addr, u64 length) |
| 1550 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1551 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1552 | int cmd_rc, rc; |
| 1553 | |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1554 | cmd->address = addr; |
| 1555 | cmd->length = length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1556 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
| 1557 | sizeof(*cmd), &cmd_rc); |
| 1558 | if (rc < 0) |
| 1559 | return rc; |
| 1560 | if (cmd_rc < 0) |
| 1561 | return cmd_rc; |
| 1562 | return 0; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1563 | } |
| 1564 | |
| 1565 | static int ars_do_start(struct nvdimm_bus_descriptor *nd_desc, |
| 1566 | struct nd_cmd_ars_start *cmd, u64 addr, u64 length) |
| 1567 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1568 | int cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1569 | int rc; |
| 1570 | |
| 1571 | cmd->address = addr; |
| 1572 | cmd->length = length; |
| 1573 | cmd->type = ND_ARS_PERSISTENT; |
| 1574 | |
| 1575 | while (1) { |
| 1576 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, cmd, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1577 | sizeof(*cmd), &cmd_rc); |
| 1578 | |
| 1579 | if (rc < 0) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1580 | return rc; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1581 | |
| 1582 | if (cmd_rc == -EBUSY) { |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1583 | /* ARS is in progress */ |
| 1584 | msleep(1000); |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1585 | continue; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1586 | } |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1587 | |
| 1588 | if (cmd_rc < 0) |
| 1589 | return cmd_rc; |
| 1590 | |
| 1591 | return 0; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1592 | } |
| 1593 | } |
| 1594 | |
| 1595 | static int ars_get_status(struct nvdimm_bus_descriptor *nd_desc, |
Dan Williams | 747ffe1 | 2016-02-19 15:21:14 -0800 | [diff] [blame] | 1596 | struct nd_cmd_ars_status *cmd, u32 size) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1597 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1598 | int rc, cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1599 | |
| 1600 | while (1) { |
| 1601 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, cmd, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1602 | size, &cmd_rc); |
| 1603 | if (rc < 0) |
| 1604 | return rc; |
| 1605 | |
| 1606 | /* FIXME make async and have a timeout */ |
| 1607 | if (cmd_rc == -EBUSY) { |
| 1608 | msleep(1000); |
| 1609 | continue; |
| 1610 | } |
| 1611 | |
| 1612 | if (cmd_rc == -EAGAIN || cmd_rc == 0) |
| 1613 | return 0; |
| 1614 | |
| 1615 | /* TODO: error list overflow support */ |
| 1616 | if (cmd_rc == -ENOSPC) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1617 | return -ENXIO; |
| 1618 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1619 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1620 | } |
| 1621 | } |
| 1622 | |
| 1623 | static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus, |
| 1624 | struct nd_cmd_ars_status *ars_status, u64 start) |
| 1625 | { |
| 1626 | int rc; |
| 1627 | u32 i; |
| 1628 | |
| 1629 | /* |
| 1630 | * The address field returned by ars_status should be either |
| 1631 | * less than or equal to the address we last started ARS for. |
| 1632 | * The (start, length) returned by ars_status should also have |
| 1633 | * non-zero overlap with the range we started ARS for. |
| 1634 | * If this is not the case, bail. |
| 1635 | */ |
| 1636 | if (ars_status->address > start || |
| 1637 | (ars_status->address + ars_status->length < start)) |
| 1638 | return -ENXIO; |
| 1639 | |
| 1640 | for (i = 0; i < ars_status->num_records; i++) { |
| 1641 | rc = nvdimm_bus_add_poison(nvdimm_bus, |
| 1642 | ars_status->records[i].err_address, |
| 1643 | ars_status->records[i].length); |
| 1644 | if (rc) |
| 1645 | return rc; |
| 1646 | } |
| 1647 | |
| 1648 | return 0; |
| 1649 | } |
| 1650 | |
| 1651 | static int acpi_nfit_find_poison(struct acpi_nfit_desc *acpi_desc, |
| 1652 | struct nd_region_desc *ndr_desc) |
| 1653 | { |
| 1654 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1655 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
| 1656 | struct nd_cmd_ars_status *ars_status = NULL; |
| 1657 | struct nd_cmd_ars_start *ars_start = NULL; |
| 1658 | struct nd_cmd_ars_cap *ars_cap = NULL; |
| 1659 | u64 start, len, cur, remaining; |
Dan Williams | 747ffe1 | 2016-02-19 15:21:14 -0800 | [diff] [blame] | 1660 | u32 ars_status_size; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1661 | int rc; |
| 1662 | |
| 1663 | ars_cap = kzalloc(sizeof(*ars_cap), GFP_KERNEL); |
| 1664 | if (!ars_cap) |
| 1665 | return -ENOMEM; |
| 1666 | |
| 1667 | start = ndr_desc->res->start; |
| 1668 | len = ndr_desc->res->end - ndr_desc->res->start + 1; |
| 1669 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1670 | rc = ars_get_cap(acpi_desc, ars_cap, start, len); |
Vishal Verma | 6e2452d | 2016-03-03 15:39:41 -0700 | [diff] [blame] | 1671 | if (rc == -ENOTTY) { |
Vishal Verma | 6e2452d | 2016-03-03 15:39:41 -0700 | [diff] [blame] | 1672 | rc = 0; |
| 1673 | goto out; |
| 1674 | } |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1675 | |
| 1676 | /* |
| 1677 | * Check if a full-range ARS has been run. If so, use those results |
| 1678 | * without having to start a new ARS. |
| 1679 | */ |
Dan Williams | 747ffe1 | 2016-02-19 15:21:14 -0800 | [diff] [blame] | 1680 | ars_status_size = ars_cap->max_ars_out; |
| 1681 | ars_status = kzalloc(ars_status_size, GFP_KERNEL); |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1682 | if (!ars_status) { |
| 1683 | rc = -ENOMEM; |
| 1684 | goto out; |
| 1685 | } |
| 1686 | |
Dan Williams | 747ffe1 | 2016-02-19 15:21:14 -0800 | [diff] [blame] | 1687 | rc = ars_get_status(nd_desc, ars_status, ars_status_size); |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1688 | if (rc) |
| 1689 | goto out; |
| 1690 | |
| 1691 | if (ars_status->address <= start && |
| 1692 | (ars_status->address + ars_status->length >= start + len)) { |
| 1693 | rc = ars_status_process_records(nvdimm_bus, ars_status, start); |
| 1694 | goto out; |
| 1695 | } |
| 1696 | |
| 1697 | /* |
| 1698 | * ARS_STATUS can overflow if the number of poison entries found is |
| 1699 | * greater than the maximum buffer size (ars_cap->max_ars_out) |
| 1700 | * To detect overflow, check if the length field of ars_status |
| 1701 | * is less than the length we supplied. If so, process the |
| 1702 | * error entries we got, adjust the start point, and start again |
| 1703 | */ |
| 1704 | ars_start = kzalloc(sizeof(*ars_start), GFP_KERNEL); |
| 1705 | if (!ars_start) |
| 1706 | return -ENOMEM; |
| 1707 | |
| 1708 | cur = start; |
| 1709 | remaining = len; |
| 1710 | do { |
| 1711 | u64 done, end; |
| 1712 | |
| 1713 | rc = ars_do_start(nd_desc, ars_start, cur, remaining); |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1714 | if (rc < 0) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1715 | goto out; |
| 1716 | |
Dan Williams | 747ffe1 | 2016-02-19 15:21:14 -0800 | [diff] [blame] | 1717 | rc = ars_get_status(nd_desc, ars_status, ars_status_size); |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1718 | if (rc < 0) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1719 | goto out; |
| 1720 | |
| 1721 | rc = ars_status_process_records(nvdimm_bus, ars_status, cur); |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1722 | if (rc < 0) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1723 | goto out; |
| 1724 | |
| 1725 | end = min(cur + remaining, |
| 1726 | ars_status->address + ars_status->length); |
| 1727 | done = end - cur; |
| 1728 | cur += done; |
| 1729 | remaining -= done; |
| 1730 | } while (remaining); |
| 1731 | |
| 1732 | out: |
| 1733 | kfree(ars_cap); |
| 1734 | kfree(ars_start); |
| 1735 | kfree(ars_status); |
| 1736 | return rc; |
| 1737 | } |
| 1738 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1739 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
| 1740 | struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc, |
| 1741 | struct acpi_nfit_memory_map *memdev, |
| 1742 | struct acpi_nfit_system_address *spa) |
| 1743 | { |
| 1744 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, |
| 1745 | memdev->device_handle); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1746 | struct nd_blk_region_desc *ndbr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1747 | struct nfit_mem *nfit_mem; |
| 1748 | int blk_valid = 0; |
| 1749 | |
| 1750 | if (!nvdimm) { |
| 1751 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", |
| 1752 | spa->range_index, memdev->device_handle); |
| 1753 | return -ENODEV; |
| 1754 | } |
| 1755 | |
| 1756 | nd_mapping->nvdimm = nvdimm; |
| 1757 | switch (nfit_spa_type(spa)) { |
| 1758 | case NFIT_SPA_PM: |
| 1759 | case NFIT_SPA_VOLATILE: |
| 1760 | nd_mapping->start = memdev->address; |
| 1761 | nd_mapping->size = memdev->region_size; |
| 1762 | break; |
| 1763 | case NFIT_SPA_DCR: |
| 1764 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1765 | if (!nfit_mem || !nfit_mem->bdw) { |
| 1766 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", |
| 1767 | spa->range_index, nvdimm_name(nvdimm)); |
| 1768 | } else { |
| 1769 | nd_mapping->size = nfit_mem->bdw->capacity; |
| 1770 | nd_mapping->start = nfit_mem->bdw->start_address; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 1771 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1772 | blk_valid = 1; |
| 1773 | } |
| 1774 | |
| 1775 | ndr_desc->nd_mapping = nd_mapping; |
| 1776 | ndr_desc->num_mappings = blk_valid; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1777 | ndbr_desc = to_blk_region_desc(ndr_desc); |
| 1778 | ndbr_desc->enable = acpi_nfit_blk_region_enable; |
| 1779 | ndbr_desc->disable = acpi_nfit_blk_region_disable; |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 1780 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1781 | if (!nvdimm_blk_region_create(acpi_desc->nvdimm_bus, ndr_desc)) |
| 1782 | return -ENOMEM; |
| 1783 | break; |
| 1784 | } |
| 1785 | |
| 1786 | return 0; |
| 1787 | } |
| 1788 | |
| 1789 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
| 1790 | struct nfit_spa *nfit_spa) |
| 1791 | { |
| 1792 | static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS]; |
| 1793 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1794 | struct nd_blk_region_desc ndbr_desc; |
| 1795 | struct nd_region_desc *ndr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1796 | struct nfit_memdev *nfit_memdev; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1797 | struct nvdimm_bus *nvdimm_bus; |
| 1798 | struct resource res; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1799 | int count = 0, rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1800 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1801 | if (nfit_spa->is_registered) |
| 1802 | return 0; |
| 1803 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1804 | if (spa->range_index == 0) { |
| 1805 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", |
| 1806 | __func__); |
| 1807 | return 0; |
| 1808 | } |
| 1809 | |
| 1810 | memset(&res, 0, sizeof(res)); |
| 1811 | memset(&nd_mappings, 0, sizeof(nd_mappings)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1812 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1813 | res.start = spa->address; |
| 1814 | res.end = res.start + spa->length - 1; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1815 | ndr_desc = &ndbr_desc.ndr_desc; |
| 1816 | ndr_desc->res = &res; |
| 1817 | ndr_desc->provider_data = nfit_spa; |
| 1818 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; |
Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 1819 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
| 1820 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( |
| 1821 | spa->proximity_domain); |
| 1822 | else |
| 1823 | ndr_desc->numa_node = NUMA_NO_NODE; |
| 1824 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1825 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 1826 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| 1827 | struct nd_mapping *nd_mapping; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1828 | |
| 1829 | if (memdev->range_index != spa->range_index) |
| 1830 | continue; |
| 1831 | if (count >= ND_MAX_MAPPINGS) { |
| 1832 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", |
| 1833 | spa->range_index, ND_MAX_MAPPINGS); |
| 1834 | return -ENXIO; |
| 1835 | } |
| 1836 | nd_mapping = &nd_mappings[count++]; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1837 | rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1838 | memdev, spa); |
| 1839 | if (rc) |
| 1840 | return rc; |
| 1841 | } |
| 1842 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1843 | ndr_desc->nd_mapping = nd_mappings; |
| 1844 | ndr_desc->num_mappings = count; |
| 1845 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1846 | if (rc) |
| 1847 | return rc; |
| 1848 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1849 | nvdimm_bus = acpi_desc->nvdimm_bus; |
| 1850 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1851 | rc = acpi_nfit_find_poison(acpi_desc, ndr_desc); |
| 1852 | if (rc) { |
| 1853 | dev_err(acpi_desc->dev, |
| 1854 | "error while performing ARS to find poison: %d\n", |
| 1855 | rc); |
| 1856 | return rc; |
| 1857 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1858 | if (!nvdimm_pmem_region_create(nvdimm_bus, ndr_desc)) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1859 | return -ENOMEM; |
| 1860 | } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1861 | if (!nvdimm_volatile_region_create(nvdimm_bus, ndr_desc)) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1862 | return -ENOMEM; |
| 1863 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1864 | |
| 1865 | nfit_spa->is_registered = 1; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1866 | return 0; |
| 1867 | } |
| 1868 | |
| 1869 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) |
| 1870 | { |
| 1871 | struct nfit_spa *nfit_spa; |
| 1872 | |
| 1873 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 1874 | int rc = acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 1875 | |
| 1876 | if (rc) |
| 1877 | return rc; |
| 1878 | } |
| 1879 | return 0; |
| 1880 | } |
| 1881 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1882 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
| 1883 | struct nfit_table_prev *prev) |
| 1884 | { |
| 1885 | struct device *dev = acpi_desc->dev; |
| 1886 | |
| 1887 | if (!list_empty(&prev->spas) || |
| 1888 | !list_empty(&prev->memdevs) || |
| 1889 | !list_empty(&prev->dcrs) || |
| 1890 | !list_empty(&prev->bdws) || |
| 1891 | !list_empty(&prev->idts) || |
| 1892 | !list_empty(&prev->flushes)) { |
| 1893 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); |
| 1894 | return -ENXIO; |
| 1895 | } |
| 1896 | return 0; |
| 1897 | } |
| 1898 | |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 1899 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1900 | { |
| 1901 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1902 | struct nfit_table_prev prev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1903 | const void *end; |
| 1904 | u8 *data; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1905 | int rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1906 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1907 | mutex_lock(&acpi_desc->init_mutex); |
| 1908 | |
| 1909 | INIT_LIST_HEAD(&prev.spas); |
| 1910 | INIT_LIST_HEAD(&prev.memdevs); |
| 1911 | INIT_LIST_HEAD(&prev.dcrs); |
| 1912 | INIT_LIST_HEAD(&prev.bdws); |
| 1913 | INIT_LIST_HEAD(&prev.idts); |
| 1914 | INIT_LIST_HEAD(&prev.flushes); |
| 1915 | |
| 1916 | list_cut_position(&prev.spas, &acpi_desc->spas, |
| 1917 | acpi_desc->spas.prev); |
| 1918 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, |
| 1919 | acpi_desc->memdevs.prev); |
| 1920 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, |
| 1921 | acpi_desc->dcrs.prev); |
| 1922 | list_cut_position(&prev.bdws, &acpi_desc->bdws, |
| 1923 | acpi_desc->bdws.prev); |
| 1924 | list_cut_position(&prev.idts, &acpi_desc->idts, |
| 1925 | acpi_desc->idts.prev); |
| 1926 | list_cut_position(&prev.flushes, &acpi_desc->flushes, |
| 1927 | acpi_desc->flushes.prev); |
| 1928 | |
| 1929 | data = (u8 *) acpi_desc->nfit; |
| 1930 | end = data + sz; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1931 | while (!IS_ERR_OR_NULL(data)) |
| 1932 | data = add_table(acpi_desc, &prev, data, end); |
| 1933 | |
| 1934 | if (IS_ERR(data)) { |
| 1935 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, |
| 1936 | PTR_ERR(data)); |
| 1937 | rc = PTR_ERR(data); |
| 1938 | goto out_unlock; |
| 1939 | } |
| 1940 | |
| 1941 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
| 1942 | if (rc) |
| 1943 | goto out_unlock; |
| 1944 | |
| 1945 | if (nfit_mem_init(acpi_desc) != 0) { |
| 1946 | rc = -ENOMEM; |
| 1947 | goto out_unlock; |
| 1948 | } |
| 1949 | |
| 1950 | acpi_nfit_init_dsms(acpi_desc); |
| 1951 | |
| 1952 | rc = acpi_nfit_register_dimms(acpi_desc); |
| 1953 | if (rc) |
| 1954 | goto out_unlock; |
| 1955 | |
| 1956 | rc = acpi_nfit_register_regions(acpi_desc); |
| 1957 | |
| 1958 | out_unlock: |
| 1959 | mutex_unlock(&acpi_desc->init_mutex); |
| 1960 | return rc; |
| 1961 | } |
| 1962 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
| 1963 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame^] | 1964 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1965 | { |
| 1966 | struct nvdimm_bus_descriptor *nd_desc; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1967 | |
| 1968 | dev_set_drvdata(dev, acpi_desc); |
| 1969 | acpi_desc->dev = dev; |
| 1970 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
| 1971 | nd_desc = &acpi_desc->nd_desc; |
| 1972 | nd_desc->provider_name = "ACPI.NFIT"; |
| 1973 | nd_desc->ndctl = acpi_nfit_ctl; |
| 1974 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
| 1975 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1976 | INIT_LIST_HEAD(&acpi_desc->spa_maps); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1977 | INIT_LIST_HEAD(&acpi_desc->spas); |
| 1978 | INIT_LIST_HEAD(&acpi_desc->dcrs); |
| 1979 | INIT_LIST_HEAD(&acpi_desc->bdws); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1980 | INIT_LIST_HEAD(&acpi_desc->idts); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1981 | INIT_LIST_HEAD(&acpi_desc->flushes); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1982 | INIT_LIST_HEAD(&acpi_desc->memdevs); |
| 1983 | INIT_LIST_HEAD(&acpi_desc->dimms); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1984 | mutex_init(&acpi_desc->spa_map_mutex); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1985 | mutex_init(&acpi_desc->init_mutex); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1986 | } |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame^] | 1987 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1988 | |
| 1989 | static int acpi_nfit_add(struct acpi_device *adev) |
| 1990 | { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1991 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1992 | struct acpi_nfit_desc *acpi_desc; |
| 1993 | struct device *dev = &adev->dev; |
| 1994 | struct acpi_table_header *tbl; |
| 1995 | acpi_status status = AE_OK; |
| 1996 | acpi_size sz; |
| 1997 | int rc; |
| 1998 | |
| 1999 | status = acpi_get_table_with_size("NFIT", 0, &tbl, &sz); |
| 2000 | if (ACPI_FAILURE(status)) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2001 | /* This is ok, we could have an nvdimm hotplugged later */ |
| 2002 | dev_dbg(dev, "failed to find NFIT at startup\n"); |
| 2003 | return 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2004 | } |
| 2005 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame^] | 2006 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 2007 | if (!acpi_desc) |
| 2008 | return -ENOMEM; |
| 2009 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
| 2010 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc); |
| 2011 | if (!acpi_desc->nvdimm_bus) |
| 2012 | return -ENOMEM; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2013 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2014 | /* |
| 2015 | * Save the acpi header for later and then skip it, |
| 2016 | * making nfit point to the first nfit table header. |
| 2017 | */ |
| 2018 | acpi_desc->acpi_header = *tbl; |
| 2019 | acpi_desc->nfit = (void *) tbl + sizeof(struct acpi_table_nfit); |
| 2020 | sz -= sizeof(struct acpi_table_nfit); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2021 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2022 | /* Evaluate _FIT and override with that if present */ |
| 2023 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 2024 | if (ACPI_SUCCESS(status) && buf.length > 0) { |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2025 | union acpi_object *obj; |
| 2026 | /* |
| 2027 | * Adjust for the acpi_object header of the _FIT |
| 2028 | */ |
| 2029 | obj = buf.pointer; |
| 2030 | if (obj->type == ACPI_TYPE_BUFFER) { |
| 2031 | acpi_desc->nfit = |
| 2032 | (struct acpi_nfit_header *)obj->buffer.pointer; |
| 2033 | sz = obj->buffer.length; |
| 2034 | } else |
| 2035 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", |
| 2036 | __func__, (int) obj->type); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2037 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2038 | |
| 2039 | rc = acpi_nfit_init(acpi_desc, sz); |
| 2040 | if (rc) { |
| 2041 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
| 2042 | return rc; |
| 2043 | } |
| 2044 | return 0; |
| 2045 | } |
| 2046 | |
| 2047 | static int acpi_nfit_remove(struct acpi_device *adev) |
| 2048 | { |
| 2049 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev); |
| 2050 | |
| 2051 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
| 2052 | return 0; |
| 2053 | } |
| 2054 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2055 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
| 2056 | { |
| 2057 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev); |
| 2058 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2059 | struct acpi_nfit_header *nfit_saved; |
| 2060 | union acpi_object *obj; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2061 | struct device *dev = &adev->dev; |
| 2062 | acpi_status status; |
| 2063 | int ret; |
| 2064 | |
| 2065 | dev_dbg(dev, "%s: event: %d\n", __func__, event); |
| 2066 | |
| 2067 | device_lock(dev); |
| 2068 | if (!dev->driver) { |
| 2069 | /* dev->driver may be null if we're being removed */ |
| 2070 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); |
Alexey Khoroshilov | d91e892 | 2015-12-11 23:24:10 +0300 | [diff] [blame] | 2071 | goto out_unlock; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2072 | } |
| 2073 | |
| 2074 | if (!acpi_desc) { |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame^] | 2075 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 2076 | if (!acpi_desc) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2077 | goto out_unlock; |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame^] | 2078 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
| 2079 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc); |
| 2080 | if (!acpi_desc->nvdimm_bus) |
| 2081 | goto out_unlock; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2082 | } |
| 2083 | |
| 2084 | /* Evaluate _FIT */ |
| 2085 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 2086 | if (ACPI_FAILURE(status)) { |
| 2087 | dev_err(dev, "failed to evaluate _FIT\n"); |
| 2088 | goto out_unlock; |
| 2089 | } |
| 2090 | |
| 2091 | nfit_saved = acpi_desc->nfit; |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2092 | obj = buf.pointer; |
| 2093 | if (obj->type == ACPI_TYPE_BUFFER) { |
| 2094 | acpi_desc->nfit = |
| 2095 | (struct acpi_nfit_header *)obj->buffer.pointer; |
| 2096 | ret = acpi_nfit_init(acpi_desc, obj->buffer.length); |
| 2097 | if (ret) { |
| 2098 | /* Merge failed, restore old nfit, and exit */ |
| 2099 | acpi_desc->nfit = nfit_saved; |
| 2100 | dev_err(dev, "failed to merge updated NFIT\n"); |
| 2101 | } |
| 2102 | } else { |
| 2103 | /* Bad _FIT, restore old nfit */ |
| 2104 | dev_err(dev, "Invalid _FIT\n"); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2105 | } |
| 2106 | kfree(buf.pointer); |
| 2107 | |
| 2108 | out_unlock: |
| 2109 | device_unlock(dev); |
| 2110 | } |
| 2111 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2112 | static const struct acpi_device_id acpi_nfit_ids[] = { |
| 2113 | { "ACPI0012", 0 }, |
| 2114 | { "", 0 }, |
| 2115 | }; |
| 2116 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); |
| 2117 | |
| 2118 | static struct acpi_driver acpi_nfit_driver = { |
| 2119 | .name = KBUILD_MODNAME, |
| 2120 | .ids = acpi_nfit_ids, |
| 2121 | .ops = { |
| 2122 | .add = acpi_nfit_add, |
| 2123 | .remove = acpi_nfit_remove, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2124 | .notify = acpi_nfit_notify, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2125 | }, |
| 2126 | }; |
| 2127 | |
| 2128 | static __init int nfit_init(void) |
| 2129 | { |
| 2130 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
| 2131 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); |
| 2132 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); |
| 2133 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); |
| 2134 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); |
| 2135 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); |
| 2136 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); |
| 2137 | |
| 2138 | acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]); |
| 2139 | acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]); |
| 2140 | acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]); |
| 2141 | acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]); |
| 2142 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]); |
| 2143 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]); |
| 2144 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]); |
| 2145 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]); |
| 2146 | acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]); |
| 2147 | acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]); |
| 2148 | |
| 2149 | return acpi_bus_register_driver(&acpi_nfit_driver); |
| 2150 | } |
| 2151 | |
| 2152 | static __exit void nfit_exit(void) |
| 2153 | { |
| 2154 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
| 2155 | } |
| 2156 | |
| 2157 | module_init(nfit_init); |
| 2158 | module_exit(nfit_exit); |
| 2159 | MODULE_LICENSE("GPL v2"); |
| 2160 | MODULE_AUTHOR("Intel Corporation"); |