Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Synthesize TLB refill handlers at runtime. |
| 7 | * |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 8 | * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer |
Maciej W. Rozycki | 619b6e1 | 2007-10-23 12:43:25 +0100 | [diff] [blame] | 9 | * Copyright (C) 2005, 2007 Maciej W. Rozycki |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 10 | * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) |
| 11 | * |
| 12 | * ... and the days got worse and worse and now you see |
| 13 | * I've gone completly out of my mind. |
| 14 | * |
| 15 | * They're coming to take me a away haha |
| 16 | * they're coming to take me a away hoho hihi haha |
| 17 | * to the funny farm where code is beautiful all the time ... |
| 18 | * |
| 19 | * (Condolences to Napoleon XIV) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | */ |
| 21 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/types.h> |
| 24 | #include <linux/string.h> |
| 25 | #include <linux/init.h> |
| 26 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <asm/mmu_context.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | #include <asm/war.h> |
| 29 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 30 | #include "uasm.h" |
| 31 | |
Ralf Baechle | aeffdbb | 2007-10-11 23:46:14 +0100 | [diff] [blame] | 32 | static inline int r45k_bvahwbug(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | { |
| 34 | /* XXX: We should probe for the presence of this bug, but we don't. */ |
| 35 | return 0; |
| 36 | } |
| 37 | |
Ralf Baechle | aeffdbb | 2007-10-11 23:46:14 +0100 | [diff] [blame] | 38 | static inline int r4k_250MHZhwbug(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | { |
| 40 | /* XXX: We should probe for the presence of this bug, but we don't. */ |
| 41 | return 0; |
| 42 | } |
| 43 | |
Ralf Baechle | aeffdbb | 2007-10-11 23:46:14 +0100 | [diff] [blame] | 44 | static inline int __maybe_unused bcm1250_m3_war(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | { |
| 46 | return BCM1250_M3_WAR; |
| 47 | } |
| 48 | |
Ralf Baechle | aeffdbb | 2007-10-11 23:46:14 +0100 | [diff] [blame] | 49 | static inline int __maybe_unused r10000_llsc_war(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | { |
| 51 | return R10000_LLSC_WAR; |
| 52 | } |
| 53 | |
| 54 | /* |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 55 | * Found by experiment: At least some revisions of the 4kc throw under |
| 56 | * some circumstances a machine check exception, triggered by invalid |
| 57 | * values in the index register. Delaying the tlbp instruction until |
| 58 | * after the next branch, plus adding an additional nop in front of |
| 59 | * tlbwi/tlbwr avoids the invalid index register values. Nobody knows |
| 60 | * why; it's not an issue caused by the core RTL. |
| 61 | * |
| 62 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 63 | static int __cpuinit m4kc_tlbp_war(void) |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 64 | { |
| 65 | return (current_cpu_data.processor_id & 0xffff00) == |
| 66 | (PRID_COMP_MIPS | PRID_IMP_4KC); |
| 67 | } |
| 68 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 69 | /* Handle labels (which must be positive integers). */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | enum label_id { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 71 | label_second_part = 1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | label_leave, |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 73 | #ifdef MODULE_START |
| 74 | label_module_alloc, |
| 75 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | label_vmalloc, |
| 77 | label_vmalloc_done, |
| 78 | label_tlbw_hazard, |
| 79 | label_split, |
| 80 | label_nopage_tlbl, |
| 81 | label_nopage_tlbs, |
| 82 | label_nopage_tlbm, |
| 83 | label_smp_pgtable_change, |
| 84 | label_r3000_write_probe_fail, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | }; |
| 86 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 87 | UASM_L_LA(_second_part) |
| 88 | UASM_L_LA(_leave) |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 89 | #ifdef MODULE_START |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 90 | UASM_L_LA(_module_alloc) |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 91 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 92 | UASM_L_LA(_vmalloc) |
| 93 | UASM_L_LA(_vmalloc_done) |
| 94 | UASM_L_LA(_tlbw_hazard) |
| 95 | UASM_L_LA(_split) |
| 96 | UASM_L_LA(_nopage_tlbl) |
| 97 | UASM_L_LA(_nopage_tlbs) |
| 98 | UASM_L_LA(_nopage_tlbm) |
| 99 | UASM_L_LA(_smp_pgtable_change) |
| 100 | UASM_L_LA(_r3000_write_probe_fail) |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 101 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 102 | /* |
| 103 | * For debug purposes. |
| 104 | */ |
| 105 | static inline void dump_handler(const u32 *handler, int count) |
| 106 | { |
| 107 | int i; |
| 108 | |
| 109 | pr_debug("\t.set push\n"); |
| 110 | pr_debug("\t.set noreorder\n"); |
| 111 | |
| 112 | for (i = 0; i < count; i++) |
| 113 | pr_debug("\t%p\t.word 0x%08x\n", &handler[i], handler[i]); |
| 114 | |
| 115 | pr_debug("\t.set pop\n"); |
| 116 | } |
| 117 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | /* The only general purpose registers allowed in TLB handlers. */ |
| 119 | #define K0 26 |
| 120 | #define K1 27 |
| 121 | |
| 122 | /* Some CP0 registers */ |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 123 | #define C0_INDEX 0, 0 |
| 124 | #define C0_ENTRYLO0 2, 0 |
| 125 | #define C0_TCBIND 2, 2 |
| 126 | #define C0_ENTRYLO1 3, 0 |
| 127 | #define C0_CONTEXT 4, 0 |
| 128 | #define C0_BADVADDR 8, 0 |
| 129 | #define C0_ENTRYHI 10, 0 |
| 130 | #define C0_EPC 14, 0 |
| 131 | #define C0_XCONTEXT 20, 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 133 | #ifdef CONFIG_64BIT |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 134 | # define GET_CONTEXT(buf, reg) UASM_i_MFC0(buf, reg, C0_XCONTEXT) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 136 | # define GET_CONTEXT(buf, reg) UASM_i_MFC0(buf, reg, C0_CONTEXT) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | #endif |
| 138 | |
| 139 | /* The worst case length of the handler is around 18 instructions for |
| 140 | * R3000-style TLBs and up to 63 instructions for R4000-style TLBs. |
| 141 | * Maximum space available is 32 instructions for R3000 and 64 |
| 142 | * instructions for R4000. |
| 143 | * |
| 144 | * We deliberately chose a buffer size of 128, so we won't scribble |
| 145 | * over anything important on overflow before we panic. |
| 146 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 147 | static u32 tlb_handler[128] __cpuinitdata; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | |
| 149 | /* simply assume worst case size for labels and relocs */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 150 | static struct uasm_label labels[128] __cpuinitdata; |
| 151 | static struct uasm_reloc relocs[128] __cpuinitdata; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | |
| 153 | /* |
| 154 | * The R3000 TLB handler is simple. |
| 155 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 156 | static void __cpuinit build_r3000_tlb_refill_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | { |
| 158 | long pgdc = (long)pgd_current; |
| 159 | u32 *p; |
| 160 | |
| 161 | memset(tlb_handler, 0, sizeof(tlb_handler)); |
| 162 | p = tlb_handler; |
| 163 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 164 | uasm_i_mfc0(&p, K0, C0_BADVADDR); |
| 165 | uasm_i_lui(&p, K1, uasm_rel_hi(pgdc)); /* cp0 delay */ |
| 166 | uasm_i_lw(&p, K1, uasm_rel_lo(pgdc), K1); |
| 167 | uasm_i_srl(&p, K0, K0, 22); /* load delay */ |
| 168 | uasm_i_sll(&p, K0, K0, 2); |
| 169 | uasm_i_addu(&p, K1, K1, K0); |
| 170 | uasm_i_mfc0(&p, K0, C0_CONTEXT); |
| 171 | uasm_i_lw(&p, K1, 0, K1); /* cp0 delay */ |
| 172 | uasm_i_andi(&p, K0, K0, 0xffc); /* load delay */ |
| 173 | uasm_i_addu(&p, K1, K1, K0); |
| 174 | uasm_i_lw(&p, K0, 0, K1); |
| 175 | uasm_i_nop(&p); /* load delay */ |
| 176 | uasm_i_mtc0(&p, K0, C0_ENTRYLO0); |
| 177 | uasm_i_mfc0(&p, K1, C0_EPC); /* cp0 delay */ |
| 178 | uasm_i_tlbwr(&p); /* cp0 delay */ |
| 179 | uasm_i_jr(&p, K1); |
| 180 | uasm_i_rfe(&p); /* branch delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | |
| 182 | if (p > tlb_handler + 32) |
| 183 | panic("TLB refill handler space exceeded"); |
| 184 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 185 | pr_debug("Wrote TLB refill handler (%u instructions).\n", |
| 186 | (unsigned int)(p - tlb_handler)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | |
Ralf Baechle | 91b05e6 | 2006-03-29 18:53:00 +0100 | [diff] [blame] | 188 | memcpy((void *)ebase, tlb_handler, 0x80); |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 189 | |
| 190 | dump_handler((u32 *)ebase, 32); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | /* |
| 194 | * The R4000 TLB handler is much more complicated. We have two |
| 195 | * consecutive handler areas with 32 instructions space each. |
| 196 | * Since they aren't used at the same time, we can overflow in the |
| 197 | * other one.To keep things simple, we first assume linear space, |
| 198 | * then we relocate it to the final handler layout as needed. |
| 199 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 200 | static u32 final_handler[64] __cpuinitdata; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | |
| 202 | /* |
| 203 | * Hazards |
| 204 | * |
| 205 | * From the IDT errata for the QED RM5230 (Nevada), processor revision 1.0: |
| 206 | * 2. A timing hazard exists for the TLBP instruction. |
| 207 | * |
| 208 | * stalling_instruction |
| 209 | * TLBP |
| 210 | * |
| 211 | * The JTLB is being read for the TLBP throughout the stall generated by the |
| 212 | * previous instruction. This is not really correct as the stalling instruction |
| 213 | * can modify the address used to access the JTLB. The failure symptom is that |
| 214 | * the TLBP instruction will use an address created for the stalling instruction |
| 215 | * and not the address held in C0_ENHI and thus report the wrong results. |
| 216 | * |
| 217 | * The software work-around is to not allow the instruction preceding the TLBP |
| 218 | * to stall - make it an NOP or some other instruction guaranteed not to stall. |
| 219 | * |
| 220 | * Errata 2 will not be fixed. This errata is also on the R5000. |
| 221 | * |
| 222 | * As if we MIPS hackers wouldn't know how to nop pipelines happy ... |
| 223 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 224 | static void __cpuinit __maybe_unused build_tlb_probe_entry(u32 **p) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | { |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 226 | switch (current_cpu_type()) { |
Thomas Bogendoerfer | 326e2e1 | 2008-05-12 13:55:42 +0200 | [diff] [blame] | 227 | /* Found by experiment: R4600 v2.0/R4700 needs this, too. */ |
Thiemo Seufer | f5b4d95 | 2005-09-09 17:11:50 +0000 | [diff] [blame] | 228 | case CPU_R4600: |
Thomas Bogendoerfer | 326e2e1 | 2008-05-12 13:55:42 +0200 | [diff] [blame] | 229 | case CPU_R4700: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | case CPU_R5000: |
| 231 | case CPU_R5000A: |
| 232 | case CPU_NEVADA: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 233 | uasm_i_nop(p); |
| 234 | uasm_i_tlbp(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 235 | break; |
| 236 | |
| 237 | default: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 238 | uasm_i_tlbp(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | break; |
| 240 | } |
| 241 | } |
| 242 | |
| 243 | /* |
| 244 | * Write random or indexed TLB entry, and care about the hazards from |
| 245 | * the preceeding mtc0 and for the following eret. |
| 246 | */ |
| 247 | enum tlb_write_entry { tlb_random, tlb_indexed }; |
| 248 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 249 | static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 250 | struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | enum tlb_write_entry wmode) |
| 252 | { |
| 253 | void(*tlbw)(u32 **) = NULL; |
| 254 | |
| 255 | switch (wmode) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 256 | case tlb_random: tlbw = uasm_i_tlbwr; break; |
| 257 | case tlb_indexed: tlbw = uasm_i_tlbwi; break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | } |
| 259 | |
Ralf Baechle | 161548b | 2008-01-29 10:14:54 +0000 | [diff] [blame] | 260 | if (cpu_has_mips_r2) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 261 | uasm_i_ehb(p); |
Ralf Baechle | 161548b | 2008-01-29 10:14:54 +0000 | [diff] [blame] | 262 | tlbw(p); |
| 263 | return; |
| 264 | } |
| 265 | |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 266 | switch (current_cpu_type()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | case CPU_R4000PC: |
| 268 | case CPU_R4000SC: |
| 269 | case CPU_R4000MC: |
| 270 | case CPU_R4400PC: |
| 271 | case CPU_R4400SC: |
| 272 | case CPU_R4400MC: |
| 273 | /* |
| 274 | * This branch uses up a mtc0 hazard nop slot and saves |
| 275 | * two nops after the tlbw instruction. |
| 276 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 277 | uasm_il_bgezl(p, r, 0, label_tlbw_hazard); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 279 | uasm_l_tlbw_hazard(l, *p); |
| 280 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 281 | break; |
| 282 | |
| 283 | case CPU_R4600: |
| 284 | case CPU_R4700: |
| 285 | case CPU_R5000: |
| 286 | case CPU_R5000A: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 287 | uasm_i_nop(p); |
Maciej W. Rozycki | 2c93e12 | 2005-06-30 10:51:01 +0000 | [diff] [blame] | 288 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 289 | uasm_i_nop(p); |
Maciej W. Rozycki | 2c93e12 | 2005-06-30 10:51:01 +0000 | [diff] [blame] | 290 | break; |
| 291 | |
| 292 | case CPU_R4300: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 293 | case CPU_5KC: |
| 294 | case CPU_TX49XX: |
| 295 | case CPU_AU1000: |
| 296 | case CPU_AU1100: |
| 297 | case CPU_AU1500: |
| 298 | case CPU_AU1550: |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 299 | case CPU_AU1200: |
Manuel Lauss | 237cfee | 2007-12-06 09:07:55 +0100 | [diff] [blame] | 300 | case CPU_AU1210: |
| 301 | case CPU_AU1250: |
Pete Popov | bdf21b1 | 2005-07-14 17:47:57 +0000 | [diff] [blame] | 302 | case CPU_PR4450: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 303 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | tlbw(p); |
| 305 | break; |
| 306 | |
| 307 | case CPU_R10000: |
| 308 | case CPU_R12000: |
Kumba | 44d921b | 2006-05-16 22:23:59 -0400 | [diff] [blame] | 309 | case CPU_R14000: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | case CPU_4KC: |
Thomas Bogendoerfer | b1ec4c8 | 2008-03-26 16:42:54 +0100 | [diff] [blame] | 311 | case CPU_4KEC: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 312 | case CPU_SB1: |
Andrew Isaacson | 93ce2f52 | 2005-10-19 23:56:20 -0700 | [diff] [blame] | 313 | case CPU_SB1A: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 314 | case CPU_4KSC: |
| 315 | case CPU_20KC: |
| 316 | case CPU_25KF: |
Aurelien Jarno | 1c0c13e | 2007-09-25 15:40:12 +0200 | [diff] [blame] | 317 | case CPU_BCM3302: |
| 318 | case CPU_BCM4710: |
Fuxin Zhang | 2a21c73 | 2007-06-06 14:52:43 +0800 | [diff] [blame] | 319 | case CPU_LOONGSON2: |
David Daney | ec454d8 | 2008-12-11 15:33:35 -0800 | [diff] [blame] | 320 | case CPU_CAVIUM_OCTEON: |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 321 | if (m4kc_tlbp_war()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 322 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | tlbw(p); |
| 324 | break; |
| 325 | |
| 326 | case CPU_NEVADA: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 327 | uasm_i_nop(p); /* QED specifies 2 nops hazard */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 328 | /* |
| 329 | * This branch uses up a mtc0 hazard nop slot and saves |
| 330 | * a nop after the tlbw instruction. |
| 331 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 332 | uasm_il_bgezl(p, r, 0, label_tlbw_hazard); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 334 | uasm_l_tlbw_hazard(l, *p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | break; |
| 336 | |
| 337 | case CPU_RM7000: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 338 | uasm_i_nop(p); |
| 339 | uasm_i_nop(p); |
| 340 | uasm_i_nop(p); |
| 341 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | tlbw(p); |
| 343 | break; |
| 344 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 345 | case CPU_RM9000: |
| 346 | /* |
| 347 | * When the JTLB is updated by tlbwi or tlbwr, a subsequent |
| 348 | * use of the JTLB for instructions should not occur for 4 |
| 349 | * cpu cycles and use for data translations should not occur |
| 350 | * for 3 cpu cycles. |
| 351 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 352 | uasm_i_ssnop(p); |
| 353 | uasm_i_ssnop(p); |
| 354 | uasm_i_ssnop(p); |
| 355 | uasm_i_ssnop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 357 | uasm_i_ssnop(p); |
| 358 | uasm_i_ssnop(p); |
| 359 | uasm_i_ssnop(p); |
| 360 | uasm_i_ssnop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 361 | break; |
| 362 | |
| 363 | case CPU_VR4111: |
| 364 | case CPU_VR4121: |
| 365 | case CPU_VR4122: |
| 366 | case CPU_VR4181: |
| 367 | case CPU_VR4181A: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 368 | uasm_i_nop(p); |
| 369 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | tlbw(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 371 | uasm_i_nop(p); |
| 372 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 373 | break; |
| 374 | |
| 375 | case CPU_VR4131: |
| 376 | case CPU_VR4133: |
Ralf Baechle | 7623deb | 2005-08-29 16:49:55 +0000 | [diff] [blame] | 377 | case CPU_R5432: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 378 | uasm_i_nop(p); |
| 379 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 380 | tlbw(p); |
| 381 | break; |
| 382 | |
| 383 | default: |
| 384 | panic("No TLB refill handler yet (CPU type: %d)", |
| 385 | current_cpu_data.cputype); |
| 386 | break; |
| 387 | } |
| 388 | } |
| 389 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 390 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 391 | /* |
| 392 | * TMP and PTR are scratch. |
| 393 | * TMP will be clobbered, PTR will hold the pmd entry. |
| 394 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 395 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 396 | build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 397 | unsigned int tmp, unsigned int ptr) |
| 398 | { |
| 399 | long pgdc = (long)pgd_current; |
| 400 | |
| 401 | /* |
| 402 | * The vmalloc handling is not in the hotpath. |
| 403 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 404 | uasm_i_dmfc0(p, tmp, C0_BADVADDR); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 405 | #ifdef MODULE_START |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 406 | uasm_il_bltz(p, r, tmp, label_module_alloc); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 407 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 408 | uasm_il_bltz(p, r, tmp, label_vmalloc); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 409 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 410 | /* No uasm_i_nop needed here, since the next insn doesn't touch TMP. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 411 | |
| 412 | #ifdef CONFIG_SMP |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 413 | # ifdef CONFIG_MIPS_MT_SMTC |
| 414 | /* |
| 415 | * SMTC uses TCBind value as "CPU" index |
| 416 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 417 | uasm_i_mfc0(p, ptr, C0_TCBIND); |
| 418 | uasm_i_dsrl(p, ptr, ptr, 19); |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 419 | # else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | /* |
Thiemo Seufer | 1b3a6e9 | 2005-04-01 14:07:13 +0000 | [diff] [blame] | 421 | * 64 bit SMP running in XKPHYS has smp_processor_id() << 3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 422 | * stored in CONTEXT. |
| 423 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 424 | uasm_i_dmfc0(p, ptr, C0_CONTEXT); |
| 425 | uasm_i_dsrl(p, ptr, ptr, 23); |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 426 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 427 | UASM_i_LA_mostly(p, tmp, pgdc); |
| 428 | uasm_i_daddu(p, ptr, ptr, tmp); |
| 429 | uasm_i_dmfc0(p, tmp, C0_BADVADDR); |
| 430 | uasm_i_ld(p, ptr, uasm_rel_lo(pgdc), ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 432 | UASM_i_LA_mostly(p, ptr, pgdc); |
| 433 | uasm_i_ld(p, ptr, uasm_rel_lo(pgdc), ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | #endif |
| 435 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 436 | uasm_l_vmalloc_done(l, *p); |
Ralf Baechle | 242954b | 2006-10-24 02:29:01 +0100 | [diff] [blame] | 437 | |
| 438 | if (PGDIR_SHIFT - 3 < 32) /* get pgd offset in bytes */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 439 | uasm_i_dsrl(p, tmp, tmp, PGDIR_SHIFT-3); |
Ralf Baechle | 242954b | 2006-10-24 02:29:01 +0100 | [diff] [blame] | 440 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 441 | uasm_i_dsrl32(p, tmp, tmp, PGDIR_SHIFT - 3 - 32); |
Ralf Baechle | 242954b | 2006-10-24 02:29:01 +0100 | [diff] [blame] | 442 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 443 | uasm_i_andi(p, tmp, tmp, (PTRS_PER_PGD - 1)<<3); |
| 444 | uasm_i_daddu(p, ptr, ptr, tmp); /* add in pgd offset */ |
| 445 | uasm_i_dmfc0(p, tmp, C0_BADVADDR); /* get faulting address */ |
| 446 | uasm_i_ld(p, ptr, 0, ptr); /* get pmd pointer */ |
| 447 | uasm_i_dsrl(p, tmp, tmp, PMD_SHIFT-3); /* get pmd offset in bytes */ |
| 448 | uasm_i_andi(p, tmp, tmp, (PTRS_PER_PMD - 1)<<3); |
| 449 | uasm_i_daddu(p, ptr, ptr, tmp); /* add in pmd offset */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 450 | } |
| 451 | |
| 452 | /* |
| 453 | * BVADDR is the faulting address, PTR is scratch. |
| 454 | * PTR will hold the pgd for vmalloc. |
| 455 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 456 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 457 | build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | unsigned int bvaddr, unsigned int ptr) |
| 459 | { |
| 460 | long swpd = (long)swapper_pg_dir; |
| 461 | |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 462 | #ifdef MODULE_START |
| 463 | long modd = (long)module_pg_dir; |
| 464 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 465 | uasm_l_module_alloc(l, *p); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 466 | /* |
| 467 | * Assumption: |
| 468 | * VMALLOC_START >= 0xc000000000000000UL |
| 469 | * MODULE_START >= 0xe000000000000000UL |
| 470 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 471 | UASM_i_SLL(p, ptr, bvaddr, 2); |
| 472 | uasm_il_bgez(p, r, ptr, label_vmalloc); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 473 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 474 | if (uasm_in_compat_space_p(MODULE_START) && |
| 475 | !uasm_rel_lo(MODULE_START)) { |
| 476 | uasm_i_lui(p, ptr, uasm_rel_hi(MODULE_START)); /* delay slot */ |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 477 | } else { |
| 478 | /* unlikely configuration */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 479 | uasm_i_nop(p); /* delay slot */ |
| 480 | UASM_i_LA(p, ptr, MODULE_START); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 481 | } |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 482 | uasm_i_dsubu(p, bvaddr, bvaddr, ptr); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 483 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 484 | if (uasm_in_compat_space_p(modd) && !uasm_rel_lo(modd)) { |
| 485 | uasm_il_b(p, r, label_vmalloc_done); |
| 486 | uasm_i_lui(p, ptr, uasm_rel_hi(modd)); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 487 | } else { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 488 | UASM_i_LA_mostly(p, ptr, modd); |
| 489 | uasm_il_b(p, r, label_vmalloc_done); |
| 490 | if (uasm_in_compat_space_p(modd)) |
| 491 | uasm_i_addiu(p, ptr, ptr, uasm_rel_lo(modd)); |
Maciej W. Rozycki | 619b6e1 | 2007-10-23 12:43:25 +0100 | [diff] [blame] | 492 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 493 | uasm_i_daddiu(p, ptr, ptr, uasm_rel_lo(modd)); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 494 | } |
| 495 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 496 | uasm_l_vmalloc(l, *p); |
| 497 | if (uasm_in_compat_space_p(MODULE_START) && |
| 498 | !uasm_rel_lo(MODULE_START) && |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 499 | MODULE_START << 32 == VMALLOC_START) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 500 | uasm_i_dsll32(p, ptr, ptr, 0); /* typical case */ |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 501 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 502 | UASM_i_LA(p, ptr, VMALLOC_START); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 503 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 504 | uasm_l_vmalloc(l, *p); |
| 505 | UASM_i_LA(p, ptr, VMALLOC_START); |
Atsushi Nemoto | 656be92 | 2006-10-26 00:08:31 +0900 | [diff] [blame] | 506 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 507 | uasm_i_dsubu(p, bvaddr, bvaddr, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 508 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 509 | if (uasm_in_compat_space_p(swpd) && !uasm_rel_lo(swpd)) { |
| 510 | uasm_il_b(p, r, label_vmalloc_done); |
| 511 | uasm_i_lui(p, ptr, uasm_rel_hi(swpd)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 512 | } else { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 513 | UASM_i_LA_mostly(p, ptr, swpd); |
| 514 | uasm_il_b(p, r, label_vmalloc_done); |
| 515 | if (uasm_in_compat_space_p(swpd)) |
| 516 | uasm_i_addiu(p, ptr, ptr, uasm_rel_lo(swpd)); |
Maciej W. Rozycki | 619b6e1 | 2007-10-23 12:43:25 +0100 | [diff] [blame] | 517 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 518 | uasm_i_daddiu(p, ptr, ptr, uasm_rel_lo(swpd)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | } |
| 520 | } |
| 521 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 522 | #else /* !CONFIG_64BIT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | |
| 524 | /* |
| 525 | * TMP and PTR are scratch. |
| 526 | * TMP will be clobbered, PTR will hold the pgd entry. |
| 527 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 528 | static void __cpuinit __maybe_unused |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr) |
| 530 | { |
| 531 | long pgdc = (long)pgd_current; |
| 532 | |
| 533 | /* 32 bit SMP has smp_processor_id() stored in CONTEXT. */ |
| 534 | #ifdef CONFIG_SMP |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 535 | #ifdef CONFIG_MIPS_MT_SMTC |
| 536 | /* |
| 537 | * SMTC uses TCBind value as "CPU" index |
| 538 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 539 | uasm_i_mfc0(p, ptr, C0_TCBIND); |
| 540 | UASM_i_LA_mostly(p, tmp, pgdc); |
| 541 | uasm_i_srl(p, ptr, ptr, 19); |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 542 | #else |
| 543 | /* |
| 544 | * smp_processor_id() << 3 is stored in CONTEXT. |
| 545 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 546 | uasm_i_mfc0(p, ptr, C0_CONTEXT); |
| 547 | UASM_i_LA_mostly(p, tmp, pgdc); |
| 548 | uasm_i_srl(p, ptr, ptr, 23); |
Ralf Baechle | 41c594a | 2006-04-05 09:45:45 +0100 | [diff] [blame] | 549 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 550 | uasm_i_addu(p, ptr, tmp, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 551 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 552 | UASM_i_LA_mostly(p, ptr, pgdc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 553 | #endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 554 | uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */ |
| 555 | uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr); |
| 556 | uasm_i_srl(p, tmp, tmp, PGDIR_SHIFT); /* get pgd only bits */ |
| 557 | uasm_i_sll(p, tmp, tmp, PGD_T_LOG2); |
| 558 | uasm_i_addu(p, ptr, ptr, tmp); /* add in pgd offset */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 559 | } |
| 560 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 561 | #endif /* !CONFIG_64BIT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 562 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 563 | static void __cpuinit build_adjust_context(u32 **p, unsigned int ctx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 564 | { |
Ralf Baechle | 242954b | 2006-10-24 02:29:01 +0100 | [diff] [blame] | 565 | unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 566 | unsigned int mask = (PTRS_PER_PTE / 2 - 1) << (PTE_T_LOG2 + 1); |
| 567 | |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 568 | switch (current_cpu_type()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | case CPU_VR41XX: |
| 570 | case CPU_VR4111: |
| 571 | case CPU_VR4121: |
| 572 | case CPU_VR4122: |
| 573 | case CPU_VR4131: |
| 574 | case CPU_VR4181: |
| 575 | case CPU_VR4181A: |
| 576 | case CPU_VR4133: |
| 577 | shift += 2; |
| 578 | break; |
| 579 | |
| 580 | default: |
| 581 | break; |
| 582 | } |
| 583 | |
| 584 | if (shift) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 585 | UASM_i_SRL(p, ctx, ctx, shift); |
| 586 | uasm_i_andi(p, ctx, ctx, mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 587 | } |
| 588 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 589 | static void __cpuinit build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 590 | { |
| 591 | /* |
| 592 | * Bug workaround for the Nevada. It seems as if under certain |
| 593 | * circumstances the move from cp0_context might produce a |
| 594 | * bogus result when the mfc0 instruction and its consumer are |
| 595 | * in a different cacheline or a load instruction, probably any |
| 596 | * memory reference, is between them. |
| 597 | */ |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 598 | switch (current_cpu_type()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 599 | case CPU_NEVADA: |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 600 | UASM_i_LW(p, ptr, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | GET_CONTEXT(p, tmp); /* get context reg */ |
| 602 | break; |
| 603 | |
| 604 | default: |
| 605 | GET_CONTEXT(p, tmp); /* get context reg */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 606 | UASM_i_LW(p, ptr, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | break; |
| 608 | } |
| 609 | |
| 610 | build_adjust_context(p, tmp); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 611 | UASM_i_ADDU(p, ptr, ptr, tmp); /* add in offset */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 612 | } |
| 613 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 614 | static void __cpuinit build_update_entries(u32 **p, unsigned int tmp, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | unsigned int ptep) |
| 616 | { |
| 617 | /* |
| 618 | * 64bit address support (36bit on a 32bit CPU) in a 32bit |
| 619 | * Kernel is a special case. Only a few CPUs use it. |
| 620 | */ |
| 621 | #ifdef CONFIG_64BIT_PHYS_ADDR |
| 622 | if (cpu_has_64bits) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 623 | uasm_i_ld(p, tmp, 0, ptep); /* get even pte */ |
| 624 | uasm_i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */ |
| 625 | uasm_i_dsrl(p, tmp, tmp, 6); /* convert to entrylo0 */ |
| 626 | uasm_i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */ |
| 627 | uasm_i_dsrl(p, ptep, ptep, 6); /* convert to entrylo1 */ |
| 628 | uasm_i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | } else { |
| 630 | int pte_off_even = sizeof(pte_t) / 2; |
| 631 | int pte_off_odd = pte_off_even + sizeof(pte_t); |
| 632 | |
| 633 | /* The pte entries are pre-shifted */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 634 | uasm_i_lw(p, tmp, pte_off_even, ptep); /* get even pte */ |
| 635 | uasm_i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */ |
| 636 | uasm_i_lw(p, ptep, pte_off_odd, ptep); /* get odd pte */ |
| 637 | uasm_i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | } |
| 639 | #else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 640 | UASM_i_LW(p, tmp, 0, ptep); /* get even pte */ |
| 641 | UASM_i_LW(p, ptep, sizeof(pte_t), ptep); /* get odd pte */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | if (r45k_bvahwbug()) |
| 643 | build_tlb_probe_entry(p); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 644 | UASM_i_SRL(p, tmp, tmp, 6); /* convert to entrylo0 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | if (r4k_250MHZhwbug()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 646 | uasm_i_mtc0(p, 0, C0_ENTRYLO0); |
| 647 | uasm_i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */ |
| 648 | UASM_i_SRL(p, ptep, ptep, 6); /* convert to entrylo1 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | if (r45k_bvahwbug()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 650 | uasm_i_mfc0(p, tmp, C0_INDEX); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | if (r4k_250MHZhwbug()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 652 | uasm_i_mtc0(p, 0, C0_ENTRYLO1); |
| 653 | uasm_i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | #endif |
| 655 | } |
| 656 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 657 | static void __cpuinit build_r4000_tlb_refill_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | { |
| 659 | u32 *p = tlb_handler; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 660 | struct uasm_label *l = labels; |
| 661 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | u32 *f; |
| 663 | unsigned int final_len; |
| 664 | |
| 665 | memset(tlb_handler, 0, sizeof(tlb_handler)); |
| 666 | memset(labels, 0, sizeof(labels)); |
| 667 | memset(relocs, 0, sizeof(relocs)); |
| 668 | memset(final_handler, 0, sizeof(final_handler)); |
| 669 | |
| 670 | /* |
| 671 | * create the plain linear handler |
| 672 | */ |
| 673 | if (bcm1250_m3_war()) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 674 | UASM_i_MFC0(&p, K0, C0_BADVADDR); |
| 675 | UASM_i_MFC0(&p, K1, C0_ENTRYHI); |
| 676 | uasm_i_xor(&p, K0, K0, K1); |
| 677 | UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); |
| 678 | uasm_il_bnez(&p, &r, K0, label_leave); |
| 679 | /* No need for uasm_i_nop */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | } |
| 681 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 682 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 683 | build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ |
| 684 | #else |
| 685 | build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ |
| 686 | #endif |
| 687 | |
| 688 | build_get_ptep(&p, K0, K1); |
| 689 | build_update_entries(&p, K0, K1); |
| 690 | build_tlb_write_entry(&p, &l, &r, tlb_random); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 691 | uasm_l_leave(&l, p); |
| 692 | uasm_i_eret(&p); /* return from trap */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 693 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 694 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 695 | build_get_pgd_vmalloc64(&p, &l, &r, K0, K1); |
| 696 | #endif |
| 697 | |
| 698 | /* |
| 699 | * Overflow check: For the 64bit handler, we need at least one |
| 700 | * free instruction slot for the wrap-around branch. In worst |
| 701 | * case, if the intended insertion point is a delay slot, we |
Matt LaPlante | 4b3f686 | 2006-10-03 22:21:02 +0200 | [diff] [blame] | 702 | * need three, with the second nop'ed and the third being |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | * unused. |
| 704 | */ |
Fuxin Zhang | 2a21c73 | 2007-06-06 14:52:43 +0800 | [diff] [blame] | 705 | /* Loongson2 ebase is different than r4k, we have more space */ |
| 706 | #if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 707 | if ((p - tlb_handler) > 64) |
| 708 | panic("TLB refill handler space exceeded"); |
| 709 | #else |
| 710 | if (((p - tlb_handler) > 63) |
| 711 | || (((p - tlb_handler) > 61) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 712 | && uasm_insn_has_bdelay(relocs, tlb_handler + 29))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 713 | panic("TLB refill handler space exceeded"); |
| 714 | #endif |
| 715 | |
| 716 | /* |
| 717 | * Now fold the handler in the TLB refill handler space. |
| 718 | */ |
Fuxin Zhang | 2a21c73 | 2007-06-06 14:52:43 +0800 | [diff] [blame] | 719 | #if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 720 | f = final_handler; |
| 721 | /* Simplest case, just copy the handler. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 722 | uasm_copy_handler(relocs, labels, tlb_handler, p, f); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | final_len = p - tlb_handler; |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 724 | #else /* CONFIG_64BIT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | f = final_handler + 32; |
| 726 | if ((p - tlb_handler) <= 32) { |
| 727 | /* Just copy the handler. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 728 | uasm_copy_handler(relocs, labels, tlb_handler, p, f); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 729 | final_len = p - tlb_handler; |
| 730 | } else { |
| 731 | u32 *split = tlb_handler + 30; |
| 732 | |
| 733 | /* |
| 734 | * Find the split point. |
| 735 | */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 736 | if (uasm_insn_has_bdelay(relocs, split - 1)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 737 | split--; |
| 738 | |
| 739 | /* Copy first part of the handler. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 740 | uasm_copy_handler(relocs, labels, tlb_handler, split, f); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 741 | f += split - tlb_handler; |
| 742 | |
| 743 | /* Insert branch. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 744 | uasm_l_split(&l, final_handler); |
| 745 | uasm_il_b(&f, &r, label_split); |
| 746 | if (uasm_insn_has_bdelay(relocs, split)) |
| 747 | uasm_i_nop(&f); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 748 | else { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 749 | uasm_copy_handler(relocs, labels, split, split + 1, f); |
| 750 | uasm_move_labels(labels, f, f + 1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 751 | f++; |
| 752 | split++; |
| 753 | } |
| 754 | |
| 755 | /* Copy the rest of the handler. */ |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 756 | uasm_copy_handler(relocs, labels, split, p, final_handler); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | final_len = (f - (final_handler + 32)) + (p - split); |
| 758 | } |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 759 | #endif /* CONFIG_64BIT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 761 | uasm_resolve_relocs(relocs, labels); |
| 762 | pr_debug("Wrote TLB refill handler (%u instructions).\n", |
| 763 | final_len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | |
Ralf Baechle | 91b05e6 | 2006-03-29 18:53:00 +0100 | [diff] [blame] | 765 | memcpy((void *)ebase, final_handler, 0x100); |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 766 | |
| 767 | dump_handler((u32 *)ebase, 64); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 768 | } |
| 769 | |
| 770 | /* |
| 771 | * TLB load/store/modify handlers. |
| 772 | * |
| 773 | * Only the fastpath gets synthesized at runtime, the slowpath for |
| 774 | * do_page_fault remains normal asm. |
| 775 | */ |
| 776 | extern void tlb_do_page_fault_0(void); |
| 777 | extern void tlb_do_page_fault_1(void); |
| 778 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 779 | /* |
| 780 | * 128 instructions for the fastpath handler is generous and should |
| 781 | * never be exceeded. |
| 782 | */ |
| 783 | #define FASTPATH_SIZE 128 |
| 784 | |
Franck Bui-Huu | cbdbe07 | 2007-10-18 09:11:16 +0200 | [diff] [blame] | 785 | u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned; |
| 786 | u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned; |
| 787 | u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 788 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 789 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 790 | iPTE_LW(u32 **p, struct uasm_label **l, unsigned int pte, unsigned int ptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | { |
| 792 | #ifdef CONFIG_SMP |
| 793 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 794 | if (cpu_has_64bits) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 795 | uasm_i_lld(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 796 | else |
| 797 | # endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 798 | UASM_i_LL(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | #else |
| 800 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 801 | if (cpu_has_64bits) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 802 | uasm_i_ld(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 803 | else |
| 804 | # endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 805 | UASM_i_LW(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 806 | #endif |
| 807 | } |
| 808 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 809 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 810 | iPTE_SW(u32 **p, struct uasm_reloc **r, unsigned int pte, unsigned int ptr, |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 811 | unsigned int mode) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 812 | { |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 813 | #ifdef CONFIG_64BIT_PHYS_ADDR |
| 814 | unsigned int hwmode = mode & (_PAGE_VALID | _PAGE_DIRTY); |
| 815 | #endif |
| 816 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 817 | uasm_i_ori(p, pte, pte, mode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 818 | #ifdef CONFIG_SMP |
| 819 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 820 | if (cpu_has_64bits) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 821 | uasm_i_scd(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | else |
| 823 | # endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 824 | UASM_i_SC(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 825 | |
| 826 | if (r10000_llsc_war()) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 827 | uasm_il_beqzl(p, r, pte, label_smp_pgtable_change); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 828 | else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 829 | uasm_il_beqz(p, r, pte, label_smp_pgtable_change); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 830 | |
| 831 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 832 | if (!cpu_has_64bits) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 833 | /* no uasm_i_nop needed */ |
| 834 | uasm_i_ll(p, pte, sizeof(pte_t) / 2, ptr); |
| 835 | uasm_i_ori(p, pte, pte, hwmode); |
| 836 | uasm_i_sc(p, pte, sizeof(pte_t) / 2, ptr); |
| 837 | uasm_il_beqz(p, r, pte, label_smp_pgtable_change); |
| 838 | /* no uasm_i_nop needed */ |
| 839 | uasm_i_lw(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | } else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 841 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 842 | # else |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 843 | uasm_i_nop(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 844 | # endif |
| 845 | #else |
| 846 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 847 | if (cpu_has_64bits) |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 848 | uasm_i_sd(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | else |
| 850 | # endif |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 851 | UASM_i_SW(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 852 | |
| 853 | # ifdef CONFIG_64BIT_PHYS_ADDR |
| 854 | if (!cpu_has_64bits) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 855 | uasm_i_lw(p, pte, sizeof(pte_t) / 2, ptr); |
| 856 | uasm_i_ori(p, pte, pte, hwmode); |
| 857 | uasm_i_sw(p, pte, sizeof(pte_t) / 2, ptr); |
| 858 | uasm_i_lw(p, pte, 0, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 859 | } |
| 860 | # endif |
| 861 | #endif |
| 862 | } |
| 863 | |
| 864 | /* |
| 865 | * Check if PTE is present, if not then jump to LABEL. PTR points to |
| 866 | * the page table where this PTE is located, PTE will be re-loaded |
| 867 | * with it's original value. |
| 868 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 869 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 870 | build_pte_present(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 871 | unsigned int pte, unsigned int ptr, enum label_id lid) |
| 872 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 873 | uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); |
| 874 | uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); |
| 875 | uasm_il_bnez(p, r, pte, lid); |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 876 | iPTE_LW(p, l, pte, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 877 | } |
| 878 | |
| 879 | /* Make PTE valid, store result in PTR. */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 880 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 881 | build_make_valid(u32 **p, struct uasm_reloc **r, unsigned int pte, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 882 | unsigned int ptr) |
| 883 | { |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 884 | unsigned int mode = _PAGE_VALID | _PAGE_ACCESSED; |
| 885 | |
| 886 | iPTE_SW(p, r, pte, ptr, mode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 887 | } |
| 888 | |
| 889 | /* |
| 890 | * Check if PTE can be written to, if not branch to LABEL. Regardless |
| 891 | * restore PTE with value from PTR when done. |
| 892 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 893 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 894 | build_pte_writable(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 895 | unsigned int pte, unsigned int ptr, enum label_id lid) |
| 896 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 897 | uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); |
| 898 | uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); |
| 899 | uasm_il_bnez(p, r, pte, lid); |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 900 | iPTE_LW(p, l, pte, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 901 | } |
| 902 | |
| 903 | /* Make PTE writable, update software status bits as well, then store |
| 904 | * at PTR. |
| 905 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 906 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 907 | build_make_write(u32 **p, struct uasm_reloc **r, unsigned int pte, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 908 | unsigned int ptr) |
| 909 | { |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 910 | unsigned int mode = (_PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID |
| 911 | | _PAGE_DIRTY); |
| 912 | |
| 913 | iPTE_SW(p, r, pte, ptr, mode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 914 | } |
| 915 | |
| 916 | /* |
| 917 | * Check if PTE can be modified, if not branch to LABEL. Regardless |
| 918 | * restore PTE with value from PTR when done. |
| 919 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 920 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 921 | build_pte_modifiable(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 922 | unsigned int pte, unsigned int ptr, enum label_id lid) |
| 923 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 924 | uasm_i_andi(p, pte, pte, _PAGE_WRITE); |
| 925 | uasm_il_beqz(p, r, pte, lid); |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 926 | iPTE_LW(p, l, pte, ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 927 | } |
| 928 | |
| 929 | /* |
| 930 | * R3000 style TLB load/store/modify handlers. |
| 931 | */ |
| 932 | |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 933 | /* |
| 934 | * This places the pte into ENTRYLO0 and writes it with tlbwi. |
| 935 | * Then it returns. |
| 936 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 937 | static void __cpuinit |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 938 | build_r3000_pte_reload_tlbwi(u32 **p, unsigned int pte, unsigned int tmp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 939 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 940 | uasm_i_mtc0(p, pte, C0_ENTRYLO0); /* cp0 delay */ |
| 941 | uasm_i_mfc0(p, tmp, C0_EPC); /* cp0 delay */ |
| 942 | uasm_i_tlbwi(p); |
| 943 | uasm_i_jr(p, tmp); |
| 944 | uasm_i_rfe(p); /* branch delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 945 | } |
| 946 | |
| 947 | /* |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 948 | * This places the pte into ENTRYLO0 and writes it with tlbwi |
| 949 | * or tlbwr as appropriate. This is because the index register |
| 950 | * may have the probe fail bit set as a result of a trap on a |
| 951 | * kseg2 access, i.e. without refill. Then it returns. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 952 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 953 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 954 | build_r3000_tlb_reload_write(u32 **p, struct uasm_label **l, |
| 955 | struct uasm_reloc **r, unsigned int pte, |
| 956 | unsigned int tmp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 957 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 958 | uasm_i_mfc0(p, tmp, C0_INDEX); |
| 959 | uasm_i_mtc0(p, pte, C0_ENTRYLO0); /* cp0 delay */ |
| 960 | uasm_il_bltz(p, r, tmp, label_r3000_write_probe_fail); /* cp0 delay */ |
| 961 | uasm_i_mfc0(p, tmp, C0_EPC); /* branch delay */ |
| 962 | uasm_i_tlbwi(p); /* cp0 delay */ |
| 963 | uasm_i_jr(p, tmp); |
| 964 | uasm_i_rfe(p); /* branch delay */ |
| 965 | uasm_l_r3000_write_probe_fail(l, *p); |
| 966 | uasm_i_tlbwr(p); /* cp0 delay */ |
| 967 | uasm_i_jr(p, tmp); |
| 968 | uasm_i_rfe(p); /* branch delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 969 | } |
| 970 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 971 | static void __cpuinit |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 972 | build_r3000_tlbchange_handler_head(u32 **p, unsigned int pte, |
| 973 | unsigned int ptr) |
| 974 | { |
| 975 | long pgdc = (long)pgd_current; |
| 976 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 977 | uasm_i_mfc0(p, pte, C0_BADVADDR); |
| 978 | uasm_i_lui(p, ptr, uasm_rel_hi(pgdc)); /* cp0 delay */ |
| 979 | uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr); |
| 980 | uasm_i_srl(p, pte, pte, 22); /* load delay */ |
| 981 | uasm_i_sll(p, pte, pte, 2); |
| 982 | uasm_i_addu(p, ptr, ptr, pte); |
| 983 | uasm_i_mfc0(p, pte, C0_CONTEXT); |
| 984 | uasm_i_lw(p, ptr, 0, ptr); /* cp0 delay */ |
| 985 | uasm_i_andi(p, pte, pte, 0xffc); /* load delay */ |
| 986 | uasm_i_addu(p, ptr, ptr, pte); |
| 987 | uasm_i_lw(p, pte, 0, ptr); |
| 988 | uasm_i_tlbp(p); /* load delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 989 | } |
| 990 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 991 | static void __cpuinit build_r3000_tlb_load_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 992 | { |
| 993 | u32 *p = handle_tlbl; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 994 | struct uasm_label *l = labels; |
| 995 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 996 | |
| 997 | memset(handle_tlbl, 0, sizeof(handle_tlbl)); |
| 998 | memset(labels, 0, sizeof(labels)); |
| 999 | memset(relocs, 0, sizeof(relocs)); |
| 1000 | |
| 1001 | build_r3000_tlbchange_handler_head(&p, K0, K1); |
| 1002 | build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1003 | uasm_i_nop(&p); /* load delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1004 | build_make_valid(&p, &r, K0, K1); |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 1005 | build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1006 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1007 | uasm_l_nopage_tlbl(&l, p); |
| 1008 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); |
| 1009 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1010 | |
| 1011 | if ((p - handle_tlbl) > FASTPATH_SIZE) |
| 1012 | panic("TLB load handler fastpath space exceeded"); |
| 1013 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1014 | uasm_resolve_relocs(relocs, labels); |
| 1015 | pr_debug("Wrote TLB load handler fastpath (%u instructions).\n", |
| 1016 | (unsigned int)(p - handle_tlbl)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1017 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1018 | dump_handler(handle_tlbl, ARRAY_SIZE(handle_tlbl)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1019 | } |
| 1020 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 1021 | static void __cpuinit build_r3000_tlb_store_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1022 | { |
| 1023 | u32 *p = handle_tlbs; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1024 | struct uasm_label *l = labels; |
| 1025 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1026 | |
| 1027 | memset(handle_tlbs, 0, sizeof(handle_tlbs)); |
| 1028 | memset(labels, 0, sizeof(labels)); |
| 1029 | memset(relocs, 0, sizeof(relocs)); |
| 1030 | |
| 1031 | build_r3000_tlbchange_handler_head(&p, K0, K1); |
| 1032 | build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1033 | uasm_i_nop(&p); /* load delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1034 | build_make_write(&p, &r, K0, K1); |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 1035 | build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1036 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1037 | uasm_l_nopage_tlbs(&l, p); |
| 1038 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
| 1039 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1040 | |
| 1041 | if ((p - handle_tlbs) > FASTPATH_SIZE) |
| 1042 | panic("TLB store handler fastpath space exceeded"); |
| 1043 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1044 | uasm_resolve_relocs(relocs, labels); |
| 1045 | pr_debug("Wrote TLB store handler fastpath (%u instructions).\n", |
| 1046 | (unsigned int)(p - handle_tlbs)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1047 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1048 | dump_handler(handle_tlbs, ARRAY_SIZE(handle_tlbs)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1049 | } |
| 1050 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 1051 | static void __cpuinit build_r3000_tlb_modify_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1052 | { |
| 1053 | u32 *p = handle_tlbm; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1054 | struct uasm_label *l = labels; |
| 1055 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1056 | |
| 1057 | memset(handle_tlbm, 0, sizeof(handle_tlbm)); |
| 1058 | memset(labels, 0, sizeof(labels)); |
| 1059 | memset(relocs, 0, sizeof(relocs)); |
| 1060 | |
| 1061 | build_r3000_tlbchange_handler_head(&p, K0, K1); |
| 1062 | build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1063 | uasm_i_nop(&p); /* load delay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1064 | build_make_write(&p, &r, K0, K1); |
Maciej W. Rozycki | fded2e5 | 2005-06-13 20:24:00 +0000 | [diff] [blame] | 1065 | build_r3000_pte_reload_tlbwi(&p, K0, K1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1066 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1067 | uasm_l_nopage_tlbm(&l, p); |
| 1068 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
| 1069 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1070 | |
| 1071 | if ((p - handle_tlbm) > FASTPATH_SIZE) |
| 1072 | panic("TLB modify handler fastpath space exceeded"); |
| 1073 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1074 | uasm_resolve_relocs(relocs, labels); |
| 1075 | pr_debug("Wrote TLB modify handler fastpath (%u instructions).\n", |
| 1076 | (unsigned int)(p - handle_tlbm)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1077 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1078 | dump_handler(handle_tlbm, ARRAY_SIZE(handle_tlbm)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1079 | } |
| 1080 | |
| 1081 | /* |
| 1082 | * R4000 style TLB load/store/modify handlers. |
| 1083 | */ |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 1084 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1085 | build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l, |
| 1086 | struct uasm_reloc **r, unsigned int pte, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1087 | unsigned int ptr) |
| 1088 | { |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 1089 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1090 | build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ |
| 1091 | #else |
| 1092 | build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ |
| 1093 | #endif |
| 1094 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1095 | UASM_i_MFC0(p, pte, C0_BADVADDR); |
| 1096 | UASM_i_LW(p, ptr, 0, ptr); |
| 1097 | UASM_i_SRL(p, pte, pte, PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2); |
| 1098 | uasm_i_andi(p, pte, pte, (PTRS_PER_PTE - 1) << PTE_T_LOG2); |
| 1099 | UASM_i_ADDU(p, ptr, ptr, pte); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1100 | |
| 1101 | #ifdef CONFIG_SMP |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1102 | uasm_l_smp_pgtable_change(l, *p); |
| 1103 | #endif |
Thiemo Seufer | 63b2d2f | 2005-04-28 08:52:57 +0000 | [diff] [blame] | 1104 | iPTE_LW(p, l, pte, ptr); /* get even pte */ |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 1105 | if (!m4kc_tlbp_war()) |
| 1106 | build_tlb_probe_entry(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1107 | } |
| 1108 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 1109 | static void __cpuinit |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1110 | build_r4000_tlbchange_handler_tail(u32 **p, struct uasm_label **l, |
| 1111 | struct uasm_reloc **r, unsigned int tmp, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1112 | unsigned int ptr) |
| 1113 | { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1114 | uasm_i_ori(p, ptr, ptr, sizeof(pte_t)); |
| 1115 | uasm_i_xori(p, ptr, ptr, sizeof(pte_t)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1116 | build_update_entries(p, tmp, ptr); |
| 1117 | build_tlb_write_entry(p, l, r, tlb_indexed); |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1118 | uasm_l_leave(l, *p); |
| 1119 | uasm_i_eret(p); /* return from trap */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1120 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 1121 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1122 | build_get_pgd_vmalloc64(p, l, r, tmp, ptr); |
| 1123 | #endif |
| 1124 | } |
| 1125 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 1126 | static void __cpuinit build_r4000_tlb_load_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1127 | { |
| 1128 | u32 *p = handle_tlbl; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1129 | struct uasm_label *l = labels; |
| 1130 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1131 | |
| 1132 | memset(handle_tlbl, 0, sizeof(handle_tlbl)); |
| 1133 | memset(labels, 0, sizeof(labels)); |
| 1134 | memset(relocs, 0, sizeof(relocs)); |
| 1135 | |
| 1136 | if (bcm1250_m3_war()) { |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1137 | UASM_i_MFC0(&p, K0, C0_BADVADDR); |
| 1138 | UASM_i_MFC0(&p, K1, C0_ENTRYHI); |
| 1139 | uasm_i_xor(&p, K0, K0, K1); |
| 1140 | UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); |
| 1141 | uasm_il_bnez(&p, &r, K0, label_leave); |
| 1142 | /* No need for uasm_i_nop */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1143 | } |
| 1144 | |
| 1145 | build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); |
| 1146 | build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl); |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 1147 | if (m4kc_tlbp_war()) |
| 1148 | build_tlb_probe_entry(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1149 | build_make_valid(&p, &r, K0, K1); |
| 1150 | build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); |
| 1151 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1152 | uasm_l_nopage_tlbl(&l, p); |
| 1153 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); |
| 1154 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1155 | |
| 1156 | if ((p - handle_tlbl) > FASTPATH_SIZE) |
| 1157 | panic("TLB load handler fastpath space exceeded"); |
| 1158 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1159 | uasm_resolve_relocs(relocs, labels); |
| 1160 | pr_debug("Wrote TLB load handler fastpath (%u instructions).\n", |
| 1161 | (unsigned int)(p - handle_tlbl)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1162 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1163 | dump_handler(handle_tlbl, ARRAY_SIZE(handle_tlbl)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1164 | } |
| 1165 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 1166 | static void __cpuinit build_r4000_tlb_store_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1167 | { |
| 1168 | u32 *p = handle_tlbs; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1169 | struct uasm_label *l = labels; |
| 1170 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1171 | |
| 1172 | memset(handle_tlbs, 0, sizeof(handle_tlbs)); |
| 1173 | memset(labels, 0, sizeof(labels)); |
| 1174 | memset(relocs, 0, sizeof(relocs)); |
| 1175 | |
| 1176 | build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); |
| 1177 | build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs); |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 1178 | if (m4kc_tlbp_war()) |
| 1179 | build_tlb_probe_entry(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1180 | build_make_write(&p, &r, K0, K1); |
| 1181 | build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); |
| 1182 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1183 | uasm_l_nopage_tlbs(&l, p); |
| 1184 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
| 1185 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1186 | |
| 1187 | if ((p - handle_tlbs) > FASTPATH_SIZE) |
| 1188 | panic("TLB store handler fastpath space exceeded"); |
| 1189 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1190 | uasm_resolve_relocs(relocs, labels); |
| 1191 | pr_debug("Wrote TLB store handler fastpath (%u instructions).\n", |
| 1192 | (unsigned int)(p - handle_tlbs)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1193 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1194 | dump_handler(handle_tlbs, ARRAY_SIZE(handle_tlbs)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1195 | } |
| 1196 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 1197 | static void __cpuinit build_r4000_tlb_modify_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1198 | { |
| 1199 | u32 *p = handle_tlbm; |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1200 | struct uasm_label *l = labels; |
| 1201 | struct uasm_reloc *r = relocs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1202 | |
| 1203 | memset(handle_tlbm, 0, sizeof(handle_tlbm)); |
| 1204 | memset(labels, 0, sizeof(labels)); |
| 1205 | memset(relocs, 0, sizeof(relocs)); |
| 1206 | |
| 1207 | build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); |
| 1208 | build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm); |
Maciej W. Rozycki | 8df5bea | 2006-08-23 14:26:50 +0100 | [diff] [blame] | 1209 | if (m4kc_tlbp_war()) |
| 1210 | build_tlb_probe_entry(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1211 | /* Present and writable bits set, set accessed and dirty bits. */ |
| 1212 | build_make_write(&p, &r, K0, K1); |
| 1213 | build_r4000_tlbchange_handler_tail(&p, &l, &r, K0, K1); |
| 1214 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1215 | uasm_l_nopage_tlbm(&l, p); |
| 1216 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
| 1217 | uasm_i_nop(&p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1218 | |
| 1219 | if ((p - handle_tlbm) > FASTPATH_SIZE) |
| 1220 | panic("TLB modify handler fastpath space exceeded"); |
| 1221 | |
Thiemo Seufer | e30ec45 | 2008-01-28 20:05:38 +0000 | [diff] [blame] | 1222 | uasm_resolve_relocs(relocs, labels); |
| 1223 | pr_debug("Wrote TLB modify handler fastpath (%u instructions).\n", |
| 1224 | (unsigned int)(p - handle_tlbm)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1225 | |
Franck Bui-Huu | 92b1e6a | 2007-10-18 09:11:17 +0200 | [diff] [blame] | 1226 | dump_handler(handle_tlbm, ARRAY_SIZE(handle_tlbm)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1227 | } |
| 1228 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 1229 | void __cpuinit build_tlb_refill_handler(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1230 | { |
| 1231 | /* |
| 1232 | * The refill handler is generated per-CPU, multi-node systems |
| 1233 | * may have local storage for it. The other handlers are only |
| 1234 | * needed once. |
| 1235 | */ |
| 1236 | static int run_once = 0; |
| 1237 | |
Ralf Baechle | 10cc352 | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 1238 | switch (current_cpu_type()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1239 | case CPU_R2000: |
| 1240 | case CPU_R3000: |
| 1241 | case CPU_R3000A: |
| 1242 | case CPU_R3081E: |
| 1243 | case CPU_TX3912: |
| 1244 | case CPU_TX3922: |
| 1245 | case CPU_TX3927: |
| 1246 | build_r3000_tlb_refill_handler(); |
| 1247 | if (!run_once) { |
| 1248 | build_r3000_tlb_load_handler(); |
| 1249 | build_r3000_tlb_store_handler(); |
| 1250 | build_r3000_tlb_modify_handler(); |
| 1251 | run_once++; |
| 1252 | } |
| 1253 | break; |
| 1254 | |
| 1255 | case CPU_R6000: |
| 1256 | case CPU_R6000A: |
| 1257 | panic("No R6000 TLB refill handler yet"); |
| 1258 | break; |
| 1259 | |
| 1260 | case CPU_R8000: |
| 1261 | panic("No R8000 TLB refill handler yet"); |
| 1262 | break; |
| 1263 | |
| 1264 | default: |
| 1265 | build_r4000_tlb_refill_handler(); |
| 1266 | if (!run_once) { |
| 1267 | build_r4000_tlb_load_handler(); |
| 1268 | build_r4000_tlb_store_handler(); |
| 1269 | build_r4000_tlb_modify_handler(); |
| 1270 | run_once++; |
| 1271 | } |
| 1272 | } |
| 1273 | } |
Ralf Baechle | 1d40cfc | 2005-07-15 15:23:23 +0000 | [diff] [blame] | 1274 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 1275 | void __cpuinit flush_tlb_handlers(void) |
Ralf Baechle | 1d40cfc | 2005-07-15 15:23:23 +0000 | [diff] [blame] | 1276 | { |
Thomas Bogendoerfer | e0cee3e | 2008-08-04 20:53:57 +0200 | [diff] [blame] | 1277 | local_flush_icache_range((unsigned long)handle_tlbl, |
Ralf Baechle | 1d40cfc | 2005-07-15 15:23:23 +0000 | [diff] [blame] | 1278 | (unsigned long)handle_tlbl + sizeof(handle_tlbl)); |
Thomas Bogendoerfer | e0cee3e | 2008-08-04 20:53:57 +0200 | [diff] [blame] | 1279 | local_flush_icache_range((unsigned long)handle_tlbs, |
Ralf Baechle | 1d40cfc | 2005-07-15 15:23:23 +0000 | [diff] [blame] | 1280 | (unsigned long)handle_tlbs + sizeof(handle_tlbs)); |
Thomas Bogendoerfer | e0cee3e | 2008-08-04 20:53:57 +0200 | [diff] [blame] | 1281 | local_flush_icache_range((unsigned long)handle_tlbm, |
Ralf Baechle | 1d40cfc | 2005-07-15 15:23:23 +0000 | [diff] [blame] | 1282 | (unsigned long)handle_tlbm + sizeof(handle_tlbm)); |
| 1283 | } |