blob: b2ab2f5d3cb9da50fa902365efe6146a7f59ed88 [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_crtc.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
Andy Grossb9ed9f02012-10-16 00:17:40 -050022#include <drm/drm_mode.h>
Rob Clarkcd5351f2011-11-12 12:09:40 -060023#include "drm_crtc.h"
24#include "drm_crtc_helper.h"
25
26#define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
27
28struct omap_crtc {
29 struct drm_crtc base;
Rob Clarkbb5c2d92012-01-16 12:51:16 -060030 struct drm_plane *plane;
Rob Clarkf5f94542012-12-04 13:59:12 -060031
Rob Clarkbb5c2d92012-01-16 12:51:16 -060032 const char *name;
Rob Clarkf5f94542012-12-04 13:59:12 -060033 int pipe;
34 enum omap_channel channel;
35 struct omap_overlay_manager_info info;
36
37 /*
38 * Temporary: eventually this will go away, but it is needed
39 * for now to keep the output's happy. (They only need
40 * mgr->id.) Eventually this will be replaced w/ something
41 * more common-panel-framework-y
42 */
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +030043 struct omap_overlay_manager *mgr;
Rob Clarkf5f94542012-12-04 13:59:12 -060044
45 struct omap_video_timings timings;
46 bool enabled;
47 bool full_update;
48
49 struct omap_drm_apply apply;
50
51 struct omap_drm_irq apply_irq;
52 struct omap_drm_irq error_irq;
53
54 /* list of in-progress apply's: */
55 struct list_head pending_applies;
56
57 /* list of queued apply's: */
58 struct list_head queued_applies;
59
60 /* for handling queued and in-progress applies: */
61 struct work_struct apply_work;
Rob Clarkcd5351f2011-11-12 12:09:40 -060062
Rob Clarkbb5c2d92012-01-16 12:51:16 -060063 /* if there is a pending flip, these will be non-null: */
Rob Clarkcd5351f2011-11-12 12:09:40 -060064 struct drm_pending_vblank_event *event;
Rob Clarkbb5c2d92012-01-16 12:51:16 -060065 struct drm_framebuffer *old_fb;
Rob Clarkf5f94542012-12-04 13:59:12 -060066
67 /* for handling page flips without caring about what
68 * the callback is called from. Possibly we should just
69 * make omap_gem always call the cb from the worker so
70 * we don't have to care about this..
71 *
72 * XXX maybe fold into apply_work??
73 */
74 struct work_struct page_flip_work;
Rob Clarkcd5351f2011-11-12 12:09:40 -060075};
76
Archit Taneja0d8f3712013-03-26 19:15:19 +053077uint32_t pipe2vbl(struct drm_crtc *crtc)
78{
79 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
80
81 return dispc_mgr_get_vsync_irq(omap_crtc->channel);
82}
83
Rob Clarkf5f94542012-12-04 13:59:12 -060084/*
85 * Manager-ops, callbacks from output when they need to configure
86 * the upstream part of the video pipe.
87 *
88 * Most of these we can ignore until we add support for command-mode
89 * panels.. for video-mode the crtc-helpers already do an adequate
90 * job of sequencing the setup of the video pipe in the proper order
91 */
92
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +030093/* ovl-mgr-id -> crtc */
94static struct omap_crtc *omap_crtcs[8];
95
Rob Clarkf5f94542012-12-04 13:59:12 -060096/* we can probably ignore these until we support command-mode panels: */
Tomi Valkeinena7e71e72013-05-08 16:23:32 +030097static int omap_crtc_connect(struct omap_overlay_manager *mgr,
98 struct omap_dss_output *dst)
99{
100 if (mgr->output)
101 return -EINVAL;
102
103 if ((mgr->supported_outputs & dst->id) == 0)
104 return -EINVAL;
105
106 dst->manager = mgr;
107 mgr->output = dst;
108
109 return 0;
110}
111
112static void omap_crtc_disconnect(struct omap_overlay_manager *mgr,
113 struct omap_dss_output *dst)
114{
115 mgr->output->manager = NULL;
116 mgr->output = NULL;
117}
118
Rob Clarkf5f94542012-12-04 13:59:12 -0600119static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
120{
121}
122
123static int omap_crtc_enable(struct omap_overlay_manager *mgr)
124{
125 return 0;
126}
127
128static void omap_crtc_disable(struct omap_overlay_manager *mgr)
129{
130}
131
132static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
133 const struct omap_video_timings *timings)
134{
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300135 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
Rob Clarkf5f94542012-12-04 13:59:12 -0600136 DBG("%s", omap_crtc->name);
137 omap_crtc->timings = *timings;
138 omap_crtc->full_update = true;
139}
140
141static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
142 const struct dss_lcd_mgr_config *config)
143{
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300144 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
Rob Clarkf5f94542012-12-04 13:59:12 -0600145 DBG("%s", omap_crtc->name);
146 dispc_mgr_set_lcd_config(omap_crtc->channel, config);
147}
148
149static int omap_crtc_register_framedone_handler(
150 struct omap_overlay_manager *mgr,
151 void (*handler)(void *), void *data)
152{
153 return 0;
154}
155
156static void omap_crtc_unregister_framedone_handler(
157 struct omap_overlay_manager *mgr,
158 void (*handler)(void *), void *data)
159{
160}
161
162static const struct dss_mgr_ops mgr_ops = {
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300163 .connect = omap_crtc_connect,
164 .disconnect = omap_crtc_disconnect,
Rob Clarkf5f94542012-12-04 13:59:12 -0600165 .start_update = omap_crtc_start_update,
166 .enable = omap_crtc_enable,
167 .disable = omap_crtc_disable,
168 .set_timings = omap_crtc_set_timings,
169 .set_lcd_config = omap_crtc_set_lcd_config,
170 .register_framedone_handler = omap_crtc_register_framedone_handler,
171 .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
172};
173
174/*
175 * CRTC funcs:
176 */
177
Rob Clarkcd5351f2011-11-12 12:09:40 -0600178static void omap_crtc_destroy(struct drm_crtc *crtc)
179{
180 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600181
182 DBG("%s", omap_crtc->name);
183
184 WARN_ON(omap_crtc->apply_irq.registered);
185 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
186
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600187 omap_crtc->plane->funcs->destroy(omap_crtc->plane);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600188 drm_crtc_cleanup(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600189
Rob Clarkcd5351f2011-11-12 12:09:40 -0600190 kfree(omap_crtc);
191}
192
193static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
194{
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600195 struct omap_drm_private *priv = crtc->dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600196 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600197 bool enabled = (mode == DRM_MODE_DPMS_ON);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600198 int i;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600199
Rob Clarkf5f94542012-12-04 13:59:12 -0600200 DBG("%s: %d", omap_crtc->name, mode);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600201
Rob Clarkf5f94542012-12-04 13:59:12 -0600202 if (enabled != omap_crtc->enabled) {
203 omap_crtc->enabled = enabled;
204 omap_crtc->full_update = true;
205 omap_crtc_apply(crtc, &omap_crtc->apply);
206
207 /* also enable our private plane: */
208 WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
209
210 /* and any attached overlay planes: */
211 for (i = 0; i < priv->num_planes; i++) {
212 struct drm_plane *plane = priv->planes[i];
213 if (plane->crtc == crtc)
214 WARN_ON(omap_plane_dpms(plane, mode));
215 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600216 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600217}
218
219static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200220 const struct drm_display_mode *mode,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600221 struct drm_display_mode *adjusted_mode)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600222{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600223 return true;
224}
225
226static int omap_crtc_mode_set(struct drm_crtc *crtc,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600227 struct drm_display_mode *mode,
228 struct drm_display_mode *adjusted_mode,
229 int x, int y,
230 struct drm_framebuffer *old_fb)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600231{
232 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
233
Rob Clarkf5f94542012-12-04 13:59:12 -0600234 mode = adjusted_mode;
235
236 DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
237 omap_crtc->name, mode->base.id, mode->name,
238 mode->vrefresh, mode->clock,
239 mode->hdisplay, mode->hsync_start,
240 mode->hsync_end, mode->htotal,
241 mode->vdisplay, mode->vsync_start,
242 mode->vsync_end, mode->vtotal,
243 mode->type, mode->flags);
244
245 copy_timings_drm_to_omap(&omap_crtc->timings, mode);
246 omap_crtc->full_update = true;
247
248 return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600249 0, 0, mode->hdisplay, mode->vdisplay,
250 x << 16, y << 16,
Rob Clarkf5f94542012-12-04 13:59:12 -0600251 mode->hdisplay << 16, mode->vdisplay << 16,
252 NULL, NULL);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600253}
254
255static void omap_crtc_prepare(struct drm_crtc *crtc)
256{
257 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600258 DBG("%s", omap_crtc->name);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600259 omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
260}
261
262static void omap_crtc_commit(struct drm_crtc *crtc)
263{
264 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600265 DBG("%s", omap_crtc->name);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600266 omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
267}
268
269static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600270 struct drm_framebuffer *old_fb)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600271{
272 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600273 struct drm_plane *plane = omap_crtc->plane;
274 struct drm_display_mode *mode = &crtc->mode;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600275
Rob Clarkf5f94542012-12-04 13:59:12 -0600276 return omap_plane_mode_set(plane, crtc, crtc->fb,
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600277 0, 0, mode->hdisplay, mode->vdisplay,
278 x << 16, y << 16,
Rob Clarkf5f94542012-12-04 13:59:12 -0600279 mode->hdisplay << 16, mode->vdisplay << 16,
280 NULL, NULL);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600281}
282
283static void omap_crtc_load_lut(struct drm_crtc *crtc)
284{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600285}
286
Rob Clark72d0c332012-03-11 21:11:21 -0500287static void vblank_cb(void *arg)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600288{
289 struct drm_crtc *crtc = arg;
290 struct drm_device *dev = crtc->dev;
291 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600292 unsigned long flags;
293
Rob Clarkf5f94542012-12-04 13:59:12 -0600294 spin_lock_irqsave(&dev->event_lock, flags);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600295
296 /* wakeup userspace */
Rob Clarkf5f94542012-12-04 13:59:12 -0600297 if (omap_crtc->event)
298 drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
Rob Clark7411f9c2012-03-11 21:11:22 -0500299
Rob Clarkf5f94542012-12-04 13:59:12 -0600300 omap_crtc->event = NULL;
301 omap_crtc->old_fb = NULL;
302
303 spin_unlock_irqrestore(&dev->event_lock, flags);
304}
305
306static void page_flip_worker(struct work_struct *work)
307{
308 struct omap_crtc *omap_crtc =
309 container_of(work, struct omap_crtc, page_flip_work);
310 struct drm_crtc *crtc = &omap_crtc->base;
Rob Clarkf5f94542012-12-04 13:59:12 -0600311 struct drm_display_mode *mode = &crtc->mode;
312 struct drm_gem_object *bo;
313
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100314 mutex_lock(&crtc->mutex);
Rob Clarkf5f94542012-12-04 13:59:12 -0600315 omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
316 0, 0, mode->hdisplay, mode->vdisplay,
317 crtc->x << 16, crtc->y << 16,
318 mode->hdisplay << 16, mode->vdisplay << 16,
319 vblank_cb, crtc);
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100320 mutex_unlock(&crtc->mutex);
Rob Clarkf5f94542012-12-04 13:59:12 -0600321
322 bo = omap_framebuffer_bo(crtc->fb, 0);
323 drm_gem_object_unreference_unlocked(bo);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600324}
325
Rob Clark72d0c332012-03-11 21:11:21 -0500326static void page_flip_cb(void *arg)
327{
328 struct drm_crtc *crtc = arg;
329 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600330 struct omap_drm_private *priv = crtc->dev->dev_private;
Rob Clark72d0c332012-03-11 21:11:21 -0500331
Rob Clarkf5f94542012-12-04 13:59:12 -0600332 /* avoid assumptions about what ctxt we are called from: */
333 queue_work(priv->wq, &omap_crtc->page_flip_work);
Rob Clark72d0c332012-03-11 21:11:21 -0500334}
335
Rob Clarkcd5351f2011-11-12 12:09:40 -0600336static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
337 struct drm_framebuffer *fb,
338 struct drm_pending_vblank_event *event)
339{
340 struct drm_device *dev = crtc->dev;
341 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clark119c0812012-09-04 17:46:22 -0500342 struct drm_gem_object *bo;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600343
Rob Clarkf5f94542012-12-04 13:59:12 -0600344 DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1,
345 fb->base.id, event);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600346
Rob Clarkf5f94542012-12-04 13:59:12 -0600347 if (omap_crtc->old_fb) {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600348 dev_err(dev->dev, "already a pending flip\n");
349 return -EINVAL;
350 }
351
Rob Clarkcd5351f2011-11-12 12:09:40 -0600352 omap_crtc->event = event;
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600353 crtc->fb = fb;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600354
Rob Clark119c0812012-09-04 17:46:22 -0500355 /*
356 * Hold a reference temporarily until the crtc is updated
357 * and takes the reference to the bo. This avoids it
358 * getting freed from under us:
359 */
360 bo = omap_framebuffer_bo(fb, 0);
361 drm_gem_object_reference(bo);
362
363 omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600364
365 return 0;
366}
367
Rob Clark3c810c62012-08-15 15:18:01 -0500368static int omap_crtc_set_property(struct drm_crtc *crtc,
369 struct drm_property *property, uint64_t val)
370{
371 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clark1e0fdfc2012-09-04 11:36:20 -0500372 struct omap_drm_private *priv = crtc->dev->dev_private;
373
374 if (property == priv->rotation_prop) {
375 crtc->invert_dimensions =
376 !!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
377 }
378
Rob Clark3c810c62012-08-15 15:18:01 -0500379 return omap_plane_set_property(omap_crtc->plane, property, val);
380}
381
Rob Clarkcd5351f2011-11-12 12:09:40 -0600382static const struct drm_crtc_funcs omap_crtc_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600383 .set_config = drm_crtc_helper_set_config,
384 .destroy = omap_crtc_destroy,
385 .page_flip = omap_crtc_page_flip_locked,
Rob Clark3c810c62012-08-15 15:18:01 -0500386 .set_property = omap_crtc_set_property,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600387};
388
389static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
390 .dpms = omap_crtc_dpms,
391 .mode_fixup = omap_crtc_mode_fixup,
392 .mode_set = omap_crtc_mode_set,
393 .prepare = omap_crtc_prepare,
394 .commit = omap_crtc_commit,
395 .mode_set_base = omap_crtc_mode_set_base,
396 .load_lut = omap_crtc_load_lut,
397};
398
Rob Clarkf5f94542012-12-04 13:59:12 -0600399const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
400{
401 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
402 return &omap_crtc->timings;
403}
404
405enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
406{
407 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
408 return omap_crtc->channel;
409}
410
411static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
412{
413 struct omap_crtc *omap_crtc =
414 container_of(irq, struct omap_crtc, error_irq);
415 struct drm_crtc *crtc = &omap_crtc->base;
416 DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
417 /* avoid getting in a flood, unregister the irq until next vblank */
418 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
419}
420
421static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
422{
423 struct omap_crtc *omap_crtc =
424 container_of(irq, struct omap_crtc, apply_irq);
425 struct drm_crtc *crtc = &omap_crtc->base;
426
427 if (!omap_crtc->error_irq.registered)
428 omap_irq_register(crtc->dev, &omap_crtc->error_irq);
429
430 if (!dispc_mgr_go_busy(omap_crtc->channel)) {
431 struct omap_drm_private *priv =
432 crtc->dev->dev_private;
433 DBG("%s: apply done", omap_crtc->name);
434 omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
435 queue_work(priv->wq, &omap_crtc->apply_work);
436 }
437}
438
439static void apply_worker(struct work_struct *work)
440{
441 struct omap_crtc *omap_crtc =
442 container_of(work, struct omap_crtc, apply_work);
443 struct drm_crtc *crtc = &omap_crtc->base;
444 struct drm_device *dev = crtc->dev;
445 struct omap_drm_apply *apply, *n;
446 bool need_apply;
447
448 /*
449 * Synchronize everything on mode_config.mutex, to keep
450 * the callbacks and list modification all serialized
451 * with respect to modesetting ioctls from userspace.
452 */
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100453 mutex_lock(&crtc->mutex);
Rob Clarkf5f94542012-12-04 13:59:12 -0600454 dispc_runtime_get();
455
456 /*
457 * If we are still pending a previous update, wait.. when the
458 * pending update completes, we get kicked again.
459 */
460 if (omap_crtc->apply_irq.registered)
461 goto out;
462
463 /* finish up previous apply's: */
464 list_for_each_entry_safe(apply, n,
465 &omap_crtc->pending_applies, pending_node) {
466 apply->post_apply(apply);
467 list_del(&apply->pending_node);
468 }
469
470 need_apply = !list_empty(&omap_crtc->queued_applies);
471
472 /* then handle the next round of of queued apply's: */
473 list_for_each_entry_safe(apply, n,
474 &omap_crtc->queued_applies, queued_node) {
475 apply->pre_apply(apply);
476 list_del(&apply->queued_node);
477 apply->queued = false;
478 list_add_tail(&apply->pending_node,
479 &omap_crtc->pending_applies);
480 }
481
482 if (need_apply) {
483 enum omap_channel channel = omap_crtc->channel;
484
485 DBG("%s: GO", omap_crtc->name);
486
487 if (dispc_mgr_is_enabled(channel)) {
488 omap_irq_register(dev, &omap_crtc->apply_irq);
489 dispc_mgr_go(channel);
490 } else {
491 struct omap_drm_private *priv = dev->dev_private;
492 queue_work(priv->wq, &omap_crtc->apply_work);
493 }
494 }
495
496out:
497 dispc_runtime_put();
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100498 mutex_unlock(&crtc->mutex);
Rob Clarkf5f94542012-12-04 13:59:12 -0600499}
500
501int omap_crtc_apply(struct drm_crtc *crtc,
502 struct omap_drm_apply *apply)
503{
504 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600505
Daniel Vetter16ef3df2013-01-24 17:20:33 +0100506 WARN_ON(!mutex_is_locked(&crtc->mutex));
Rob Clarkf5f94542012-12-04 13:59:12 -0600507
508 /* no need to queue it again if it is already queued: */
509 if (apply->queued)
510 return 0;
511
512 apply->queued = true;
513 list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
514
515 /*
516 * If there are no currently pending updates, then go ahead and
517 * kick the worker immediately, otherwise it will run again when
518 * the current update finishes.
519 */
520 if (list_empty(&omap_crtc->pending_applies)) {
521 struct omap_drm_private *priv = crtc->dev->dev_private;
522 queue_work(priv->wq, &omap_crtc->apply_work);
523 }
524
525 return 0;
526}
527
528/* called only from apply */
529static void set_enabled(struct drm_crtc *crtc, bool enable)
530{
531 struct drm_device *dev = crtc->dev;
532 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
533 enum omap_channel channel = omap_crtc->channel;
534 struct omap_irq_wait *wait = NULL;
535
536 if (dispc_mgr_is_enabled(channel) == enable)
537 return;
538
539 /* ignore sync-lost irqs during enable/disable */
540 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
541
542 if (dispc_mgr_get_framedone_irq(channel)) {
543 if (!enable) {
544 wait = omap_irq_wait_init(dev,
545 dispc_mgr_get_framedone_irq(channel), 1);
546 }
547 } else {
548 /*
549 * When we disable digit output, we need to wait until fields
550 * are done. Otherwise the DSS is still working, and turning
551 * off the clocks prevents DSS from going to OFF mode. And when
552 * enabling, we need to wait for the extra sync losts
553 */
554 wait = omap_irq_wait_init(dev,
555 dispc_mgr_get_vsync_irq(channel), 2);
556 }
557
558 dispc_mgr_enable(channel, enable);
559
560 if (wait) {
561 int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
562 if (ret) {
563 dev_err(dev->dev, "%s: timeout waiting for %s\n",
564 omap_crtc->name, enable ? "enable" : "disable");
565 }
566 }
567
568 omap_irq_register(crtc->dev, &omap_crtc->error_irq);
569}
570
571static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
572{
573 struct omap_crtc *omap_crtc =
574 container_of(apply, struct omap_crtc, apply);
575 struct drm_crtc *crtc = &omap_crtc->base;
576 struct drm_encoder *encoder = NULL;
577
578 DBG("%s: enabled=%d, full=%d", omap_crtc->name,
579 omap_crtc->enabled, omap_crtc->full_update);
580
581 if (omap_crtc->full_update) {
582 struct omap_drm_private *priv = crtc->dev->dev_private;
583 int i;
584 for (i = 0; i < priv->num_encoders; i++) {
585 if (priv->encoders[i]->crtc == crtc) {
586 encoder = priv->encoders[i];
587 break;
588 }
589 }
590 }
591
592 if (!omap_crtc->enabled) {
593 set_enabled(&omap_crtc->base, false);
594 if (encoder)
595 omap_encoder_set_enabled(encoder, false);
596 } else {
597 if (encoder) {
598 omap_encoder_set_enabled(encoder, false);
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300599 omap_encoder_update(encoder, omap_crtc->mgr,
Rob Clarkf5f94542012-12-04 13:59:12 -0600600 &omap_crtc->timings);
601 omap_encoder_set_enabled(encoder, true);
602 omap_crtc->full_update = false;
603 }
604
605 dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
606 dispc_mgr_set_timings(omap_crtc->channel,
607 &omap_crtc->timings);
608 set_enabled(&omap_crtc->base, true);
609 }
610
611 omap_crtc->full_update = false;
612}
613
614static void omap_crtc_post_apply(struct omap_drm_apply *apply)
615{
616 /* nothing needed for post-apply */
617}
618
619static const char *channel_names[] = {
620 [OMAP_DSS_CHANNEL_LCD] = "lcd",
621 [OMAP_DSS_CHANNEL_DIGIT] = "tv",
622 [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
623};
624
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300625void omap_crtc_pre_init(void)
626{
627 dss_install_mgr_ops(&mgr_ops);
628}
629
Rob Clarkcd5351f2011-11-12 12:09:40 -0600630/* initialize crtc */
631struct drm_crtc *omap_crtc_init(struct drm_device *dev,
Rob Clarkf5f94542012-12-04 13:59:12 -0600632 struct drm_plane *plane, enum omap_channel channel, int id)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600633{
634 struct drm_crtc *crtc = NULL;
Rob Clarkf5f94542012-12-04 13:59:12 -0600635 struct omap_crtc *omap_crtc;
636 struct omap_overlay_manager_info *info;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600637
Rob Clarkf5f94542012-12-04 13:59:12 -0600638 DBG("%s", channel_names[channel]);
639
640 omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
Joe Perches78110bb2013-02-11 09:41:29 -0800641 if (!omap_crtc)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600642 goto fail;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600643
Rob Clarkcd5351f2011-11-12 12:09:40 -0600644 crtc = &omap_crtc->base;
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600645
Rob Clarkf5f94542012-12-04 13:59:12 -0600646 INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
647 INIT_WORK(&omap_crtc->apply_work, apply_worker);
648
649 INIT_LIST_HEAD(&omap_crtc->pending_applies);
650 INIT_LIST_HEAD(&omap_crtc->queued_applies);
651
652 omap_crtc->apply.pre_apply = omap_crtc_pre_apply;
653 omap_crtc->apply.post_apply = omap_crtc_post_apply;
654
Archit Taneja0d8f3712013-03-26 19:15:19 +0530655 omap_crtc->channel = channel;
656 omap_crtc->plane = plane;
657 omap_crtc->plane->crtc = crtc;
658 omap_crtc->name = channel_names[channel];
659 omap_crtc->pipe = id;
660
661 omap_crtc->apply_irq.irqmask = pipe2vbl(crtc);
Rob Clarkf5f94542012-12-04 13:59:12 -0600662 omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
663
664 omap_crtc->error_irq.irqmask =
665 dispc_mgr_get_sync_lost_irq(channel);
666 omap_crtc->error_irq.irq = omap_crtc_error_irq;
667 omap_irq_register(dev, &omap_crtc->error_irq);
668
Rob Clarkf5f94542012-12-04 13:59:12 -0600669 /* temporary: */
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300670 omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
Rob Clarkf5f94542012-12-04 13:59:12 -0600671
672 /* TODO: fix hard-coded setup.. add properties! */
673 info = &omap_crtc->info;
674 info->default_color = 0x00000000;
675 info->trans_key = 0x00000000;
676 info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
677 info->trans_enabled = false;
Rob Clarkbb5c2d92012-01-16 12:51:16 -0600678
Rob Clarkcd5351f2011-11-12 12:09:40 -0600679 drm_crtc_init(dev, crtc, &omap_crtc_funcs);
680 drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
681
Rob Clark3c810c62012-08-15 15:18:01 -0500682 omap_plane_install_properties(omap_crtc->plane, &crtc->base);
683
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300684 omap_crtcs[channel] = omap_crtc;
685
Rob Clarkcd5351f2011-11-12 12:09:40 -0600686 return crtc;
687
688fail:
YAMANE Toshiakid21a9d32012-11-14 19:30:23 +0900689 if (crtc)
Rob Clark65b0bd02011-12-09 23:26:07 -0600690 omap_crtc_destroy(crtc);
YAMANE Toshiakid21a9d32012-11-14 19:30:23 +0900691
Rob Clarkcd5351f2011-11-12 12:09:40 -0600692 return NULL;
693}