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Hartley Sweetenef123792009-07-29 22:41:06 +01001/*
2 * Simple PWM driver for EP93XX
3 *
4 * (c) Copyright 2009 Matthieu Crapet <mcrapet@gmail.com>
5 * (c) Copyright 2009 H Hartley Sweeten <hsweeten@visionengravers.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * EP9307 has only one channel:
13 * - PWMOUT
14 *
15 * EP9301/02/12/15 have two channels:
16 * - PWMOUT
17 * - PWMOUT1 (alternate function for EGPIO14)
18 */
19
20#include <linux/module.h>
21#include <linux/platform_device.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090022#include <linux/slab.h>
Hartley Sweetenef123792009-07-29 22:41:06 +010023#include <linux/clk.h>
24#include <linux/err.h>
25#include <linux/io.h>
26
27#include <mach/platform.h>
28
29#define EP93XX_PWMx_TERM_COUNT 0x00
30#define EP93XX_PWMx_DUTY_CYCLE 0x04
31#define EP93XX_PWMx_ENABLE 0x08
32#define EP93XX_PWMx_INVERT 0x0C
33
34#define EP93XX_PWM_MAX_COUNT 0xFFFF
35
36struct ep93xx_pwm {
37 void __iomem *mmio_base;
38 struct clk *clk;
39 u32 duty_percent;
40};
41
Hartley Sweetenef123792009-07-29 22:41:06 +010042static inline u16 ep93xx_pwm_read_tc(struct ep93xx_pwm *pwm)
43{
H Hartley Sweetena39ca272013-05-24 16:22:30 -070044 return readl(pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
Hartley Sweetenef123792009-07-29 22:41:06 +010045}
46
47static inline void ep93xx_pwm_write_dc(struct ep93xx_pwm *pwm, u16 value)
48{
H Hartley Sweetena39ca272013-05-24 16:22:30 -070049 writel(value, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
Hartley Sweetenef123792009-07-29 22:41:06 +010050}
51
52static inline void ep93xx_pwm_enable(struct ep93xx_pwm *pwm)
53{
H Hartley Sweetena39ca272013-05-24 16:22:30 -070054 writel(0x1, pwm->mmio_base + EP93XX_PWMx_ENABLE);
Hartley Sweetenef123792009-07-29 22:41:06 +010055}
56
57static inline void ep93xx_pwm_disable(struct ep93xx_pwm *pwm)
58{
H Hartley Sweetena39ca272013-05-24 16:22:30 -070059 writel(0x0, pwm->mmio_base + EP93XX_PWMx_ENABLE);
Hartley Sweetenef123792009-07-29 22:41:06 +010060}
61
62static inline int ep93xx_pwm_is_enabled(struct ep93xx_pwm *pwm)
63{
H Hartley Sweetena39ca272013-05-24 16:22:30 -070064 return readl(pwm->mmio_base + EP93XX_PWMx_ENABLE) & 0x1;
Hartley Sweetenef123792009-07-29 22:41:06 +010065}
66
67static inline void ep93xx_pwm_invert(struct ep93xx_pwm *pwm)
68{
H Hartley Sweetena39ca272013-05-24 16:22:30 -070069 writel(0x1, pwm->mmio_base + EP93XX_PWMx_INVERT);
Hartley Sweetenef123792009-07-29 22:41:06 +010070}
71
72static inline void ep93xx_pwm_normal(struct ep93xx_pwm *pwm)
73{
H Hartley Sweetena39ca272013-05-24 16:22:30 -070074 writel(0x0, pwm->mmio_base + EP93XX_PWMx_INVERT);
Hartley Sweetenef123792009-07-29 22:41:06 +010075}
76
77static inline int ep93xx_pwm_is_inverted(struct ep93xx_pwm *pwm)
78{
H Hartley Sweetena39ca272013-05-24 16:22:30 -070079 return readl(pwm->mmio_base + EP93XX_PWMx_INVERT) & 0x1;
Hartley Sweetenef123792009-07-29 22:41:06 +010080}
81
82/*
83 * /sys/devices/platform/ep93xx-pwm.N
84 * /min_freq read-only minimum pwm output frequency
85 * /max_req read-only maximum pwm output frequency
86 * /freq read-write pwm output frequency (0 = disable output)
87 * /duty_percent read-write pwm duty cycle percent (1..99)
88 * /invert read-write invert pwm output
89 */
90
91static ssize_t ep93xx_pwm_get_min_freq(struct device *dev,
92 struct device_attribute *attr, char *buf)
93{
94 struct platform_device *pdev = to_platform_device(dev);
95 struct ep93xx_pwm *pwm = platform_get_drvdata(pdev);
96 unsigned long rate = clk_get_rate(pwm->clk);
97
98 return sprintf(buf, "%ld\n", rate / (EP93XX_PWM_MAX_COUNT + 1));
99}
100
101static ssize_t ep93xx_pwm_get_max_freq(struct device *dev,
102 struct device_attribute *attr, char *buf)
103{
104 struct platform_device *pdev = to_platform_device(dev);
105 struct ep93xx_pwm *pwm = platform_get_drvdata(pdev);
106 unsigned long rate = clk_get_rate(pwm->clk);
107
108 return sprintf(buf, "%ld\n", rate / 2);
109}
110
111static ssize_t ep93xx_pwm_get_freq(struct device *dev,
112 struct device_attribute *attr, char *buf)
113{
114 struct platform_device *pdev = to_platform_device(dev);
115 struct ep93xx_pwm *pwm = platform_get_drvdata(pdev);
116
117 if (ep93xx_pwm_is_enabled(pwm)) {
118 unsigned long rate = clk_get_rate(pwm->clk);
119 u16 term = ep93xx_pwm_read_tc(pwm);
120
121 return sprintf(buf, "%ld\n", rate / (term + 1));
122 } else {
123 return sprintf(buf, "disabled\n");
124 }
125}
126
127static ssize_t ep93xx_pwm_set_freq(struct device *dev,
128 struct device_attribute *attr, const char *buf, size_t count)
129{
130 struct platform_device *pdev = to_platform_device(dev);
131 struct ep93xx_pwm *pwm = platform_get_drvdata(pdev);
132 long val;
133 int err;
134
135 err = strict_strtol(buf, 10, &val);
136 if (err)
137 return -EINVAL;
138
139 if (val == 0) {
140 ep93xx_pwm_disable(pwm);
141 } else if (val <= (clk_get_rate(pwm->clk) / 2)) {
142 u32 term, duty;
143
144 val = (clk_get_rate(pwm->clk) / val) - 1;
145 if (val > EP93XX_PWM_MAX_COUNT)
146 val = EP93XX_PWM_MAX_COUNT;
147 if (val < 1)
148 val = 1;
149
150 term = ep93xx_pwm_read_tc(pwm);
151 duty = ((val + 1) * pwm->duty_percent / 100) - 1;
152
153 /* If pwm is running, order is important */
154 if (val > term) {
H Hartley Sweeten53e2e382013-05-24 16:23:00 -0700155 writel(val, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
Hartley Sweetenef123792009-07-29 22:41:06 +0100156 ep93xx_pwm_write_dc(pwm, duty);
157 } else {
158 ep93xx_pwm_write_dc(pwm, duty);
H Hartley Sweeten53e2e382013-05-24 16:23:00 -0700159 writel(val, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
Hartley Sweetenef123792009-07-29 22:41:06 +0100160 }
161
162 if (!ep93xx_pwm_is_enabled(pwm))
163 ep93xx_pwm_enable(pwm);
164 } else {
165 return -EINVAL;
166 }
167
168 return count;
169}
170
171static ssize_t ep93xx_pwm_get_duty_percent(struct device *dev,
172 struct device_attribute *attr, char *buf)
173{
174 struct platform_device *pdev = to_platform_device(dev);
175 struct ep93xx_pwm *pwm = platform_get_drvdata(pdev);
176
177 return sprintf(buf, "%d\n", pwm->duty_percent);
178}
179
180static ssize_t ep93xx_pwm_set_duty_percent(struct device *dev,
181 struct device_attribute *attr, const char *buf, size_t count)
182{
183 struct platform_device *pdev = to_platform_device(dev);
184 struct ep93xx_pwm *pwm = platform_get_drvdata(pdev);
185 long val;
186 int err;
187
188 err = strict_strtol(buf, 10, &val);
189 if (err)
190 return -EINVAL;
191
192 if (val > 0 && val < 100) {
193 u32 term = ep93xx_pwm_read_tc(pwm);
194 ep93xx_pwm_write_dc(pwm, ((term + 1) * val / 100) - 1);
195 pwm->duty_percent = val;
196 return count;
197 }
198
199 return -EINVAL;
200}
201
202static ssize_t ep93xx_pwm_get_invert(struct device *dev,
203 struct device_attribute *attr, char *buf)
204{
205 struct platform_device *pdev = to_platform_device(dev);
206 struct ep93xx_pwm *pwm = platform_get_drvdata(pdev);
207
208 return sprintf(buf, "%d\n", ep93xx_pwm_is_inverted(pwm));
209}
210
211static ssize_t ep93xx_pwm_set_invert(struct device *dev,
212 struct device_attribute *attr, const char *buf, size_t count)
213{
214 struct platform_device *pdev = to_platform_device(dev);
215 struct ep93xx_pwm *pwm = platform_get_drvdata(pdev);
216 long val;
217 int err;
218
219 err = strict_strtol(buf, 10, &val);
220 if (err)
221 return -EINVAL;
222
223 if (val == 0)
224 ep93xx_pwm_normal(pwm);
225 else if (val == 1)
226 ep93xx_pwm_invert(pwm);
227 else
228 return -EINVAL;
229
230 return count;
231}
232
233static DEVICE_ATTR(min_freq, S_IRUGO, ep93xx_pwm_get_min_freq, NULL);
234static DEVICE_ATTR(max_freq, S_IRUGO, ep93xx_pwm_get_max_freq, NULL);
Vasiliy Kulikovdeb187e2011-03-22 16:34:01 -0700235static DEVICE_ATTR(freq, S_IWUSR | S_IRUGO,
Hartley Sweetenef123792009-07-29 22:41:06 +0100236 ep93xx_pwm_get_freq, ep93xx_pwm_set_freq);
Vasiliy Kulikovdeb187e2011-03-22 16:34:01 -0700237static DEVICE_ATTR(duty_percent, S_IWUSR | S_IRUGO,
Hartley Sweetenef123792009-07-29 22:41:06 +0100238 ep93xx_pwm_get_duty_percent, ep93xx_pwm_set_duty_percent);
Vasiliy Kulikovdeb187e2011-03-22 16:34:01 -0700239static DEVICE_ATTR(invert, S_IWUSR | S_IRUGO,
Hartley Sweetenef123792009-07-29 22:41:06 +0100240 ep93xx_pwm_get_invert, ep93xx_pwm_set_invert);
241
242static struct attribute *ep93xx_pwm_attrs[] = {
243 &dev_attr_min_freq.attr,
244 &dev_attr_max_freq.attr,
245 &dev_attr_freq.attr,
246 &dev_attr_duty_percent.attr,
247 &dev_attr_invert.attr,
248 NULL
249};
250
251static const struct attribute_group ep93xx_pwm_sysfs_files = {
252 .attrs = ep93xx_pwm_attrs,
253};
254
255static int __init ep93xx_pwm_probe(struct platform_device *pdev)
256{
257 struct ep93xx_pwm *pwm;
258 struct resource *res;
H Hartley Sweeten6c7dd642013-05-24 16:21:01 -0700259 int ret;
Hartley Sweetenef123792009-07-29 22:41:06 +0100260
H Hartley Sweeten6c7dd642013-05-24 16:21:01 -0700261 pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
262 if (!pwm)
263 return -ENOMEM;
Hartley Sweetenef123792009-07-29 22:41:06 +0100264
H Hartley Sweeten6c7dd642013-05-24 16:21:01 -0700265 pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk");
266 if (IS_ERR(pwm->clk))
267 return PTR_ERR(pwm->clk);
Hartley Sweetenef123792009-07-29 22:41:06 +0100268
269 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
H Hartley Sweeten6c7dd642013-05-24 16:21:01 -0700270 pwm->mmio_base = devm_ioremap_resource(&pdev->dev, res);
271 if (IS_ERR(pwm->mmio_base))
272 return PTR_ERR(pwm->mmio_base);
Hartley Sweetenef123792009-07-29 22:41:06 +0100273
H Hartley Sweeten6c7dd642013-05-24 16:21:01 -0700274 ret = ep93xx_pwm_acquire_gpio(pdev);
275 if (ret)
276 return ret;
Hartley Sweetenef123792009-07-29 22:41:06 +0100277
H Hartley Sweeten6c7dd642013-05-24 16:21:01 -0700278 ret = sysfs_create_group(&pdev->dev.kobj, &ep93xx_pwm_sysfs_files);
279 if (ret) {
280 ep93xx_pwm_release_gpio(pdev);
281 return ret;
Hartley Sweetenef123792009-07-29 22:41:06 +0100282 }
283
284 pwm->duty_percent = 50;
285
Hartley Sweetenef123792009-07-29 22:41:06 +0100286 /* disable pwm at startup. Avoids zero value. */
287 ep93xx_pwm_disable(pwm);
H Hartley Sweeten53e2e382013-05-24 16:23:00 -0700288 writel(EP93XX_PWM_MAX_COUNT, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
Hartley Sweetenef123792009-07-29 22:41:06 +0100289 ep93xx_pwm_write_dc(pwm, EP93XX_PWM_MAX_COUNT / 2);
290
291 clk_enable(pwm->clk);
292
H Hartley Sweeten6c7dd642013-05-24 16:21:01 -0700293 platform_set_drvdata(pdev, pwm);
Hartley Sweetenef123792009-07-29 22:41:06 +0100294 return 0;
Hartley Sweetenef123792009-07-29 22:41:06 +0100295}
296
297static int __exit ep93xx_pwm_remove(struct platform_device *pdev)
298{
299 struct ep93xx_pwm *pwm = platform_get_drvdata(pdev);
Hartley Sweetenef123792009-07-29 22:41:06 +0100300
301 ep93xx_pwm_disable(pwm);
302 clk_disable(pwm->clk);
Hartley Sweetenef123792009-07-29 22:41:06 +0100303 sysfs_remove_group(&pdev->dev.kobj, &ep93xx_pwm_sysfs_files);
Hartley Sweetenef123792009-07-29 22:41:06 +0100304 ep93xx_pwm_release_gpio(pdev);
305
306 return 0;
307}
308
309static struct platform_driver ep93xx_pwm_driver = {
310 .driver = {
311 .name = "ep93xx-pwm",
312 .owner = THIS_MODULE,
313 },
314 .remove = __exit_p(ep93xx_pwm_remove),
315};
316
Jingoo Hanead050d2013-03-05 11:04:07 +0900317module_platform_driver_probe(ep93xx_pwm_driver, ep93xx_pwm_probe);
Hartley Sweetenef123792009-07-29 22:41:06 +0100318
319MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>, "
320 "H Hartley Sweeten <hsweeten@visionengravers.com>");
321MODULE_DESCRIPTION("EP93xx PWM driver");
322MODULE_LICENSE("GPL");
323MODULE_ALIAS("platform:ep93xx-pwm");