blob: 05f500cd9c246c0156412e028f5bef0c35acd22b [file] [log] [blame]
Chris Wilson1d8e1c72010-08-07 11:01:28 +01001/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
31#include "intel_drv.h"
32
Takashi Iwaiba3820a2011-03-10 14:02:12 +010033#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
34
Chris Wilson1d8e1c72010-08-07 11:01:28 +010035void
36intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
37 struct drm_display_mode *adjusted_mode)
38{
39 adjusted_mode->hdisplay = fixed_mode->hdisplay;
40 adjusted_mode->hsync_start = fixed_mode->hsync_start;
41 adjusted_mode->hsync_end = fixed_mode->hsync_end;
42 adjusted_mode->htotal = fixed_mode->htotal;
43
44 adjusted_mode->vdisplay = fixed_mode->vdisplay;
45 adjusted_mode->vsync_start = fixed_mode->vsync_start;
46 adjusted_mode->vsync_end = fixed_mode->vsync_end;
47 adjusted_mode->vtotal = fixed_mode->vtotal;
48
49 adjusted_mode->clock = fixed_mode->clock;
50
51 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
52}
53
54/* adjusted_mode has been preset to be the panel's fixed mode */
55void
56intel_pch_panel_fitting(struct drm_device *dev,
57 int fitting_mode,
58 struct drm_display_mode *mode,
59 struct drm_display_mode *adjusted_mode)
60{
61 struct drm_i915_private *dev_priv = dev->dev_private;
62 int x, y, width, height;
63
64 x = y = width = height = 0;
65
66 /* Native modes don't need fitting */
67 if (adjusted_mode->hdisplay == mode->hdisplay &&
68 adjusted_mode->vdisplay == mode->vdisplay)
69 goto done;
70
71 switch (fitting_mode) {
72 case DRM_MODE_SCALE_CENTER:
73 width = mode->hdisplay;
74 height = mode->vdisplay;
75 x = (adjusted_mode->hdisplay - width + 1)/2;
76 y = (adjusted_mode->vdisplay - height + 1)/2;
77 break;
78
79 case DRM_MODE_SCALE_ASPECT:
80 /* Scale but preserve the aspect ratio */
81 {
82 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
83 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
84 if (scaled_width > scaled_height) { /* pillar */
85 width = scaled_height / mode->vdisplay;
Adam Jackson302983e2011-07-13 16:32:32 -040086 if (width & 1)
87 width++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010088 x = (adjusted_mode->hdisplay - width + 1) / 2;
89 y = 0;
90 height = adjusted_mode->vdisplay;
91 } else if (scaled_width < scaled_height) { /* letter */
92 height = scaled_width / mode->hdisplay;
Adam Jackson302983e2011-07-13 16:32:32 -040093 if (height & 1)
94 height++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010095 y = (adjusted_mode->vdisplay - height + 1) / 2;
96 x = 0;
97 width = adjusted_mode->hdisplay;
98 } else {
99 x = y = 0;
100 width = adjusted_mode->hdisplay;
101 height = adjusted_mode->vdisplay;
102 }
103 }
104 break;
105
106 default:
107 case DRM_MODE_SCALE_FULLSCREEN:
108 x = y = 0;
109 width = adjusted_mode->hdisplay;
110 height = adjusted_mode->vdisplay;
111 break;
112 }
113
114done:
115 dev_priv->pch_pf_pos = (x << 16) | y;
116 dev_priv->pch_pf_size = (width << 16) | height;
117}
Chris Wilsona9573552010-08-22 13:18:16 +0100118
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100119static int is_backlight_combination_mode(struct drm_device *dev)
120{
121 struct drm_i915_private *dev_priv = dev->dev_private;
122
123 if (INTEL_INFO(dev)->gen >= 4)
124 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
125
126 if (IS_GEN2(dev))
127 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
128
129 return 0;
130}
131
Chris Wilson0b0b0532010-11-23 09:45:50 +0000132static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
133{
134 u32 val;
135
136 /* Restore the CTL value if it lost, e.g. GPU reset */
137
138 if (HAS_PCH_SPLIT(dev_priv->dev)) {
139 val = I915_READ(BLC_PWM_PCH_CTL2);
140 if (dev_priv->saveBLC_PWM_CTL2 == 0) {
141 dev_priv->saveBLC_PWM_CTL2 = val;
142 } else if (val == 0) {
143 I915_WRITE(BLC_PWM_PCH_CTL2,
144 dev_priv->saveBLC_PWM_CTL);
145 val = dev_priv->saveBLC_PWM_CTL;
146 }
147 } else {
148 val = I915_READ(BLC_PWM_CTL);
149 if (dev_priv->saveBLC_PWM_CTL == 0) {
150 dev_priv->saveBLC_PWM_CTL = val;
151 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
152 } else if (val == 0) {
153 I915_WRITE(BLC_PWM_CTL,
154 dev_priv->saveBLC_PWM_CTL);
155 I915_WRITE(BLC_PWM_CTL2,
156 dev_priv->saveBLC_PWM_CTL2);
157 val = dev_priv->saveBLC_PWM_CTL;
158 }
159 }
160
161 return val;
162}
163
Chris Wilsona9573552010-08-22 13:18:16 +0100164u32 intel_panel_get_max_backlight(struct drm_device *dev)
165{
166 struct drm_i915_private *dev_priv = dev->dev_private;
167 u32 max;
168
Chris Wilson0b0b0532010-11-23 09:45:50 +0000169 max = i915_read_blc_pwm_ctl(dev_priv);
170 if (max == 0) {
171 /* XXX add code here to query mode clock or hardware clock
172 * and program max PWM appropriately.
173 */
174 printk_once(KERN_WARNING "fixme: max PWM is zero.\n");
175 return 1;
176 }
177
Chris Wilsona9573552010-08-22 13:18:16 +0100178 if (HAS_PCH_SPLIT(dev)) {
Chris Wilson0b0b0532010-11-23 09:45:50 +0000179 max >>= 16;
Chris Wilsona9573552010-08-22 13:18:16 +0100180 } else {
Chris Wilsona9573552010-08-22 13:18:16 +0100181 if (IS_PINEVIEW(dev)) {
182 max >>= 17;
183 } else {
184 max >>= 16;
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100185 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100186 max &= ~1;
187 }
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100188
189 if (is_backlight_combination_mode(dev))
190 max *= 0xff;
Chris Wilsona9573552010-08-22 13:18:16 +0100191 }
192
Chris Wilsona9573552010-08-22 13:18:16 +0100193 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
194 return max;
195}
196
197u32 intel_panel_get_backlight(struct drm_device *dev)
198{
199 struct drm_i915_private *dev_priv = dev->dev_private;
200 u32 val;
201
202 if (HAS_PCH_SPLIT(dev)) {
203 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
204 } else {
205 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
206 if (IS_PINEVIEW(dev))
207 val >>= 1;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100208
209 if (is_backlight_combination_mode(dev)){
210 u8 lbpc;
211
212 val &= ~1;
213 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
214 val *= lbpc;
215 }
Chris Wilsona9573552010-08-22 13:18:16 +0100216 }
217
218 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
219 return val;
220}
221
222static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
223{
224 struct drm_i915_private *dev_priv = dev->dev_private;
225 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
226 I915_WRITE(BLC_PWM_CPU_CTL, val | level);
227}
228
229void intel_panel_set_backlight(struct drm_device *dev, u32 level)
230{
231 struct drm_i915_private *dev_priv = dev->dev_private;
232 u32 tmp;
233
234 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
235
236 if (HAS_PCH_SPLIT(dev))
237 return intel_pch_panel_set_backlight(dev, level);
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100238
239 if (is_backlight_combination_mode(dev)){
240 u32 max = intel_panel_get_max_backlight(dev);
241 u8 lbpc;
242
243 lbpc = level * 0xfe / max + 1;
244 level /= lbpc;
245 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
246 }
247
Chris Wilsona9573552010-08-22 13:18:16 +0100248 tmp = I915_READ(BLC_PWM_CTL);
249 if (IS_PINEVIEW(dev)) {
250 tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
251 level <<= 1;
252 } else
253 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
254 I915_WRITE(BLC_PWM_CTL, tmp | level);
255}
Chris Wilson47356eb2011-01-11 17:06:04 +0000256
257void intel_panel_disable_backlight(struct drm_device *dev)
258{
259 struct drm_i915_private *dev_priv = dev->dev_private;
260
261 if (dev_priv->backlight_enabled) {
262 dev_priv->backlight_level = intel_panel_get_backlight(dev);
263 dev_priv->backlight_enabled = false;
264 }
265
266 intel_panel_set_backlight(dev, 0);
267}
268
269void intel_panel_enable_backlight(struct drm_device *dev)
270{
271 struct drm_i915_private *dev_priv = dev->dev_private;
272
273 if (dev_priv->backlight_level == 0)
274 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
275
276 intel_panel_set_backlight(dev, dev_priv->backlight_level);
277 dev_priv->backlight_enabled = true;
278}
279
280void intel_panel_setup_backlight(struct drm_device *dev)
281{
282 struct drm_i915_private *dev_priv = dev->dev_private;
283
Indan Zupancicc8303e72011-01-12 11:59:19 +0000284 dev_priv->backlight_level = intel_panel_get_backlight(dev);
Chris Wilson47356eb2011-01-11 17:06:04 +0000285 dev_priv->backlight_enabled = dev_priv->backlight_level != 0;
286}
Chris Wilsonfe16d942011-02-12 10:29:38 +0000287
288enum drm_connector_status
289intel_panel_detect(struct drm_device *dev)
290{
Dave Airliebcd50232011-03-14 14:17:55 +1000291#if 0
Chris Wilsonfe16d942011-02-12 10:29:38 +0000292 struct drm_i915_private *dev_priv = dev->dev_private;
Dave Airliebcd50232011-03-14 14:17:55 +1000293#endif
Chris Wilsonfe16d942011-02-12 10:29:38 +0000294
Chris Wilsonfca87402011-02-17 13:44:48 +0000295 if (i915_panel_ignore_lid)
296 return i915_panel_ignore_lid > 0 ?
297 connector_status_connected :
298 connector_status_disconnected;
299
Dave Airliebcd50232011-03-14 14:17:55 +1000300 /* opregion lid state on HP 2540p is wrong at boot up,
301 * appears to be either the BIOS or Linux ACPI fault */
302#if 0
Chris Wilsonfe16d942011-02-12 10:29:38 +0000303 /* Assume that the BIOS does not lie through the OpRegion... */
304 if (dev_priv->opregion.lid_state)
305 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
306 connector_status_connected :
307 connector_status_disconnected;
Dave Airliebcd50232011-03-14 14:17:55 +1000308#endif
Chris Wilsonfe16d942011-02-12 10:29:38 +0000309
310 return connector_status_unknown;
311}