Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014 MediaTek Inc. |
| 3 | * Author: Shunli Wang <shunli.wang@mediatek.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/clk-provider.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | |
| 18 | #include "clk-mtk.h" |
| 19 | #include "clk-gate.h" |
| 20 | |
| 21 | #include <dt-bindings/clock/mt2701-clk.h> |
| 22 | |
| 23 | static const struct mtk_gate_regs vdec0_cg_regs = { |
| 24 | .set_ofs = 0x0000, |
| 25 | .clr_ofs = 0x0004, |
| 26 | .sta_ofs = 0x0000, |
| 27 | }; |
| 28 | |
| 29 | static const struct mtk_gate_regs vdec1_cg_regs = { |
| 30 | .set_ofs = 0x0008, |
| 31 | .clr_ofs = 0x000c, |
| 32 | .sta_ofs = 0x0008, |
| 33 | }; |
| 34 | |
| 35 | #define GATE_VDEC0(_id, _name, _parent, _shift) { \ |
| 36 | .id = _id, \ |
| 37 | .name = _name, \ |
| 38 | .parent_name = _parent, \ |
| 39 | .regs = &vdec0_cg_regs, \ |
| 40 | .shift = _shift, \ |
| 41 | .ops = &mtk_clk_gate_ops_setclr_inv, \ |
| 42 | } |
| 43 | |
| 44 | #define GATE_VDEC1(_id, _name, _parent, _shift) { \ |
| 45 | .id = _id, \ |
| 46 | .name = _name, \ |
| 47 | .parent_name = _parent, \ |
| 48 | .regs = &vdec1_cg_regs, \ |
| 49 | .shift = _shift, \ |
| 50 | .ops = &mtk_clk_gate_ops_setclr_inv, \ |
| 51 | } |
| 52 | |
| 53 | static const struct mtk_gate vdec_clks[] = { |
| 54 | GATE_VDEC0(CLK_VDEC_CKGEN, "vdec_cken", "vdec_sel", 0), |
| 55 | GATE_VDEC1(CLK_VDEC_LARB, "vdec_larb_cken", "mm_sel", 0), |
| 56 | }; |
| 57 | |
| 58 | static const struct of_device_id of_match_clk_mt2701_vdec[] = { |
| 59 | { .compatible = "mediatek,mt2701-vdecsys", }, |
| 60 | {} |
| 61 | }; |
| 62 | |
| 63 | static int clk_mt2701_vdec_probe(struct platform_device *pdev) |
| 64 | { |
| 65 | struct clk_onecell_data *clk_data; |
| 66 | int r; |
| 67 | struct device_node *node = pdev->dev.of_node; |
| 68 | |
| 69 | clk_data = mtk_alloc_clk_data(CLK_VDEC_NR); |
| 70 | |
| 71 | mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), |
| 72 | clk_data); |
| 73 | |
| 74 | r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
| 75 | if (r) |
| 76 | dev_err(&pdev->dev, |
| 77 | "could not register clock provider: %s: %d\n", |
| 78 | pdev->name, r); |
| 79 | |
| 80 | return r; |
| 81 | } |
| 82 | |
| 83 | static struct platform_driver clk_mt2701_vdec_drv = { |
| 84 | .probe = clk_mt2701_vdec_probe, |
| 85 | .driver = { |
| 86 | .name = "clk-mt2701-vdec", |
| 87 | .of_match_table = of_match_clk_mt2701_vdec, |
| 88 | }, |
| 89 | }; |
| 90 | |
| 91 | builtin_platform_driver(clk_mt2701_vdec_drv); |