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Sascha Hauer8c25c362009-06-04 11:32:12 +02001#ifndef __MACH_MX25_H__
2#define __MACH_MX25_H__
3
Uwe Kleine-Königc8e5db02009-11-12 21:51:55 +01004#define MX25_AIPS1_BASE_ADDR 0x43f00000
5#define MX25_AIPS1_BASE_ADDR_VIRT 0xfc000000
Sascha Hauer8c25c362009-06-04 11:32:12 +02006#define MX25_AIPS1_SIZE SZ_1M
Uwe Kleine-Königc8e5db02009-11-12 21:51:55 +01007#define MX25_AIPS2_BASE_ADDR 0x53f00000
8#define MX25_AIPS2_BASE_ADDR_VIRT 0xfc200000
Sascha Hauer8c25c362009-06-04 11:32:12 +02009#define MX25_AIPS2_SIZE SZ_1M
10#define MX25_AVIC_BASE_ADDR 0x68000000
Uwe Kleine-Königc8e5db02009-11-12 21:51:55 +010011#define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000
Sascha Hauer8c25c362009-06-04 11:32:12 +020012#define MX25_AVIC_SIZE SZ_1M
13
Uwe Kleine-Königa8ff0452010-06-16 14:55:07 +020014#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000)
15#define MX25_I2C3_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x84000)
Marc Kleine-Buddec3f6a342010-07-22 11:41:56 +020016#define MX25_CAN1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x88000)
17#define MX25_CAN2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x8c000)
Uwe Kleine-Königa8ff0452010-06-16 14:55:07 +020018#define MX25_I2C2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x98000)
Uwe Kleine-König63ddc5b2010-06-21 17:34:58 +020019#define MX25_CSPI1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xa4000)
Sascha Hauer8c25c362009-06-04 11:32:12 +020020#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000)
21
22#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
23#define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000)
24#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000)
25
26#define MX25_GPIO1_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000)
27#define MX25_GPIO2_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000)
28#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
29#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
30
Uwe Kleine-Königdf9375f2009-12-16 19:07:04 +010031#define MX25_IO_ADDRESS(x) ( \
32 IMX_IO_ADDRESS(x, MX25_AIPS1) ?: \
33 IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \
34 IMX_IO_ADDRESS(x, MX25_AVIC))
Sascha Hauer8c25c362009-06-04 11:32:12 +020035
Eric Bénard7e688f02010-07-16 15:09:06 +020036#define MX25_AIPS1_IO_ADDRESS(x) \
37 (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
38
Uwe Kleine-König66ac2f22010-01-25 17:55:16 +010039#define MX25_UART1_BASE_ADDR 0x43f90000
40#define MX25_UART2_BASE_ADDR 0x43f94000
Eric Bénard8402ed32010-06-08 11:03:00 +020041#define MX25_AUDMUX_BASE_ADDR 0x43fb0000
Uwe Kleine-König7cc3c842010-06-24 15:20:44 +020042#define MX25_UART3_BASE_ADDR 0x5000c000
43#define MX25_UART4_BASE_ADDR 0x50008000
44#define MX25_UART5_BASE_ADDR 0x5002c000
Sascha Hauer8c25c362009-06-04 11:32:12 +020045
Uwe Kleine-König63ddc5b2010-06-21 17:34:58 +020046#define MX25_CSPI3_BASE_ADDR 0x50004000
47#define MX25_CSPI2_BASE_ADDR 0x50010000
Baruch Siacha7595442009-12-21 13:44:31 +020048#define MX25_FEC_BASE_ADDR 0x50038000
Eric Bénard8402ed32010-06-08 11:03:00 +020049#define MX25_SSI2_BASE_ADDR 0x50014000
50#define MX25_SSI1_BASE_ADDR 0x50034000
Baruch Siach27f59022010-01-14 11:24:14 +020051#define MX25_NFC_BASE_ADDR 0xbb000000
Baruch Siachdcbabbc2010-01-27 15:00:48 +020052#define MX25_DRYICE_BASE_ADDR 0x53ffc000
Baruch Siach04a03e52010-02-17 12:33:24 +020053#define MX25_LCDC_BASE_ADDR 0x53fbc000
Baruch Siach49535a92010-05-26 15:12:10 +030054#define MX25_KPP_BASE_ADDR 0x43fa8000
Eric Bénard5a36c392010-06-08 11:02:55 +020055#define MX25_OTG_BASE_ADDR 0x53ff4000
Baruch Siachf7478472010-06-21 08:16:00 +030056#define MX25_CSI_BASE_ADDR 0x53ff8000
Baruch Siacha7595442009-12-21 13:44:31 +020057
Uwe Kleine-König63ddc5b2010-06-21 17:34:58 +020058#define MX25_INT_CSPI3 0
Uwe Kleine-Königa8ff0452010-06-16 14:55:07 +020059#define MX25_INT_I2C1 3
60#define MX25_INT_I2C2 4
Uwe Kleine-König7cc3c842010-06-24 15:20:44 +020061#define MX25_INT_UART4 5
Uwe Kleine-Königa8ff0452010-06-16 14:55:07 +020062#define MX25_INT_I2C3 10
Uwe Kleine-König2dcf78c2010-06-30 12:16:24 +020063#define MX25_INT_SSI2 11
64#define MX25_INT_SSI1 12
Uwe Kleine-König63ddc5b2010-06-21 17:34:58 +020065#define MX25_INT_CSPI2 13
66#define MX25_INT_CSPI1 14
Uwe Kleine-König2dcf78c2010-06-30 12:16:24 +020067#define MX25_INT_CSI 17
Uwe Kleine-König7cc3c842010-06-24 15:20:44 +020068#define MX25_INT_UART3 18
Uwe Kleine-König2dcf78c2010-06-30 12:16:24 +020069#define MX25_INT_KPP 24
Uwe Kleine-Königa8ff0452010-06-16 14:55:07 +020070#define MX25_INT_DRYICE 25
Uwe Kleine-König7cc3c842010-06-24 15:20:44 +020071#define MX25_INT_UART2 32
Uwe Kleine-Königa8ff0452010-06-16 14:55:07 +020072#define MX25_INT_NANDFC 33
73#define MX25_INT_LCDC 39
Uwe Kleine-König7cc3c842010-06-24 15:20:44 +020074#define MX25_INT_UART5 40
Marc Kleine-Buddec3f6a342010-07-22 11:41:56 +020075#define MX25_INT_CAN1 43
76#define MX25_INT_CAN2 44
Uwe Kleine-König7cc3c842010-06-24 15:20:44 +020077#define MX25_INT_UART1 45
Uwe Kleine-König63ddc5b2010-06-21 17:34:58 +020078#define MX25_INT_FEC 57
Baruch Siacha7595442009-12-21 13:44:31 +020079
Uwe Kleine-König3cdd5442010-01-08 16:02:30 +010080#endif /* ifndef __MACH_MX25_H__ */