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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Thierry Reding776dc382013-10-14 14:43:22 +020010#include <linux/host1x.h>
Thierry Redingdf06b752014-06-26 21:41:53 +020011#include <linux/iommu.h>
Thierry Reding776dc382013-10-14 14:43:22 +020012
Thierry Reding1503ca42014-11-24 17:41:23 +010013#include <drm/drm_atomic.h>
Thierry Reding07866962014-11-24 17:08:06 +010014#include <drm/drm_atomic_helper.h>
15
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000016#include "drm.h"
Arto Merilainende2ba662013-03-22 16:34:08 +020017#include "gem.h"
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000018
19#define DRIVER_NAME "tegra"
20#define DRIVER_DESC "NVIDIA Tegra graphics"
21#define DRIVER_DATE "20120330"
22#define DRIVER_MAJOR 0
23#define DRIVER_MINOR 0
24#define DRIVER_PATCHLEVEL 0
25
Thierry Reding08943e62013-09-26 16:08:18 +020026struct tegra_drm_file {
27 struct list_head contexts;
28};
29
Thierry Reding1503ca42014-11-24 17:41:23 +010030static void tegra_atomic_schedule(struct tegra_drm *tegra,
31 struct drm_atomic_state *state)
32{
33 tegra->commit.state = state;
34 schedule_work(&tegra->commit.work);
35}
36
37static void tegra_atomic_complete(struct tegra_drm *tegra,
38 struct drm_atomic_state *state)
39{
40 struct drm_device *drm = tegra->drm;
41
42 /*
43 * Everything below can be run asynchronously without the need to grab
44 * any modeset locks at all under one condition: It must be guaranteed
45 * that the asynchronous work has either been cancelled (if the driver
46 * supports it, which at least requires that the framebuffers get
47 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
48 * before the new state gets committed on the software side with
49 * drm_atomic_helper_swap_state().
50 *
51 * This scheme allows new atomic state updates to be prepared and
52 * checked in parallel to the asynchronous completion of the previous
53 * update. Which is important since compositors need to figure out the
54 * composition of the next frame right after having submitted the
55 * current layout.
56 */
57
Daniel Vetter1af434a2015-02-22 12:24:19 +010058 drm_atomic_helper_commit_modeset_disables(drm, state);
Daniel Vetter1af434a2015-02-22 12:24:19 +010059 drm_atomic_helper_commit_modeset_enables(drm, state);
Liu Ying2b58e982016-08-29 17:12:03 +080060 drm_atomic_helper_commit_planes(drm, state,
61 DRM_PLANE_COMMIT_ACTIVE_ONLY);
Thierry Reding1503ca42014-11-24 17:41:23 +010062
63 drm_atomic_helper_wait_for_vblanks(drm, state);
64
65 drm_atomic_helper_cleanup_planes(drm, state);
Chris Wilson08536952016-10-14 13:18:18 +010066 drm_atomic_state_put(state);
Thierry Reding1503ca42014-11-24 17:41:23 +010067}
68
69static void tegra_atomic_work(struct work_struct *work)
70{
71 struct tegra_drm *tegra = container_of(work, struct tegra_drm,
72 commit.work);
73
74 tegra_atomic_complete(tegra, tegra->commit.state);
75}
76
77static int tegra_atomic_commit(struct drm_device *drm,
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020078 struct drm_atomic_state *state, bool nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +010079{
80 struct tegra_drm *tegra = drm->dev_private;
81 int err;
82
83 err = drm_atomic_helper_prepare_planes(drm, state);
84 if (err)
85 return err;
86
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020087 /* serialize outstanding nonblocking commits */
Thierry Reding1503ca42014-11-24 17:41:23 +010088 mutex_lock(&tegra->commit.lock);
89 flush_work(&tegra->commit.work);
90
91 /*
92 * This is the point of no return - everything below never fails except
93 * when the hw goes bonghits. Which means we can commit the new state on
94 * the software side now.
95 */
96
Daniel Vetter5e84c262016-06-10 00:06:32 +020097 drm_atomic_helper_swap_state(state, true);
Thierry Reding1503ca42014-11-24 17:41:23 +010098
Chris Wilson08536952016-10-14 13:18:18 +010099 drm_atomic_state_get(state);
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +0200100 if (nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +0100101 tegra_atomic_schedule(tegra, state);
102 else
103 tegra_atomic_complete(tegra, state);
104
105 mutex_unlock(&tegra->commit.lock);
106 return 0;
107}
108
Thierry Redingf9914212014-11-26 13:03:57 +0100109static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
110 .fb_create = tegra_fb_create,
Archit Tanejab110ef32015-10-27 13:40:59 +0530111#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Redingf9914212014-11-26 13:03:57 +0100112 .output_poll_changed = tegra_fb_output_poll_changed,
113#endif
Thierry Reding07866962014-11-24 17:08:06 +0100114 .atomic_check = drm_atomic_helper_check,
Thierry Reding1503ca42014-11-24 17:41:23 +0100115 .atomic_commit = tegra_atomic_commit,
Thierry Redingf9914212014-11-26 13:03:57 +0100116};
117
Thierry Reding776dc382013-10-14 14:43:22 +0200118static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000119{
Thierry Reding776dc382013-10-14 14:43:22 +0200120 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Reding386a2a72013-09-24 13:22:17 +0200121 struct tegra_drm *tegra;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000122 int err;
123
Thierry Reding776dc382013-10-14 14:43:22 +0200124 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
Thierry Reding386a2a72013-09-24 13:22:17 +0200125 if (!tegra)
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200126 return -ENOMEM;
127
Thierry Redingdf06b752014-06-26 21:41:53 +0200128 if (iommu_present(&platform_bus_type)) {
Thierry Reding4553f732015-01-19 16:15:04 +0100129 struct iommu_domain_geometry *geometry;
130 u64 start, end;
131
Thierry Redingdf06b752014-06-26 21:41:53 +0200132 tegra->domain = iommu_domain_alloc(&platform_bus_type);
Dan Carpenterbf19b882014-12-04 14:00:35 +0300133 if (!tegra->domain) {
134 err = -ENOMEM;
Thierry Redingdf06b752014-06-26 21:41:53 +0200135 goto free;
136 }
137
Thierry Reding4553f732015-01-19 16:15:04 +0100138 geometry = &tegra->domain->geometry;
139 start = geometry->aperture_start;
140 end = geometry->aperture_end;
141
Thierry Redingd2d8c352015-11-23 16:46:30 +0100142 DRM_DEBUG_DRIVER("IOMMU aperture initialized (%#llx-%#llx)\n",
143 start, end);
Thierry Reding4553f732015-01-19 16:15:04 +0100144 drm_mm_init(&tegra->mm, start, end - start + 1);
Thierry Redingdf06b752014-06-26 21:41:53 +0200145 }
146
Thierry Reding386a2a72013-09-24 13:22:17 +0200147 mutex_init(&tegra->clients_lock);
148 INIT_LIST_HEAD(&tegra->clients);
Thierry Reding1503ca42014-11-24 17:41:23 +0100149
150 mutex_init(&tegra->commit.lock);
151 INIT_WORK(&tegra->commit.work, tegra_atomic_work);
152
Thierry Reding386a2a72013-09-24 13:22:17 +0200153 drm->dev_private = tegra;
154 tegra->drm = drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000155
156 drm_mode_config_init(drm);
157
Thierry Redingf9914212014-11-26 13:03:57 +0100158 drm->mode_config.min_width = 0;
159 drm->mode_config.min_height = 0;
160
161 drm->mode_config.max_width = 4096;
162 drm->mode_config.max_height = 4096;
163
164 drm->mode_config.funcs = &tegra_drm_mode_funcs;
165
Thierry Redinge2215322014-06-27 17:19:25 +0200166 err = tegra_drm_fb_prepare(drm);
167 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100168 goto config;
Thierry Redinge2215322014-06-27 17:19:25 +0200169
170 drm_kms_helper_poll_init(drm);
171
Thierry Reding776dc382013-10-14 14:43:22 +0200172 err = host1x_device_init(device);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000173 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100174 goto fbdev;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000175
Thierry Reding603f0cc2013-04-22 21:22:14 +0200176 /*
177 * We don't use the drm_irq_install() helpers provided by the DRM
178 * core, so we need to set this manually in order to allow the
179 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
180 */
Ville Syrjälä44238432013-10-04 14:53:37 +0300181 drm->irq_enabled = true;
Thierry Reding603f0cc2013-04-22 21:22:14 +0200182
Thierry Reding42e9ce02015-01-28 14:43:05 +0100183 /* syncpoints are used for full 32-bit hardware VBLANK counters */
Thierry Reding42e9ce02015-01-28 14:43:05 +0100184 drm->max_vblank_count = 0xffffffff;
185
Thierry Reding6e5ff992012-11-28 11:45:47 +0100186 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
187 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100188 goto device;
Thierry Reding6e5ff992012-11-28 11:45:47 +0100189
Thierry Reding31930d42015-07-02 17:04:06 +0200190 drm_mode_config_reset(drm);
191
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000192 err = tegra_drm_fb_init(drm);
193 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100194 goto vblank;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000195
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000196 return 0;
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100197
198vblank:
199 drm_vblank_cleanup(drm);
200device:
201 host1x_device_exit(device);
202fbdev:
203 drm_kms_helper_poll_fini(drm);
204 tegra_drm_fb_free(drm);
205config:
206 drm_mode_config_cleanup(drm);
Thierry Redingdf06b752014-06-26 21:41:53 +0200207
208 if (tegra->domain) {
209 iommu_domain_free(tegra->domain);
210 drm_mm_takedown(&tegra->mm);
211 }
212free:
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100213 kfree(tegra);
214 return err;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000215}
216
217static int tegra_drm_unload(struct drm_device *drm)
218{
Thierry Reding776dc382013-10-14 14:43:22 +0200219 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Redingdf06b752014-06-26 21:41:53 +0200220 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding776dc382013-10-14 14:43:22 +0200221 int err;
222
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000223 drm_kms_helper_poll_fini(drm);
224 tegra_drm_fb_exit(drm);
Thierry Redingf002abc2013-10-14 14:06:02 +0200225 drm_mode_config_cleanup(drm);
Thierry Reding4aa3df72014-11-24 16:27:13 +0100226 drm_vblank_cleanup(drm);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000227
Thierry Reding776dc382013-10-14 14:43:22 +0200228 err = host1x_device_exit(device);
229 if (err < 0)
230 return err;
231
Thierry Redingdf06b752014-06-26 21:41:53 +0200232 if (tegra->domain) {
233 iommu_domain_free(tegra->domain);
234 drm_mm_takedown(&tegra->mm);
235 }
236
Thierry Reding1053f4dd2014-11-04 16:17:55 +0100237 kfree(tegra);
238
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000239 return 0;
240}
241
242static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
243{
Thierry Reding08943e62013-09-26 16:08:18 +0200244 struct tegra_drm_file *fpriv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200245
246 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
247 if (!fpriv)
248 return -ENOMEM;
249
250 INIT_LIST_HEAD(&fpriv->contexts);
251 filp->driver_priv = fpriv;
252
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000253 return 0;
254}
255
Thierry Redingc88c3632013-09-26 16:08:22 +0200256static void tegra_drm_context_free(struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200257{
258 context->client->ops->close_channel(context);
259 kfree(context);
260}
261
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000262static void tegra_drm_lastclose(struct drm_device *drm)
263{
Archit Tanejab110ef32015-10-27 13:40:59 +0530264#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Reding386a2a72013-09-24 13:22:17 +0200265 struct tegra_drm *tegra = drm->dev_private;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000266
Thierry Reding386a2a72013-09-24 13:22:17 +0200267 tegra_fbdev_restore_mode(tegra->fbdev);
Thierry Reding60c2f702013-10-31 13:28:50 +0100268#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000269}
270
Thierry Redingc40f0f12013-10-10 11:00:33 +0200271static struct host1x_bo *
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100272host1x_bo_lookup(struct drm_file *file, u32 handle)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200273{
274 struct drm_gem_object *gem;
275 struct tegra_bo *bo;
276
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100277 gem = drm_gem_object_lookup(file, handle);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200278 if (!gem)
279 return NULL;
280
Daniel Vettera07cdfe2015-11-23 10:32:48 +0100281 drm_gem_object_unreference_unlocked(gem);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200282
283 bo = to_tegra_bo(gem);
284 return &bo->base;
285}
286
Thierry Reding961e3be2014-06-10 10:25:00 +0200287static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
288 struct drm_tegra_reloc __user *src,
289 struct drm_device *drm,
290 struct drm_file *file)
291{
292 u32 cmdbuf, target;
293 int err;
294
295 err = get_user(cmdbuf, &src->cmdbuf.handle);
296 if (err < 0)
297 return err;
298
299 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
300 if (err < 0)
301 return err;
302
303 err = get_user(target, &src->target.handle);
304 if (err < 0)
305 return err;
306
David Ung31f40f82015-01-20 18:37:35 -0800307 err = get_user(dest->target.offset, &src->target.offset);
Thierry Reding961e3be2014-06-10 10:25:00 +0200308 if (err < 0)
309 return err;
310
311 err = get_user(dest->shift, &src->shift);
312 if (err < 0)
313 return err;
314
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100315 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
Thierry Reding961e3be2014-06-10 10:25:00 +0200316 if (!dest->cmdbuf.bo)
317 return -ENOENT;
318
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100319 dest->target.bo = host1x_bo_lookup(file, target);
Thierry Reding961e3be2014-06-10 10:25:00 +0200320 if (!dest->target.bo)
321 return -ENOENT;
322
323 return 0;
324}
325
Thierry Redingc40f0f12013-10-10 11:00:33 +0200326int tegra_drm_submit(struct tegra_drm_context *context,
327 struct drm_tegra_submit *args, struct drm_device *drm,
328 struct drm_file *file)
329{
330 unsigned int num_cmdbufs = args->num_cmdbufs;
331 unsigned int num_relocs = args->num_relocs;
332 unsigned int num_waitchks = args->num_waitchks;
333 struct drm_tegra_cmdbuf __user *cmdbufs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100334 (void __user *)(uintptr_t)args->cmdbufs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200335 struct drm_tegra_reloc __user *relocs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100336 (void __user *)(uintptr_t)args->relocs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200337 struct drm_tegra_waitchk __user *waitchks =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100338 (void __user *)(uintptr_t)args->waitchks;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200339 struct drm_tegra_syncpt syncpt;
340 struct host1x_job *job;
341 int err;
342
343 /* We don't yet support other than one syncpt_incr struct per submit */
344 if (args->num_syncpts != 1)
345 return -EINVAL;
346
347 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
348 args->num_relocs, args->num_waitchks);
349 if (!job)
350 return -ENOMEM;
351
352 job->num_relocs = args->num_relocs;
353 job->num_waitchk = args->num_waitchks;
354 job->client = (u32)args->context;
355 job->class = context->client->base.class;
356 job->serialize = true;
357
358 while (num_cmdbufs) {
359 struct drm_tegra_cmdbuf cmdbuf;
360 struct host1x_bo *bo;
361
Dan Carpenter9a991602013-11-08 13:07:37 +0300362 if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
363 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200364 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300365 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200366
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100367 bo = host1x_bo_lookup(file, cmdbuf.handle);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200368 if (!bo) {
369 err = -ENOENT;
370 goto fail;
371 }
372
373 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
374 num_cmdbufs--;
375 cmdbufs++;
376 }
377
Thierry Reding961e3be2014-06-10 10:25:00 +0200378 /* copy and resolve relocations from submit */
Thierry Redingc40f0f12013-10-10 11:00:33 +0200379 while (num_relocs--) {
Thierry Reding961e3be2014-06-10 10:25:00 +0200380 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
381 &relocs[num_relocs], drm,
382 file);
383 if (err < 0)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200384 goto fail;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200385 }
386
Dan Carpenter9a991602013-11-08 13:07:37 +0300387 if (copy_from_user(job->waitchk, waitchks,
388 sizeof(*waitchks) * num_waitchks)) {
389 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200390 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300391 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200392
Dan Carpenter9a991602013-11-08 13:07:37 +0300393 if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
394 sizeof(syncpt))) {
395 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200396 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300397 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200398
399 job->is_addr_reg = context->client->ops->is_addr_reg;
400 job->syncpt_incrs = syncpt.incrs;
401 job->syncpt_id = syncpt.id;
402 job->timeout = 10000;
403
404 if (args->timeout && args->timeout < 10000)
405 job->timeout = args->timeout;
406
407 err = host1x_job_pin(job, context->client->base.dev);
408 if (err)
409 goto fail;
410
411 err = host1x_job_submit(job);
412 if (err)
413 goto fail_submit;
414
415 args->fence = job->syncpt_end;
416
417 host1x_job_put(job);
418 return 0;
419
420fail_submit:
421 host1x_job_unpin(job);
422fail:
423 host1x_job_put(job);
424 return err;
425}
426
427
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200428#ifdef CONFIG_DRM_TEGRA_STAGING
Thierry Redingc88c3632013-09-26 16:08:22 +0200429static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200430{
Thierry Redingc88c3632013-09-26 16:08:22 +0200431 return (struct tegra_drm_context *)(uintptr_t)context;
432}
433
434static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
435 struct tegra_drm_context *context)
436{
437 struct tegra_drm_context *ctx;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200438
439 list_for_each_entry(ctx, &file->contexts, list)
440 if (ctx == context)
441 return true;
442
443 return false;
444}
445
446static int tegra_gem_create(struct drm_device *drm, void *data,
447 struct drm_file *file)
448{
449 struct drm_tegra_gem_create *args = data;
450 struct tegra_bo *bo;
451
Thierry Reding773af772013-10-04 22:34:01 +0200452 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200453 &args->handle);
454 if (IS_ERR(bo))
455 return PTR_ERR(bo);
456
457 return 0;
458}
459
460static int tegra_gem_mmap(struct drm_device *drm, void *data,
461 struct drm_file *file)
462{
463 struct drm_tegra_gem_mmap *args = data;
464 struct drm_gem_object *gem;
465 struct tegra_bo *bo;
466
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100467 gem = drm_gem_object_lookup(file, args->handle);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200468 if (!gem)
469 return -EINVAL;
470
471 bo = to_tegra_bo(gem);
472
David Herrmann2bc7b0c2013-08-13 14:19:58 +0200473 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200474
Daniel Vetter11533302015-11-23 10:32:40 +0100475 drm_gem_object_unreference_unlocked(gem);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200476
477 return 0;
478}
479
480static int tegra_syncpt_read(struct drm_device *drm, void *data,
481 struct drm_file *file)
482{
Thierry Reding776dc382013-10-14 14:43:22 +0200483 struct host1x *host = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200484 struct drm_tegra_syncpt_read *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200485 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200486
Thierry Reding776dc382013-10-14 14:43:22 +0200487 sp = host1x_syncpt_get(host, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200488 if (!sp)
489 return -EINVAL;
490
491 args->value = host1x_syncpt_read_min(sp);
492 return 0;
493}
494
495static int tegra_syncpt_incr(struct drm_device *drm, void *data,
496 struct drm_file *file)
497{
Thierry Reding776dc382013-10-14 14:43:22 +0200498 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200499 struct drm_tegra_syncpt_incr *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200500 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200501
Thierry Reding776dc382013-10-14 14:43:22 +0200502 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200503 if (!sp)
504 return -EINVAL;
505
Arto Merilainenebae30b2013-05-29 13:26:08 +0300506 return host1x_syncpt_incr(sp);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200507}
508
509static int tegra_syncpt_wait(struct drm_device *drm, void *data,
510 struct drm_file *file)
511{
Thierry Reding776dc382013-10-14 14:43:22 +0200512 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200513 struct drm_tegra_syncpt_wait *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200514 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200515
Thierry Reding776dc382013-10-14 14:43:22 +0200516 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200517 if (!sp)
518 return -EINVAL;
519
520 return host1x_syncpt_wait(sp, args->thresh, args->timeout,
521 &args->value);
522}
523
524static int tegra_open_channel(struct drm_device *drm, void *data,
525 struct drm_file *file)
526{
Thierry Reding08943e62013-09-26 16:08:18 +0200527 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding386a2a72013-09-24 13:22:17 +0200528 struct tegra_drm *tegra = drm->dev_private;
529 struct drm_tegra_open_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200530 struct tegra_drm_context *context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200531 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200532 int err = -ENODEV;
533
534 context = kzalloc(sizeof(*context), GFP_KERNEL);
535 if (!context)
536 return -ENOMEM;
537
Thierry Reding776dc382013-10-14 14:43:22 +0200538 list_for_each_entry(client, &tegra->clients, list)
Thierry Reding53fa7f72013-09-24 15:35:40 +0200539 if (client->base.class == args->client) {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200540 err = client->ops->open_channel(client, context);
541 if (err)
542 break;
543
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200544 list_add(&context->list, &fpriv->contexts);
545 args->context = (uintptr_t)context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200546 context->client = client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200547 return 0;
548 }
549
550 kfree(context);
551 return err;
552}
553
554static int tegra_close_channel(struct drm_device *drm, void *data,
555 struct drm_file *file)
556{
Thierry Reding08943e62013-09-26 16:08:18 +0200557 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding776dc382013-10-14 14:43:22 +0200558 struct drm_tegra_close_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200559 struct tegra_drm_context *context;
560
561 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200562
Thierry Reding08943e62013-09-26 16:08:18 +0200563 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200564 return -EINVAL;
565
566 list_del(&context->list);
Thierry Redingc88c3632013-09-26 16:08:22 +0200567 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200568
569 return 0;
570}
571
572static int tegra_get_syncpt(struct drm_device *drm, void *data,
573 struct drm_file *file)
574{
Thierry Reding08943e62013-09-26 16:08:18 +0200575 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200576 struct drm_tegra_get_syncpt *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200577 struct tegra_drm_context *context;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200578 struct host1x_syncpt *syncpt;
579
Thierry Redingc88c3632013-09-26 16:08:22 +0200580 context = tegra_drm_get_context(args->context);
581
Thierry Reding08943e62013-09-26 16:08:18 +0200582 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200583 return -ENODEV;
584
Thierry Reding53fa7f72013-09-24 15:35:40 +0200585 if (args->index >= context->client->base.num_syncpts)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200586 return -EINVAL;
587
Thierry Reding53fa7f72013-09-24 15:35:40 +0200588 syncpt = context->client->base.syncpts[args->index];
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200589 args->id = host1x_syncpt_id(syncpt);
590
591 return 0;
592}
593
594static int tegra_submit(struct drm_device *drm, void *data,
595 struct drm_file *file)
596{
Thierry Reding08943e62013-09-26 16:08:18 +0200597 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200598 struct drm_tegra_submit *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200599 struct tegra_drm_context *context;
600
601 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200602
Thierry Reding08943e62013-09-26 16:08:18 +0200603 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200604 return -ENODEV;
605
606 return context->client->ops->submit(context, args, drm, file);
607}
Arto Merilainenc54a1692013-10-14 15:21:54 +0300608
609static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
610 struct drm_file *file)
611{
612 struct tegra_drm_file *fpriv = file->driver_priv;
613 struct drm_tegra_get_syncpt_base *args = data;
614 struct tegra_drm_context *context;
615 struct host1x_syncpt_base *base;
616 struct host1x_syncpt *syncpt;
617
618 context = tegra_drm_get_context(args->context);
619
620 if (!tegra_drm_file_owns_context(fpriv, context))
621 return -ENODEV;
622
623 if (args->syncpt >= context->client->base.num_syncpts)
624 return -EINVAL;
625
626 syncpt = context->client->base.syncpts[args->syncpt];
627
628 base = host1x_syncpt_get_base(syncpt);
629 if (!base)
630 return -ENXIO;
631
632 args->id = host1x_syncpt_base_id(base);
633
634 return 0;
635}
Thierry Reding7678d712014-06-03 14:56:57 +0200636
637static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
638 struct drm_file *file)
639{
640 struct drm_tegra_gem_set_tiling *args = data;
641 enum tegra_bo_tiling_mode mode;
642 struct drm_gem_object *gem;
643 unsigned long value = 0;
644 struct tegra_bo *bo;
645
646 switch (args->mode) {
647 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
648 mode = TEGRA_BO_TILING_MODE_PITCH;
649
650 if (args->value != 0)
651 return -EINVAL;
652
653 break;
654
655 case DRM_TEGRA_GEM_TILING_MODE_TILED:
656 mode = TEGRA_BO_TILING_MODE_TILED;
657
658 if (args->value != 0)
659 return -EINVAL;
660
661 break;
662
663 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
664 mode = TEGRA_BO_TILING_MODE_BLOCK;
665
666 if (args->value > 5)
667 return -EINVAL;
668
669 value = args->value;
670 break;
671
672 default:
673 return -EINVAL;
674 }
675
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100676 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7678d712014-06-03 14:56:57 +0200677 if (!gem)
678 return -ENOENT;
679
680 bo = to_tegra_bo(gem);
681
682 bo->tiling.mode = mode;
683 bo->tiling.value = value;
684
Daniel Vetter11533302015-11-23 10:32:40 +0100685 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200686
687 return 0;
688}
689
690static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
691 struct drm_file *file)
692{
693 struct drm_tegra_gem_get_tiling *args = data;
694 struct drm_gem_object *gem;
695 struct tegra_bo *bo;
696 int err = 0;
697
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100698 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7678d712014-06-03 14:56:57 +0200699 if (!gem)
700 return -ENOENT;
701
702 bo = to_tegra_bo(gem);
703
704 switch (bo->tiling.mode) {
705 case TEGRA_BO_TILING_MODE_PITCH:
706 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
707 args->value = 0;
708 break;
709
710 case TEGRA_BO_TILING_MODE_TILED:
711 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
712 args->value = 0;
713 break;
714
715 case TEGRA_BO_TILING_MODE_BLOCK:
716 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
717 args->value = bo->tiling.value;
718 break;
719
720 default:
721 err = -EINVAL;
722 break;
723 }
724
Daniel Vetter11533302015-11-23 10:32:40 +0100725 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200726
727 return err;
728}
Thierry Reding7b129082014-06-10 12:04:03 +0200729
730static int tegra_gem_set_flags(struct drm_device *drm, void *data,
731 struct drm_file *file)
732{
733 struct drm_tegra_gem_set_flags *args = data;
734 struct drm_gem_object *gem;
735 struct tegra_bo *bo;
736
737 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
738 return -EINVAL;
739
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100740 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7b129082014-06-10 12:04:03 +0200741 if (!gem)
742 return -ENOENT;
743
744 bo = to_tegra_bo(gem);
745 bo->flags = 0;
746
747 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
748 bo->flags |= TEGRA_BO_BOTTOM_UP;
749
Daniel Vetter11533302015-11-23 10:32:40 +0100750 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200751
752 return 0;
753}
754
755static int tegra_gem_get_flags(struct drm_device *drm, void *data,
756 struct drm_file *file)
757{
758 struct drm_tegra_gem_get_flags *args = data;
759 struct drm_gem_object *gem;
760 struct tegra_bo *bo;
761
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100762 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7b129082014-06-10 12:04:03 +0200763 if (!gem)
764 return -ENOENT;
765
766 bo = to_tegra_bo(gem);
767 args->flags = 0;
768
769 if (bo->flags & TEGRA_BO_BOTTOM_UP)
770 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
771
Daniel Vetter11533302015-11-23 10:32:40 +0100772 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200773
774 return 0;
775}
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200776#endif
777
Rob Clarkbaa70942013-08-02 13:27:49 -0400778static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200779#ifdef CONFIG_DRM_TEGRA_STAGING
Daniel Vetterf8c47142015-09-08 13:56:30 +0200780 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0),
781 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0),
782 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0),
783 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0),
784 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0),
785 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0),
786 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0),
787 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0),
788 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0),
789 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0),
790 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0),
791 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0),
792 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0),
793 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0),
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200794#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000795};
796
797static const struct file_operations tegra_drm_fops = {
798 .owner = THIS_MODULE,
799 .open = drm_open,
800 .release = drm_release,
801 .unlocked_ioctl = drm_ioctl,
Arto Merilainende2ba662013-03-22 16:34:08 +0200802 .mmap = tegra_drm_mmap,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000803 .poll = drm_poll,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000804 .read = drm_read,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000805 .compat_ioctl = drm_compat_ioctl,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000806 .llseek = noop_llseek,
807};
808
Thierry Redinged7dae52014-12-16 16:03:13 +0100809static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
810 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100811{
812 struct drm_crtc *crtc;
813
814 list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) {
Thierry Redinged7dae52014-12-16 16:03:13 +0100815 if (pipe == drm_crtc_index(crtc))
Thierry Reding6e5ff992012-11-28 11:45:47 +0100816 return crtc;
817 }
818
819 return NULL;
820}
821
Thierry Reding88e72712015-09-24 18:35:31 +0200822static u32 tegra_drm_get_vblank_counter(struct drm_device *drm,
823 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100824{
Thierry Redinged7dae52014-12-16 16:03:13 +0100825 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
Thierry Reding42e9ce02015-01-28 14:43:05 +0100826 struct tegra_dc *dc = to_tegra_dc(crtc);
Thierry Redinged7dae52014-12-16 16:03:13 +0100827
828 if (!crtc)
829 return 0;
830
Thierry Reding42e9ce02015-01-28 14:43:05 +0100831 return tegra_dc_get_vblank_counter(dc);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100832}
833
Thierry Reding88e72712015-09-24 18:35:31 +0200834static int tegra_drm_enable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100835{
836 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
837 struct tegra_dc *dc = to_tegra_dc(crtc);
838
839 if (!crtc)
840 return -ENODEV;
841
842 tegra_dc_enable_vblank(dc);
843
844 return 0;
845}
846
Thierry Reding88e72712015-09-24 18:35:31 +0200847static void tegra_drm_disable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100848{
849 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
850 struct tegra_dc *dc = to_tegra_dc(crtc);
851
852 if (crtc)
853 tegra_dc_disable_vblank(dc);
854}
855
Thierry Reding3c03c462012-11-28 12:00:18 +0100856static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
857{
Thierry Reding08943e62013-09-26 16:08:18 +0200858 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Redingc88c3632013-09-26 16:08:22 +0200859 struct tegra_drm_context *context, *tmp;
Thierry Reding3c03c462012-11-28 12:00:18 +0100860
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200861 list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
Thierry Redingc88c3632013-09-26 16:08:22 +0200862 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200863
864 kfree(fpriv);
Thierry Reding3c03c462012-11-28 12:00:18 +0100865}
866
Thierry Redinge450fcc2013-02-13 16:13:16 +0100867#ifdef CONFIG_DEBUG_FS
868static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
869{
870 struct drm_info_node *node = (struct drm_info_node *)s->private;
871 struct drm_device *drm = node->minor->dev;
872 struct drm_framebuffer *fb;
873
874 mutex_lock(&drm->mode_config.fb_lock);
875
876 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
877 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
Ville Syrjäläb00c6002016-12-14 23:31:35 +0200878 fb->base.id, fb->width, fb->height,
879 fb->format->depth,
Thierry Redinge450fcc2013-02-13 16:13:16 +0100880 fb->bits_per_pixel,
Dave Airlie747a5982016-04-15 15:10:35 +1000881 drm_framebuffer_read_refcount(fb));
Thierry Redinge450fcc2013-02-13 16:13:16 +0100882 }
883
884 mutex_unlock(&drm->mode_config.fb_lock);
885
886 return 0;
887}
888
Thierry Reding28c23372015-01-23 09:16:03 +0100889static int tegra_debugfs_iova(struct seq_file *s, void *data)
890{
891 struct drm_info_node *node = (struct drm_info_node *)s->private;
892 struct drm_device *drm = node->minor->dev;
893 struct tegra_drm *tegra = drm->dev_private;
894
895 return drm_mm_dump_table(s, &tegra->mm);
896}
897
Thierry Redinge450fcc2013-02-13 16:13:16 +0100898static struct drm_info_list tegra_debugfs_list[] = {
899 { "framebuffers", tegra_debugfs_framebuffers, 0 },
Thierry Reding28c23372015-01-23 09:16:03 +0100900 { "iova", tegra_debugfs_iova, 0 },
Thierry Redinge450fcc2013-02-13 16:13:16 +0100901};
902
903static int tegra_debugfs_init(struct drm_minor *minor)
904{
905 return drm_debugfs_create_files(tegra_debugfs_list,
906 ARRAY_SIZE(tegra_debugfs_list),
907 minor->debugfs_root, minor);
908}
909
910static void tegra_debugfs_cleanup(struct drm_minor *minor)
911{
912 drm_debugfs_remove_files(tegra_debugfs_list,
913 ARRAY_SIZE(tegra_debugfs_list), minor);
914}
915#endif
916
Thierry Reding9b57f5f2013-11-08 13:17:14 +0100917static struct drm_driver tegra_drm_driver = {
Thierry Redingad906592015-09-24 18:38:09 +0200918 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
919 DRIVER_ATOMIC,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000920 .load = tegra_drm_load,
921 .unload = tegra_drm_unload,
922 .open = tegra_drm_open,
Thierry Reding3c03c462012-11-28 12:00:18 +0100923 .preclose = tegra_drm_preclose,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000924 .lastclose = tegra_drm_lastclose,
925
Thierry Reding6e5ff992012-11-28 11:45:47 +0100926 .get_vblank_counter = tegra_drm_get_vblank_counter,
927 .enable_vblank = tegra_drm_enable_vblank,
928 .disable_vblank = tegra_drm_disable_vblank,
929
Thierry Redinge450fcc2013-02-13 16:13:16 +0100930#if defined(CONFIG_DEBUG_FS)
931 .debugfs_init = tegra_debugfs_init,
932 .debugfs_cleanup = tegra_debugfs_cleanup,
933#endif
934
Daniel Vetter1ddbdbd2016-04-26 19:30:00 +0200935 .gem_free_object_unlocked = tegra_bo_free_object,
Arto Merilainende2ba662013-03-22 16:34:08 +0200936 .gem_vm_ops = &tegra_bo_vm_ops,
Thierry Reding38003912013-12-12 10:00:43 +0100937
938 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
939 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
940 .gem_prime_export = tegra_gem_prime_export,
941 .gem_prime_import = tegra_gem_prime_import,
942
Arto Merilainende2ba662013-03-22 16:34:08 +0200943 .dumb_create = tegra_bo_dumb_create,
944 .dumb_map_offset = tegra_bo_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200945 .dumb_destroy = drm_gem_dumb_destroy,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000946
947 .ioctls = tegra_drm_ioctls,
948 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
949 .fops = &tegra_drm_fops,
950
951 .name = DRIVER_NAME,
952 .desc = DRIVER_DESC,
953 .date = DRIVER_DATE,
954 .major = DRIVER_MAJOR,
955 .minor = DRIVER_MINOR,
956 .patchlevel = DRIVER_PATCHLEVEL,
957};
Thierry Reding776dc382013-10-14 14:43:22 +0200958
959int tegra_drm_register_client(struct tegra_drm *tegra,
960 struct tegra_drm_client *client)
961{
962 mutex_lock(&tegra->clients_lock);
963 list_add_tail(&client->list, &tegra->clients);
964 mutex_unlock(&tegra->clients_lock);
965
966 return 0;
967}
968
969int tegra_drm_unregister_client(struct tegra_drm *tegra,
970 struct tegra_drm_client *client)
971{
972 mutex_lock(&tegra->clients_lock);
973 list_del_init(&client->list);
974 mutex_unlock(&tegra->clients_lock);
975
976 return 0;
977}
978
Thierry Reding9910f5c2014-05-22 09:57:15 +0200979static int host1x_drm_probe(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +0200980{
Thierry Reding9910f5c2014-05-22 09:57:15 +0200981 struct drm_driver *driver = &tegra_drm_driver;
982 struct drm_device *drm;
983 int err;
984
985 drm = drm_dev_alloc(driver, &dev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +0200986 if (IS_ERR(drm))
987 return PTR_ERR(drm);
Thierry Reding9910f5c2014-05-22 09:57:15 +0200988
Thierry Reding9910f5c2014-05-22 09:57:15 +0200989 dev_set_drvdata(&dev->dev, drm);
990
991 err = drm_dev_register(drm, 0);
992 if (err < 0)
993 goto unref;
994
995 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
996 driver->major, driver->minor, driver->patchlevel,
997 driver->date, drm->primary->index);
998
999 return 0;
1000
1001unref:
1002 drm_dev_unref(drm);
1003 return err;
Thierry Reding776dc382013-10-14 14:43:22 +02001004}
1005
Thierry Reding9910f5c2014-05-22 09:57:15 +02001006static int host1x_drm_remove(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +02001007{
Thierry Reding9910f5c2014-05-22 09:57:15 +02001008 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1009
1010 drm_dev_unregister(drm);
1011 drm_dev_unref(drm);
Thierry Reding776dc382013-10-14 14:43:22 +02001012
1013 return 0;
1014}
1015
Thierry Reding359ae682014-12-18 17:15:25 +01001016#ifdef CONFIG_PM_SLEEP
1017static int host1x_drm_suspend(struct device *dev)
1018{
1019 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001020 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001021
1022 drm_kms_helper_poll_disable(drm);
Thierry Reding986c58d2015-08-11 13:11:49 +02001023 tegra_drm_fb_suspend(drm);
1024
1025 tegra->state = drm_atomic_helper_suspend(drm);
1026 if (IS_ERR(tegra->state)) {
1027 tegra_drm_fb_resume(drm);
1028 drm_kms_helper_poll_enable(drm);
1029 return PTR_ERR(tegra->state);
1030 }
Thierry Reding359ae682014-12-18 17:15:25 +01001031
1032 return 0;
1033}
1034
1035static int host1x_drm_resume(struct device *dev)
1036{
1037 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001038 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001039
Thierry Reding986c58d2015-08-11 13:11:49 +02001040 drm_atomic_helper_resume(drm, tegra->state);
1041 tegra_drm_fb_resume(drm);
Thierry Reding359ae682014-12-18 17:15:25 +01001042 drm_kms_helper_poll_enable(drm);
1043
1044 return 0;
1045}
1046#endif
1047
Thierry Redinga13f1dc2015-08-11 13:22:44 +02001048static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1049 host1x_drm_resume);
Thierry Reding359ae682014-12-18 17:15:25 +01001050
Thierry Reding776dc382013-10-14 14:43:22 +02001051static const struct of_device_id host1x_drm_subdevs[] = {
1052 { .compatible = "nvidia,tegra20-dc", },
1053 { .compatible = "nvidia,tegra20-hdmi", },
1054 { .compatible = "nvidia,tegra20-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001055 { .compatible = "nvidia,tegra20-gr3d", },
Thierry Reding776dc382013-10-14 14:43:22 +02001056 { .compatible = "nvidia,tegra30-dc", },
1057 { .compatible = "nvidia,tegra30-hdmi", },
1058 { .compatible = "nvidia,tegra30-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001059 { .compatible = "nvidia,tegra30-gr3d", },
Thierry Redingdec72732013-09-03 08:45:46 +02001060 { .compatible = "nvidia,tegra114-dsi", },
Mikko Perttunen7d1d28a2013-09-30 16:54:47 +02001061 { .compatible = "nvidia,tegra114-hdmi", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001062 { .compatible = "nvidia,tegra114-gr3d", },
Thierry Reding8620fc62013-12-12 11:03:59 +01001063 { .compatible = "nvidia,tegra124-dc", },
Thierry Reding6b6b6042013-11-15 16:06:05 +01001064 { .compatible = "nvidia,tegra124-sor", },
Thierry Redingfb7be702013-11-15 16:07:32 +01001065 { .compatible = "nvidia,tegra124-hdmi", },
Thierry Reding7d338582015-04-10 11:35:21 +02001066 { .compatible = "nvidia,tegra124-dsi", },
Thierry Redingc06c7932015-04-10 11:35:21 +02001067 { .compatible = "nvidia,tegra132-dsi", },
Thierry Reding5b4f5162015-03-27 10:31:58 +01001068 { .compatible = "nvidia,tegra210-dc", },
Thierry Redingddfb4062015-04-08 16:56:22 +02001069 { .compatible = "nvidia,tegra210-dsi", },
Thierry Reding3309ac82015-07-30 10:32:46 +02001070 { .compatible = "nvidia,tegra210-sor", },
Thierry Reding459cc2c2015-07-30 10:34:24 +02001071 { .compatible = "nvidia,tegra210-sor1", },
Thierry Reding776dc382013-10-14 14:43:22 +02001072 { /* sentinel */ }
1073};
1074
1075static struct host1x_driver host1x_drm_driver = {
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001076 .driver = {
1077 .name = "drm",
Thierry Reding359ae682014-12-18 17:15:25 +01001078 .pm = &host1x_drm_pm_ops,
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001079 },
Thierry Reding776dc382013-10-14 14:43:22 +02001080 .probe = host1x_drm_probe,
1081 .remove = host1x_drm_remove,
1082 .subdevs = host1x_drm_subdevs,
1083};
1084
Thierry Reding473112e2015-09-10 16:07:14 +02001085static struct platform_driver * const drivers[] = {
1086 &tegra_dc_driver,
1087 &tegra_hdmi_driver,
1088 &tegra_dsi_driver,
1089 &tegra_dpaux_driver,
1090 &tegra_sor_driver,
1091 &tegra_gr2d_driver,
1092 &tegra_gr3d_driver,
1093};
1094
Thierry Reding776dc382013-10-14 14:43:22 +02001095static int __init host1x_drm_init(void)
1096{
1097 int err;
1098
1099 err = host1x_driver_register(&host1x_drm_driver);
1100 if (err < 0)
1101 return err;
1102
Thierry Reding473112e2015-09-10 16:07:14 +02001103 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001104 if (err < 0)
1105 goto unregister_host1x;
1106
Thierry Reding776dc382013-10-14 14:43:22 +02001107 return 0;
1108
Thierry Reding776dc382013-10-14 14:43:22 +02001109unregister_host1x:
1110 host1x_driver_unregister(&host1x_drm_driver);
1111 return err;
1112}
1113module_init(host1x_drm_init);
1114
1115static void __exit host1x_drm_exit(void)
1116{
Thierry Reding473112e2015-09-10 16:07:14 +02001117 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001118 host1x_driver_unregister(&host1x_drm_driver);
1119}
1120module_exit(host1x_drm_exit);
1121
1122MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1123MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1124MODULE_LICENSE("GPL v2");