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Nicolas Ferre49fe2ba2011-10-10 18:29:24 +02001/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
Nicolas Ferre21f81872012-02-11 15:41:40 +010025 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010030 tcb0 = &tcb0;
31 tcb1 = &tcb1;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020032 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm926ejs";
36 };
37 };
38
Ludovic Desrochesdcce6ce2012-04-02 20:44:20 +020039 memory {
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020040 reg = <0x70000000 0x10000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020056 #interrupt-cells = <3>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020057 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020059 reg = <0xfffff000 0x200>;
Jean-Christophe PLAGNIOL-VILLARDc6573942012-04-09 19:36:36 +080060 atmel,external-irqs = <31>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020061 };
62
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +080063 ramc0: ramc@ffffe400 {
64 compatible = "atmel,at91sam9g45-ddramc";
65 reg = <0xffffe400 0x200
66 0xffffe600 0x200>;
67 };
68
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +080069 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
73
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +080074 rstc@fffffd00 {
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffd00 0x10>;
77 };
78
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +010079 pit: timer@fffffd30 {
80 compatible = "atmel,at91sam9260-pit";
81 reg = <0xfffffd30 0xf>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020082 interrupts = <1 4 7>;
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +010083 };
84
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010085
Jean-Christophe PLAGNIOL-VILLARD82015c42012-03-02 21:01:00 +080086 shdwc@fffffd10 {
87 compatible = "atmel,at91sam9rl-shdwc";
88 reg = <0xfffffd10 0x10>;
89 };
90
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010091 tcb0: timer@fff7c000 {
92 compatible = "atmel,at91rm9200-tcb";
93 reg = <0xfff7c000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020094 interrupts = <18 4 0>;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010095 };
96
97 tcb1: timer@fffd4000 {
98 compatible = "atmel,at91rm9200-tcb";
99 reg = <0xfffd4000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200100 interrupts = <18 4 0>;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100101 };
102
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200103 dma: dma-controller@ffffec00 {
104 compatible = "atmel,at91sam9g45-dma";
105 reg = <0xffffec00 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200106 interrupts = <21 4 0>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200107 };
108
Nicolas Ferre21f81872012-02-11 15:41:40 +0100109 pioA: gpio@fffff200 {
110 compatible = "atmel,at91rm9200-gpio";
111 reg = <0xfffff200 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200112 interrupts = <2 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100113 #gpio-cells = <2>;
114 gpio-controller;
115 interrupt-controller;
116 };
117
118 pioB: gpio@fffff400 {
119 compatible = "atmel,at91rm9200-gpio";
120 reg = <0xfffff400 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200121 interrupts = <3 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100122 #gpio-cells = <2>;
123 gpio-controller;
124 interrupt-controller;
125 };
126
127 pioC: gpio@fffff600 {
128 compatible = "atmel,at91rm9200-gpio";
129 reg = <0xfffff600 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200130 interrupts = <4 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100131 #gpio-cells = <2>;
132 gpio-controller;
133 interrupt-controller;
134 };
135
136 pioD: gpio@fffff800 {
137 compatible = "atmel,at91rm9200-gpio";
138 reg = <0xfffff800 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200139 interrupts = <5 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100140 #gpio-cells = <2>;
141 gpio-controller;
142 interrupt-controller;
143 };
144
145 pioE: gpio@fffffa00 {
146 compatible = "atmel,at91rm9200-gpio";
147 reg = <0xfffffa00 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200148 interrupts = <5 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100149 #gpio-cells = <2>;
150 gpio-controller;
151 interrupt-controller;
152 };
153
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200154 dbgu: serial@ffffee00 {
155 compatible = "atmel,at91sam9260-usart";
156 reg = <0xffffee00 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200157 interrupts = <1 4 7>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200158 status = "disabled";
159 };
160
161 usart0: serial@fff8c000 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xfff8c000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200164 interrupts = <7 4 5>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200165 atmel,use-dma-rx;
166 atmel,use-dma-tx;
167 status = "disabled";
168 };
169
170 usart1: serial@fff90000 {
171 compatible = "atmel,at91sam9260-usart";
172 reg = <0xfff90000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200173 interrupts = <8 4 5>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200174 atmel,use-dma-rx;
175 atmel,use-dma-tx;
176 status = "disabled";
177 };
178
179 usart2: serial@fff94000 {
180 compatible = "atmel,at91sam9260-usart";
181 reg = <0xfff94000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200182 interrupts = <9 4 5>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200183 atmel,use-dma-rx;
184 atmel,use-dma-tx;
185 status = "disabled";
186 };
187
188 usart3: serial@fff98000 {
189 compatible = "atmel,at91sam9260-usart";
190 reg = <0xfff98000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200191 interrupts = <10 4 5>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200192 atmel,use-dma-rx;
193 atmel,use-dma-tx;
194 status = "disabled";
195 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100196
197 macb0: ethernet@fffbc000 {
198 compatible = "cdns,at32ap7000-macb", "cdns,macb";
199 reg = <0xfffbc000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200200 interrupts = <25 4 3>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100201 status = "disabled";
202 };
Maxime Ripard93b298b2012-05-11 15:35:38 +0200203
204 adc0: adc@fffb0000 {
205 compatible = "atmel,at91sam9260-adc";
206 reg = <0xfffb0000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200207 interrupts = <20 4 0>;
Maxime Ripard93b298b2012-05-11 15:35:38 +0200208 atmel,adc-use-external-triggers;
209 atmel,adc-channels-used = <0xff>;
210 atmel,adc-vref = <3300>;
211 atmel,adc-num-channels = <8>;
212 atmel,adc-startup-time = <40>;
213 atmel,adc-channel-base = <0x30>;
214 atmel,adc-drdy-mask = <0x10000>;
215 atmel,adc-status-register = <0x1c>;
216 atmel,adc-trigger-register = <0x08>;
217
218 trigger@0 {
219 trigger-name = "external-rising";
220 trigger-value = <0x1>;
221 trigger-external;
222 };
223 trigger@1 {
224 trigger-name = "external-falling";
225 trigger-value = <0x2>;
226 trigger-external;
227 };
228
229 trigger@2 {
230 trigger-name = "external-any";
231 trigger-value = <0x3>;
232 trigger-external;
233 };
234
235 trigger@3 {
236 trigger-name = "continuous";
237 trigger-value = <0x6>;
238 };
239 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200240 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800241
242 nand0: nand@40000000 {
243 compatible = "atmel,at91rm9200-nand";
244 #address-cells = <1>;
245 #size-cells = <1>;
246 reg = <0x40000000 0x10000000
247 0xffffe200 0x200
248 >;
249 atmel,nand-addr-offset = <21>;
250 atmel,nand-cmd-offset = <22>;
251 gpios = <&pioC 8 0
252 &pioC 14 0
253 0
254 >;
255 status = "disabled";
256 };
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800257
258 usb0: ohci@00700000 {
259 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
260 reg = <0x00700000 0x100000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200261 interrupts = <22 4 2>;
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800262 status = "disabled";
263 };
Jean-Christophe PLAGNIOL-VILLARD62c55532011-11-22 12:11:13 +0800264
265 usb1: ehci@00800000 {
266 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
267 reg = <0x00800000 0x100000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200268 interrupts = <22 4 2>;
Jean-Christophe PLAGNIOL-VILLARD62c55532011-11-22 12:11:13 +0800269 status = "disabled";
270 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200271 };
Jean-Christophe PLAGNIOL-VILLARD8f24bda2012-02-05 18:32:37 +0800272
273 i2c@0 {
274 compatible = "i2c-gpio";
275 gpios = <&pioA 20 0 /* sda */
276 &pioA 21 0 /* scl */
277 >;
278 i2c-gpio,sda-open-drain;
279 i2c-gpio,scl-open-drain;
280 i2c-gpio,delay-us = <5>; /* ~100 kHz */
281 #address-cells = <1>;
282 #size-cells = <0>;
283 status = "disabled";
284 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200285};