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Antti Palosaari831e0b72011-07-08 23:36:07 -03001/*
2 * Realtek RTL28xxU DVB USB driver
3 *
4 * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22#ifndef RTL28XXU_H
23#define RTL28XXU_H
24
25#define DVB_USB_LOG_PREFIX "rtl28xxu"
26#include "dvb-usb.h"
27
28#define deb_info(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x01, args)
29#define deb_rc(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x02, args)
30#define deb_xfer(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x04, args)
31#define deb_reg(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x08, args)
32#define deb_i2c(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x10, args)
33#define deb_fw(args...) dprintk(dvb_usb_rtl28xxu_debug, 0x20, args)
34
35#define deb_dump(r, t, v, i, b, l, func) { \
36 int loop_; \
37 func("%02x %02x %02x %02x %02x %02x %02x %02x", \
38 t, r, v & 0xff, v >> 8, i & 0xff, i >> 8, l & 0xff, l >> 8); \
39 if (t == (USB_TYPE_VENDOR | USB_DIR_OUT)) \
40 func(" >>> "); \
41 else \
42 func(" <<< "); \
43 for (loop_ = 0; loop_ < l; loop_++) \
44 func("%02x ", b[loop_]); \
45 func("\n");\
46}
47
48/*
49 * USB commands
50 * (usb_control_msg() index parameter)
51 */
52#define DEMOD (0x00 << 8)
53#define USB (0x01 << 8)
54#define SYS (0x02 << 8)
55#define I2C (0x03 << 8)
56#define CMD_WR_FLAG 0x10
57#define CMD_DEMOD_RD (DEMOD)
58#define CMD_DEMOD_WR (DEMOD | CMD_WR_FLAG)
59#define CMD_USB_RD (USB)
60#define CMD_USB_WR (USB | CMD_WR_FLAG)
61#define CMD_SYS_RD (SYS)
62#define CMD_SYS_WR (SYS | CMD_WR_FLAG)
63#define CMD_I2C_RD (I2C)
64#define CMD_I2C_WR (I2C | CMD_WR_FLAG)
Antti Palosaarib5cbaa42011-08-04 13:26:10 -030065#define CMD_IR_RD (CMD_SYS_RD | 0x01)
66#define CMD_IR_WR (CMD_SYS_WR | 0x01)
Antti Palosaari831e0b72011-07-08 23:36:07 -030067
68struct rtl28xxu_priv {
69 u8 chip_id;
70 u8 tuner;
Antti Palosaarib5cbaa42011-08-04 13:26:10 -030071 bool rc_active;
Antti Palosaari831e0b72011-07-08 23:36:07 -030072};
73
74enum rtl28xxu_chip_id {
75 CHIP_ID_NONE = 0,
76 CHIP_ID_RTL2831U,
77 CHIP_ID_RTL2832U,
78};
79
80enum rtl28xxu_tuner {
81 TUNER_NONE = 0,
Antti Palosaarib5cbaa42011-08-04 13:26:10 -030082
Antti Palosaari831e0b72011-07-08 23:36:07 -030083 TUNER_RTL2830_QT1010,
84 TUNER_RTL2830_MT2060,
85 TUNER_RTL2830_MXL5005S,
Antti Palosaarib5cbaa42011-08-04 13:26:10 -030086
87 TUNER_RTL2832_MT2266,
88 TUNER_RTL2832_FC2580,
89 TUNER_RTL2832_MT2063,
90 TUNER_RTL2832_MAX3543,
91 TUNER_RTL2832_TUA9001,
92 TUNER_RTL2832_MXL5007T,
93 TUNER_RTL2832_FC0012,
94 TUNER_RTL2832_E4000,
95 TUNER_RTL2832_TDA18272,
96 TUNER_RTL2832_FC0013,
Antti Palosaari831e0b72011-07-08 23:36:07 -030097};
98
99struct rtl28xxu_req {
100 u16 value;
101 u16 index;
102 u16 size;
103 u8 *data;
104};
105
106struct rtl28xxu_reg_val {
107 u16 reg;
108 u8 val;
109};
110
111/*
112 * memory map
113 *
114 * 0x0000 DEMOD : demodulator
115 * 0x2000 USB : SIE, USB endpoint, debug, DMA
116 * 0x3000 SYS : system
117 * 0xfc00 RC : remote controller (not RTL2831U)
118 */
119
120/*
121 * USB registers
122 */
123/* SIE Control Registers */
124#define USB_SYSCTL 0x2000 /* USB system control */
125#define USB_SYSCTL_0 0x2000 /* USB system control */
126#define USB_SYSCTL_1 0x2001 /* USB system control */
127#define USB_SYSCTL_2 0x2002 /* USB system control */
128#define USB_SYSCTL_3 0x2003 /* USB system control */
129#define USB_IRQSTAT 0x2008 /* SIE interrupt status */
130#define USB_IRQEN 0x200C /* SIE interrupt enable */
131#define USB_CTRL 0x2010 /* USB control */
132#define USB_STAT 0x2014 /* USB status */
133#define USB_DEVADDR 0x2018 /* USB device address */
134#define USB_TEST 0x201C /* USB test mode */
135#define USB_FRAME_NUMBER 0x2020 /* frame number */
136#define USB_FIFO_ADDR 0x2028 /* address of SIE FIFO RAM */
137#define USB_FIFO_CMD 0x202A /* SIE FIFO RAM access command */
138#define USB_FIFO_DATA 0x2030 /* SIE FIFO RAM data */
139/* Endpoint Registers */
140#define EP0_SETUPA 0x20F8 /* EP 0 setup packet lower byte */
141#define EP0_SETUPB 0x20FC /* EP 0 setup packet higher byte */
142#define USB_EP0_CFG 0x2104 /* EP 0 configure */
143#define USB_EP0_CTL 0x2108 /* EP 0 control */
144#define USB_EP0_STAT 0x210C /* EP 0 status */
145#define USB_EP0_IRQSTAT 0x2110 /* EP 0 interrupt status */
146#define USB_EP0_IRQEN 0x2114 /* EP 0 interrupt enable */
147#define USB_EP0_MAXPKT 0x2118 /* EP 0 max packet size */
148#define USB_EP0_BC 0x2120 /* EP 0 FIFO byte counter */
149#define USB_EPA_CFG 0x2144 /* EP A configure */
150#define USB_EPA_CFG_0 0x2144 /* EP A configure */
151#define USB_EPA_CFG_1 0x2145 /* EP A configure */
152#define USB_EPA_CFG_2 0x2146 /* EP A configure */
153#define USB_EPA_CFG_3 0x2147 /* EP A configure */
154#define USB_EPA_CTL 0x2148 /* EP A control */
155#define USB_EPA_CTL_0 0x2148 /* EP A control */
156#define USB_EPA_CTL_1 0x2149 /* EP A control */
157#define USB_EPA_CTL_2 0x214A /* EP A control */
158#define USB_EPA_CTL_3 0x214B /* EP A control */
159#define USB_EPA_STAT 0x214C /* EP A status */
160#define USB_EPA_IRQSTAT 0x2150 /* EP A interrupt status */
161#define USB_EPA_IRQEN 0x2154 /* EP A interrupt enable */
162#define USB_EPA_MAXPKT 0x2158 /* EP A max packet size */
163#define USB_EPA_MAXPKT_0 0x2158 /* EP A max packet size */
164#define USB_EPA_MAXPKT_1 0x2159 /* EP A max packet size */
165#define USB_EPA_MAXPKT_2 0x215A /* EP A max packet size */
166#define USB_EPA_MAXPKT_3 0x215B /* EP A max packet size */
167#define USB_EPA_FIFO_CFG 0x2160 /* EP A FIFO configure */
168#define USB_EPA_FIFO_CFG_0 0x2160 /* EP A FIFO configure */
169#define USB_EPA_FIFO_CFG_1 0x2161 /* EP A FIFO configure */
170#define USB_EPA_FIFO_CFG_2 0x2162 /* EP A FIFO configure */
171#define USB_EPA_FIFO_CFG_3 0x2163 /* EP A FIFO configure */
172/* Debug Registers */
173#define USB_PHYTSTDIS 0x2F04 /* PHY test disable */
174#define USB_TOUT_VAL 0x2F08 /* USB time-out time */
175#define USB_VDRCTRL 0x2F10 /* UTMI vendor signal control */
176#define USB_VSTAIN 0x2F14 /* UTMI vendor signal status in */
177#define USB_VLOADM 0x2F18 /* UTMI load vendor signal status in */
178#define USB_VSTAOUT 0x2F1C /* UTMI vendor signal status out */
179#define USB_UTMI_TST 0x2F80 /* UTMI test */
180#define USB_UTMI_STATUS 0x2F84 /* UTMI status */
181#define USB_TSTCTL 0x2F88 /* test control */
182#define USB_TSTCTL2 0x2F8C /* test control 2 */
183#define USB_PID_FORCE 0x2F90 /* force PID */
184#define USB_PKTERR_CNT 0x2F94 /* packet error counter */
185#define USB_RXERR_CNT 0x2F98 /* RX error counter */
186#define USB_MEM_BIST 0x2F9C /* MEM BIST test */
187#define USB_SLBBIST 0x2FA0 /* self-loop-back BIST */
188#define USB_CNTTEST 0x2FA4 /* counter test */
189#define USB_PHYTST 0x2FC0 /* USB PHY test */
190#define USB_DBGIDX 0x2FF0 /* select individual block debug signal */
191#define USB_DBGMUX 0x2FF4 /* debug signal module mux */
192
193/*
194 * SYS registers
195 */
196/* demod control registers */
197#define SYS_SYS0 0x3000 /* include DEMOD_CTL, GPO, GPI, GPOE */
198#define SYS_DEMOD_CTL 0x3000 /* control register for DVB-T demodulator */
199/* GPIO registers */
200#define SYS_GPIO_OUT_VAL 0x3001 /* output value of GPIO */
201#define SYS_GPIO_IN_VAL 0x3002 /* input value of GPIO */
202#define SYS_GPIO_OUT_EN 0x3003 /* output enable of GPIO */
203#define SYS_SYS1 0x3004 /* include GPD, SYSINTE, SYSINTS, GP_CFG0 */
204#define SYS_GPIO_DIR 0x3004 /* direction control for GPIO */
205#define SYS_SYSINTE 0x3005 /* system interrupt enable */
206#define SYS_SYSINTS 0x3006 /* system interrupt status */
207#define SYS_GPIO_CFG0 0x3007 /* PAD configuration for GPIO0-GPIO3 */
208#define SYS_SYS2 0x3008 /* include GP_CFG1 and 3 reserved bytes */
209#define SYS_GPIO_CFG1 0x3008 /* PAD configuration for GPIO4 */
Antti Palosaarib5cbaa42011-08-04 13:26:10 -0300210#define SYS_DEMOD_CTL1 0x300B
211
Antti Palosaari831e0b72011-07-08 23:36:07 -0300212/* IrDA registers */
213#define SYS_IRRC_PSR 0x3020 /* IR protocol selection */
214#define SYS_IRRC_PER 0x3024 /* IR protocol extension */
215#define SYS_IRRC_SF 0x3028 /* IR sampling frequency */
216#define SYS_IRRC_DPIR 0x302C /* IR data package interval */
217#define SYS_IRRC_CR 0x3030 /* IR control */
218#define SYS_IRRC_RP 0x3034 /* IR read port */
219#define SYS_IRRC_SR 0x3038 /* IR status */
220/* I2C master registers */
221#define SYS_I2CCR 0x3040 /* I2C clock */
222#define SYS_I2CMCR 0x3044 /* I2C master control */
223#define SYS_I2CMSTR 0x3048 /* I2C master SCL timing */
224#define SYS_I2CMSR 0x304C /* I2C master status */
225#define SYS_I2CMFR 0x3050 /* I2C master FIFO */
226
Antti Palosaarib5cbaa42011-08-04 13:26:10 -0300227/*
228 * IR registers
229 */
230#define IR_RX_BUF 0xFC00
231#define IR_RX_IE 0xFD00
232#define IR_RX_IF 0xFD01
233#define IR_RX_CTRL 0xFD02
234#define IR_RX_CFG 0xFD03
235#define IR_MAX_DURATION0 0xFD04
236#define IR_MAX_DURATION1 0xFD05
237#define IR_IDLE_LEN0 0xFD06
238#define IR_IDLE_LEN1 0xFD07
239#define IR_GLITCH_LEN 0xFD08
240#define IR_RX_BUF_CTRL 0xFD09
241#define IR_RX_BUF_DATA 0xFD0A
242#define IR_RX_BC 0xFD0B
243#define IR_RX_CLK 0xFD0C
244#define IR_RX_C_COUNT_L 0xFD0D
245#define IR_RX_C_COUNT_H 0xFD0E
246#define IR_SUSPEND_CTRL 0xFD10
247#define IR_ERR_TOL_CTRL 0xFD11
248#define IR_UNIT_LEN 0xFD12
249#define IR_ERR_TOL_LEN 0xFD13
250#define IR_MAX_H_TOL_LEN 0xFD14
251#define IR_MAX_L_TOL_LEN 0xFD15
252#define IR_MASK_CTRL 0xFD16
253#define IR_MASK_DATA 0xFD17
254#define IR_RES_MASK_ADDR 0xFD18
255#define IR_RES_MASK_T_LEN 0xFD19
256
Antti Palosaari831e0b72011-07-08 23:36:07 -0300257#endif