blob: 4d7a9de01645efdeb5683064f8a2e1d439f24c44 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Generic Generic NCR5380 driver
3 *
4 * Copyright 1993, Drew Eckhardt
5 * Visionary Computing
6 * (Unix and Linux consulting and custom programming)
7 * drew@colorado.edu
8 * +1 (303) 440-4894
9 *
10 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
11 * K.Lentin@cs.monash.edu.au
12 *
13 * NCR53C400A extensions (c) 1996, Ingmar Baumgart
14 * ingmar@gonzo.schwaben.de
15 *
16 * DTC3181E extensions (c) 1997, Ronald van Cuijlenborg
17 * ronald.van.cuijlenborg@tip.nl or nutty@dds.nl
18 *
19 * Added ISAPNP support for DTC436 adapters,
20 * Thomas Sailer, sailer@ife.ee.ethz.ch
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 *
Finn Thain9c41ab22016-03-23 21:10:28 +110022 * See Documentation/scsi/g_NCR5380.txt for more info.
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 */
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/blkdev.h>
Finn Thain161c0052016-01-03 16:05:46 +110027#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <scsi/scsi_host.h>
29#include "g_NCR5380.h"
30#include "NCR5380.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include <linux/init.h>
32#include <linux/ioport.h>
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020033#include <linux/isa.h>
34#include <linux/pnp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <linux/interrupt.h>
36
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020037#define MAX_CARDS 8
38
39/* old-style parameters for compatibility */
Finn Thainc0965e62016-01-03 16:05:05 +110040static int ncr_irq;
Finn Thainc0965e62016-01-03 16:05:05 +110041static int ncr_addr;
42static int ncr_5380;
43static int ncr_53c400;
44static int ncr_53c400a;
45static int dtc_3181e;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +110046static int hp_c2502;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020047module_param(ncr_irq, int, 0);
48module_param(ncr_addr, int, 0);
49module_param(ncr_5380, int, 0);
50module_param(ncr_53c400, int, 0);
51module_param(ncr_53c400a, int, 0);
52module_param(dtc_3181e, int, 0);
53module_param(hp_c2502, int, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020055static int irq[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
56module_param_array(irq, int, NULL, 0);
57MODULE_PARM_DESC(irq, "IRQ number(s)");
58
59static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
60module_param_array(base, int, NULL, 0);
61MODULE_PARM_DESC(base, "base address(es)");
62
63static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
64module_param_array(card, int, NULL, 0);
65MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)");
66
Ondrej Zaryb61bacb2016-10-10 00:46:52 -040067MODULE_ALIAS("g_NCR5380_mmio");
Ondrej Zarya8cfbca2016-09-27 21:00:25 +020068MODULE_LICENSE("GPL");
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
Ondrej Zaryc6084cb2016-01-03 16:06:19 +110070/*
71 * Configure I/O address of 53C400A or DTC436 by writing magic numbers
72 * to ports 0x779 and 0x379.
73 */
74static void magic_configure(int idx, u8 irq, u8 magic[])
75{
76 u8 cfg = 0;
77
78 outb(magic[0], 0x779);
79 outb(magic[1], 0x379);
80 outb(magic[2], 0x379);
81 outb(magic[3], 0x379);
82 outb(magic[4], 0x379);
83
84 /* allowed IRQs for HP C2502 */
85 if (irq != 2 && irq != 3 && irq != 4 && irq != 5 && irq != 7)
86 irq = 0;
87 if (idx >= 0 && idx <= 7)
88 cfg = 0x80 | idx | (irq << 4);
89 outb(cfg, 0x379);
90}
Ondrej Zaryb61bacb2016-10-10 00:46:52 -040091
92static unsigned int ncr_53c400a_ports[] = {
93 0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0
94};
95static unsigned int dtc_3181e_ports[] = {
96 0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
97};
98static u8 ncr_53c400a_magic[] = { /* 53C400A & DTC436 */
99 0x59, 0xb9, 0xc5, 0xae, 0xa6
100};
101static u8 hp_c2502_magic[] = { /* HP C2502 */
102 0x0f, 0x22, 0xf0, 0x20, 0x80
103};
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100104
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200105static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
106 struct device *pdev, int base, int irq, int board)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107{
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400108 bool is_pmio = base <= 0xffff;
109 int ret;
110 int flags = 0;
111 unsigned int *ports = NULL;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100112 u8 *magic = NULL;
Ondrej Zary702a98c2010-08-10 18:01:16 -0700113 int i;
Ondrej Zaryc6084cb2016-01-03 16:06:19 +1100114 int port_idx = -1;
Finn Thain9d376402016-03-23 21:10:10 +1100115 unsigned long region_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116 struct Scsi_Host *instance;
Ondrej Zary12150792016-01-03 16:06:15 +1100117 struct NCR5380_hostdata *hostdata;
Al Viroc818cb62006-03-24 03:15:37 -0800118 void __iomem *iomem;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200120 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200121 case BOARD_NCR5380:
122 flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP;
123 break;
124 case BOARD_NCR53C400A:
125 ports = ncr_53c400a_ports;
126 magic = ncr_53c400a_magic;
127 break;
128 case BOARD_HP_C2502:
129 ports = ncr_53c400a_ports;
130 magic = hp_c2502_magic;
131 break;
132 case BOARD_DTC3181E:
133 ports = dtc_3181e_ports;
134 magic = ncr_53c400a_magic;
135 break;
136 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400138 if (is_pmio && ports && magic) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200139 /* wakeup sequence for the NCR53C400A and DTC3181E */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200141 /* Disable the adapter and look for a free io port */
142 magic_configure(-1, 0, magic);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200144 region_size = 16;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200145 if (base)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200146 for (i = 0; ports[i]; i++) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200147 if (base == ports[i]) { /* index found */
148 if (!request_region(ports[i],
149 region_size,
150 "ncr53c80"))
151 return -EBUSY;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200152 break;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200153 }
154 }
155 else
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200156 for (i = 0; ports[i]; i++) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200157 if (!request_region(ports[i], region_size,
158 "ncr53c80"))
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200159 continue;
160 if (inb(ports[i]) == 0xff)
161 break;
162 release_region(ports[i], region_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200164 if (ports[i]) {
165 /* At this point we have our region reserved */
166 magic_configure(i, 0, magic); /* no IRQ yet */
167 outb(0xc0, ports[i] + 9);
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200168 if (inb(ports[i] + 9) != 0x80) {
169 ret = -ENODEV;
170 goto out_release;
171 }
172 base = ports[i];
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200173 port_idx = i;
174 } else
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200175 return -EINVAL;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400176 } else if (is_pmio) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200177 /* NCR5380 - no configuration, just grab */
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200178 region_size = 8;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200179 if (!base || !request_region(base, region_size, "ncr5380"))
180 return -EBUSY;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400181 } else { /* MMIO */
182 region_size = NCR53C400_region_size;
183 if (!request_mem_region(base, region_size, "ncr5380"))
184 return -EBUSY;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200185 }
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400186
187 if (is_pmio)
188 iomem = ioport_map(base, region_size);
189 else
190 iomem = ioremap(base, region_size);
191
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200192 if (!iomem) {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200193 ret = -ENOMEM;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200194 goto out_release;
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200195 }
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400196
197 instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
198 if (instance == NULL) {
199 ret = -ENOMEM;
200 goto out_unmap;
201 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200202 hostdata = shost_priv(instance);
203
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200204 hostdata->iomem = iomem;
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400205
206 if (is_pmio) {
207 instance->io_port = base;
208 instance->n_io_port = region_size;
209 hostdata->io_width = 1; /* 8-bit PDMA by default */
210 hostdata->offset = 0;
211
212 /*
213 * On NCR53C400 boards, NCR5380 registers are mapped 8 past
214 * the base address.
215 */
216 switch (board) {
217 case BOARD_NCR53C400:
218 instance->io_port += 8;
219 hostdata->c400_ctl_status = 0;
220 hostdata->c400_blk_cnt = 1;
221 hostdata->c400_host_buf = 4;
222 break;
223 case BOARD_DTC3181E:
224 hostdata->io_width = 2; /* 16-bit PDMA */
225 /* fall through */
226 case BOARD_NCR53C400A:
227 case BOARD_HP_C2502:
228 hostdata->c400_ctl_status = 9;
229 hostdata->c400_blk_cnt = 10;
230 hostdata->c400_host_buf = 8;
231 break;
232 }
233 } else {
234 instance->base = base;
235 hostdata->iomem_size = region_size;
236 hostdata->offset = NCR53C400_mem_base;
237 switch (board) {
238 case BOARD_NCR53C400:
239 hostdata->c400_ctl_status = 0x100;
240 hostdata->c400_blk_cnt = 0x101;
241 hostdata->c400_host_buf = 0x104;
242 break;
243 case BOARD_DTC3181E:
244 case BOARD_NCR53C400A:
245 case BOARD_HP_C2502:
246 pr_err(DRV_MODULE_NAME ": unknown register offsets\n");
247 ret = -EINVAL;
248 goto out_unregister;
249 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200250 }
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200251
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200252 ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP);
253 if (ret)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200254 goto out_unregister;
255
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200256 switch (board) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200257 case BOARD_NCR53C400:
258 case BOARD_DTC3181E:
259 case BOARD_NCR53C400A:
260 case BOARD_HP_C2502:
261 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
262 }
263
264 NCR5380_maybe_reset_bus(instance);
265
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200266 if (irq != IRQ_AUTO)
267 instance->irq = irq;
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200268 else
269 instance->irq = NCR5380_probe_irq(instance, 0xffff);
270
271 /* Compatibility with documented NCR5380 kernel parameters */
272 if (instance->irq == 255)
273 instance->irq = NO_IRQ;
274
275 if (instance->irq != NO_IRQ) {
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200276 /* set IRQ for HP C2502 */
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200277 if (board == BOARD_HP_C2502)
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200278 magic_configure(port_idx, instance->irq, magic);
Ondrej Zaryd91f5af2016-09-27 21:00:24 +0200279 if (request_irq(instance->irq, generic_NCR5380_intr,
280 0, "NCR5380", instance)) {
281 printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq);
282 instance->irq = NO_IRQ;
283 }
284 }
285
286 if (instance->irq == NO_IRQ) {
287 printk(KERN_INFO "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no);
288 printk(KERN_INFO "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no);
289 }
290
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200291 ret = scsi_add_host(instance, pdev);
292 if (ret)
293 goto out_free_irq;
294 scsi_scan_host(instance);
295 dev_set_drvdata(pdev, instance);
296 return 0;
Finn Thain0ad0eff2016-01-03 16:05:21 +1100297
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200298out_free_irq:
299 if (instance->irq != NO_IRQ)
300 free_irq(instance->irq, instance);
301 NCR5380_exit(instance);
Finn Thain0ad0eff2016-01-03 16:05:21 +1100302out_unregister:
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200303 scsi_host_put(instance);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400304out_unmap:
Finn Thain0ad0eff2016-01-03 16:05:21 +1100305 iounmap(iomem);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400306out_release:
307 if (is_pmio)
308 release_region(base, region_size);
309 else
310 release_mem_region(base, region_size);
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200311 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312}
313
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200314static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315{
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400316 struct NCR5380_hostdata *hostdata = shost_priv(instance);
317
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200318 scsi_remove_host(instance);
Finn Thain22f5f102014-11-12 16:11:56 +1100319 if (instance->irq != NO_IRQ)
Jeff Garzik1e641662007-11-11 19:52:05 -0500320 free_irq(instance->irq, instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321 NCR5380_exit(instance);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400322 iounmap(hostdata->iomem);
323 if (instance->io_port)
324 release_region(instance->io_port, instance->n_io_port);
325 else
Finn Thain9d376402016-03-23 21:10:10 +1100326 release_mem_region(instance->base, hostdata->iomem_size);
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200327 scsi_host_put(instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700328}
329
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330/**
Finn Thain6c4b88c2016-03-23 21:10:17 +1100331 * generic_NCR5380_pread - pseudo DMA read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332 * @instance: adapter to read from
333 * @dst: buffer to read into
334 * @len: buffer length
335 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300336 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 * controller
338 */
339
Finn Thain6c4b88c2016-03-23 21:10:17 +1100340static inline int generic_NCR5380_pread(struct Scsi_Host *instance,
341 unsigned char *dst, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342{
Finn Thain54d8fe42016-01-03 16:05:06 +1100343 struct NCR5380_hostdata *hostdata = shost_priv(instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344 int blocks = len / 128;
345 int start = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346
Ondrej Zary12150792016-01-03 16:06:15 +1100347 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);
348 NCR5380_write(hostdata->c400_blk_cnt, blocks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349 while (1) {
Ondrej Zary12150792016-01-03 16:06:15 +1100350 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351 break;
Ondrej Zary12150792016-01-03 16:06:15 +1100352 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353 printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
354 return -1;
355 }
Ondrej Zary12150792016-01-03 16:06:15 +1100356 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
357 ; /* FIXME - no timeout */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400359 if (instance->io_port && hostdata->io_width == 2)
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100360 insw(instance->io_port + hostdata->c400_host_buf,
361 dst + start, 64);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400362 else if (instance->io_port)
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100363 insb(instance->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100364 dst + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400365 else
366 memcpy_fromio(dst + start,
367 hostdata->iomem + NCR53C400_host_buffer, 128);
368
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369 start += 128;
370 blocks--;
371 }
372
373 if (blocks) {
Ondrej Zary12150792016-01-03 16:06:15 +1100374 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
375 ; /* FIXME - no timeout */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400377 if (instance->io_port && hostdata->io_width == 2)
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100378 insw(instance->io_port + hostdata->c400_host_buf,
379 dst + start, 64);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400380 else if (instance->io_port)
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100381 insb(instance->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100382 dst + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400383 else
384 memcpy_fromio(dst + start,
385 hostdata->iomem + NCR53C400_host_buffer, 128);
386
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387 start += 128;
388 blocks--;
389 }
390
Ondrej Zary12150792016-01-03 16:06:15 +1100391 if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392 printk("53C400r: no 53C80 gated irq after transfer");
393
Ondrej Zary42fc6372016-01-03 16:06:18 +1100394 /* wait for 53C80 registers to be available */
395 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 ;
Ondrej Zary42fc6372016-01-03 16:06:18 +1100397
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
399 printk(KERN_ERR "53C400r: no end dma signal\n");
400
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401 return 0;
402}
403
404/**
Finn Thain6c4b88c2016-03-23 21:10:17 +1100405 * generic_NCR5380_pwrite - pseudo DMA write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700406 * @instance: adapter to read from
407 * @dst: buffer to read into
408 * @len: buffer length
409 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300410 * Perform a pseudo DMA mode read from an NCR53C400 or equivalent
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411 * controller
412 */
413
Finn Thain6c4b88c2016-03-23 21:10:17 +1100414static inline int generic_NCR5380_pwrite(struct Scsi_Host *instance,
415 unsigned char *src, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416{
Finn Thain54d8fe42016-01-03 16:05:06 +1100417 struct NCR5380_hostdata *hostdata = shost_priv(instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418 int blocks = len / 128;
419 int start = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420
Ondrej Zary12150792016-01-03 16:06:15 +1100421 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
422 NCR5380_write(hostdata->c400_blk_cnt, blocks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423 while (1) {
Ondrej Zary12150792016-01-03 16:06:15 +1100424 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
426 return -1;
427 }
428
Ondrej Zary12150792016-01-03 16:06:15 +1100429 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430 break;
Ondrej Zary12150792016-01-03 16:06:15 +1100431 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432 ; // FIXME - timeout
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400433
434 if (instance->io_port && hostdata->io_width == 2)
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100435 outsw(instance->io_port + hostdata->c400_host_buf,
436 src + start, 64);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400437 else if (instance->io_port)
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100438 outsb(instance->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100439 src + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400440 else
441 memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
442 src + start, 128);
443
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444 start += 128;
445 blocks--;
446 }
447 if (blocks) {
Ondrej Zary12150792016-01-03 16:06:15 +1100448 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 ; // FIXME - no timeout
450
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400451 if (instance->io_port && hostdata->io_width == 2)
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100452 outsw(instance->io_port + hostdata->c400_host_buf,
453 src + start, 64);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400454 else if (instance->io_port)
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100455 outsb(instance->io_port + hostdata->c400_host_buf,
Ondrej Zary12150792016-01-03 16:06:15 +1100456 src + start, 128);
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400457 else
458 memcpy_toio(hostdata->iomem + NCR53C400_host_buffer,
459 src + start, 128);
460
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461 start += 128;
462 blocks--;
463 }
464
Ondrej Zary42fc6372016-01-03 16:06:18 +1100465 /* wait for 53C80 registers to be available */
466 while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) {
Ondrej Zaryaeb51152016-01-03 16:06:17 +1100467 udelay(4); /* DTC436 chip hangs without this */
468 /* FIXME - no timeout */
469 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) {
472 printk(KERN_ERR "53C400w: no end dma signal\n");
473 }
Ondrej Zary42fc6372016-01-03 16:06:18 +1100474
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475 while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
476 ; // TIMEOUT
477 return 0;
478}
Finn Thainff3d4572016-01-03 16:05:25 +1100479
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100480static int generic_NCR5380_dma_xfer_len(struct Scsi_Host *instance,
481 struct scsi_cmnd *cmd)
Finn Thainff3d4572016-01-03 16:05:25 +1100482{
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100483 struct NCR5380_hostdata *hostdata = shost_priv(instance);
Finn Thainff3d4572016-01-03 16:05:25 +1100484 int transfersize = cmd->transfersize;
485
Finn Thain7e9ec8d2016-03-23 21:10:11 +1100486 if (hostdata->flags & FLAG_NO_PSEUDO_DMA)
487 return 0;
488
Finn Thainff3d4572016-01-03 16:05:25 +1100489 /* Limit transfers to 32K, for xx400 & xx406
490 * pseudoDMA that transfers in 128 bytes blocks.
491 */
492 if (transfersize > 32 * 1024 && cmd->SCp.this_residual &&
493 !(cmd->SCp.this_residual % transfersize))
494 transfersize = 32 * 1024;
495
Ondrej Zaryf0394622016-01-03 16:06:14 +1100496 /* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
497 if (transfersize % 128)
498 transfersize = 0;
499
Finn Thainff3d4572016-01-03 16:05:25 +1100500 return transfersize;
501}
502
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503/*
504 * Include the NCR5380 core code that we build our driver around
505 */
506
507#include "NCR5380.c"
508
Christoph Hellwigd0be4a7d2005-10-31 18:31:40 +0100509static struct scsi_host_template driver_template = {
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200510 .module = THIS_MODULE,
Finn Thainaa2e2cb2016-01-03 16:05:48 +1100511 .proc_name = DRV_MODULE_NAME,
Finn Thainaa2e2cb2016-01-03 16:05:48 +1100512 .name = "Generic NCR5380/NCR53C400 SCSI",
Finn Thainaa2e2cb2016-01-03 16:05:48 +1100513 .info = generic_NCR5380_info,
514 .queuecommand = generic_NCR5380_queue_command,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700515 .eh_abort_handler = generic_NCR5380_abort,
516 .eh_bus_reset_handler = generic_NCR5380_bus_reset,
Finn Thainaa2e2cb2016-01-03 16:05:48 +1100517 .can_queue = 16,
518 .this_id = 7,
519 .sg_tablesize = SG_ALL,
520 .cmd_per_lun = 2,
521 .use_clustering = DISABLE_CLUSTERING,
Finn Thain32b26a12016-01-03 16:05:58 +1100522 .cmd_size = NCR5380_CMD_SIZE,
Finn Thain0a4e3612016-01-03 16:06:07 +1100523 .max_sectors = 128,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524};
Finn Thain161c0052016-01-03 16:05:46 +1100525
Linus Torvalds1da177e2005-04-16 15:20:36 -0700526
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200527static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev)
528{
529 int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev],
530 irq[ndev], card[ndev]);
531 if (ret) {
532 if (base[ndev])
533 printk(KERN_WARNING "Card not found at address 0x%03x\n",
534 base[ndev]);
535 return 0;
536 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200538 return 1;
539}
540
541static int generic_NCR5380_isa_remove(struct device *pdev,
542 unsigned int ndev)
543{
544 generic_NCR5380_release_resources(dev_get_drvdata(pdev));
545 dev_set_drvdata(pdev, NULL);
546 return 0;
547}
548
549static struct isa_driver generic_NCR5380_isa_driver = {
550 .match = generic_NCR5380_isa_match,
551 .remove = generic_NCR5380_isa_remove,
552 .driver = {
553 .name = DRV_MODULE_NAME
554 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700555};
556
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400557#ifdef CONFIG_PNP
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200558static struct pnp_device_id generic_NCR5380_pnp_ids[] = {
559 { .id = "DTC436e", .driver_data = BOARD_DTC3181E },
560 { .id = "" }
561};
562MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids);
563
564static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev,
565 const struct pnp_device_id *id)
566{
567 int base, irq;
568
569 if (pnp_activate_dev(pdev) < 0)
570 return -EBUSY;
571
572 base = pnp_port_start(pdev, 0);
573 irq = pnp_irq(pdev, 0);
574
575 return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq,
576 id->driver_data);
577}
578
579static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev)
580{
581 generic_NCR5380_release_resources(pnp_get_drvdata(pdev));
582 pnp_set_drvdata(pdev, NULL);
583}
584
585static struct pnp_driver generic_NCR5380_pnp_driver = {
586 .name = DRV_MODULE_NAME,
587 .id_table = generic_NCR5380_pnp_ids,
588 .probe = generic_NCR5380_pnp_probe,
589 .remove = generic_NCR5380_pnp_remove,
590};
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400591#endif /* defined(CONFIG_PNP) */
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200592
593static int pnp_registered, isa_registered;
594
595static int __init generic_NCR5380_init(void)
596{
597 int ret = 0;
598
599 /* compatibility with old-style parameters */
600 if (irq[0] == 0 && base[0] == 0 && card[0] == -1) {
601 irq[0] = ncr_irq;
602 base[0] = ncr_addr;
603 if (ncr_5380)
604 card[0] = BOARD_NCR5380;
605 if (ncr_53c400)
606 card[0] = BOARD_NCR53C400;
607 if (ncr_53c400a)
608 card[0] = BOARD_NCR53C400A;
609 if (dtc_3181e)
610 card[0] = BOARD_DTC3181E;
611 if (hp_c2502)
612 card[0] = BOARD_HP_C2502;
613 }
614
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400615#ifdef CONFIG_PNP
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200616 if (!pnp_register_driver(&generic_NCR5380_pnp_driver))
617 pnp_registered = 1;
Ondrej Zary702a98c2010-08-10 18:01:16 -0700618#endif
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200619 ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS);
620 if (!ret)
621 isa_registered = 1;
622
623 return (pnp_registered || isa_registered) ? 0 : ret;
624}
625
626static void __exit generic_NCR5380_exit(void)
627{
Ondrej Zaryb61bacb2016-10-10 00:46:52 -0400628#ifdef CONFIG_PNP
Ondrej Zarya8cfbca2016-09-27 21:00:25 +0200629 if (pnp_registered)
630 pnp_unregister_driver(&generic_NCR5380_pnp_driver);
631#endif
632 if (isa_registered)
633 isa_unregister_driver(&generic_NCR5380_isa_driver);
634}
635
636module_init(generic_NCR5380_init);
637module_exit(generic_NCR5380_exit);