Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Generic Generic NCR5380 driver |
| 3 | * |
| 4 | * Copyright 1993, Drew Eckhardt |
| 5 | * Visionary Computing |
| 6 | * (Unix and Linux consulting and custom programming) |
| 7 | * drew@colorado.edu |
| 8 | * +1 (303) 440-4894 |
| 9 | * |
| 10 | * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin |
| 11 | * K.Lentin@cs.monash.edu.au |
| 12 | * |
| 13 | * NCR53C400A extensions (c) 1996, Ingmar Baumgart |
| 14 | * ingmar@gonzo.schwaben.de |
| 15 | * |
| 16 | * DTC3181E extensions (c) 1997, Ronald van Cuijlenborg |
| 17 | * ronald.van.cuijlenborg@tip.nl or nutty@dds.nl |
| 18 | * |
| 19 | * Added ISAPNP support for DTC436 adapters, |
| 20 | * Thomas Sailer, sailer@ife.ee.ethz.ch |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | * |
Finn Thain | 9c41ab2 | 2016-03-23 21:10:28 +1100 | [diff] [blame] | 22 | * See Documentation/scsi/g_NCR5380.txt for more info. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | */ |
| 24 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <linux/blkdev.h> |
Finn Thain | 161c005 | 2016-01-03 16:05:46 +1100 | [diff] [blame] | 27 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | #include <scsi/scsi_host.h> |
| 29 | #include "g_NCR5380.h" |
| 30 | #include "NCR5380.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include <linux/init.h> |
| 32 | #include <linux/ioport.h> |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 33 | #include <linux/isa.h> |
| 34 | #include <linux/pnp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/interrupt.h> |
| 36 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 37 | #define MAX_CARDS 8 |
| 38 | |
| 39 | /* old-style parameters for compatibility */ |
Finn Thain | c0965e6 | 2016-01-03 16:05:05 +1100 | [diff] [blame] | 40 | static int ncr_irq; |
Finn Thain | c0965e6 | 2016-01-03 16:05:05 +1100 | [diff] [blame] | 41 | static int ncr_addr; |
| 42 | static int ncr_5380; |
| 43 | static int ncr_53c400; |
| 44 | static int ncr_53c400a; |
| 45 | static int dtc_3181e; |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 46 | static int hp_c2502; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 47 | module_param(ncr_irq, int, 0); |
| 48 | module_param(ncr_addr, int, 0); |
| 49 | module_param(ncr_5380, int, 0); |
| 50 | module_param(ncr_53c400, int, 0); |
| 51 | module_param(ncr_53c400a, int, 0); |
| 52 | module_param(dtc_3181e, int, 0); |
| 53 | module_param(hp_c2502, int, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 55 | static int irq[] = { 0, 0, 0, 0, 0, 0, 0, 0 }; |
| 56 | module_param_array(irq, int, NULL, 0); |
| 57 | MODULE_PARM_DESC(irq, "IRQ number(s)"); |
| 58 | |
| 59 | static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 }; |
| 60 | module_param_array(base, int, NULL, 0); |
| 61 | MODULE_PARM_DESC(base, "base address(es)"); |
| 62 | |
| 63 | static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 }; |
| 64 | module_param_array(card, int, NULL, 0); |
| 65 | MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)"); |
| 66 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 67 | MODULE_ALIAS("g_NCR5380_mmio"); |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 68 | MODULE_LICENSE("GPL"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 70 | /* |
| 71 | * Configure I/O address of 53C400A or DTC436 by writing magic numbers |
| 72 | * to ports 0x779 and 0x379. |
| 73 | */ |
| 74 | static void magic_configure(int idx, u8 irq, u8 magic[]) |
| 75 | { |
| 76 | u8 cfg = 0; |
| 77 | |
| 78 | outb(magic[0], 0x779); |
| 79 | outb(magic[1], 0x379); |
| 80 | outb(magic[2], 0x379); |
| 81 | outb(magic[3], 0x379); |
| 82 | outb(magic[4], 0x379); |
| 83 | |
| 84 | /* allowed IRQs for HP C2502 */ |
| 85 | if (irq != 2 && irq != 3 && irq != 4 && irq != 5 && irq != 7) |
| 86 | irq = 0; |
| 87 | if (idx >= 0 && idx <= 7) |
| 88 | cfg = 0x80 | idx | (irq << 4); |
| 89 | outb(cfg, 0x379); |
| 90 | } |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 91 | |
| 92 | static unsigned int ncr_53c400a_ports[] = { |
| 93 | 0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0 |
| 94 | }; |
| 95 | static unsigned int dtc_3181e_ports[] = { |
| 96 | 0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0 |
| 97 | }; |
| 98 | static u8 ncr_53c400a_magic[] = { /* 53C400A & DTC436 */ |
| 99 | 0x59, 0xb9, 0xc5, 0xae, 0xa6 |
| 100 | }; |
| 101 | static u8 hp_c2502_magic[] = { /* HP C2502 */ |
| 102 | 0x0f, 0x22, 0xf0, 0x20, 0x80 |
| 103 | }; |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 104 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 105 | static int generic_NCR5380_init_one(struct scsi_host_template *tpnt, |
| 106 | struct device *pdev, int base, int irq, int board) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | { |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 108 | bool is_pmio = base <= 0xffff; |
| 109 | int ret; |
| 110 | int flags = 0; |
| 111 | unsigned int *ports = NULL; |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 112 | u8 *magic = NULL; |
Ondrej Zary | 702a98c | 2010-08-10 18:01:16 -0700 | [diff] [blame] | 113 | int i; |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 114 | int port_idx = -1; |
Finn Thain | 9d37640 | 2016-03-23 21:10:10 +1100 | [diff] [blame] | 115 | unsigned long region_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | struct Scsi_Host *instance; |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 117 | struct NCR5380_hostdata *hostdata; |
Al Viro | c818cb6 | 2006-03-24 03:15:37 -0800 | [diff] [blame] | 118 | void __iomem *iomem; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 120 | switch (board) { |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 121 | case BOARD_NCR5380: |
| 122 | flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP; |
| 123 | break; |
| 124 | case BOARD_NCR53C400A: |
| 125 | ports = ncr_53c400a_ports; |
| 126 | magic = ncr_53c400a_magic; |
| 127 | break; |
| 128 | case BOARD_HP_C2502: |
| 129 | ports = ncr_53c400a_ports; |
| 130 | magic = hp_c2502_magic; |
| 131 | break; |
| 132 | case BOARD_DTC3181E: |
| 133 | ports = dtc_3181e_ports; |
| 134 | magic = ncr_53c400a_magic; |
| 135 | break; |
| 136 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 138 | if (is_pmio && ports && magic) { |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 139 | /* wakeup sequence for the NCR53C400A and DTC3181E */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 141 | /* Disable the adapter and look for a free io port */ |
| 142 | magic_configure(-1, 0, magic); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 144 | region_size = 16; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 145 | if (base) |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 146 | for (i = 0; ports[i]; i++) { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 147 | if (base == ports[i]) { /* index found */ |
| 148 | if (!request_region(ports[i], |
| 149 | region_size, |
| 150 | "ncr53c80")) |
| 151 | return -EBUSY; |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 152 | break; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 153 | } |
| 154 | } |
| 155 | else |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 156 | for (i = 0; ports[i]; i++) { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 157 | if (!request_region(ports[i], region_size, |
| 158 | "ncr53c80")) |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 159 | continue; |
| 160 | if (inb(ports[i]) == 0xff) |
| 161 | break; |
| 162 | release_region(ports[i], region_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | } |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 164 | if (ports[i]) { |
| 165 | /* At this point we have our region reserved */ |
| 166 | magic_configure(i, 0, magic); /* no IRQ yet */ |
| 167 | outb(0xc0, ports[i] + 9); |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 168 | if (inb(ports[i] + 9) != 0x80) { |
| 169 | ret = -ENODEV; |
| 170 | goto out_release; |
| 171 | } |
| 172 | base = ports[i]; |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 173 | port_idx = i; |
| 174 | } else |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 175 | return -EINVAL; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 176 | } else if (is_pmio) { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 177 | /* NCR5380 - no configuration, just grab */ |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 178 | region_size = 8; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 179 | if (!base || !request_region(base, region_size, "ncr5380")) |
| 180 | return -EBUSY; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 181 | } else { /* MMIO */ |
| 182 | region_size = NCR53C400_region_size; |
| 183 | if (!request_mem_region(base, region_size, "ncr5380")) |
| 184 | return -EBUSY; |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 185 | } |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 186 | |
| 187 | if (is_pmio) |
| 188 | iomem = ioport_map(base, region_size); |
| 189 | else |
| 190 | iomem = ioremap(base, region_size); |
| 191 | |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 192 | if (!iomem) { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 193 | ret = -ENOMEM; |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 194 | goto out_release; |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 195 | } |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 196 | |
| 197 | instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata)); |
| 198 | if (instance == NULL) { |
| 199 | ret = -ENOMEM; |
| 200 | goto out_unmap; |
| 201 | } |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 202 | hostdata = shost_priv(instance); |
| 203 | |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 204 | hostdata->iomem = iomem; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 205 | |
| 206 | if (is_pmio) { |
| 207 | instance->io_port = base; |
| 208 | instance->n_io_port = region_size; |
| 209 | hostdata->io_width = 1; /* 8-bit PDMA by default */ |
| 210 | hostdata->offset = 0; |
| 211 | |
| 212 | /* |
| 213 | * On NCR53C400 boards, NCR5380 registers are mapped 8 past |
| 214 | * the base address. |
| 215 | */ |
| 216 | switch (board) { |
| 217 | case BOARD_NCR53C400: |
| 218 | instance->io_port += 8; |
| 219 | hostdata->c400_ctl_status = 0; |
| 220 | hostdata->c400_blk_cnt = 1; |
| 221 | hostdata->c400_host_buf = 4; |
| 222 | break; |
| 223 | case BOARD_DTC3181E: |
| 224 | hostdata->io_width = 2; /* 16-bit PDMA */ |
| 225 | /* fall through */ |
| 226 | case BOARD_NCR53C400A: |
| 227 | case BOARD_HP_C2502: |
| 228 | hostdata->c400_ctl_status = 9; |
| 229 | hostdata->c400_blk_cnt = 10; |
| 230 | hostdata->c400_host_buf = 8; |
| 231 | break; |
| 232 | } |
| 233 | } else { |
| 234 | instance->base = base; |
| 235 | hostdata->iomem_size = region_size; |
| 236 | hostdata->offset = NCR53C400_mem_base; |
| 237 | switch (board) { |
| 238 | case BOARD_NCR53C400: |
| 239 | hostdata->c400_ctl_status = 0x100; |
| 240 | hostdata->c400_blk_cnt = 0x101; |
| 241 | hostdata->c400_host_buf = 0x104; |
| 242 | break; |
| 243 | case BOARD_DTC3181E: |
| 244 | case BOARD_NCR53C400A: |
| 245 | case BOARD_HP_C2502: |
| 246 | pr_err(DRV_MODULE_NAME ": unknown register offsets\n"); |
| 247 | ret = -EINVAL; |
| 248 | goto out_unregister; |
| 249 | } |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 250 | } |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 251 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 252 | ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP); |
| 253 | if (ret) |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 254 | goto out_unregister; |
| 255 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 256 | switch (board) { |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 257 | case BOARD_NCR53C400: |
| 258 | case BOARD_DTC3181E: |
| 259 | case BOARD_NCR53C400A: |
| 260 | case BOARD_HP_C2502: |
| 261 | NCR5380_write(hostdata->c400_ctl_status, CSR_BASE); |
| 262 | } |
| 263 | |
| 264 | NCR5380_maybe_reset_bus(instance); |
| 265 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 266 | if (irq != IRQ_AUTO) |
| 267 | instance->irq = irq; |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 268 | else |
| 269 | instance->irq = NCR5380_probe_irq(instance, 0xffff); |
| 270 | |
| 271 | /* Compatibility with documented NCR5380 kernel parameters */ |
| 272 | if (instance->irq == 255) |
| 273 | instance->irq = NO_IRQ; |
| 274 | |
| 275 | if (instance->irq != NO_IRQ) { |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 276 | /* set IRQ for HP C2502 */ |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 277 | if (board == BOARD_HP_C2502) |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 278 | magic_configure(port_idx, instance->irq, magic); |
Ondrej Zary | d91f5af | 2016-09-27 21:00:24 +0200 | [diff] [blame] | 279 | if (request_irq(instance->irq, generic_NCR5380_intr, |
| 280 | 0, "NCR5380", instance)) { |
| 281 | printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq); |
| 282 | instance->irq = NO_IRQ; |
| 283 | } |
| 284 | } |
| 285 | |
| 286 | if (instance->irq == NO_IRQ) { |
| 287 | printk(KERN_INFO "scsi%d : interrupts not enabled. for better interactive performance,\n", instance->host_no); |
| 288 | printk(KERN_INFO "scsi%d : please jumper the board for a free IRQ.\n", instance->host_no); |
| 289 | } |
| 290 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 291 | ret = scsi_add_host(instance, pdev); |
| 292 | if (ret) |
| 293 | goto out_free_irq; |
| 294 | scsi_scan_host(instance); |
| 295 | dev_set_drvdata(pdev, instance); |
| 296 | return 0; |
Finn Thain | 0ad0eff | 2016-01-03 16:05:21 +1100 | [diff] [blame] | 297 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 298 | out_free_irq: |
| 299 | if (instance->irq != NO_IRQ) |
| 300 | free_irq(instance->irq, instance); |
| 301 | NCR5380_exit(instance); |
Finn Thain | 0ad0eff | 2016-01-03 16:05:21 +1100 | [diff] [blame] | 302 | out_unregister: |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 303 | scsi_host_put(instance); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 304 | out_unmap: |
Finn Thain | 0ad0eff | 2016-01-03 16:05:21 +1100 | [diff] [blame] | 305 | iounmap(iomem); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 306 | out_release: |
| 307 | if (is_pmio) |
| 308 | release_region(base, region_size); |
| 309 | else |
| 310 | release_mem_region(base, region_size); |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 311 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 312 | } |
| 313 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 314 | static void generic_NCR5380_release_resources(struct Scsi_Host *instance) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 315 | { |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 316 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
| 317 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 318 | scsi_remove_host(instance); |
Finn Thain | 22f5f10 | 2014-11-12 16:11:56 +1100 | [diff] [blame] | 319 | if (instance->irq != NO_IRQ) |
Jeff Garzik | 1e64166 | 2007-11-11 19:52:05 -0500 | [diff] [blame] | 320 | free_irq(instance->irq, instance); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 321 | NCR5380_exit(instance); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 322 | iounmap(hostdata->iomem); |
| 323 | if (instance->io_port) |
| 324 | release_region(instance->io_port, instance->n_io_port); |
| 325 | else |
Finn Thain | 9d37640 | 2016-03-23 21:10:10 +1100 | [diff] [blame] | 326 | release_mem_region(instance->base, hostdata->iomem_size); |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 327 | scsi_host_put(instance); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 328 | } |
| 329 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | /** |
Finn Thain | 6c4b88c | 2016-03-23 21:10:17 +1100 | [diff] [blame] | 331 | * generic_NCR5380_pread - pseudo DMA read |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | * @instance: adapter to read from |
| 333 | * @dst: buffer to read into |
| 334 | * @len: buffer length |
| 335 | * |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 336 | * Perform a pseudo DMA mode read from an NCR53C400 or equivalent |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | * controller |
| 338 | */ |
| 339 | |
Finn Thain | 6c4b88c | 2016-03-23 21:10:17 +1100 | [diff] [blame] | 340 | static inline int generic_NCR5380_pread(struct Scsi_Host *instance, |
| 341 | unsigned char *dst, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | { |
Finn Thain | 54d8fe4 | 2016-01-03 16:05:06 +1100 | [diff] [blame] | 343 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | int blocks = len / 128; |
| 345 | int start = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 346 | |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 347 | NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR); |
| 348 | NCR5380_write(hostdata->c400_blk_cnt, blocks); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | while (1) { |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 350 | if (NCR5380_read(hostdata->c400_blk_cnt) == 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 351 | break; |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 352 | if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks); |
| 354 | return -1; |
| 355 | } |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 356 | while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) |
| 357 | ; /* FIXME - no timeout */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 359 | if (instance->io_port && hostdata->io_width == 2) |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 360 | insw(instance->io_port + hostdata->c400_host_buf, |
| 361 | dst + start, 64); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 362 | else if (instance->io_port) |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 363 | insb(instance->io_port + hostdata->c400_host_buf, |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 364 | dst + start, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 365 | else |
| 366 | memcpy_fromio(dst + start, |
| 367 | hostdata->iomem + NCR53C400_host_buffer, 128); |
| 368 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 369 | start += 128; |
| 370 | blocks--; |
| 371 | } |
| 372 | |
| 373 | if (blocks) { |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 374 | while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) |
| 375 | ; /* FIXME - no timeout */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 377 | if (instance->io_port && hostdata->io_width == 2) |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 378 | insw(instance->io_port + hostdata->c400_host_buf, |
| 379 | dst + start, 64); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 380 | else if (instance->io_port) |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 381 | insb(instance->io_port + hostdata->c400_host_buf, |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 382 | dst + start, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 383 | else |
| 384 | memcpy_fromio(dst + start, |
| 385 | hostdata->iomem + NCR53C400_host_buffer, 128); |
| 386 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 387 | start += 128; |
| 388 | blocks--; |
| 389 | } |
| 390 | |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 391 | if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 392 | printk("53C400r: no 53C80 gated irq after transfer"); |
| 393 | |
Ondrej Zary | 42fc637 | 2016-01-03 16:06:18 +1100 | [diff] [blame] | 394 | /* wait for 53C80 registers to be available */ |
| 395 | while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 396 | ; |
Ondrej Zary | 42fc637 | 2016-01-03 16:06:18 +1100 | [diff] [blame] | 397 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 398 | if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) |
| 399 | printk(KERN_ERR "53C400r: no end dma signal\n"); |
| 400 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | return 0; |
| 402 | } |
| 403 | |
| 404 | /** |
Finn Thain | 6c4b88c | 2016-03-23 21:10:17 +1100 | [diff] [blame] | 405 | * generic_NCR5380_pwrite - pseudo DMA write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 406 | * @instance: adapter to read from |
| 407 | * @dst: buffer to read into |
| 408 | * @len: buffer length |
| 409 | * |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 410 | * Perform a pseudo DMA mode read from an NCR53C400 or equivalent |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 411 | * controller |
| 412 | */ |
| 413 | |
Finn Thain | 6c4b88c | 2016-03-23 21:10:17 +1100 | [diff] [blame] | 414 | static inline int generic_NCR5380_pwrite(struct Scsi_Host *instance, |
| 415 | unsigned char *src, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 416 | { |
Finn Thain | 54d8fe4 | 2016-01-03 16:05:06 +1100 | [diff] [blame] | 417 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 418 | int blocks = len / 128; |
| 419 | int start = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 421 | NCR5380_write(hostdata->c400_ctl_status, CSR_BASE); |
| 422 | NCR5380_write(hostdata->c400_blk_cnt, blocks); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | while (1) { |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 424 | if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 425 | printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks); |
| 426 | return -1; |
| 427 | } |
| 428 | |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 429 | if (NCR5380_read(hostdata->c400_blk_cnt) == 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 430 | break; |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 431 | while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 432 | ; // FIXME - timeout |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 433 | |
| 434 | if (instance->io_port && hostdata->io_width == 2) |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 435 | outsw(instance->io_port + hostdata->c400_host_buf, |
| 436 | src + start, 64); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 437 | else if (instance->io_port) |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 438 | outsb(instance->io_port + hostdata->c400_host_buf, |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 439 | src + start, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 440 | else |
| 441 | memcpy_toio(hostdata->iomem + NCR53C400_host_buffer, |
| 442 | src + start, 128); |
| 443 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | start += 128; |
| 445 | blocks--; |
| 446 | } |
| 447 | if (blocks) { |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 448 | while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | ; // FIXME - no timeout |
| 450 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 451 | if (instance->io_port && hostdata->io_width == 2) |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 452 | outsw(instance->io_port + hostdata->c400_host_buf, |
| 453 | src + start, 64); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 454 | else if (instance->io_port) |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 455 | outsb(instance->io_port + hostdata->c400_host_buf, |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 456 | src + start, 128); |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 457 | else |
| 458 | memcpy_toio(hostdata->iomem + NCR53C400_host_buffer, |
| 459 | src + start, 128); |
| 460 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | start += 128; |
| 462 | blocks--; |
| 463 | } |
| 464 | |
Ondrej Zary | 42fc637 | 2016-01-03 16:06:18 +1100 | [diff] [blame] | 465 | /* wait for 53C80 registers to be available */ |
| 466 | while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) { |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 467 | udelay(4); /* DTC436 chip hangs without this */ |
| 468 | /* FIXME - no timeout */ |
| 469 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 471 | if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) { |
| 472 | printk(KERN_ERR "53C400w: no end dma signal\n"); |
| 473 | } |
Ondrej Zary | 42fc637 | 2016-01-03 16:06:18 +1100 | [diff] [blame] | 474 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 475 | while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT)) |
| 476 | ; // TIMEOUT |
| 477 | return 0; |
| 478 | } |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 479 | |
Finn Thain | 7e9ec8d | 2016-03-23 21:10:11 +1100 | [diff] [blame] | 480 | static int generic_NCR5380_dma_xfer_len(struct Scsi_Host *instance, |
| 481 | struct scsi_cmnd *cmd) |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 482 | { |
Finn Thain | 7e9ec8d | 2016-03-23 21:10:11 +1100 | [diff] [blame] | 483 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 484 | int transfersize = cmd->transfersize; |
| 485 | |
Finn Thain | 7e9ec8d | 2016-03-23 21:10:11 +1100 | [diff] [blame] | 486 | if (hostdata->flags & FLAG_NO_PSEUDO_DMA) |
| 487 | return 0; |
| 488 | |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 489 | /* Limit transfers to 32K, for xx400 & xx406 |
| 490 | * pseudoDMA that transfers in 128 bytes blocks. |
| 491 | */ |
| 492 | if (transfersize > 32 * 1024 && cmd->SCp.this_residual && |
| 493 | !(cmd->SCp.this_residual % transfersize)) |
| 494 | transfersize = 32 * 1024; |
| 495 | |
Ondrej Zary | f039462 | 2016-01-03 16:06:14 +1100 | [diff] [blame] | 496 | /* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */ |
| 497 | if (transfersize % 128) |
| 498 | transfersize = 0; |
| 499 | |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 500 | return transfersize; |
| 501 | } |
| 502 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 503 | /* |
| 504 | * Include the NCR5380 core code that we build our driver around |
| 505 | */ |
| 506 | |
| 507 | #include "NCR5380.c" |
| 508 | |
Christoph Hellwig | d0be4a7d | 2005-10-31 18:31:40 +0100 | [diff] [blame] | 509 | static struct scsi_host_template driver_template = { |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 510 | .module = THIS_MODULE, |
Finn Thain | aa2e2cb | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 511 | .proc_name = DRV_MODULE_NAME, |
Finn Thain | aa2e2cb | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 512 | .name = "Generic NCR5380/NCR53C400 SCSI", |
Finn Thain | aa2e2cb | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 513 | .info = generic_NCR5380_info, |
| 514 | .queuecommand = generic_NCR5380_queue_command, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | .eh_abort_handler = generic_NCR5380_abort, |
| 516 | .eh_bus_reset_handler = generic_NCR5380_bus_reset, |
Finn Thain | aa2e2cb | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 517 | .can_queue = 16, |
| 518 | .this_id = 7, |
| 519 | .sg_tablesize = SG_ALL, |
| 520 | .cmd_per_lun = 2, |
| 521 | .use_clustering = DISABLE_CLUSTERING, |
Finn Thain | 32b26a1 | 2016-01-03 16:05:58 +1100 | [diff] [blame] | 522 | .cmd_size = NCR5380_CMD_SIZE, |
Finn Thain | 0a4e361 | 2016-01-03 16:06:07 +1100 | [diff] [blame] | 523 | .max_sectors = 128, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | }; |
Finn Thain | 161c005 | 2016-01-03 16:05:46 +1100 | [diff] [blame] | 525 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 526 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 527 | static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev) |
| 528 | { |
| 529 | int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev], |
| 530 | irq[ndev], card[ndev]); |
| 531 | if (ret) { |
| 532 | if (base[ndev]) |
| 533 | printk(KERN_WARNING "Card not found at address 0x%03x\n", |
| 534 | base[ndev]); |
| 535 | return 0; |
| 536 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 537 | |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 538 | return 1; |
| 539 | } |
| 540 | |
| 541 | static int generic_NCR5380_isa_remove(struct device *pdev, |
| 542 | unsigned int ndev) |
| 543 | { |
| 544 | generic_NCR5380_release_resources(dev_get_drvdata(pdev)); |
| 545 | dev_set_drvdata(pdev, NULL); |
| 546 | return 0; |
| 547 | } |
| 548 | |
| 549 | static struct isa_driver generic_NCR5380_isa_driver = { |
| 550 | .match = generic_NCR5380_isa_match, |
| 551 | .remove = generic_NCR5380_isa_remove, |
| 552 | .driver = { |
| 553 | .name = DRV_MODULE_NAME |
| 554 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 555 | }; |
| 556 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 557 | #ifdef CONFIG_PNP |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 558 | static struct pnp_device_id generic_NCR5380_pnp_ids[] = { |
| 559 | { .id = "DTC436e", .driver_data = BOARD_DTC3181E }, |
| 560 | { .id = "" } |
| 561 | }; |
| 562 | MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids); |
| 563 | |
| 564 | static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev, |
| 565 | const struct pnp_device_id *id) |
| 566 | { |
| 567 | int base, irq; |
| 568 | |
| 569 | if (pnp_activate_dev(pdev) < 0) |
| 570 | return -EBUSY; |
| 571 | |
| 572 | base = pnp_port_start(pdev, 0); |
| 573 | irq = pnp_irq(pdev, 0); |
| 574 | |
| 575 | return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq, |
| 576 | id->driver_data); |
| 577 | } |
| 578 | |
| 579 | static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev) |
| 580 | { |
| 581 | generic_NCR5380_release_resources(pnp_get_drvdata(pdev)); |
| 582 | pnp_set_drvdata(pdev, NULL); |
| 583 | } |
| 584 | |
| 585 | static struct pnp_driver generic_NCR5380_pnp_driver = { |
| 586 | .name = DRV_MODULE_NAME, |
| 587 | .id_table = generic_NCR5380_pnp_ids, |
| 588 | .probe = generic_NCR5380_pnp_probe, |
| 589 | .remove = generic_NCR5380_pnp_remove, |
| 590 | }; |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 591 | #endif /* defined(CONFIG_PNP) */ |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 592 | |
| 593 | static int pnp_registered, isa_registered; |
| 594 | |
| 595 | static int __init generic_NCR5380_init(void) |
| 596 | { |
| 597 | int ret = 0; |
| 598 | |
| 599 | /* compatibility with old-style parameters */ |
| 600 | if (irq[0] == 0 && base[0] == 0 && card[0] == -1) { |
| 601 | irq[0] = ncr_irq; |
| 602 | base[0] = ncr_addr; |
| 603 | if (ncr_5380) |
| 604 | card[0] = BOARD_NCR5380; |
| 605 | if (ncr_53c400) |
| 606 | card[0] = BOARD_NCR53C400; |
| 607 | if (ncr_53c400a) |
| 608 | card[0] = BOARD_NCR53C400A; |
| 609 | if (dtc_3181e) |
| 610 | card[0] = BOARD_DTC3181E; |
| 611 | if (hp_c2502) |
| 612 | card[0] = BOARD_HP_C2502; |
| 613 | } |
| 614 | |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 615 | #ifdef CONFIG_PNP |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 616 | if (!pnp_register_driver(&generic_NCR5380_pnp_driver)) |
| 617 | pnp_registered = 1; |
Ondrej Zary | 702a98c | 2010-08-10 18:01:16 -0700 | [diff] [blame] | 618 | #endif |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 619 | ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS); |
| 620 | if (!ret) |
| 621 | isa_registered = 1; |
| 622 | |
| 623 | return (pnp_registered || isa_registered) ? 0 : ret; |
| 624 | } |
| 625 | |
| 626 | static void __exit generic_NCR5380_exit(void) |
| 627 | { |
Ondrej Zary | b61bacb | 2016-10-10 00:46:52 -0400 | [diff] [blame^] | 628 | #ifdef CONFIG_PNP |
Ondrej Zary | a8cfbca | 2016-09-27 21:00:25 +0200 | [diff] [blame] | 629 | if (pnp_registered) |
| 630 | pnp_unregister_driver(&generic_NCR5380_pnp_driver); |
| 631 | #endif |
| 632 | if (isa_registered) |
| 633 | isa_unregister_driver(&generic_NCR5380_isa_driver); |
| 634 | } |
| 635 | |
| 636 | module_init(generic_NCR5380_init); |
| 637 | module_exit(generic_NCR5380_exit); |