blob: 67107605fb4c1067ef131073bb94222d7ef5dc9c [file] [log] [blame]
Rajendra Nayak38b248d2014-04-29 16:35:10 +05301/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 * Based on "omap4.dtsi"
8 */
9
10#include "dra7.dtsi"
11
12/ {
13 compatible = "ti,dra722", "ti,dra72", "ti,dra7";
14
Lucas Weaverf53e3c52014-08-19 08:54:00 -050015 pmu {
16 compatible = "arm,cortex-a15-pmu";
Marc Zyngier7136d452015-03-11 15:43:49 +000017 interrupt-parent = <&wakeupgen>;
Marc Zyngier783d3182015-03-11 15:43:44 +000018 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
Lucas Weaverf53e3c52014-08-19 08:54:00 -050019 };
Rajendra Nayak38b248d2014-04-29 16:35:10 +053020};
Tomi Valkeinen95c1cd12014-07-09 16:15:18 +053021
22&dss {
23 reg = <0x58000000 0x80>,
24 <0x58004054 0x4>,
25 <0x58004300 0x20>;
26 reg-names = "dss", "pll1_clkctrl", "pll1";
27
28 clocks = <&dss_dss_clk>,
29 <&dss_video1_clk>;
30 clock-names = "fck", "video1_clk";
31};
Suman Anna48aff9f2015-09-18 13:16:31 -050032
33&mailbox5 {
34 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
35 ti,mbox-tx = <6 2 2>;
36 ti,mbox-rx = <4 2 2>;
37 status = "disabled";
38 };
39 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
40 ti,mbox-tx = <5 2 2>;
41 ti,mbox-rx = <1 2 2>;
42 status = "disabled";
43 };
44};
45
46&mailbox6 {
47 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
48 ti,mbox-tx = <6 2 2>;
49 ti,mbox-rx = <4 2 2>;
50 status = "disabled";
51 };
52};