blob: 24308ae8abf56b023a54b7fa60cde1f8e1006d95 [file] [log] [blame]
Vishal Verma5d0f6132013-03-04 18:40:58 -07001/*
2 * NVM Express device driver
Matthew Wilcox8757ad62014-04-11 10:37:39 -04003 * Copyright (c) 2011-2014, Intel Corporation.
Vishal Verma5d0f6132013-03-04 18:40:58 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
Vishal Verma5d0f6132013-03-04 18:40:58 -070013 */
14
15/*
16 * Refer to the SCSI-NVMe Translation spec for details on how
17 * each command is translated.
18 */
19
20#include <linux/nvme.h>
21#include <linux/bio.h>
22#include <linux/bitops.h>
23#include <linux/blkdev.h>
Keith Busch320a3822013-10-23 13:07:34 -060024#include <linux/compat.h>
Vishal Verma5d0f6132013-03-04 18:40:58 -070025#include <linux/delay.h>
26#include <linux/errno.h>
27#include <linux/fs.h>
28#include <linux/genhd.h>
29#include <linux/idr.h>
30#include <linux/init.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/kdev_t.h>
34#include <linux/kthread.h>
35#include <linux/kernel.h>
36#include <linux/mm.h>
37#include <linux/module.h>
38#include <linux/moduleparam.h>
39#include <linux/pci.h>
40#include <linux/poison.h>
41#include <linux/sched.h>
42#include <linux/slab.h>
43#include <linux/types.h>
Vishal Verma5d0f6132013-03-04 18:40:58 -070044#include <scsi/sg.h>
45#include <scsi/scsi.h>
46
47
48static int sg_version_num = 30534; /* 2 digits for each component */
49
50#define SNTI_TRANSLATION_SUCCESS 0
51#define SNTI_INTERNAL_ERROR 1
52
53/* VPD Page Codes */
54#define VPD_SUPPORTED_PAGES 0x00
55#define VPD_SERIAL_NUMBER 0x80
56#define VPD_DEVICE_IDENTIFIERS 0x83
57#define VPD_EXTENDED_INQUIRY 0x86
58#define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
59
60/* CDB offsets */
61#define REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET 6
62#define REPORT_LUNS_SR_OFFSET 2
63#define READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET 10
64#define REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET 4
65#define REQUEST_SENSE_DESC_OFFSET 1
66#define REQUEST_SENSE_DESC_MASK 0x01
67#define DESCRIPTOR_FORMAT_SENSE_DATA_TYPE 1
68#define INQUIRY_EVPD_BYTE_OFFSET 1
69#define INQUIRY_PAGE_CODE_BYTE_OFFSET 2
70#define INQUIRY_EVPD_BIT_MASK 1
71#define INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET 3
72#define START_STOP_UNIT_CDB_IMMED_OFFSET 1
73#define START_STOP_UNIT_CDB_IMMED_MASK 0x1
74#define START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET 3
75#define START_STOP_UNIT_CDB_POWER_COND_MOD_MASK 0xF
76#define START_STOP_UNIT_CDB_POWER_COND_OFFSET 4
77#define START_STOP_UNIT_CDB_POWER_COND_MASK 0xF0
78#define START_STOP_UNIT_CDB_NO_FLUSH_OFFSET 4
79#define START_STOP_UNIT_CDB_NO_FLUSH_MASK 0x4
80#define START_STOP_UNIT_CDB_START_OFFSET 4
81#define START_STOP_UNIT_CDB_START_MASK 0x1
82#define WRITE_BUFFER_CDB_MODE_OFFSET 1
83#define WRITE_BUFFER_CDB_MODE_MASK 0x1F
84#define WRITE_BUFFER_CDB_BUFFER_ID_OFFSET 2
85#define WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET 3
86#define WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET 6
87#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET 1
88#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK 0xC0
89#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT 6
90#define FORMAT_UNIT_CDB_LONG_LIST_OFFSET 1
91#define FORMAT_UNIT_CDB_LONG_LIST_MASK 0x20
92#define FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET 1
93#define FORMAT_UNIT_CDB_FORMAT_DATA_MASK 0x10
94#define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
95#define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
96#define FORMAT_UNIT_PROT_INT_OFFSET 3
97#define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
98#define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
Keith Buschec503732013-04-24 15:44:24 -060099#define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
Vishal Verma5d0f6132013-03-04 18:40:58 -0700100
101/* Misc. defines */
102#define NIBBLE_SHIFT 4
103#define FIXED_SENSE_DATA 0x70
104#define DESC_FORMAT_SENSE_DATA 0x72
105#define FIXED_SENSE_DATA_ADD_LENGTH 10
106#define LUN_ENTRY_SIZE 8
107#define LUN_DATA_HEADER_SIZE 8
108#define ALL_LUNS_RETURNED 0x02
109#define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
110#define RESTRICTED_LUNS_RETURNED 0x00
111#define NVME_POWER_STATE_START_VALID 0x00
112#define NVME_POWER_STATE_ACTIVE 0x01
113#define NVME_POWER_STATE_IDLE 0x02
114#define NVME_POWER_STATE_STANDBY 0x03
115#define NVME_POWER_STATE_LU_CONTROL 0x07
116#define POWER_STATE_0 0
117#define POWER_STATE_1 1
118#define POWER_STATE_2 2
119#define POWER_STATE_3 3
120#define DOWNLOAD_SAVE_ACTIVATE 0x05
121#define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
122#define ACTIVATE_DEFERRED_MICROCODE 0x0F
123#define FORMAT_UNIT_IMMED_MASK 0x2
124#define FORMAT_UNIT_IMMED_OFFSET 1
125#define KELVIN_TEMP_FACTOR 273
126#define FIXED_FMT_SENSE_DATA_SIZE 18
127#define DESC_FMT_SENSE_DATA_SIZE 8
128
129/* SCSI/NVMe defines and bit masks */
130#define INQ_STANDARD_INQUIRY_PAGE 0x00
131#define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
132#define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
133#define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
134#define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
135#define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
136#define INQ_SERIAL_NUMBER_LENGTH 0x14
137#define INQ_NUM_SUPPORTED_VPD_PAGES 5
138#define VERSION_SPC_4 0x06
139#define ACA_UNSUPPORTED 0
140#define STANDARD_INQUIRY_LENGTH 36
141#define ADDITIONAL_STD_INQ_LENGTH 31
142#define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
143#define RESERVED_FIELD 0
144
145/* SCSI READ/WRITE Defines */
146#define IO_CDB_WP_MASK 0xE0
147#define IO_CDB_WP_SHIFT 5
148#define IO_CDB_FUA_MASK 0x8
149#define IO_6_CDB_LBA_OFFSET 0
150#define IO_6_CDB_LBA_MASK 0x001FFFFF
151#define IO_6_CDB_TX_LEN_OFFSET 4
152#define IO_6_DEFAULT_TX_LEN 256
153#define IO_10_CDB_LBA_OFFSET 2
154#define IO_10_CDB_TX_LEN_OFFSET 7
155#define IO_10_CDB_WP_OFFSET 1
156#define IO_10_CDB_FUA_OFFSET 1
157#define IO_12_CDB_LBA_OFFSET 2
158#define IO_12_CDB_TX_LEN_OFFSET 6
159#define IO_12_CDB_WP_OFFSET 1
160#define IO_12_CDB_FUA_OFFSET 1
161#define IO_16_CDB_FUA_OFFSET 1
162#define IO_16_CDB_WP_OFFSET 1
163#define IO_16_CDB_LBA_OFFSET 2
164#define IO_16_CDB_TX_LEN_OFFSET 10
165
166/* Mode Sense/Select defines */
167#define MODE_PAGE_INFO_EXCEP 0x1C
168#define MODE_PAGE_CACHING 0x08
169#define MODE_PAGE_CONTROL 0x0A
170#define MODE_PAGE_POWER_CONDITION 0x1A
171#define MODE_PAGE_RETURN_ALL 0x3F
172#define MODE_PAGE_BLK_DES_LEN 0x08
173#define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
174#define MODE_PAGE_CACHING_LEN 0x14
175#define MODE_PAGE_CONTROL_LEN 0x0C
176#define MODE_PAGE_POW_CND_LEN 0x28
177#define MODE_PAGE_INF_EXC_LEN 0x0C
178#define MODE_PAGE_ALL_LEN 0x54
179#define MODE_SENSE6_MPH_SIZE 4
180#define MODE_SENSE6_ALLOC_LEN_OFFSET 4
181#define MODE_SENSE_PAGE_CONTROL_OFFSET 2
182#define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
183#define MODE_SENSE_PAGE_CODE_OFFSET 2
184#define MODE_SENSE_PAGE_CODE_MASK 0x3F
185#define MODE_SENSE_LLBAA_OFFSET 1
186#define MODE_SENSE_LLBAA_MASK 0x10
187#define MODE_SENSE_LLBAA_SHIFT 4
188#define MODE_SENSE_DBD_OFFSET 1
189#define MODE_SENSE_DBD_MASK 8
190#define MODE_SENSE_DBD_SHIFT 3
191#define MODE_SENSE10_MPH_SIZE 8
192#define MODE_SENSE10_ALLOC_LEN_OFFSET 7
193#define MODE_SELECT_CDB_PAGE_FORMAT_OFFSET 1
194#define MODE_SELECT_CDB_SAVE_PAGES_OFFSET 1
195#define MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET 4
196#define MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET 7
197#define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
198#define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
199#define MODE_SELECT_6_BD_OFFSET 3
200#define MODE_SELECT_10_BD_OFFSET 6
201#define MODE_SELECT_10_LLBAA_OFFSET 4
202#define MODE_SELECT_10_LLBAA_MASK 1
203#define MODE_SELECT_6_MPH_SIZE 4
204#define MODE_SELECT_10_MPH_SIZE 8
205#define CACHING_MODE_PAGE_WCE_MASK 0x04
206#define MODE_SENSE_BLK_DESC_ENABLED 0
207#define MODE_SENSE_BLK_DESC_COUNT 1
208#define MODE_SELECT_PAGE_CODE_MASK 0x3F
209#define SHORT_DESC_BLOCK 8
210#define LONG_DESC_BLOCK 16
211#define MODE_PAGE_POW_CND_LEN_FIELD 0x26
212#define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
213#define MODE_PAGE_CACHING_LEN_FIELD 0x12
214#define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
215#define MODE_SENSE_PC_CURRENT_VALUES 0
216
217/* Log Sense defines */
218#define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
219#define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
220#define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
221#define LOG_PAGE_TEMPERATURE_PAGE 0x0D
222#define LOG_SENSE_CDB_SP_OFFSET 1
223#define LOG_SENSE_CDB_SP_NOT_ENABLED 0
224#define LOG_SENSE_CDB_PC_OFFSET 2
225#define LOG_SENSE_CDB_PC_MASK 0xC0
226#define LOG_SENSE_CDB_PC_SHIFT 6
227#define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
228#define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
229#define LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET 7
230#define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
231#define LOG_INFO_EXCP_PAGE_LENGTH 0xC
232#define REMAINING_TEMP_PAGE_LENGTH 0xC
233#define LOG_TEMP_PAGE_LENGTH 0x10
234#define LOG_TEMP_UNKNOWN 0xFF
235#define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
236
237/* Read Capacity defines */
238#define READ_CAP_10_RESP_SIZE 8
239#define READ_CAP_16_RESP_SIZE 32
240
241/* NVMe Namespace and Command Defines */
Vishal Verma5d0f6132013-03-04 18:40:58 -0700242#define BYTES_TO_DWORDS 4
243#define NVME_MAX_FIRMWARE_SLOT 7
244
245/* Report LUNs defines */
246#define REPORT_LUNS_FIRST_LUN_OFFSET 8
247
248/* SCSI ADDITIONAL SENSE Codes */
249
250#define SCSI_ASC_NO_SENSE 0x00
251#define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
252#define SCSI_ASC_LUN_NOT_READY 0x04
253#define SCSI_ASC_WARNING 0x0B
254#define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
255#define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
256#define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
257#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
258#define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
259#define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
260#define SCSI_ASC_ILLEGAL_COMMAND 0x20
261#define SCSI_ASC_ILLEGAL_BLOCK 0x21
262#define SCSI_ASC_INVALID_CDB 0x24
263#define SCSI_ASC_INVALID_LUN 0x25
264#define SCSI_ASC_INVALID_PARAMETER 0x26
265#define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
266#define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
267
268/* SCSI ADDITIONAL SENSE Code Qualifiers */
269
270#define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
271#define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
272#define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
273#define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
274#define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
275#define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
276#define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
277#define SCSI_ASCQ_INVALID_LUN_ID 0x09
278
279/**
280 * DEVICE_SPECIFIC_PARAMETER in mode parameter header (see sbc2r16) to
281 * enable DPOFUA support type 0x10 value.
282 */
283#define DEVICE_SPECIFIC_PARAMETER 0
284#define VPD_ID_DESCRIPTOR_LENGTH sizeof(VPD_IDENTIFICATION_DESCRIPTOR)
285
286/* MACROs to extract information from CDBs */
287
288#define GET_OPCODE(cdb) cdb[0]
289
290#define GET_U8_FROM_CDB(cdb, index) (cdb[index] << 0)
291
292#define GET_U16_FROM_CDB(cdb, index) ((cdb[index] << 8) | (cdb[index + 1] << 0))
293
294#define GET_U24_FROM_CDB(cdb, index) ((cdb[index] << 16) | \
295(cdb[index + 1] << 8) | \
296(cdb[index + 2] << 0))
297
298#define GET_U32_FROM_CDB(cdb, index) ((cdb[index] << 24) | \
299(cdb[index + 1] << 16) | \
300(cdb[index + 2] << 8) | \
301(cdb[index + 3] << 0))
302
303#define GET_U64_FROM_CDB(cdb, index) ((((u64)cdb[index]) << 56) | \
304(((u64)cdb[index + 1]) << 48) | \
305(((u64)cdb[index + 2]) << 40) | \
306(((u64)cdb[index + 3]) << 32) | \
307(((u64)cdb[index + 4]) << 24) | \
308(((u64)cdb[index + 5]) << 16) | \
309(((u64)cdb[index + 6]) << 8) | \
310(((u64)cdb[index + 7]) << 0))
311
312/* Inquiry Helper Macros */
313#define GET_INQ_EVPD_BIT(cdb) \
314((GET_U8_FROM_CDB(cdb, INQUIRY_EVPD_BYTE_OFFSET) & \
315INQUIRY_EVPD_BIT_MASK) ? 1 : 0)
316
317#define GET_INQ_PAGE_CODE(cdb) \
318(GET_U8_FROM_CDB(cdb, INQUIRY_PAGE_CODE_BYTE_OFFSET))
319
320#define GET_INQ_ALLOC_LENGTH(cdb) \
321(GET_U16_FROM_CDB(cdb, INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET))
322
323/* Report LUNs Helper Macros */
324#define GET_REPORT_LUNS_ALLOC_LENGTH(cdb) \
325(GET_U32_FROM_CDB(cdb, REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET))
326
327/* Read Capacity Helper Macros */
328#define GET_READ_CAP_16_ALLOC_LENGTH(cdb) \
329(GET_U32_FROM_CDB(cdb, READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET))
330
331#define IS_READ_CAP_16(cdb) \
332((cdb[0] == SERVICE_ACTION_IN && cdb[1] == SAI_READ_CAPACITY_16) ? 1 : 0)
333
334/* Request Sense Helper Macros */
335#define GET_REQUEST_SENSE_ALLOC_LENGTH(cdb) \
336(GET_U8_FROM_CDB(cdb, REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET))
337
338/* Mode Sense Helper Macros */
339#define GET_MODE_SENSE_DBD(cdb) \
340((GET_U8_FROM_CDB(cdb, MODE_SENSE_DBD_OFFSET) & MODE_SENSE_DBD_MASK) >> \
341MODE_SENSE_DBD_SHIFT)
342
343#define GET_MODE_SENSE_LLBAA(cdb) \
344((GET_U8_FROM_CDB(cdb, MODE_SENSE_LLBAA_OFFSET) & \
345MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT)
346
347#define GET_MODE_SENSE_MPH_SIZE(cdb10) \
348(cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE)
349
350
351/* Struct to gather data that needs to be extracted from a SCSI CDB.
352 Not conforming to any particular CDB variant, but compatible with all. */
353
354struct nvme_trans_io_cdb {
355 u8 fua;
356 u8 prot_info;
357 u64 lba;
358 u32 xfer_len;
359};
360
361
362/* Internal Helper Functions */
363
364
365/* Copy data to userspace memory */
366
367static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
368 unsigned long n)
369{
370 int res = SNTI_TRANSLATION_SUCCESS;
371 unsigned long not_copied;
372 int i;
373 void *index = from;
374 size_t remaining = n;
375 size_t xfer_len;
376
377 if (hdr->iovec_count > 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600378 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700379
380 for (i = 0; i < hdr->iovec_count; i++) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600381 not_copied = copy_from_user(&sgl, hdr->dxferp +
382 i * sizeof(struct sg_iovec),
383 sizeof(struct sg_iovec));
384 if (not_copied)
385 return -EFAULT;
386 xfer_len = min(remaining, sgl.iov_len);
387 not_copied = copy_to_user(sgl.iov_base, index,
Vishal Verma5d0f6132013-03-04 18:40:58 -0700388 xfer_len);
389 if (not_copied) {
390 res = -EFAULT;
391 break;
392 }
393 index += xfer_len;
394 remaining -= xfer_len;
395 if (remaining == 0)
396 break;
397 }
398 return res;
399 }
Vishal Verma8741ee42013-04-04 17:52:27 -0600400 not_copied = copy_to_user(hdr->dxferp, from, n);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700401 if (not_copied)
402 res = -EFAULT;
403 return res;
404}
405
406/* Copy data from userspace memory */
407
408static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
409 unsigned long n)
410{
411 int res = SNTI_TRANSLATION_SUCCESS;
412 unsigned long not_copied;
413 int i;
414 void *index = to;
415 size_t remaining = n;
416 size_t xfer_len;
417
418 if (hdr->iovec_count > 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600419 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700420
421 for (i = 0; i < hdr->iovec_count; i++) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600422 not_copied = copy_from_user(&sgl, hdr->dxferp +
423 i * sizeof(struct sg_iovec),
424 sizeof(struct sg_iovec));
425 if (not_copied)
426 return -EFAULT;
427 xfer_len = min(remaining, sgl.iov_len);
428 not_copied = copy_from_user(index, sgl.iov_base,
429 xfer_len);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700430 if (not_copied) {
431 res = -EFAULT;
432 break;
433 }
434 index += xfer_len;
435 remaining -= xfer_len;
436 if (remaining == 0)
437 break;
438 }
439 return res;
440 }
441
Vishal Verma8741ee42013-04-04 17:52:27 -0600442 not_copied = copy_from_user(to, hdr->dxferp, n);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700443 if (not_copied)
444 res = -EFAULT;
445 return res;
446}
447
448/* Status/Sense Buffer Writeback */
449
450static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
451 u8 asc, u8 ascq)
452{
453 int res = SNTI_TRANSLATION_SUCCESS;
454 u8 xfer_len;
455 u8 resp[DESC_FMT_SENSE_DATA_SIZE];
456
457 if (scsi_status_is_good(status)) {
458 hdr->status = SAM_STAT_GOOD;
459 hdr->masked_status = GOOD;
460 hdr->host_status = DID_OK;
461 hdr->driver_status = DRIVER_OK;
462 hdr->sb_len_wr = 0;
463 } else {
464 hdr->status = status;
465 hdr->masked_status = status >> 1;
466 hdr->host_status = DID_OK;
467 hdr->driver_status = DRIVER_OK;
468
469 memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
470 resp[0] = DESC_FORMAT_SENSE_DATA;
471 resp[1] = sense_key;
472 resp[2] = asc;
473 resp[3] = ascq;
474
475 xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
476 hdr->sb_len_wr = xfer_len;
Vishal Verma8741ee42013-04-04 17:52:27 -0600477 if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
Vishal Verma5d0f6132013-03-04 18:40:58 -0700478 res = -EFAULT;
479 }
480
481 return res;
482}
483
484static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
485{
486 u8 status, sense_key, asc, ascq;
487 int res = SNTI_TRANSLATION_SUCCESS;
488
489 /* For non-nvme (Linux) errors, simply return the error code */
490 if (nvme_sc < 0)
491 return nvme_sc;
492
493 /* Mask DNR, More, and reserved fields */
494 nvme_sc &= 0x7FF;
495
496 switch (nvme_sc) {
497 /* Generic Command Status */
498 case NVME_SC_SUCCESS:
499 status = SAM_STAT_GOOD;
500 sense_key = NO_SENSE;
501 asc = SCSI_ASC_NO_SENSE;
502 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
503 break;
504 case NVME_SC_INVALID_OPCODE:
505 status = SAM_STAT_CHECK_CONDITION;
506 sense_key = ILLEGAL_REQUEST;
507 asc = SCSI_ASC_ILLEGAL_COMMAND;
508 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
509 break;
510 case NVME_SC_INVALID_FIELD:
511 status = SAM_STAT_CHECK_CONDITION;
512 sense_key = ILLEGAL_REQUEST;
513 asc = SCSI_ASC_INVALID_CDB;
514 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
515 break;
516 case NVME_SC_DATA_XFER_ERROR:
517 status = SAM_STAT_CHECK_CONDITION;
518 sense_key = MEDIUM_ERROR;
519 asc = SCSI_ASC_NO_SENSE;
520 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
521 break;
522 case NVME_SC_POWER_LOSS:
523 status = SAM_STAT_TASK_ABORTED;
524 sense_key = ABORTED_COMMAND;
525 asc = SCSI_ASC_WARNING;
526 ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
527 break;
528 case NVME_SC_INTERNAL:
529 status = SAM_STAT_CHECK_CONDITION;
530 sense_key = HARDWARE_ERROR;
531 asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
532 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
533 break;
534 case NVME_SC_ABORT_REQ:
535 status = SAM_STAT_TASK_ABORTED;
536 sense_key = ABORTED_COMMAND;
537 asc = SCSI_ASC_NO_SENSE;
538 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
539 break;
540 case NVME_SC_ABORT_QUEUE:
541 status = SAM_STAT_TASK_ABORTED;
542 sense_key = ABORTED_COMMAND;
543 asc = SCSI_ASC_NO_SENSE;
544 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
545 break;
546 case NVME_SC_FUSED_FAIL:
547 status = SAM_STAT_TASK_ABORTED;
548 sense_key = ABORTED_COMMAND;
549 asc = SCSI_ASC_NO_SENSE;
550 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
551 break;
552 case NVME_SC_FUSED_MISSING:
553 status = SAM_STAT_TASK_ABORTED;
554 sense_key = ABORTED_COMMAND;
555 asc = SCSI_ASC_NO_SENSE;
556 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
557 break;
558 case NVME_SC_INVALID_NS:
559 status = SAM_STAT_CHECK_CONDITION;
560 sense_key = ILLEGAL_REQUEST;
561 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
562 ascq = SCSI_ASCQ_INVALID_LUN_ID;
563 break;
564 case NVME_SC_LBA_RANGE:
565 status = SAM_STAT_CHECK_CONDITION;
566 sense_key = ILLEGAL_REQUEST;
567 asc = SCSI_ASC_ILLEGAL_BLOCK;
568 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
569 break;
570 case NVME_SC_CAP_EXCEEDED:
571 status = SAM_STAT_CHECK_CONDITION;
572 sense_key = MEDIUM_ERROR;
573 asc = SCSI_ASC_NO_SENSE;
574 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
575 break;
576 case NVME_SC_NS_NOT_READY:
577 status = SAM_STAT_CHECK_CONDITION;
578 sense_key = NOT_READY;
579 asc = SCSI_ASC_LUN_NOT_READY;
580 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
581 break;
582
583 /* Command Specific Status */
584 case NVME_SC_INVALID_FORMAT:
585 status = SAM_STAT_CHECK_CONDITION;
586 sense_key = ILLEGAL_REQUEST;
587 asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
588 ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
589 break;
590 case NVME_SC_BAD_ATTRIBUTES:
591 status = SAM_STAT_CHECK_CONDITION;
592 sense_key = ILLEGAL_REQUEST;
593 asc = SCSI_ASC_INVALID_CDB;
594 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
595 break;
596
597 /* Media Errors */
598 case NVME_SC_WRITE_FAULT:
599 status = SAM_STAT_CHECK_CONDITION;
600 sense_key = MEDIUM_ERROR;
601 asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
602 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
603 break;
604 case NVME_SC_READ_ERROR:
605 status = SAM_STAT_CHECK_CONDITION;
606 sense_key = MEDIUM_ERROR;
607 asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
608 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
609 break;
610 case NVME_SC_GUARD_CHECK:
611 status = SAM_STAT_CHECK_CONDITION;
612 sense_key = MEDIUM_ERROR;
613 asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
614 ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
615 break;
616 case NVME_SC_APPTAG_CHECK:
617 status = SAM_STAT_CHECK_CONDITION;
618 sense_key = MEDIUM_ERROR;
619 asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
620 ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
621 break;
622 case NVME_SC_REFTAG_CHECK:
623 status = SAM_STAT_CHECK_CONDITION;
624 sense_key = MEDIUM_ERROR;
625 asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
626 ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
627 break;
628 case NVME_SC_COMPARE_FAILED:
629 status = SAM_STAT_CHECK_CONDITION;
630 sense_key = MISCOMPARE;
631 asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
632 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
633 break;
634 case NVME_SC_ACCESS_DENIED:
635 status = SAM_STAT_CHECK_CONDITION;
636 sense_key = ILLEGAL_REQUEST;
637 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
638 ascq = SCSI_ASCQ_INVALID_LUN_ID;
639 break;
640
641 /* Unspecified/Default */
642 case NVME_SC_CMDID_CONFLICT:
643 case NVME_SC_CMD_SEQ_ERROR:
644 case NVME_SC_CQ_INVALID:
645 case NVME_SC_QID_INVALID:
646 case NVME_SC_QUEUE_SIZE:
647 case NVME_SC_ABORT_LIMIT:
648 case NVME_SC_ABORT_MISSING:
649 case NVME_SC_ASYNC_LIMIT:
650 case NVME_SC_FIRMWARE_SLOT:
651 case NVME_SC_FIRMWARE_IMAGE:
652 case NVME_SC_INVALID_VECTOR:
653 case NVME_SC_INVALID_LOG_PAGE:
654 default:
655 status = SAM_STAT_CHECK_CONDITION;
656 sense_key = ILLEGAL_REQUEST;
657 asc = SCSI_ASC_NO_SENSE;
658 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
659 break;
660 }
661
662 res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
663
664 return res;
665}
666
667/* INQUIRY Helper Functions */
668
669static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
670 struct sg_io_hdr *hdr, u8 *inq_response,
671 int alloc_len)
672{
673 struct nvme_dev *dev = ns->dev;
674 dma_addr_t dma_addr;
675 void *mem;
676 struct nvme_id_ns *id_ns;
677 int res = SNTI_TRANSLATION_SUCCESS;
678 int nvme_sc;
679 int xfer_len;
680 u8 resp_data_format = 0x02;
681 u8 protect;
682 u8 cmdque = 0x01 << 1;
Keith Buschdedf4b12014-04-29 15:52:27 -0600683 u8 fw_offset = sizeof(dev->firmware_rev);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700684
685 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
686 &dma_addr, GFP_KERNEL);
687 if (mem == NULL) {
688 res = -ENOMEM;
689 goto out_dma;
690 }
691
692 /* nvme ns identify - use DPS value for PROTECT field */
693 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
694 res = nvme_trans_status_code(hdr, nvme_sc);
695 /*
696 * If nvme_sc was -ve, res will be -ve here.
697 * If nvme_sc was +ve, the status would bace been translated, and res
698 * can only be 0 or -ve.
699 * - If 0 && nvme_sc > 0, then go into next if where res gets nvme_sc
700 * - If -ve, return because its a Linux error.
701 */
702 if (res)
703 goto out_free;
704 if (nvme_sc) {
705 res = nvme_sc;
706 goto out_free;
707 }
708 id_ns = mem;
709 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
710
711 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
712 inq_response[2] = VERSION_SPC_4;
713 inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
714 inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
715 inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
716 inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
717 strncpy(&inq_response[8], "NVMe ", 8);
718 strncpy(&inq_response[16], dev->model, 16);
Keith Buschdedf4b12014-04-29 15:52:27 -0600719
720 while (dev->firmware_rev[fw_offset - 1] == ' ' && fw_offset > 4)
721 fw_offset--;
722 fw_offset -= 4;
723 strncpy(&inq_response[32], dev->firmware_rev + fw_offset, 4);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700724
725 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
726 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
727
728 out_free:
729 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
730 dma_addr);
731 out_dma:
732 return res;
733}
734
735static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
736 struct sg_io_hdr *hdr, u8 *inq_response,
737 int alloc_len)
738{
739 int res = SNTI_TRANSLATION_SUCCESS;
740 int xfer_len;
741
742 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
743 inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
744 inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
745 inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
746 inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
747 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
748 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
749 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
750
751 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
752 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
753
754 return res;
755}
756
757static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
758 struct sg_io_hdr *hdr, u8 *inq_response,
759 int alloc_len)
760{
761 struct nvme_dev *dev = ns->dev;
762 int res = SNTI_TRANSLATION_SUCCESS;
763 int xfer_len;
764
765 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
766 inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
767 inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
768 strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
769
770 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
771 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
772
773 return res;
774}
775
776static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
777 u8 *inq_response, int alloc_len)
778{
779 struct nvme_dev *dev = ns->dev;
780 dma_addr_t dma_addr;
781 void *mem;
782 struct nvme_id_ctrl *id_ctrl;
783 int res = SNTI_TRANSLATION_SUCCESS;
784 int nvme_sc;
785 u8 ieee[4];
786 int xfer_len;
Vishal Verma8741ee42013-04-04 17:52:27 -0600787 __be32 tmp_id = cpu_to_be32(ns->ns_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700788
789 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
790 &dma_addr, GFP_KERNEL);
791 if (mem == NULL) {
792 res = -ENOMEM;
793 goto out_dma;
794 }
795
796 /* nvme controller identify */
797 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
798 res = nvme_trans_status_code(hdr, nvme_sc);
799 if (res)
800 goto out_free;
801 if (nvme_sc) {
802 res = nvme_sc;
803 goto out_free;
804 }
805 id_ctrl = mem;
806
807 /* Since SCSI tried to save 4 bits... [SPC-4(r34) Table 591] */
808 ieee[0] = id_ctrl->ieee[0] << 4;
809 ieee[1] = id_ctrl->ieee[0] >> 4 | id_ctrl->ieee[1] << 4;
810 ieee[2] = id_ctrl->ieee[1] >> 4 | id_ctrl->ieee[2] << 4;
811 ieee[3] = id_ctrl->ieee[2] >> 4;
812
813 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
814 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
815 inq_response[3] = 20; /* Page Length */
816 /* Designation Descriptor start */
817 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
818 inq_response[5] = 0x03; /* PIV=0b | Asso=00b | Designator Type=3h */
819 inq_response[6] = 0x00; /* Rsvd */
820 inq_response[7] = 16; /* Designator Length */
821 /* Designator start */
822 inq_response[8] = 0x60 | ieee[3]; /* NAA=6h | IEEE ID MSB, High nibble*/
823 inq_response[9] = ieee[2]; /* IEEE ID */
824 inq_response[10] = ieee[1]; /* IEEE ID */
825 inq_response[11] = ieee[0]; /* IEEE ID| Vendor Specific ID... */
826 inq_response[12] = (dev->pci_dev->vendor & 0xFF00) >> 8;
827 inq_response[13] = (dev->pci_dev->vendor & 0x00FF);
828 inq_response[14] = dev->serial[0];
829 inq_response[15] = dev->serial[1];
830 inq_response[16] = dev->model[0];
831 inq_response[17] = dev->model[1];
832 memcpy(&inq_response[18], &tmp_id, sizeof(u32));
833 /* Last 2 bytes are zero */
834
835 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
836 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
837
838 out_free:
839 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
840 dma_addr);
841 out_dma:
842 return res;
843}
844
845static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
846 int alloc_len)
847{
848 u8 *inq_response;
849 int res = SNTI_TRANSLATION_SUCCESS;
850 int nvme_sc;
851 struct nvme_dev *dev = ns->dev;
852 dma_addr_t dma_addr;
853 void *mem;
854 struct nvme_id_ctrl *id_ctrl;
855 struct nvme_id_ns *id_ns;
856 int xfer_len;
857 u8 microcode = 0x80;
858 u8 spt;
859 u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
860 u8 grd_chk, app_chk, ref_chk, protect;
861 u8 uask_sup = 0x20;
862 u8 v_sup;
863 u8 luiclr = 0x01;
864
865 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
866 if (inq_response == NULL) {
867 res = -ENOMEM;
868 goto out_mem;
869 }
870
871 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
872 &dma_addr, GFP_KERNEL);
873 if (mem == NULL) {
874 res = -ENOMEM;
875 goto out_dma;
876 }
877
878 /* nvme ns identify */
879 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
880 res = nvme_trans_status_code(hdr, nvme_sc);
881 if (res)
882 goto out_free;
883 if (nvme_sc) {
884 res = nvme_sc;
885 goto out_free;
886 }
887 id_ns = mem;
888 spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
889 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
890 grd_chk = protect << 2;
891 app_chk = protect << 1;
892 ref_chk = protect;
893
894 /* nvme controller identify */
895 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
896 res = nvme_trans_status_code(hdr, nvme_sc);
897 if (res)
898 goto out_free;
899 if (nvme_sc) {
900 res = nvme_sc;
901 goto out_free;
902 }
903 id_ctrl = mem;
904 v_sup = id_ctrl->vwc;
905
906 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
907 inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
908 inq_response[2] = 0x00; /* Page Length MSB */
909 inq_response[3] = 0x3C; /* Page Length LSB */
910 inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
911 inq_response[5] = uask_sup;
912 inq_response[6] = v_sup;
913 inq_response[7] = luiclr;
914 inq_response[8] = 0;
915 inq_response[9] = 0;
916
917 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
918 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
919
920 out_free:
921 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
922 dma_addr);
923 out_dma:
924 kfree(inq_response);
925 out_mem:
926 return res;
927}
928
929static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
930 int alloc_len)
931{
932 u8 *inq_response;
933 int res = SNTI_TRANSLATION_SUCCESS;
934 int xfer_len;
935
Tushar Behera03ea83e2013-06-10 10:20:55 +0530936 inq_response = kzalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700937 if (inq_response == NULL) {
938 res = -ENOMEM;
939 goto out_mem;
940 }
941
Vishal Verma5d0f6132013-03-04 18:40:58 -0700942 inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
943 inq_response[2] = 0x00; /* Page Length MSB */
944 inq_response[3] = 0x3C; /* Page Length LSB */
945 inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
946 inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
947 inq_response[6] = 0x00; /* Form Factor */
948
949 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
950 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
951
952 kfree(inq_response);
953 out_mem:
954 return res;
955}
956
957/* LOG SENSE Helper Functions */
958
959static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
960 int alloc_len)
961{
962 int res = SNTI_TRANSLATION_SUCCESS;
963 int xfer_len;
964 u8 *log_response;
965
Tushar Behera03ea83e2013-06-10 10:20:55 +0530966 log_response = kzalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700967 if (log_response == NULL) {
968 res = -ENOMEM;
969 goto out_mem;
970 }
Vishal Verma5d0f6132013-03-04 18:40:58 -0700971
972 log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
973 /* Subpage=0x00, Page Length MSB=0 */
974 log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
975 log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
976 log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
977 log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
978
979 xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
980 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
981
982 kfree(log_response);
983 out_mem:
984 return res;
985}
986
987static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
988 struct sg_io_hdr *hdr, int alloc_len)
989{
990 int res = SNTI_TRANSLATION_SUCCESS;
991 int xfer_len;
992 u8 *log_response;
993 struct nvme_command c;
994 struct nvme_dev *dev = ns->dev;
995 struct nvme_smart_log *smart_log;
996 dma_addr_t dma_addr;
997 void *mem;
998 u8 temp_c;
999 u16 temp_k;
1000
Tushar Behera03ea83e2013-06-10 10:20:55 +05301001 log_response = kzalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001002 if (log_response == NULL) {
1003 res = -ENOMEM;
1004 goto out_mem;
1005 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001006
1007 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1008 sizeof(struct nvme_smart_log),
1009 &dma_addr, GFP_KERNEL);
1010 if (mem == NULL) {
1011 res = -ENOMEM;
1012 goto out_dma;
1013 }
1014
1015 /* Get SMART Log Page */
1016 memset(&c, 0, sizeof(c));
1017 c.common.opcode = nvme_admin_get_log_page;
1018 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1019 c.common.prp1 = cpu_to_le64(dma_addr);
Indraneel Mukherjee4131f2f2014-05-29 12:02:03 +05301020 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
Matthew Wilcoxef351b92014-06-13 10:54:21 -04001021 BYTES_TO_DWORDS) - 1) << 16) | NVME_LOG_SMART);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001022 res = nvme_submit_admin_cmd(dev, &c, NULL);
1023 if (res != NVME_SC_SUCCESS) {
1024 temp_c = LOG_TEMP_UNKNOWN;
1025 } else {
1026 smart_log = mem;
1027 temp_k = (smart_log->temperature[1] << 8) +
1028 (smart_log->temperature[0]);
1029 temp_c = temp_k - KELVIN_TEMP_FACTOR;
1030 }
1031
1032 log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
1033 /* Subpage=0x00, Page Length MSB=0 */
1034 log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
1035 /* Informational Exceptions Log Parameter 1 Start */
1036 /* Parameter Code=0x0000 bytes 4,5 */
1037 log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
1038 log_response[7] = 0x04; /* PARAMETER LENGTH */
1039 /* Add sense Code and qualifier = 0x00 each */
1040 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1041 log_response[10] = temp_c;
1042
1043 xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
1044 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1045
1046 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1047 mem, dma_addr);
1048 out_dma:
1049 kfree(log_response);
1050 out_mem:
1051 return res;
1052}
1053
1054static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1055 int alloc_len)
1056{
1057 int res = SNTI_TRANSLATION_SUCCESS;
1058 int xfer_len;
1059 u8 *log_response;
1060 struct nvme_command c;
1061 struct nvme_dev *dev = ns->dev;
1062 struct nvme_smart_log *smart_log;
1063 dma_addr_t dma_addr;
1064 void *mem;
1065 u32 feature_resp;
1066 u8 temp_c_cur, temp_c_thresh;
1067 u16 temp_k;
1068
Tushar Behera03ea83e2013-06-10 10:20:55 +05301069 log_response = kzalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001070 if (log_response == NULL) {
1071 res = -ENOMEM;
1072 goto out_mem;
1073 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001074
1075 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1076 sizeof(struct nvme_smart_log),
1077 &dma_addr, GFP_KERNEL);
1078 if (mem == NULL) {
1079 res = -ENOMEM;
1080 goto out_dma;
1081 }
1082
1083 /* Get SMART Log Page */
1084 memset(&c, 0, sizeof(c));
1085 c.common.opcode = nvme_admin_get_log_page;
1086 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1087 c.common.prp1 = cpu_to_le64(dma_addr);
Indraneel Mukherjee4131f2f2014-05-29 12:02:03 +05301088 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
Matthew Wilcoxef351b92014-06-13 10:54:21 -04001089 BYTES_TO_DWORDS) - 1) << 16) | NVME_LOG_SMART);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001090 res = nvme_submit_admin_cmd(dev, &c, NULL);
1091 if (res != NVME_SC_SUCCESS) {
1092 temp_c_cur = LOG_TEMP_UNKNOWN;
1093 } else {
1094 smart_log = mem;
1095 temp_k = (smart_log->temperature[1] << 8) +
1096 (smart_log->temperature[0]);
1097 temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
1098 }
1099
1100 /* Get Features for Temp Threshold */
1101 res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
1102 &feature_resp);
1103 if (res != NVME_SC_SUCCESS)
1104 temp_c_thresh = LOG_TEMP_UNKNOWN;
1105 else
1106 temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
1107
1108 log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
1109 /* Subpage=0x00, Page Length MSB=0 */
1110 log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
1111 /* Temperature Log Parameter 1 (Temperature) Start */
1112 /* Parameter Code = 0x0000 */
1113 log_response[6] = 0x01; /* Format and Linking = 01b */
1114 log_response[7] = 0x02; /* Parameter Length */
1115 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1116 log_response[9] = temp_c_cur;
1117 /* Temperature Log Parameter 2 (Reference Temperature) Start */
1118 log_response[11] = 0x01; /* Parameter Code = 0x0001 */
1119 log_response[12] = 0x01; /* Format and Linking = 01b */
1120 log_response[13] = 0x02; /* Parameter Length */
1121 /* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
1122 log_response[15] = temp_c_thresh;
1123
1124 xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
1125 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1126
1127 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1128 mem, dma_addr);
1129 out_dma:
1130 kfree(log_response);
1131 out_mem:
1132 return res;
1133}
1134
1135/* MODE SENSE Helper Functions */
1136
1137static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
1138 u16 mode_data_length, u16 blk_desc_len)
1139{
1140 /* Quick check to make sure I don't stomp on my own memory... */
1141 if ((cdb10 && len < 8) || (!cdb10 && len < 4))
1142 return SNTI_INTERNAL_ERROR;
1143
1144 if (cdb10) {
1145 resp[0] = (mode_data_length & 0xFF00) >> 8;
1146 resp[1] = (mode_data_length & 0x00FF);
1147 /* resp[2] and [3] are zero */
1148 resp[4] = llbaa;
1149 resp[5] = RESERVED_FIELD;
1150 resp[6] = (blk_desc_len & 0xFF00) >> 8;
1151 resp[7] = (blk_desc_len & 0x00FF);
1152 } else {
1153 resp[0] = (mode_data_length & 0x00FF);
1154 /* resp[1] and [2] are zero */
1155 resp[3] = (blk_desc_len & 0x00FF);
1156 }
1157
1158 return SNTI_TRANSLATION_SUCCESS;
1159}
1160
1161static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1162 u8 *resp, int len, u8 llbaa)
1163{
1164 int res = SNTI_TRANSLATION_SUCCESS;
1165 int nvme_sc;
1166 struct nvme_dev *dev = ns->dev;
1167 dma_addr_t dma_addr;
1168 void *mem;
1169 struct nvme_id_ns *id_ns;
1170 u8 flbas;
1171 u32 lba_length;
1172
1173 if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
1174 return SNTI_INTERNAL_ERROR;
1175 else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
1176 return SNTI_INTERNAL_ERROR;
1177
1178 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1179 &dma_addr, GFP_KERNEL);
1180 if (mem == NULL) {
1181 res = -ENOMEM;
1182 goto out;
1183 }
1184
1185 /* nvme ns identify */
1186 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1187 res = nvme_trans_status_code(hdr, nvme_sc);
1188 if (res)
1189 goto out_dma;
1190 if (nvme_sc) {
1191 res = nvme_sc;
1192 goto out_dma;
1193 }
1194 id_ns = mem;
1195 flbas = (id_ns->flbas) & 0x0F;
1196 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1197
1198 if (llbaa == 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -06001199 __be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
Vishal Verma5d0f6132013-03-04 18:40:58 -07001200 /* Byte 4 is reserved */
Vishal Verma8741ee42013-04-04 17:52:27 -06001201 __be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001202
1203 memcpy(resp, &tmp_cap, sizeof(u32));
1204 memcpy(&resp[4], &tmp_len, sizeof(u32));
1205 } else {
Vishal Verma8741ee42013-04-04 17:52:27 -06001206 __be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
1207 __be32 tmp_len = cpu_to_be32(lba_length);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001208
1209 memcpy(resp, &tmp_cap, sizeof(u64));
1210 /* Bytes 8, 9, 10, 11 are reserved */
1211 memcpy(&resp[12], &tmp_len, sizeof(u32));
1212 }
1213
1214 out_dma:
1215 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1216 dma_addr);
1217 out:
1218 return res;
1219}
1220
1221static int nvme_trans_fill_control_page(struct nvme_ns *ns,
1222 struct sg_io_hdr *hdr, u8 *resp,
1223 int len)
1224{
1225 if (len < MODE_PAGE_CONTROL_LEN)
1226 return SNTI_INTERNAL_ERROR;
1227
1228 resp[0] = MODE_PAGE_CONTROL;
1229 resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
1230 resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
1231 * D_SENSE=1, GLTSD=1, RLEC=0 */
1232 resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
1233 /* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
1234 resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
1235 /* resp[6] and [7] are obsolete, thus zero */
1236 resp[8] = 0xFF; /* Busy timeout period = 0xffff */
1237 resp[9] = 0xFF;
1238 /* Bytes 10,11: Extended selftest completion time = 0x0000 */
1239
1240 return SNTI_TRANSLATION_SUCCESS;
1241}
1242
1243static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
1244 struct sg_io_hdr *hdr,
1245 u8 *resp, int len)
1246{
1247 int res = SNTI_TRANSLATION_SUCCESS;
1248 int nvme_sc;
1249 struct nvme_dev *dev = ns->dev;
1250 u32 feature_resp;
1251 u8 vwc;
1252
1253 if (len < MODE_PAGE_CACHING_LEN)
1254 return SNTI_INTERNAL_ERROR;
1255
1256 nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
1257 &feature_resp);
1258 res = nvme_trans_status_code(hdr, nvme_sc);
1259 if (res)
1260 goto out;
1261 if (nvme_sc) {
1262 res = nvme_sc;
1263 goto out;
1264 }
1265 vwc = feature_resp & 0x00000001;
1266
1267 resp[0] = MODE_PAGE_CACHING;
1268 resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
1269 resp[2] = vwc << 2;
1270
1271 out:
1272 return res;
1273}
1274
1275static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
1276 struct sg_io_hdr *hdr, u8 *resp,
1277 int len)
1278{
1279 int res = SNTI_TRANSLATION_SUCCESS;
1280
1281 if (len < MODE_PAGE_POW_CND_LEN)
1282 return SNTI_INTERNAL_ERROR;
1283
1284 resp[0] = MODE_PAGE_POWER_CONDITION;
1285 resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
1286 /* All other bytes are zero */
1287
1288 return res;
1289}
1290
1291static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
1292 struct sg_io_hdr *hdr, u8 *resp,
1293 int len)
1294{
1295 int res = SNTI_TRANSLATION_SUCCESS;
1296
1297 if (len < MODE_PAGE_INF_EXC_LEN)
1298 return SNTI_INTERNAL_ERROR;
1299
1300 resp[0] = MODE_PAGE_INFO_EXCEP;
1301 resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
1302 resp[2] = 0x88;
1303 /* All other bytes are zero */
1304
1305 return res;
1306}
1307
1308static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1309 u8 *resp, int len)
1310{
1311 int res = SNTI_TRANSLATION_SUCCESS;
1312 u16 mode_pages_offset_1 = 0;
1313 u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
1314
1315 mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
1316 mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
1317 mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
1318
1319 res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
1320 MODE_PAGE_CACHING_LEN);
1321 if (res != SNTI_TRANSLATION_SUCCESS)
1322 goto out;
1323 res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
1324 MODE_PAGE_CONTROL_LEN);
1325 if (res != SNTI_TRANSLATION_SUCCESS)
1326 goto out;
1327 res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
1328 MODE_PAGE_POW_CND_LEN);
1329 if (res != SNTI_TRANSLATION_SUCCESS)
1330 goto out;
1331 res = nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
1332 MODE_PAGE_INF_EXC_LEN);
1333 if (res != SNTI_TRANSLATION_SUCCESS)
1334 goto out;
1335
1336 out:
1337 return res;
1338}
1339
1340static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
1341{
1342 if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
1343 /* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
1344 return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
1345 } else {
1346 return 0;
1347 }
1348}
1349
1350static int nvme_trans_mode_page_create(struct nvme_ns *ns,
1351 struct sg_io_hdr *hdr, u8 *cmd,
1352 u16 alloc_len, u8 cdb10,
1353 int (*mode_page_fill_func)
1354 (struct nvme_ns *,
1355 struct sg_io_hdr *hdr, u8 *, int),
1356 u16 mode_pages_tot_len)
1357{
1358 int res = SNTI_TRANSLATION_SUCCESS;
1359 int xfer_len;
1360 u8 *response;
1361 u8 dbd, llbaa;
1362 u16 resp_size;
1363 int mph_size;
1364 u16 mode_pages_offset_1;
1365 u16 blk_desc_len, blk_desc_offset, mode_data_length;
1366
1367 dbd = GET_MODE_SENSE_DBD(cmd);
1368 llbaa = GET_MODE_SENSE_LLBAA(cmd);
1369 mph_size = GET_MODE_SENSE_MPH_SIZE(cdb10);
1370 blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
1371
1372 resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
1373 /* Refer spc4r34 Table 440 for calculation of Mode data Length field */
1374 mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
1375
1376 blk_desc_offset = mph_size;
1377 mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
1378
Tushar Behera03ea83e2013-06-10 10:20:55 +05301379 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001380 if (response == NULL) {
1381 res = -ENOMEM;
1382 goto out_mem;
1383 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001384
1385 res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
1386 llbaa, mode_data_length, blk_desc_len);
1387 if (res != SNTI_TRANSLATION_SUCCESS)
1388 goto out_free;
1389 if (blk_desc_len > 0) {
1390 res = nvme_trans_fill_blk_desc(ns, hdr,
1391 &response[blk_desc_offset],
1392 blk_desc_len, llbaa);
1393 if (res != SNTI_TRANSLATION_SUCCESS)
1394 goto out_free;
1395 }
1396 res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
1397 mode_pages_tot_len);
1398 if (res != SNTI_TRANSLATION_SUCCESS)
1399 goto out_free;
1400
1401 xfer_len = min(alloc_len, resp_size);
1402 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
1403
1404 out_free:
1405 kfree(response);
1406 out_mem:
1407 return res;
1408}
1409
1410/* Read Capacity Helper Functions */
1411
1412static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
1413 u8 cdb16)
1414{
1415 u8 flbas;
1416 u32 lba_length;
1417 u64 rlba;
1418 u8 prot_en;
1419 u8 p_type_lut[4] = {0, 0, 1, 2};
Vishal Verma8741ee42013-04-04 17:52:27 -06001420 __be64 tmp_rlba;
1421 __be32 tmp_rlba_32;
1422 __be32 tmp_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07001423
1424 flbas = (id_ns->flbas) & 0x0F;
1425 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1426 rlba = le64_to_cpup(&id_ns->nsze) - 1;
1427 (id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
1428
1429 if (!cdb16) {
1430 if (rlba > 0xFFFFFFFF)
1431 rlba = 0xFFFFFFFF;
1432 tmp_rlba_32 = cpu_to_be32(rlba);
1433 tmp_len = cpu_to_be32(lba_length);
1434 memcpy(response, &tmp_rlba_32, sizeof(u32));
1435 memcpy(&response[4], &tmp_len, sizeof(u32));
1436 } else {
1437 tmp_rlba = cpu_to_be64(rlba);
1438 tmp_len = cpu_to_be32(lba_length);
1439 memcpy(response, &tmp_rlba, sizeof(u64));
1440 memcpy(&response[8], &tmp_len, sizeof(u32));
1441 response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
1442 /* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
1443 /* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
1444 /* Bytes 16-31 - Reserved */
1445 }
1446}
1447
1448/* Start Stop Unit Helper Functions */
1449
1450static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1451 u8 pc, u8 pcmod, u8 start)
1452{
1453 int res = SNTI_TRANSLATION_SUCCESS;
1454 int nvme_sc;
1455 struct nvme_dev *dev = ns->dev;
1456 dma_addr_t dma_addr;
1457 void *mem;
1458 struct nvme_id_ctrl *id_ctrl;
1459 int lowest_pow_st; /* max npss = lowest power consumption */
1460 unsigned ps_desired = 0;
1461
1462 /* NVMe Controller Identify */
1463 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1464 sizeof(struct nvme_id_ctrl),
1465 &dma_addr, GFP_KERNEL);
1466 if (mem == NULL) {
1467 res = -ENOMEM;
1468 goto out;
1469 }
1470 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
1471 res = nvme_trans_status_code(hdr, nvme_sc);
1472 if (res)
1473 goto out_dma;
1474 if (nvme_sc) {
1475 res = nvme_sc;
1476 goto out_dma;
1477 }
1478 id_ctrl = mem;
1479 lowest_pow_st = id_ctrl->npss - 1;
1480
1481 switch (pc) {
1482 case NVME_POWER_STATE_START_VALID:
1483 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1484 if (pcmod == 0 && start == 0x1)
1485 ps_desired = POWER_STATE_0;
1486 if (pcmod == 0 && start == 0x0)
1487 ps_desired = lowest_pow_st;
1488 break;
1489 case NVME_POWER_STATE_ACTIVE:
1490 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1491 if (pcmod == 0)
1492 ps_desired = POWER_STATE_0;
1493 break;
1494 case NVME_POWER_STATE_IDLE:
1495 /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
1496 /* min of desired state and (lps-1) because lps is STOP */
1497 if (pcmod == 0x0)
1498 ps_desired = min(POWER_STATE_1, (lowest_pow_st - 1));
1499 else if (pcmod == 0x1)
1500 ps_desired = min(POWER_STATE_2, (lowest_pow_st - 1));
1501 else if (pcmod == 0x2)
1502 ps_desired = min(POWER_STATE_3, (lowest_pow_st - 1));
1503 break;
1504 case NVME_POWER_STATE_STANDBY:
1505 /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
1506 if (pcmod == 0x0)
1507 ps_desired = max(0, (lowest_pow_st - 2));
1508 else if (pcmod == 0x1)
1509 ps_desired = max(0, (lowest_pow_st - 1));
1510 break;
1511 case NVME_POWER_STATE_LU_CONTROL:
1512 default:
1513 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1514 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1515 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1516 break;
1517 }
1518 nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
1519 NULL);
1520 res = nvme_trans_status_code(hdr, nvme_sc);
1521 if (res)
1522 goto out_dma;
1523 if (nvme_sc)
1524 res = nvme_sc;
1525 out_dma:
1526 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
1527 dma_addr);
1528 out:
1529 return res;
1530}
1531
1532/* Write Buffer Helper Functions */
1533/* Also using this for Format Unit with hdr passed as NULL, and buffer_id, 0 */
1534
1535static int nvme_trans_send_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1536 u8 opcode, u32 tot_len, u32 offset,
1537 u8 buffer_id)
1538{
1539 int res = SNTI_TRANSLATION_SUCCESS;
1540 int nvme_sc;
1541 struct nvme_dev *dev = ns->dev;
1542 struct nvme_command c;
1543 struct nvme_iod *iod = NULL;
1544 unsigned length;
1545
1546 memset(&c, 0, sizeof(c));
1547 c.common.opcode = opcode;
1548 if (opcode == nvme_admin_download_fw) {
1549 if (hdr->iovec_count > 0) {
1550 /* Assuming SGL is not allowed for this command */
1551 res = nvme_trans_completion(hdr,
1552 SAM_STAT_CHECK_CONDITION,
1553 ILLEGAL_REQUEST,
1554 SCSI_ASC_INVALID_CDB,
1555 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1556 goto out;
1557 }
1558 iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
1559 (unsigned long)hdr->dxferp, tot_len);
1560 if (IS_ERR(iod)) {
1561 res = PTR_ERR(iod);
1562 goto out;
1563 }
Keith Buschedd10d32014-04-03 16:45:23 -06001564 length = nvme_setup_prps(dev, iod, tot_len, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001565 if (length != tot_len) {
1566 res = -ENOMEM;
1567 goto out_unmap;
1568 }
1569
Keith Buschedd10d32014-04-03 16:45:23 -06001570 c.dlfw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1571 c.dlfw.prp2 = cpu_to_le64(iod->first_dma);
Vishal Verma8741ee42013-04-04 17:52:27 -06001572 c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
1573 c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001574 } else if (opcode == nvme_admin_activate_fw) {
Matthew Wilcoxab3ea5b2013-05-06 08:22:18 -04001575 u32 cdw10 = buffer_id | NVME_FWACT_REPL_ACTV;
1576 c.common.cdw10[0] = cpu_to_le32(cdw10);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001577 }
1578
1579 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1580 res = nvme_trans_status_code(hdr, nvme_sc);
1581 if (res)
1582 goto out_unmap;
1583 if (nvme_sc)
1584 res = nvme_sc;
1585
1586 out_unmap:
1587 if (opcode == nvme_admin_download_fw) {
1588 nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
1589 nvme_free_iod(dev, iod);
1590 }
1591 out:
1592 return res;
1593}
1594
1595/* Mode Select Helper Functions */
1596
1597static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1598 u16 *bd_len, u8 *llbaa)
1599{
1600 if (cdb10) {
1601 /* 10 Byte CDB */
1602 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1603 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
1604 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &&
1605 MODE_SELECT_10_LLBAA_MASK;
1606 } else {
1607 /* 6 Byte CDB */
1608 *bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
1609 }
1610}
1611
1612static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
1613 u16 idx, u16 bd_len, u8 llbaa)
1614{
1615 u16 bd_num;
1616
1617 bd_num = bd_len / ((llbaa == 0) ?
1618 SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
1619 /* Store block descriptor info if a FORMAT UNIT comes later */
1620 /* TODO Saving 1st BD info; what to do if multiple BD received? */
1621 if (llbaa == 0) {
1622 /* Standard Block Descriptor - spc4r34 7.5.5.1 */
1623 ns->mode_select_num_blocks =
1624 (parm_list[idx + 1] << 16) +
1625 (parm_list[idx + 2] << 8) +
1626 (parm_list[idx + 3]);
1627
1628 ns->mode_select_block_len =
1629 (parm_list[idx + 5] << 16) +
1630 (parm_list[idx + 6] << 8) +
1631 (parm_list[idx + 7]);
1632 } else {
1633 /* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
1634 ns->mode_select_num_blocks =
1635 (((u64)parm_list[idx + 0]) << 56) +
1636 (((u64)parm_list[idx + 1]) << 48) +
1637 (((u64)parm_list[idx + 2]) << 40) +
1638 (((u64)parm_list[idx + 3]) << 32) +
1639 (((u64)parm_list[idx + 4]) << 24) +
1640 (((u64)parm_list[idx + 5]) << 16) +
1641 (((u64)parm_list[idx + 6]) << 8) +
1642 ((u64)parm_list[idx + 7]);
1643
1644 ns->mode_select_block_len =
1645 (parm_list[idx + 12] << 24) +
1646 (parm_list[idx + 13] << 16) +
1647 (parm_list[idx + 14] << 8) +
1648 (parm_list[idx + 15]);
1649 }
1650}
1651
Vishal Verma710a1432013-05-13 14:55:18 -06001652static int nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
Vishal Verma5d0f6132013-03-04 18:40:58 -07001653 u8 *mode_page, u8 page_code)
1654{
1655 int res = SNTI_TRANSLATION_SUCCESS;
1656 int nvme_sc;
1657 struct nvme_dev *dev = ns->dev;
1658 unsigned dword11;
1659
1660 switch (page_code) {
1661 case MODE_PAGE_CACHING:
1662 dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
1663 nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
1664 0, NULL);
1665 res = nvme_trans_status_code(hdr, nvme_sc);
1666 if (res)
1667 break;
1668 if (nvme_sc) {
1669 res = nvme_sc;
1670 break;
1671 }
1672 break;
1673 case MODE_PAGE_CONTROL:
1674 break;
1675 case MODE_PAGE_POWER_CONDITION:
1676 /* Verify the OS is not trying to set timers */
1677 if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
1678 res = nvme_trans_completion(hdr,
1679 SAM_STAT_CHECK_CONDITION,
1680 ILLEGAL_REQUEST,
1681 SCSI_ASC_INVALID_PARAMETER,
1682 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1683 if (!res)
1684 res = SNTI_INTERNAL_ERROR;
1685 break;
1686 }
1687 break;
1688 default:
1689 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1690 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1691 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1692 if (!res)
1693 res = SNTI_INTERNAL_ERROR;
1694 break;
1695 }
1696
1697 return res;
1698}
1699
1700static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1701 u8 *cmd, u16 parm_list_len, u8 pf,
1702 u8 sp, u8 cdb10)
1703{
1704 int res = SNTI_TRANSLATION_SUCCESS;
1705 u8 *parm_list;
1706 u16 bd_len;
1707 u8 llbaa = 0;
1708 u16 index, saved_index;
1709 u8 page_code;
1710 u16 mp_size;
1711
1712 /* Get parm list from data-in/out buffer */
1713 parm_list = kmalloc(parm_list_len, GFP_KERNEL);
1714 if (parm_list == NULL) {
1715 res = -ENOMEM;
1716 goto out;
1717 }
1718
1719 res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
1720 if (res != SNTI_TRANSLATION_SUCCESS)
1721 goto out_mem;
1722
1723 nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
1724 index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
1725
1726 if (bd_len != 0) {
1727 /* Block Descriptors present, parse */
1728 nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
1729 index += bd_len;
1730 }
1731 saved_index = index;
1732
1733 /* Multiple mode pages may be present; iterate through all */
1734 /* In 1st Iteration, don't do NVME Command, only check for CDB errors */
1735 do {
1736 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1737 mp_size = parm_list[index + 1] + 2;
1738 if ((page_code != MODE_PAGE_CACHING) &&
1739 (page_code != MODE_PAGE_CONTROL) &&
1740 (page_code != MODE_PAGE_POWER_CONDITION)) {
1741 res = nvme_trans_completion(hdr,
1742 SAM_STAT_CHECK_CONDITION,
1743 ILLEGAL_REQUEST,
1744 SCSI_ASC_INVALID_CDB,
1745 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1746 goto out_mem;
1747 }
1748 index += mp_size;
1749 } while (index < parm_list_len);
1750
1751 /* In 2nd Iteration, do the NVME Commands */
1752 index = saved_index;
1753 do {
1754 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1755 mp_size = parm_list[index + 1] + 2;
1756 res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
1757 page_code);
1758 if (res != SNTI_TRANSLATION_SUCCESS)
1759 break;
1760 index += mp_size;
1761 } while (index < parm_list_len);
1762
1763 out_mem:
1764 kfree(parm_list);
1765 out:
1766 return res;
1767}
1768
1769/* Format Unit Helper Functions */
1770
1771static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
1772 struct sg_io_hdr *hdr)
1773{
1774 int res = SNTI_TRANSLATION_SUCCESS;
1775 int nvme_sc;
1776 struct nvme_dev *dev = ns->dev;
1777 dma_addr_t dma_addr;
1778 void *mem;
1779 struct nvme_id_ns *id_ns;
1780 u8 flbas;
1781
1782 /*
1783 * SCSI Expects a MODE SELECT would have been issued prior to
1784 * a FORMAT UNIT, and the block size and number would be used
1785 * from the block descriptor in it. If a MODE SELECT had not
1786 * been issued, FORMAT shall use the current values for both.
1787 */
1788
1789 if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
1790 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1791 sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
1792 if (mem == NULL) {
1793 res = -ENOMEM;
1794 goto out;
1795 }
1796 /* nvme ns identify */
1797 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1798 res = nvme_trans_status_code(hdr, nvme_sc);
1799 if (res)
1800 goto out_dma;
1801 if (nvme_sc) {
1802 res = nvme_sc;
1803 goto out_dma;
1804 }
1805 id_ns = mem;
1806
1807 if (ns->mode_select_num_blocks == 0)
Vishal Verma8741ee42013-04-04 17:52:27 -06001808 ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001809 if (ns->mode_select_block_len == 0) {
1810 flbas = (id_ns->flbas) & 0x0F;
1811 ns->mode_select_block_len =
1812 (1 << (id_ns->lbaf[flbas].ds));
1813 }
1814 out_dma:
1815 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1816 mem, dma_addr);
1817 }
1818 out:
1819 return res;
1820}
1821
1822static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
1823 u8 format_prot_info, u8 *nvme_pf_code)
1824{
1825 int res = SNTI_TRANSLATION_SUCCESS;
1826 u8 *parm_list;
1827 u8 pf_usage, pf_code;
1828
1829 parm_list = kmalloc(len, GFP_KERNEL);
1830 if (parm_list == NULL) {
1831 res = -ENOMEM;
1832 goto out;
1833 }
1834 res = nvme_trans_copy_from_user(hdr, parm_list, len);
1835 if (res != SNTI_TRANSLATION_SUCCESS)
1836 goto out_mem;
1837
1838 if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
1839 FORMAT_UNIT_IMMED_MASK) != 0) {
1840 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1841 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1842 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1843 goto out_mem;
1844 }
1845
1846 if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
1847 (parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
1848 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1849 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1850 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1851 goto out_mem;
1852 }
1853 pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
1854 FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
1855 pf_code = (pf_usage << 2) | format_prot_info;
1856 switch (pf_code) {
1857 case 0:
1858 *nvme_pf_code = 0;
1859 break;
1860 case 2:
1861 *nvme_pf_code = 1;
1862 break;
1863 case 3:
1864 *nvme_pf_code = 2;
1865 break;
1866 case 7:
1867 *nvme_pf_code = 3;
1868 break;
1869 default:
1870 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1871 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1872 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1873 break;
1874 }
1875
1876 out_mem:
1877 kfree(parm_list);
1878 out:
1879 return res;
1880}
1881
1882static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1883 u8 prot_info)
1884{
1885 int res = SNTI_TRANSLATION_SUCCESS;
1886 int nvme_sc;
1887 struct nvme_dev *dev = ns->dev;
1888 dma_addr_t dma_addr;
1889 void *mem;
1890 struct nvme_id_ns *id_ns;
1891 u8 i;
1892 u8 flbas, nlbaf;
1893 u8 selected_lbaf = 0xFF;
1894 u32 cdw10 = 0;
1895 struct nvme_command c;
1896
1897 /* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
1898 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1899 &dma_addr, GFP_KERNEL);
1900 if (mem == NULL) {
1901 res = -ENOMEM;
1902 goto out;
1903 }
1904 /* nvme ns identify */
1905 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1906 res = nvme_trans_status_code(hdr, nvme_sc);
1907 if (res)
1908 goto out_dma;
1909 if (nvme_sc) {
1910 res = nvme_sc;
1911 goto out_dma;
1912 }
1913 id_ns = mem;
1914 flbas = (id_ns->flbas) & 0x0F;
1915 nlbaf = id_ns->nlbaf;
1916
1917 for (i = 0; i < nlbaf; i++) {
1918 if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
1919 selected_lbaf = i;
1920 break;
1921 }
1922 }
1923 if (selected_lbaf > 0x0F) {
1924 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1925 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1926 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1927 }
Vishal Verma8741ee42013-04-04 17:52:27 -06001928 if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07001929 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1930 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1931 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1932 }
1933
1934 cdw10 |= prot_info << 5;
1935 cdw10 |= selected_lbaf & 0x0F;
1936 memset(&c, 0, sizeof(c));
1937 c.format.opcode = nvme_admin_format_nvm;
Vishal Verma8741ee42013-04-04 17:52:27 -06001938 c.format.nsid = cpu_to_le32(ns->ns_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001939 c.format.cdw10 = cpu_to_le32(cdw10);
1940
1941 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1942 res = nvme_trans_status_code(hdr, nvme_sc);
1943 if (res)
1944 goto out_dma;
1945 if (nvme_sc)
1946 res = nvme_sc;
1947
1948 out_dma:
1949 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1950 dma_addr);
1951 out:
1952 return res;
1953}
1954
1955/* Read/Write Helper Functions */
1956
1957static inline void nvme_trans_get_io_cdb6(u8 *cmd,
1958 struct nvme_trans_io_cdb *cdb_info)
1959{
1960 cdb_info->fua = 0;
1961 cdb_info->prot_info = 0;
1962 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_6_CDB_LBA_OFFSET) &
1963 IO_6_CDB_LBA_MASK;
1964 cdb_info->xfer_len = GET_U8_FROM_CDB(cmd, IO_6_CDB_TX_LEN_OFFSET);
1965
1966 /* sbc3r27 sec 5.32 - TRANSFER LEN of 0 implies a 256 Block transfer */
1967 if (cdb_info->xfer_len == 0)
1968 cdb_info->xfer_len = IO_6_DEFAULT_TX_LEN;
1969}
1970
1971static inline void nvme_trans_get_io_cdb10(u8 *cmd,
1972 struct nvme_trans_io_cdb *cdb_info)
1973{
1974 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_10_CDB_FUA_OFFSET) &
1975 IO_CDB_FUA_MASK;
1976 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_10_CDB_WP_OFFSET) &
1977 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1978 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_10_CDB_LBA_OFFSET);
1979 cdb_info->xfer_len = GET_U16_FROM_CDB(cmd, IO_10_CDB_TX_LEN_OFFSET);
1980}
1981
1982static inline void nvme_trans_get_io_cdb12(u8 *cmd,
1983 struct nvme_trans_io_cdb *cdb_info)
1984{
1985 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_12_CDB_FUA_OFFSET) &
1986 IO_CDB_FUA_MASK;
1987 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_12_CDB_WP_OFFSET) &
1988 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1989 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_12_CDB_LBA_OFFSET);
1990 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_12_CDB_TX_LEN_OFFSET);
1991}
1992
1993static inline void nvme_trans_get_io_cdb16(u8 *cmd,
1994 struct nvme_trans_io_cdb *cdb_info)
1995{
1996 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_16_CDB_FUA_OFFSET) &
1997 IO_CDB_FUA_MASK;
1998 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_16_CDB_WP_OFFSET) &
1999 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
2000 cdb_info->lba = GET_U64_FROM_CDB(cmd, IO_16_CDB_LBA_OFFSET);
2001 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_16_CDB_TX_LEN_OFFSET);
2002}
2003
2004static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
2005 struct nvme_trans_io_cdb *cdb_info,
2006 u32 max_blocks)
2007{
2008 /* If using iovecs, send one nvme command per vector */
2009 if (hdr->iovec_count > 0)
2010 return hdr->iovec_count;
2011 else if (cdb_info->xfer_len > max_blocks)
2012 return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
2013 else
2014 return 1;
2015}
2016
2017static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
2018 struct nvme_trans_io_cdb *cdb_info)
2019{
2020 u16 control = 0;
2021
2022 /* When Protection information support is added, implement here */
2023
2024 if (cdb_info->fua > 0)
2025 control |= NVME_RW_FUA;
2026
2027 return control;
2028}
2029
2030static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2031 struct nvme_trans_io_cdb *cdb_info, u8 is_write)
2032{
2033 int res = SNTI_TRANSLATION_SUCCESS;
2034 int nvme_sc;
2035 struct nvme_dev *dev = ns->dev;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002036 u32 num_cmds;
2037 struct nvme_iod *iod;
2038 u64 unit_len;
2039 u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
2040 u32 retcode;
2041 u32 i = 0;
2042 u64 nvme_offset = 0;
Vishal Verma8741ee42013-04-04 17:52:27 -06002043 void __user *next_mapping_addr;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002044 struct nvme_command c;
2045 u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
2046 u16 control;
Keith Buschddcb7762014-03-24 10:03:56 -04002047 u32 max_blocks = queue_max_hw_sectors(ns->queue);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002048
2049 num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
2050
2051 /*
2052 * This loop handles two cases.
2053 * First, when an SGL is used in the form of an iovec list:
2054 * - Use iov_base as the next mapping address for the nvme command_id
2055 * - Use iov_len as the data transfer length for the command.
2056 * Second, when we have a single buffer
2057 * - If larger than max_blocks, split into chunks, offset
2058 * each nvme command accordingly.
2059 */
2060 for (i = 0; i < num_cmds; i++) {
2061 memset(&c, 0, sizeof(c));
2062 if (hdr->iovec_count > 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -06002063 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002064
Vishal Verma8741ee42013-04-04 17:52:27 -06002065 retcode = copy_from_user(&sgl, hdr->dxferp +
2066 i * sizeof(struct sg_iovec),
2067 sizeof(struct sg_iovec));
2068 if (retcode)
2069 return -EFAULT;
2070 unit_len = sgl.iov_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002071 unit_num_blocks = unit_len >> ns->lba_shift;
Vishal Verma8741ee42013-04-04 17:52:27 -06002072 next_mapping_addr = sgl.iov_base;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002073 } else {
2074 unit_num_blocks = min((u64)max_blocks,
2075 (cdb_info->xfer_len - nvme_offset));
2076 unit_len = unit_num_blocks << ns->lba_shift;
2077 next_mapping_addr = hdr->dxferp +
2078 ((1 << ns->lba_shift) * nvme_offset);
2079 }
2080
2081 c.rw.opcode = opcode;
2082 c.rw.nsid = cpu_to_le32(ns->ns_id);
2083 c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
2084 c.rw.length = cpu_to_le16(unit_num_blocks - 1);
2085 control = nvme_trans_io_get_control(ns, cdb_info);
2086 c.rw.control = cpu_to_le16(control);
2087
2088 iod = nvme_map_user_pages(dev,
2089 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2090 (unsigned long)next_mapping_addr, unit_len);
2091 if (IS_ERR(iod)) {
2092 res = PTR_ERR(iod);
2093 goto out;
2094 }
Keith Buschedd10d32014-04-03 16:45:23 -06002095 retcode = nvme_setup_prps(dev, iod, unit_len, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002096 if (retcode != unit_len) {
2097 nvme_unmap_user_pages(dev,
2098 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2099 iod);
2100 nvme_free_iod(dev, iod);
2101 res = -ENOMEM;
2102 goto out;
2103 }
Keith Buschedd10d32014-04-03 16:45:23 -06002104 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
2105 c.rw.prp2 = cpu_to_le64(iod->first_dma);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002106
2107 nvme_offset += unit_num_blocks;
2108
Keith Busch4f5099a2014-03-03 16:39:13 -07002109 nvme_sc = nvme_submit_io_cmd(dev, &c, NULL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002110 if (nvme_sc != NVME_SC_SUCCESS) {
2111 nvme_unmap_user_pages(dev,
2112 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2113 iod);
2114 nvme_free_iod(dev, iod);
2115 res = nvme_trans_status_code(hdr, nvme_sc);
2116 goto out;
2117 }
2118 nvme_unmap_user_pages(dev,
2119 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2120 iod);
2121 nvme_free_iod(dev, iod);
2122 }
2123 res = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2124
2125 out:
2126 return res;
2127}
2128
2129
2130/* SCSI Command Translation Functions */
2131
2132static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
2133 u8 *cmd)
2134{
2135 int res = SNTI_TRANSLATION_SUCCESS;
2136 struct nvme_trans_io_cdb cdb_info;
2137 u8 opcode = cmd[0];
2138 u64 xfer_bytes;
2139 u64 sum_iov_len = 0;
Vishal Verma8741ee42013-04-04 17:52:27 -06002140 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002141 int i;
Vishal Verma8741ee42013-04-04 17:52:27 -06002142 size_t not_copied;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002143
2144 /* Extract Fields from CDB */
2145 switch (opcode) {
2146 case WRITE_6:
2147 case READ_6:
2148 nvme_trans_get_io_cdb6(cmd, &cdb_info);
2149 break;
2150 case WRITE_10:
2151 case READ_10:
2152 nvme_trans_get_io_cdb10(cmd, &cdb_info);
2153 break;
2154 case WRITE_12:
2155 case READ_12:
2156 nvme_trans_get_io_cdb12(cmd, &cdb_info);
2157 break;
2158 case WRITE_16:
2159 case READ_16:
2160 nvme_trans_get_io_cdb16(cmd, &cdb_info);
2161 break;
2162 default:
2163 /* Will never really reach here */
2164 res = SNTI_INTERNAL_ERROR;
2165 goto out;
2166 }
2167
2168 /* Calculate total length of transfer (in bytes) */
2169 if (hdr->iovec_count > 0) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07002170 for (i = 0; i < hdr->iovec_count; i++) {
Vishal Verma8741ee42013-04-04 17:52:27 -06002171 not_copied = copy_from_user(&sgl, hdr->dxferp +
2172 i * sizeof(struct sg_iovec),
2173 sizeof(struct sg_iovec));
2174 if (not_copied)
2175 return -EFAULT;
2176 sum_iov_len += sgl.iov_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002177 /* IO vector sizes should be multiples of block size */
Vishal Verma8741ee42013-04-04 17:52:27 -06002178 if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07002179 res = nvme_trans_completion(hdr,
2180 SAM_STAT_CHECK_CONDITION,
2181 ILLEGAL_REQUEST,
2182 SCSI_ASC_INVALID_PARAMETER,
2183 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2184 goto out;
2185 }
2186 }
2187 } else {
2188 sum_iov_len = hdr->dxfer_len;
2189 }
2190
2191 /* As Per sg ioctl howto, if the lengths differ, use the lower one */
2192 xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
2193
2194 /* If block count and actual data buffer size dont match, error out */
2195 if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
2196 res = -EINVAL;
2197 goto out;
2198 }
2199
2200 /* Check for 0 length transfer - it is not illegal */
2201 if (cdb_info.xfer_len == 0)
2202 goto out;
2203
2204 /* Send NVMe IO Command(s) */
2205 res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
2206 if (res != SNTI_TRANSLATION_SUCCESS)
2207 goto out;
2208
2209 out:
2210 return res;
2211}
2212
2213static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2214 u8 *cmd)
2215{
2216 int res = SNTI_TRANSLATION_SUCCESS;
2217 u8 evpd;
2218 u8 page_code;
2219 int alloc_len;
2220 u8 *inq_response;
2221
2222 evpd = GET_INQ_EVPD_BIT(cmd);
2223 page_code = GET_INQ_PAGE_CODE(cmd);
2224 alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
2225
2226 inq_response = kmalloc(STANDARD_INQUIRY_LENGTH, GFP_KERNEL);
2227 if (inq_response == NULL) {
2228 res = -ENOMEM;
2229 goto out_mem;
2230 }
2231
2232 if (evpd == 0) {
2233 if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
2234 res = nvme_trans_standard_inquiry_page(ns, hdr,
2235 inq_response, alloc_len);
2236 } else {
2237 res = nvme_trans_completion(hdr,
2238 SAM_STAT_CHECK_CONDITION,
2239 ILLEGAL_REQUEST,
2240 SCSI_ASC_INVALID_CDB,
2241 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2242 }
2243 } else {
2244 switch (page_code) {
2245 case VPD_SUPPORTED_PAGES:
2246 res = nvme_trans_supported_vpd_pages(ns, hdr,
2247 inq_response, alloc_len);
2248 break;
2249 case VPD_SERIAL_NUMBER:
2250 res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
2251 alloc_len);
2252 break;
2253 case VPD_DEVICE_IDENTIFIERS:
2254 res = nvme_trans_device_id_page(ns, hdr, inq_response,
2255 alloc_len);
2256 break;
2257 case VPD_EXTENDED_INQUIRY:
2258 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2259 break;
2260 case VPD_BLOCK_DEV_CHARACTERISTICS:
2261 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2262 break;
2263 default:
2264 res = nvme_trans_completion(hdr,
2265 SAM_STAT_CHECK_CONDITION,
2266 ILLEGAL_REQUEST,
2267 SCSI_ASC_INVALID_CDB,
2268 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2269 break;
2270 }
2271 }
2272 kfree(inq_response);
2273 out_mem:
2274 return res;
2275}
2276
2277static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2278 u8 *cmd)
2279{
2280 int res = SNTI_TRANSLATION_SUCCESS;
2281 u16 alloc_len;
2282 u8 sp;
2283 u8 pc;
2284 u8 page_code;
2285
2286 sp = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_SP_OFFSET);
2287 if (sp != LOG_SENSE_CDB_SP_NOT_ENABLED) {
2288 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2289 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2290 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2291 goto out;
2292 }
2293 pc = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_PC_OFFSET);
2294 page_code = pc & LOG_SENSE_CDB_PAGE_CODE_MASK;
2295 pc = (pc & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
2296 if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
2297 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2298 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2299 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2300 goto out;
2301 }
2302 alloc_len = GET_U16_FROM_CDB(cmd, LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET);
2303 switch (page_code) {
2304 case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
2305 res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
2306 break;
2307 case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
2308 res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
2309 break;
2310 case LOG_PAGE_TEMPERATURE_PAGE:
2311 res = nvme_trans_log_temperature(ns, hdr, alloc_len);
2312 break;
2313 default:
2314 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2315 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2316 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2317 break;
2318 }
2319
2320 out:
2321 return res;
2322}
2323
2324static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2325 u8 *cmd)
2326{
2327 int res = SNTI_TRANSLATION_SUCCESS;
2328 u8 cdb10 = 0;
2329 u16 parm_list_len;
2330 u8 page_format;
2331 u8 save_pages;
2332
2333 page_format = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_PAGE_FORMAT_OFFSET);
2334 page_format &= MODE_SELECT_CDB_PAGE_FORMAT_MASK;
2335
2336 save_pages = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_SAVE_PAGES_OFFSET);
2337 save_pages &= MODE_SELECT_CDB_SAVE_PAGES_MASK;
2338
2339 if (GET_OPCODE(cmd) == MODE_SELECT) {
2340 parm_list_len = GET_U8_FROM_CDB(cmd,
2341 MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET);
2342 } else {
2343 parm_list_len = GET_U16_FROM_CDB(cmd,
2344 MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET);
2345 cdb10 = 1;
2346 }
2347
2348 if (parm_list_len != 0) {
2349 /*
2350 * According to SPC-4 r24, a paramter list length field of 0
2351 * shall not be considered an error
2352 */
2353 res = nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
2354 page_format, save_pages, cdb10);
2355 }
2356
2357 return res;
2358}
2359
2360static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2361 u8 *cmd)
2362{
2363 int res = SNTI_TRANSLATION_SUCCESS;
2364 u16 alloc_len;
2365 u8 cdb10 = 0;
2366 u8 page_code;
2367 u8 pc;
2368
2369 if (GET_OPCODE(cmd) == MODE_SENSE) {
2370 alloc_len = GET_U8_FROM_CDB(cmd, MODE_SENSE6_ALLOC_LEN_OFFSET);
2371 } else {
2372 alloc_len = GET_U16_FROM_CDB(cmd,
2373 MODE_SENSE10_ALLOC_LEN_OFFSET);
2374 cdb10 = 1;
2375 }
2376
2377 pc = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CONTROL_OFFSET) &
2378 MODE_SENSE_PAGE_CONTROL_MASK;
2379 if (pc != MODE_SENSE_PC_CURRENT_VALUES) {
2380 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2381 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2382 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2383 goto out;
2384 }
2385
2386 page_code = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CODE_OFFSET) &
2387 MODE_SENSE_PAGE_CODE_MASK;
2388 switch (page_code) {
2389 case MODE_PAGE_CACHING:
2390 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2391 cdb10,
2392 &nvme_trans_fill_caching_page,
2393 MODE_PAGE_CACHING_LEN);
2394 break;
2395 case MODE_PAGE_CONTROL:
2396 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2397 cdb10,
2398 &nvme_trans_fill_control_page,
2399 MODE_PAGE_CONTROL_LEN);
2400 break;
2401 case MODE_PAGE_POWER_CONDITION:
2402 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2403 cdb10,
2404 &nvme_trans_fill_pow_cnd_page,
2405 MODE_PAGE_POW_CND_LEN);
2406 break;
2407 case MODE_PAGE_INFO_EXCEP:
2408 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2409 cdb10,
2410 &nvme_trans_fill_inf_exc_page,
2411 MODE_PAGE_INF_EXC_LEN);
2412 break;
2413 case MODE_PAGE_RETURN_ALL:
2414 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2415 cdb10,
2416 &nvme_trans_fill_all_pages,
2417 MODE_PAGE_ALL_LEN);
2418 break;
2419 default:
2420 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2421 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2422 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2423 break;
2424 }
2425
2426 out:
2427 return res;
2428}
2429
2430static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2431 u8 *cmd)
2432{
2433 int res = SNTI_TRANSLATION_SUCCESS;
2434 int nvme_sc;
2435 u32 alloc_len = READ_CAP_10_RESP_SIZE;
2436 u32 resp_size = READ_CAP_10_RESP_SIZE;
2437 u32 xfer_len;
2438 u8 cdb16;
2439 struct nvme_dev *dev = ns->dev;
2440 dma_addr_t dma_addr;
2441 void *mem;
2442 struct nvme_id_ns *id_ns;
2443 u8 *response;
2444
2445 cdb16 = IS_READ_CAP_16(cmd);
2446 if (cdb16) {
2447 alloc_len = GET_READ_CAP_16_ALLOC_LENGTH(cmd);
2448 resp_size = READ_CAP_16_RESP_SIZE;
2449 }
2450
2451 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
2452 &dma_addr, GFP_KERNEL);
2453 if (mem == NULL) {
2454 res = -ENOMEM;
2455 goto out;
2456 }
2457 /* nvme ns identify */
2458 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
2459 res = nvme_trans_status_code(hdr, nvme_sc);
2460 if (res)
2461 goto out_dma;
2462 if (nvme_sc) {
2463 res = nvme_sc;
2464 goto out_dma;
2465 }
2466 id_ns = mem;
2467
Tushar Behera03ea83e2013-06-10 10:20:55 +05302468 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002469 if (response == NULL) {
2470 res = -ENOMEM;
2471 goto out_dma;
2472 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07002473 nvme_trans_fill_read_cap(response, id_ns, cdb16);
2474
2475 xfer_len = min(alloc_len, resp_size);
2476 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2477
2478 kfree(response);
2479 out_dma:
2480 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
2481 dma_addr);
2482 out:
2483 return res;
2484}
2485
2486static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2487 u8 *cmd)
2488{
2489 int res = SNTI_TRANSLATION_SUCCESS;
2490 int nvme_sc;
2491 u32 alloc_len, xfer_len, resp_size;
2492 u8 select_report;
2493 u8 *response;
2494 struct nvme_dev *dev = ns->dev;
2495 dma_addr_t dma_addr;
2496 void *mem;
2497 struct nvme_id_ctrl *id_ctrl;
2498 u32 ll_length, lun_id;
2499 u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
Vishal Verma8741ee42013-04-04 17:52:27 -06002500 __be32 tmp_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002501
2502 alloc_len = GET_REPORT_LUNS_ALLOC_LENGTH(cmd);
2503 select_report = GET_U8_FROM_CDB(cmd, REPORT_LUNS_SR_OFFSET);
2504
2505 if ((select_report != ALL_LUNS_RETURNED) &&
2506 (select_report != ALL_WELL_KNOWN_LUNS_RETURNED) &&
2507 (select_report != RESTRICTED_LUNS_RETURNED)) {
2508 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2509 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2510 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2511 goto out;
2512 } else {
2513 /* NVMe Controller Identify */
2514 mem = dma_alloc_coherent(&dev->pci_dev->dev,
2515 sizeof(struct nvme_id_ctrl),
2516 &dma_addr, GFP_KERNEL);
2517 if (mem == NULL) {
2518 res = -ENOMEM;
2519 goto out;
2520 }
2521 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
2522 res = nvme_trans_status_code(hdr, nvme_sc);
2523 if (res)
2524 goto out_dma;
2525 if (nvme_sc) {
2526 res = nvme_sc;
2527 goto out_dma;
2528 }
2529 id_ctrl = mem;
Vishal Verma8741ee42013-04-04 17:52:27 -06002530 ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002531 resp_size = ll_length + LUN_DATA_HEADER_SIZE;
2532
2533 if (alloc_len < resp_size) {
2534 res = nvme_trans_completion(hdr,
2535 SAM_STAT_CHECK_CONDITION,
2536 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2537 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2538 goto out_dma;
2539 }
2540
Tushar Behera03ea83e2013-06-10 10:20:55 +05302541 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002542 if (response == NULL) {
2543 res = -ENOMEM;
2544 goto out_dma;
2545 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07002546
2547 /* The first LUN ID will always be 0 per the SAM spec */
Vishal Verma8741ee42013-04-04 17:52:27 -06002548 for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07002549 /*
2550 * Set the LUN Id and then increment to the next LUN
2551 * location in the parameter data.
2552 */
Vishal Verma8741ee42013-04-04 17:52:27 -06002553 __be64 tmp_id = cpu_to_be64(lun_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002554 memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
2555 lun_id_offset += LUN_ENTRY_SIZE;
2556 }
2557 tmp_len = cpu_to_be32(ll_length);
2558 memcpy(response, &tmp_len, sizeof(u32));
2559 }
2560
2561 xfer_len = min(alloc_len, resp_size);
2562 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2563
2564 kfree(response);
2565 out_dma:
2566 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
2567 dma_addr);
2568 out:
2569 return res;
2570}
2571
2572static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2573 u8 *cmd)
2574{
2575 int res = SNTI_TRANSLATION_SUCCESS;
2576 u8 alloc_len, xfer_len, resp_size;
2577 u8 desc_format;
2578 u8 *response;
2579
2580 alloc_len = GET_REQUEST_SENSE_ALLOC_LENGTH(cmd);
2581 desc_format = GET_U8_FROM_CDB(cmd, REQUEST_SENSE_DESC_OFFSET);
2582 desc_format &= REQUEST_SENSE_DESC_MASK;
2583
2584 resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
2585 (FIXED_FMT_SENSE_DATA_SIZE));
Tushar Behera03ea83e2013-06-10 10:20:55 +05302586 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002587 if (response == NULL) {
2588 res = -ENOMEM;
2589 goto out;
2590 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07002591
2592 if (desc_format == DESCRIPTOR_FORMAT_SENSE_DATA_TYPE) {
2593 /* Descriptor Format Sense Data */
2594 response[0] = DESC_FORMAT_SENSE_DATA;
2595 response[1] = NO_SENSE;
2596 /* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
2597 response[2] = SCSI_ASC_NO_SENSE;
2598 response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2599 /* SDAT_OVFL = 0 | Additional Sense Length = 0 */
2600 } else {
2601 /* Fixed Format Sense Data */
2602 response[0] = FIXED_SENSE_DATA;
2603 /* Byte 1 = Obsolete */
2604 response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
2605 /* Bytes 3-6 - Information - set to zero */
2606 response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
2607 /* Bytes 8-11 - Cmd Specific Information - set to zero */
2608 response[12] = SCSI_ASC_NO_SENSE;
2609 response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2610 /* Byte 14 = Field Replaceable Unit Code = 0 */
2611 /* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
2612 }
2613
2614 xfer_len = min(alloc_len, resp_size);
2615 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2616
2617 kfree(response);
2618 out:
2619 return res;
2620}
2621
2622static int nvme_trans_security_protocol(struct nvme_ns *ns,
2623 struct sg_io_hdr *hdr,
2624 u8 *cmd)
2625{
2626 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2627 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2628 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2629}
2630
2631static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2632 u8 *cmd)
2633{
2634 int res = SNTI_TRANSLATION_SUCCESS;
2635 int nvme_sc;
Keith Busch14385de2013-04-25 14:39:27 -06002636 struct nvme_command c;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002637 u8 immed, pcmod, pc, no_flush, start;
2638
2639 immed = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_IMMED_OFFSET);
2640 pcmod = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET);
2641 pc = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_OFFSET);
2642 no_flush = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_NO_FLUSH_OFFSET);
2643 start = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_START_OFFSET);
2644
2645 immed &= START_STOP_UNIT_CDB_IMMED_MASK;
2646 pcmod &= START_STOP_UNIT_CDB_POWER_COND_MOD_MASK;
2647 pc = (pc & START_STOP_UNIT_CDB_POWER_COND_MASK) >> NIBBLE_SHIFT;
2648 no_flush &= START_STOP_UNIT_CDB_NO_FLUSH_MASK;
2649 start &= START_STOP_UNIT_CDB_START_MASK;
2650
2651 if (immed != 0) {
2652 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2653 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2654 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2655 } else {
2656 if (no_flush == 0) {
2657 /* Issue NVME FLUSH command prior to START STOP UNIT */
Keith Busch14385de2013-04-25 14:39:27 -06002658 memset(&c, 0, sizeof(c));
2659 c.common.opcode = nvme_cmd_flush;
2660 c.common.nsid = cpu_to_le32(ns->ns_id);
2661
Keith Busch4f5099a2014-03-03 16:39:13 -07002662 nvme_sc = nvme_submit_io_cmd(ns->dev, &c, NULL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002663 res = nvme_trans_status_code(hdr, nvme_sc);
2664 if (res)
2665 goto out;
2666 if (nvme_sc) {
2667 res = nvme_sc;
2668 goto out;
2669 }
2670 }
2671 /* Setup the expected power state transition */
2672 res = nvme_trans_power_state(ns, hdr, pc, pcmod, start);
2673 }
2674
2675 out:
2676 return res;
2677}
2678
2679static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
2680 struct sg_io_hdr *hdr, u8 *cmd)
2681{
2682 int res = SNTI_TRANSLATION_SUCCESS;
2683 int nvme_sc;
Keith Busch14385de2013-04-25 14:39:27 -06002684 struct nvme_command c;
Keith Busch14385de2013-04-25 14:39:27 -06002685
2686 memset(&c, 0, sizeof(c));
2687 c.common.opcode = nvme_cmd_flush;
2688 c.common.nsid = cpu_to_le32(ns->ns_id);
2689
Keith Busch4f5099a2014-03-03 16:39:13 -07002690 nvme_sc = nvme_submit_io_cmd(ns->dev, &c, NULL);
Keith Busch14385de2013-04-25 14:39:27 -06002691
Vishal Verma5d0f6132013-03-04 18:40:58 -07002692 res = nvme_trans_status_code(hdr, nvme_sc);
2693 if (res)
2694 goto out;
2695 if (nvme_sc)
2696 res = nvme_sc;
2697
2698 out:
2699 return res;
2700}
2701
2702static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2703 u8 *cmd)
2704{
2705 int res = SNTI_TRANSLATION_SUCCESS;
2706 u8 parm_hdr_len = 0;
2707 u8 nvme_pf_code = 0;
2708 u8 format_prot_info, long_list, format_data;
2709
2710 format_prot_info = GET_U8_FROM_CDB(cmd,
2711 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET);
2712 long_list = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_LONG_LIST_OFFSET);
2713 format_data = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET);
2714
2715 format_prot_info = (format_prot_info &
2716 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK) >>
2717 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT;
2718 long_list &= FORMAT_UNIT_CDB_LONG_LIST_MASK;
2719 format_data &= FORMAT_UNIT_CDB_FORMAT_DATA_MASK;
2720
2721 if (format_data != 0) {
2722 if (format_prot_info != 0) {
2723 if (long_list == 0)
2724 parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
2725 else
2726 parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
2727 }
2728 } else if (format_data == 0 && format_prot_info != 0) {
2729 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2730 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2731 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2732 goto out;
2733 }
2734
2735 /* Get parm header from data-in/out buffer */
2736 /*
2737 * According to the translation spec, the only fields in the parameter
2738 * list we are concerned with are in the header. So allocate only that.
2739 */
2740 if (parm_hdr_len > 0) {
2741 res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
2742 format_prot_info, &nvme_pf_code);
2743 if (res != SNTI_TRANSLATION_SUCCESS)
2744 goto out;
2745 }
2746
2747 /* Attempt to activate any previously downloaded firmware image */
2748 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw, 0, 0, 0);
2749
2750 /* Determine Block size and count and send format command */
2751 res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
2752 if (res != SNTI_TRANSLATION_SUCCESS)
2753 goto out;
2754
2755 res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
2756
2757 out:
2758 return res;
2759}
2760
2761static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
2762 struct sg_io_hdr *hdr,
2763 u8 *cmd)
2764{
2765 int res = SNTI_TRANSLATION_SUCCESS;
2766 struct nvme_dev *dev = ns->dev;
2767
2768 if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
2769 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2770 NOT_READY, SCSI_ASC_LUN_NOT_READY,
2771 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2772 else
2773 res = nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
2774
2775 return res;
2776}
2777
2778static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2779 u8 *cmd)
2780{
2781 int res = SNTI_TRANSLATION_SUCCESS;
2782 u32 buffer_offset, parm_list_length;
2783 u8 buffer_id, mode;
2784
2785 parm_list_length =
2786 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET);
2787 if (parm_list_length % BYTES_TO_DWORDS != 0) {
2788 /* NVMe expects Firmware file to be a whole number of DWORDS */
2789 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2790 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2791 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2792 goto out;
2793 }
2794 buffer_id = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_ID_OFFSET);
2795 if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
2796 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2797 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2798 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2799 goto out;
2800 }
2801 mode = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_MODE_OFFSET) &
2802 WRITE_BUFFER_CDB_MODE_MASK;
2803 buffer_offset =
2804 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET);
2805
2806 switch (mode) {
2807 case DOWNLOAD_SAVE_ACTIVATE:
2808 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2809 parm_list_length, buffer_offset,
2810 buffer_id);
2811 if (res != SNTI_TRANSLATION_SUCCESS)
2812 goto out;
2813 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2814 parm_list_length, buffer_offset,
2815 buffer_id);
2816 break;
2817 case DOWNLOAD_SAVE_DEFER_ACTIVATE:
2818 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2819 parm_list_length, buffer_offset,
2820 buffer_id);
2821 break;
2822 case ACTIVATE_DEFERRED_MICROCODE:
2823 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2824 parm_list_length, buffer_offset,
2825 buffer_id);
2826 break;
2827 default:
2828 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2829 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2830 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2831 break;
2832 }
2833
2834 out:
2835 return res;
2836}
2837
Keith Buschec503732013-04-24 15:44:24 -06002838struct scsi_unmap_blk_desc {
2839 __be64 slba;
2840 __be32 nlb;
2841 u32 resv;
2842};
2843
2844struct scsi_unmap_parm_list {
2845 __be16 unmap_data_len;
2846 __be16 unmap_blk_desc_data_len;
2847 u32 resv;
2848 struct scsi_unmap_blk_desc desc[0];
2849};
2850
2851static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2852 u8 *cmd)
2853{
2854 struct nvme_dev *dev = ns->dev;
2855 struct scsi_unmap_parm_list *plist;
2856 struct nvme_dsm_range *range;
Keith Buschec503732013-04-24 15:44:24 -06002857 struct nvme_command c;
2858 int i, nvme_sc, res = -ENOMEM;
2859 u16 ndesc, list_len;
2860 dma_addr_t dma_addr;
2861
2862 list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
2863 if (!list_len)
2864 return -EINVAL;
2865
2866 plist = kmalloc(list_len, GFP_KERNEL);
2867 if (!plist)
2868 return -ENOMEM;
2869
2870 res = nvme_trans_copy_from_user(hdr, plist, list_len);
2871 if (res != SNTI_TRANSLATION_SUCCESS)
2872 goto out;
2873
2874 ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
2875 if (!ndesc || ndesc > 256) {
2876 res = -EINVAL;
2877 goto out;
2878 }
2879
2880 range = dma_alloc_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2881 &dma_addr, GFP_KERNEL);
2882 if (!range)
2883 goto out;
2884
2885 for (i = 0; i < ndesc; i++) {
2886 range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
2887 range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
2888 range[i].cattr = 0;
2889 }
2890
2891 memset(&c, 0, sizeof(c));
2892 c.dsm.opcode = nvme_cmd_dsm;
2893 c.dsm.nsid = cpu_to_le32(ns->ns_id);
2894 c.dsm.prp1 = cpu_to_le64(dma_addr);
2895 c.dsm.nr = cpu_to_le32(ndesc - 1);
2896 c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
2897
Keith Busch4f5099a2014-03-03 16:39:13 -07002898 nvme_sc = nvme_submit_io_cmd(dev, &c, NULL);
Keith Buschec503732013-04-24 15:44:24 -06002899 res = nvme_trans_status_code(hdr, nvme_sc);
2900
2901 dma_free_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2902 range, dma_addr);
2903 out:
2904 kfree(plist);
2905 return res;
2906}
2907
Vishal Verma5d0f6132013-03-04 18:40:58 -07002908static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
2909{
2910 u8 cmd[BLK_MAX_CDB];
2911 int retcode;
2912 unsigned int opcode;
2913
2914 if (hdr->cmdp == NULL)
2915 return -EMSGSIZE;
2916 if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
2917 return -EFAULT;
2918
2919 opcode = cmd[0];
2920
2921 switch (opcode) {
2922 case READ_6:
2923 case READ_10:
2924 case READ_12:
2925 case READ_16:
2926 retcode = nvme_trans_io(ns, hdr, 0, cmd);
2927 break;
2928 case WRITE_6:
2929 case WRITE_10:
2930 case WRITE_12:
2931 case WRITE_16:
2932 retcode = nvme_trans_io(ns, hdr, 1, cmd);
2933 break;
2934 case INQUIRY:
2935 retcode = nvme_trans_inquiry(ns, hdr, cmd);
2936 break;
2937 case LOG_SENSE:
2938 retcode = nvme_trans_log_sense(ns, hdr, cmd);
2939 break;
2940 case MODE_SELECT:
2941 case MODE_SELECT_10:
2942 retcode = nvme_trans_mode_select(ns, hdr, cmd);
2943 break;
2944 case MODE_SENSE:
2945 case MODE_SENSE_10:
2946 retcode = nvme_trans_mode_sense(ns, hdr, cmd);
2947 break;
2948 case READ_CAPACITY:
2949 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2950 break;
2951 case SERVICE_ACTION_IN:
2952 if (IS_READ_CAP_16(cmd))
2953 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2954 else
2955 goto out;
2956 break;
2957 case REPORT_LUNS:
2958 retcode = nvme_trans_report_luns(ns, hdr, cmd);
2959 break;
2960 case REQUEST_SENSE:
2961 retcode = nvme_trans_request_sense(ns, hdr, cmd);
2962 break;
2963 case SECURITY_PROTOCOL_IN:
2964 case SECURITY_PROTOCOL_OUT:
2965 retcode = nvme_trans_security_protocol(ns, hdr, cmd);
2966 break;
2967 case START_STOP:
2968 retcode = nvme_trans_start_stop(ns, hdr, cmd);
2969 break;
2970 case SYNCHRONIZE_CACHE:
2971 retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
2972 break;
2973 case FORMAT_UNIT:
2974 retcode = nvme_trans_format_unit(ns, hdr, cmd);
2975 break;
2976 case TEST_UNIT_READY:
2977 retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
2978 break;
2979 case WRITE_BUFFER:
2980 retcode = nvme_trans_write_buffer(ns, hdr, cmd);
2981 break;
Keith Buschec503732013-04-24 15:44:24 -06002982 case UNMAP:
2983 retcode = nvme_trans_unmap(ns, hdr, cmd);
2984 break;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002985 default:
2986 out:
2987 retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2988 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2989 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2990 break;
2991 }
2992 return retcode;
2993}
2994
2995int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
2996{
2997 struct sg_io_hdr hdr;
2998 int retcode;
2999
3000 if (!capable(CAP_SYS_ADMIN))
3001 return -EACCES;
3002 if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
3003 return -EFAULT;
3004 if (hdr.interface_id != 'S')
3005 return -EINVAL;
3006 if (hdr.cmd_len > BLK_MAX_CDB)
3007 return -EINVAL;
3008
3009 retcode = nvme_scsi_translate(ns, &hdr);
3010 if (retcode < 0)
3011 return retcode;
3012 if (retcode > 0)
3013 retcode = SNTI_TRANSLATION_SUCCESS;
Vishal Verma8741ee42013-04-04 17:52:27 -06003014 if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
Vishal Verma5d0f6132013-03-04 18:40:58 -07003015 return -EFAULT;
3016
3017 return retcode;
3018}
3019
Keith Busch320a3822013-10-23 13:07:34 -06003020#ifdef CONFIG_COMPAT
3021typedef struct sg_io_hdr32 {
3022 compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */
3023 compat_int_t dxfer_direction; /* [i] data transfer direction */
3024 unsigned char cmd_len; /* [i] SCSI command length ( <= 16 bytes) */
3025 unsigned char mx_sb_len; /* [i] max length to write to sbp */
3026 unsigned short iovec_count; /* [i] 0 implies no scatter gather */
3027 compat_uint_t dxfer_len; /* [i] byte count of data transfer */
3028 compat_uint_t dxferp; /* [i], [*io] points to data transfer memory
3029 or scatter gather list */
3030 compat_uptr_t cmdp; /* [i], [*i] points to command to perform */
3031 compat_uptr_t sbp; /* [i], [*o] points to sense_buffer memory */
3032 compat_uint_t timeout; /* [i] MAX_UINT->no timeout (unit: millisec) */
3033 compat_uint_t flags; /* [i] 0 -> default, see SG_FLAG... */
3034 compat_int_t pack_id; /* [i->o] unused internally (normally) */
3035 compat_uptr_t usr_ptr; /* [i->o] unused internally */
3036 unsigned char status; /* [o] scsi status */
3037 unsigned char masked_status; /* [o] shifted, masked scsi status */
3038 unsigned char msg_status; /* [o] messaging level data (optional) */
3039 unsigned char sb_len_wr; /* [o] byte count actually written to sbp */
3040 unsigned short host_status; /* [o] errors from host adapter */
3041 unsigned short driver_status; /* [o] errors from software driver */
3042 compat_int_t resid; /* [o] dxfer_len - actual_transferred */
3043 compat_uint_t duration; /* [o] time taken by cmd (unit: millisec) */
3044 compat_uint_t info; /* [o] auxiliary information */
3045} sg_io_hdr32_t; /* 64 bytes long (on sparc32) */
3046
3047typedef struct sg_iovec32 {
3048 compat_uint_t iov_base;
3049 compat_uint_t iov_len;
3050} sg_iovec32_t;
3051
3052static int sg_build_iovec(sg_io_hdr_t __user *sgio, void __user *dxferp, u16 iovec_count)
3053{
3054 sg_iovec_t __user *iov = (sg_iovec_t __user *) (sgio + 1);
3055 sg_iovec32_t __user *iov32 = dxferp;
3056 int i;
3057
3058 for (i = 0; i < iovec_count; i++) {
3059 u32 base, len;
3060
3061 if (get_user(base, &iov32[i].iov_base) ||
3062 get_user(len, &iov32[i].iov_len) ||
3063 put_user(compat_ptr(base), &iov[i].iov_base) ||
3064 put_user(len, &iov[i].iov_len))
3065 return -EFAULT;
3066 }
3067
3068 if (put_user(iov, &sgio->dxferp))
3069 return -EFAULT;
3070 return 0;
3071}
3072
3073int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg)
3074{
3075 sg_io_hdr32_t __user *sgio32 = (sg_io_hdr32_t __user *)arg;
3076 sg_io_hdr_t __user *sgio;
3077 u16 iovec_count;
3078 u32 data;
3079 void __user *dxferp;
3080 int err;
3081 int interface_id;
3082
3083 if (get_user(interface_id, &sgio32->interface_id))
3084 return -EFAULT;
3085 if (interface_id != 'S')
3086 return -EINVAL;
3087
3088 if (get_user(iovec_count, &sgio32->iovec_count))
3089 return -EFAULT;
3090
3091 {
3092 void __user *top = compat_alloc_user_space(0);
3093 void __user *new = compat_alloc_user_space(sizeof(sg_io_hdr_t) +
3094 (iovec_count * sizeof(sg_iovec_t)));
3095 if (new > top)
3096 return -EINVAL;
3097
3098 sgio = new;
3099 }
3100
3101 /* Ok, now construct. */
3102 if (copy_in_user(&sgio->interface_id, &sgio32->interface_id,
3103 (2 * sizeof(int)) +
3104 (2 * sizeof(unsigned char)) +
3105 (1 * sizeof(unsigned short)) +
3106 (1 * sizeof(unsigned int))))
3107 return -EFAULT;
3108
3109 if (get_user(data, &sgio32->dxferp))
3110 return -EFAULT;
3111 dxferp = compat_ptr(data);
3112 if (iovec_count) {
3113 if (sg_build_iovec(sgio, dxferp, iovec_count))
3114 return -EFAULT;
3115 } else {
3116 if (put_user(dxferp, &sgio->dxferp))
3117 return -EFAULT;
3118 }
3119
3120 {
3121 unsigned char __user *cmdp;
3122 unsigned char __user *sbp;
3123
3124 if (get_user(data, &sgio32->cmdp))
3125 return -EFAULT;
3126 cmdp = compat_ptr(data);
3127
3128 if (get_user(data, &sgio32->sbp))
3129 return -EFAULT;
3130 sbp = compat_ptr(data);
3131
3132 if (put_user(cmdp, &sgio->cmdp) ||
3133 put_user(sbp, &sgio->sbp))
3134 return -EFAULT;
3135 }
3136
3137 if (copy_in_user(&sgio->timeout, &sgio32->timeout,
3138 3 * sizeof(int)))
3139 return -EFAULT;
3140
3141 if (get_user(data, &sgio32->usr_ptr))
3142 return -EFAULT;
3143 if (put_user(compat_ptr(data), &sgio->usr_ptr))
3144 return -EFAULT;
3145
3146 err = nvme_sg_io(ns, sgio);
3147 if (err >= 0) {
3148 void __user *datap;
3149
3150 if (copy_in_user(&sgio32->pack_id, &sgio->pack_id,
3151 sizeof(int)) ||
3152 get_user(datap, &sgio->usr_ptr) ||
3153 put_user((u32)(unsigned long)datap,
3154 &sgio32->usr_ptr) ||
3155 copy_in_user(&sgio32->status, &sgio->status,
3156 (4 * sizeof(unsigned char)) +
3157 (2 * sizeof(unsigned short)) +
3158 (3 * sizeof(int))))
3159 err = -EFAULT;
3160 }
3161
3162 return err;
3163}
3164#endif
3165
Vishal Verma5d0f6132013-03-04 18:40:58 -07003166int nvme_sg_get_version_num(int __user *ip)
3167{
3168 return put_user(sg_version_num, ip);
3169}