| Gao Pan | 20ce1e3 | 2016-11-30 10:40:46 +0800 | [diff] [blame] | 1 | * Freescale Low Power Inter IC (LPI2C) for i.MX |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : |
| 5 | - "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc |
| 6 | - "fsl,imx8dv-lpi2c" for LPI2C compatible with the one integrated on i.MX8DV soc |
| 7 | - reg : address and length of the lpi2c master registers |
| 8 | - interrupt-parent : core interrupt controller |
| 9 | - interrupts : lpi2c interrupt |
| 10 | - clocks : lpi2c clock specifier |
| 11 | |
| 12 | Examples: |
| 13 | |
| 14 | lpi2c7: lpi2c7@40A50000 { |
| 15 | compatible = "fsl,imx8dv-lpi2c"; |
| 16 | reg = <0x40A50000 0x10000>; |
| 17 | interrupt-parent = <&intc>; |
| 18 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; |
| 19 | clocks = <&clks IMX7ULP_CLK_LPI2C7>; |
| 20 | }; |