| Linus Walleij | f8635ab | 2013-01-05 00:29:31 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC |
| 3 | */ |
| 4 | /include/ "skeleton.dtsi" |
| 5 | |
| 6 | / { |
| 7 | #address-cells = <1>; |
| 8 | #size-cells = <1>; |
| 9 | |
| 10 | memory { |
| 11 | reg = <0x00000000 0x04000000>, |
| 12 | <0x08000000 0x04000000>; |
| 13 | }; |
| 14 | |
| 15 | L2: l2-cache { |
| 16 | compatible = "arm,l210-cache"; |
| 17 | reg = <0x10210000 0x1000>; |
| 18 | interrupt-parent = <&vica>; |
| 19 | interrupts = <30>; |
| 20 | cache-unified; |
| 21 | cache-level = <2>; |
| 22 | }; |
| 23 | |
| 24 | mtu0 { |
| 25 | /* Nomadik system timer */ |
| 26 | reg = <0x101e2000 0x1000>; |
| 27 | interrupt-parent = <&vica>; |
| 28 | interrupts = <4>; |
| 29 | }; |
| 30 | |
| 31 | mtu1 { |
| 32 | /* Secondary timer */ |
| 33 | reg = <0x101e3000 0x1000>; |
| 34 | interrupt-parent = <&vica>; |
| 35 | interrupts = <5>; |
| 36 | }; |
| 37 | |
| 38 | amba { |
| 39 | compatible = "arm,amba-bus"; |
| 40 | #address-cells = <1>; |
| 41 | #size-cells = <1>; |
| 42 | ranges; |
| 43 | |
| 44 | vica: intc@0x10140000 { |
| 45 | compatible = "arm,versatile-vic"; |
| 46 | interrupt-controller; |
| 47 | #interrupt-cells = <1>; |
| 48 | reg = <0x10140000 0x20>; |
| 49 | }; |
| 50 | |
| 51 | vicb: intc@0x10140020 { |
| 52 | compatible = "arm,versatile-vic"; |
| 53 | interrupt-controller; |
| 54 | #interrupt-cells = <1>; |
| 55 | reg = <0x10140020 0x20>; |
| 56 | }; |
| 57 | |
| 58 | uart0: uart@101fd000 { |
| 59 | compatible = "arm,pl011", "arm,primecell"; |
| 60 | reg = <0x101fd000 0x1000>; |
| 61 | interrupt-parent = <&vica>; |
| 62 | interrupts = <12>; |
| 63 | }; |
| 64 | |
| 65 | uart1: uart@101fb000 { |
| 66 | compatible = "arm,pl011", "arm,primecell"; |
| 67 | reg = <0x101fb000 0x1000>; |
| 68 | interrupt-parent = <&vica>; |
| 69 | interrupts = <17>; |
| 70 | }; |
| 71 | |
| 72 | uart2: uart@101f2000 { |
| 73 | compatible = "arm,pl011", "arm,primecell"; |
| 74 | reg = <0x101f2000 0x1000>; |
| 75 | interrupt-parent = <&vica>; |
| 76 | interrupts = <28>; |
| 77 | status = "disabled"; |
| 78 | }; |
| Linus Walleij | 27bda03 | 2013-01-05 10:38:57 +0100 | [diff] [blame^] | 79 | |
| 80 | rng: rng@101b0000 { |
| 81 | compatible = "arm,primecell"; |
| 82 | reg = <0x101b0000 0x1000>; |
| 83 | }; |
| 84 | |
| 85 | rtc: rtc@101e8000 { |
| 86 | compatible = "arm,pl031", "arm,primecell"; |
| 87 | reg = <0x101e8000 0x1000>; |
| 88 | interrupt-parent = <&vica>; |
| 89 | interrupts = <10>; |
| 90 | }; |
| Linus Walleij | f8635ab | 2013-01-05 00:29:31 +0100 | [diff] [blame] | 91 | }; |
| 92 | }; |