Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 1 | /* |
| 2 | * ACPI support for Intel Lynxpoint LPSS. |
| 3 | * |
Rafael J. Wysocki | 3df2da9 | 2015-02-03 14:29:43 +0100 | [diff] [blame] | 4 | * Copyright (C) 2013, Intel Corporation |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 5 | * Authors: Mika Westerberg <mika.westerberg@linux.intel.com> |
| 6 | * Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/acpi.h> |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 14 | #include <linux/clkdev.h> |
| 15 | #include <linux/clk-provider.h> |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/io.h> |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 18 | #include <linux/mutex.h> |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/platform_data/clk-lpss.h> |
Tomeu Vizoso | 989561d | 2016-01-07 16:46:13 +0100 | [diff] [blame] | 21 | #include <linux/pm_domain.h> |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 22 | #include <linux/pm_runtime.h> |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 23 | #include <linux/delay.h> |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 24 | |
| 25 | #include "internal.h" |
| 26 | |
| 27 | ACPI_MODULE_NAME("acpi_lpss"); |
| 28 | |
Rafael J. Wysocki | d6ddaaa | 2014-05-30 14:34:05 +0200 | [diff] [blame] | 29 | #ifdef CONFIG_X86_INTEL_LPSS |
| 30 | |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 31 | #include <asm/cpu_device_id.h> |
Dave Hansen | 4626d84 | 2016-06-02 17:19:46 -0700 | [diff] [blame] | 32 | #include <asm/intel-family.h> |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 33 | #include <asm/iosf_mbi.h> |
| 34 | #include <asm/pmc_atom.h> |
| 35 | |
Rafael J. Wysocki | d6ddaaa | 2014-05-30 14:34:05 +0200 | [diff] [blame] | 36 | #define LPSS_ADDR(desc) ((unsigned long)&desc) |
| 37 | |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 38 | #define LPSS_CLK_SIZE 0x04 |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 39 | #define LPSS_LTR_SIZE 0x18 |
| 40 | |
| 41 | /* Offsets relative to LPSS_PRIVATE_OFFSET */ |
Heikki Krogerus | ed3a872 | 2014-05-19 14:42:07 +0300 | [diff] [blame] | 42 | #define LPSS_CLK_DIVIDER_DEF_MASK (BIT(1) | BIT(16)) |
Mika Westerberg | 765bdd4 | 2014-06-17 14:33:39 +0300 | [diff] [blame] | 43 | #define LPSS_RESETS 0x04 |
| 44 | #define LPSS_RESETS_RESET_FUNC BIT(0) |
| 45 | #define LPSS_RESETS_RESET_APB BIT(1) |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 46 | #define LPSS_GENERAL 0x08 |
| 47 | #define LPSS_GENERAL_LTR_MODE_SW BIT(2) |
Heikki Krogerus | 088f1fd | 2013-10-09 09:49:20 +0300 | [diff] [blame] | 48 | #define LPSS_GENERAL_UART_RTS_OVRD BIT(3) |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 49 | #define LPSS_SW_LTR 0x10 |
| 50 | #define LPSS_AUTO_LTR 0x14 |
Rafael J. Wysocki | 1a8f835 | 2014-02-11 00:35:53 +0100 | [diff] [blame] | 51 | #define LPSS_LTR_SNOOP_REQ BIT(15) |
| 52 | #define LPSS_LTR_SNOOP_MASK 0x0000FFFF |
| 53 | #define LPSS_LTR_SNOOP_LAT_1US 0x800 |
| 54 | #define LPSS_LTR_SNOOP_LAT_32US 0xC00 |
| 55 | #define LPSS_LTR_SNOOP_LAT_SHIFT 5 |
| 56 | #define LPSS_LTR_SNOOP_LAT_CUTOFF 3000 |
| 57 | #define LPSS_LTR_MAX_VAL 0x3FF |
Heikki Krogerus | 06d8641 | 2013-06-17 13:25:46 +0300 | [diff] [blame] | 58 | #define LPSS_TX_INT 0x20 |
| 59 | #define LPSS_TX_INT_MASK BIT(1) |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 60 | |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 61 | #define LPSS_PRV_REG_COUNT 9 |
| 62 | |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 63 | /* LPSS Flags */ |
| 64 | #define LPSS_CLK BIT(0) |
| 65 | #define LPSS_CLK_GATE BIT(1) |
| 66 | #define LPSS_CLK_DIVIDER BIT(2) |
| 67 | #define LPSS_LTR BIT(3) |
| 68 | #define LPSS_SAVE_CTX BIT(4) |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 69 | #define LPSS_NO_D3_DELAY BIT(5) |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 70 | |
Heikki Krogerus | 06d8641 | 2013-06-17 13:25:46 +0300 | [diff] [blame] | 71 | struct lpss_private_data; |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 72 | |
| 73 | struct lpss_device_desc { |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 74 | unsigned int flags; |
Heikki Krogerus | fcf0789 | 2015-03-06 15:48:38 +0200 | [diff] [blame] | 75 | const char *clk_con_id; |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 76 | unsigned int prv_offset; |
Mika Westerberg | 958c4eb | 2013-06-18 16:51:35 +0300 | [diff] [blame] | 77 | size_t prv_size_override; |
Heikki Krogerus | a5565cf | 2016-08-23 11:33:27 +0300 | [diff] [blame] | 78 | struct property_entry *properties; |
Heikki Krogerus | 06d8641 | 2013-06-17 13:25:46 +0300 | [diff] [blame] | 79 | void (*setup)(struct lpss_private_data *pdata); |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 80 | }; |
| 81 | |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 82 | static const struct lpss_device_desc lpss_dma_desc = { |
Rafael J. Wysocki | 3df2da9 | 2015-02-03 14:29:43 +0100 | [diff] [blame] | 83 | .flags = LPSS_CLK, |
Rafael J. Wysocki | b59cc20 | 2013-05-08 11:55:49 +0300 | [diff] [blame] | 84 | }; |
| 85 | |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 86 | struct lpss_private_data { |
| 87 | void __iomem *mmio_base; |
| 88 | resource_size_t mmio_size; |
Heikki Krogerus | 03f09f7 | 2014-09-02 10:55:09 +0300 | [diff] [blame] | 89 | unsigned int fixed_clk_rate; |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 90 | struct clk *clk; |
| 91 | const struct lpss_device_desc *dev_desc; |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 92 | u32 prv_reg_ctx[LPSS_PRV_REG_COUNT]; |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 93 | }; |
| 94 | |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 95 | /* LPSS run time quirks */ |
| 96 | static unsigned int lpss_quirks; |
| 97 | |
| 98 | /* |
| 99 | * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device. |
| 100 | * |
Andy Shevchenko | fa9e93b | 2015-12-21 22:31:09 +0200 | [diff] [blame] | 101 | * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 102 | * it can be powered off automatically whenever the last LPSS device goes down. |
| 103 | * In case of no power any access to the DMA controller will hang the system. |
| 104 | * The behaviour is reproduced on some HP laptops based on Intel BayTrail as |
| 105 | * well as on ASuS T100TA transformer. |
| 106 | * |
| 107 | * This quirk overrides power state of entire LPSS island to keep DMA powered |
| 108 | * on whenever we have at least one other device in use. |
| 109 | */ |
| 110 | #define LPSS_QUIRK_ALWAYS_POWER_ON BIT(0) |
| 111 | |
Heikki Krogerus | 1f47a77 | 2014-09-11 15:19:33 +0300 | [diff] [blame] | 112 | /* UART Component Parameter Register */ |
| 113 | #define LPSS_UART_CPR 0xF4 |
| 114 | #define LPSS_UART_CPR_AFCE BIT(4) |
| 115 | |
Heikki Krogerus | 06d8641 | 2013-06-17 13:25:46 +0300 | [diff] [blame] | 116 | static void lpss_uart_setup(struct lpss_private_data *pdata) |
| 117 | { |
Heikki Krogerus | 088f1fd | 2013-10-09 09:49:20 +0300 | [diff] [blame] | 118 | unsigned int offset; |
Heikki Krogerus | 1f47a77 | 2014-09-11 15:19:33 +0300 | [diff] [blame] | 119 | u32 val; |
Heikki Krogerus | 06d8641 | 2013-06-17 13:25:46 +0300 | [diff] [blame] | 120 | |
Heikki Krogerus | 088f1fd | 2013-10-09 09:49:20 +0300 | [diff] [blame] | 121 | offset = pdata->dev_desc->prv_offset + LPSS_TX_INT; |
Heikki Krogerus | 1f47a77 | 2014-09-11 15:19:33 +0300 | [diff] [blame] | 122 | val = readl(pdata->mmio_base + offset); |
| 123 | writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset); |
Heikki Krogerus | 088f1fd | 2013-10-09 09:49:20 +0300 | [diff] [blame] | 124 | |
Heikki Krogerus | 1f47a77 | 2014-09-11 15:19:33 +0300 | [diff] [blame] | 125 | val = readl(pdata->mmio_base + LPSS_UART_CPR); |
| 126 | if (!(val & LPSS_UART_CPR_AFCE)) { |
| 127 | offset = pdata->dev_desc->prv_offset + LPSS_GENERAL; |
| 128 | val = readl(pdata->mmio_base + offset); |
| 129 | val |= LPSS_GENERAL_UART_RTS_OVRD; |
| 130 | writel(val, pdata->mmio_base + offset); |
| 131 | } |
Heikki Krogerus | 06d8641 | 2013-06-17 13:25:46 +0300 | [diff] [blame] | 132 | } |
| 133 | |
Mika Westerberg | 3095794 | 2015-02-18 13:50:17 +0200 | [diff] [blame] | 134 | static void lpss_deassert_reset(struct lpss_private_data *pdata) |
Mika Westerberg | 765bdd4 | 2014-06-17 14:33:39 +0300 | [diff] [blame] | 135 | { |
| 136 | unsigned int offset; |
| 137 | u32 val; |
| 138 | |
| 139 | offset = pdata->dev_desc->prv_offset + LPSS_RESETS; |
| 140 | val = readl(pdata->mmio_base + offset); |
| 141 | val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC; |
| 142 | writel(val, pdata->mmio_base + offset); |
Mika Westerberg | 3095794 | 2015-02-18 13:50:17 +0200 | [diff] [blame] | 143 | } |
| 144 | |
| 145 | #define LPSS_I2C_ENABLE 0x6c |
| 146 | |
| 147 | static void byt_i2c_setup(struct lpss_private_data *pdata) |
| 148 | { |
| 149 | lpss_deassert_reset(pdata); |
Heikki Krogerus | 03f09f7 | 2014-09-02 10:55:09 +0300 | [diff] [blame] | 150 | |
| 151 | if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset)) |
| 152 | pdata->fixed_clk_rate = 133000000; |
Mika Westerberg | 3293c7b | 2015-02-18 13:50:16 +0200 | [diff] [blame] | 153 | |
| 154 | writel(0, pdata->mmio_base + LPSS_I2C_ENABLE); |
Mika Westerberg | 765bdd4 | 2014-06-17 14:33:39 +0300 | [diff] [blame] | 155 | } |
| 156 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 157 | static const struct lpss_device_desc lpt_dev_desc = { |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 158 | .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR, |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 159 | .prv_offset = 0x800, |
Heikki Krogerus | ed3a872 | 2014-05-19 14:42:07 +0300 | [diff] [blame] | 160 | }; |
| 161 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 162 | static const struct lpss_device_desc lpt_i2c_dev_desc = { |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 163 | .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR, |
Heikki Krogerus | ed3a872 | 2014-05-19 14:42:07 +0300 | [diff] [blame] | 164 | .prv_offset = 0x800, |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 165 | }; |
| 166 | |
Heikki Krogerus | a5565cf | 2016-08-23 11:33:27 +0300 | [diff] [blame] | 167 | static struct property_entry uart_properties[] = { |
| 168 | PROPERTY_ENTRY_U32("reg-io-width", 4), |
| 169 | PROPERTY_ENTRY_U32("reg-shift", 2), |
| 170 | PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"), |
| 171 | { }, |
| 172 | }; |
| 173 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 174 | static const struct lpss_device_desc lpt_uart_dev_desc = { |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 175 | .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR, |
Heikki Krogerus | fcf0789 | 2015-03-06 15:48:38 +0200 | [diff] [blame] | 176 | .clk_con_id = "baudclk", |
Heikki Krogerus | 06d8641 | 2013-06-17 13:25:46 +0300 | [diff] [blame] | 177 | .prv_offset = 0x800, |
Heikki Krogerus | 06d8641 | 2013-06-17 13:25:46 +0300 | [diff] [blame] | 178 | .setup = lpss_uart_setup, |
Heikki Krogerus | a5565cf | 2016-08-23 11:33:27 +0300 | [diff] [blame] | 179 | .properties = uart_properties, |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 180 | }; |
| 181 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 182 | static const struct lpss_device_desc lpt_sdio_dev_desc = { |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 183 | .flags = LPSS_LTR, |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 184 | .prv_offset = 0x1000, |
Mika Westerberg | 958c4eb | 2013-06-18 16:51:35 +0300 | [diff] [blame] | 185 | .prv_size_override = 0x1018, |
Chew, Chiau Ee | e1c7481 | 2014-02-19 02:24:29 +0800 | [diff] [blame] | 186 | }; |
| 187 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 188 | static const struct lpss_device_desc byt_pwm_dev_desc = { |
Heikki Krogerus | 3f56bf3 | 2014-09-02 10:55:10 +0300 | [diff] [blame] | 189 | .flags = LPSS_SAVE_CTX, |
Chew, Chiau Ee | e1c7481 | 2014-02-19 02:24:29 +0800 | [diff] [blame] | 190 | }; |
| 191 | |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 192 | static const struct lpss_device_desc bsw_pwm_dev_desc = { |
| 193 | .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY, |
| 194 | }; |
| 195 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 196 | static const struct lpss_device_desc byt_uart_dev_desc = { |
Rafael J. Wysocki | 3df2da9 | 2015-02-03 14:29:43 +0100 | [diff] [blame] | 197 | .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX, |
Heikki Krogerus | fcf0789 | 2015-03-06 15:48:38 +0200 | [diff] [blame] | 198 | .clk_con_id = "baudclk", |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 199 | .prv_offset = 0x800, |
Heikki Krogerus | 06d8641 | 2013-06-17 13:25:46 +0300 | [diff] [blame] | 200 | .setup = lpss_uart_setup, |
Heikki Krogerus | a5565cf | 2016-08-23 11:33:27 +0300 | [diff] [blame] | 201 | .properties = uart_properties, |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 202 | }; |
| 203 | |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 204 | static const struct lpss_device_desc bsw_uart_dev_desc = { |
| 205 | .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX |
| 206 | | LPSS_NO_D3_DELAY, |
| 207 | .clk_con_id = "baudclk", |
| 208 | .prv_offset = 0x800, |
| 209 | .setup = lpss_uart_setup, |
Heikki Krogerus | a5565cf | 2016-08-23 11:33:27 +0300 | [diff] [blame] | 210 | .properties = uart_properties, |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 211 | }; |
| 212 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 213 | static const struct lpss_device_desc byt_spi_dev_desc = { |
Rafael J. Wysocki | 3df2da9 | 2015-02-03 14:29:43 +0100 | [diff] [blame] | 214 | .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX, |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 215 | .prv_offset = 0x400, |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 216 | }; |
| 217 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 218 | static const struct lpss_device_desc byt_sdio_dev_desc = { |
Rafael J. Wysocki | 3df2da9 | 2015-02-03 14:29:43 +0100 | [diff] [blame] | 219 | .flags = LPSS_CLK, |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 220 | }; |
| 221 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 222 | static const struct lpss_device_desc byt_i2c_dev_desc = { |
Rafael J. Wysocki | 3df2da9 | 2015-02-03 14:29:43 +0100 | [diff] [blame] | 223 | .flags = LPSS_CLK | LPSS_SAVE_CTX, |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 224 | .prv_offset = 0x800, |
Heikki Krogerus | 03f09f7 | 2014-09-02 10:55:09 +0300 | [diff] [blame] | 225 | .setup = byt_i2c_setup, |
Alan Cox | 1bfbd8e | 2014-08-19 15:55:22 +0300 | [diff] [blame] | 226 | }; |
| 227 | |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 228 | static const struct lpss_device_desc bsw_i2c_dev_desc = { |
| 229 | .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY, |
| 230 | .prv_offset = 0x800, |
| 231 | .setup = byt_i2c_setup, |
| 232 | }; |
| 233 | |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 234 | static const struct lpss_device_desc bsw_spi_dev_desc = { |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 235 | .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX |
| 236 | | LPSS_NO_D3_DELAY, |
Mika Westerberg | 3095794 | 2015-02-18 13:50:17 +0200 | [diff] [blame] | 237 | .prv_offset = 0x400, |
| 238 | .setup = lpss_deassert_reset, |
| 239 | }; |
| 240 | |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 241 | #define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, } |
| 242 | |
| 243 | static const struct x86_cpu_id lpss_cpu_ids[] = { |
Dave Hansen | 4626d84 | 2016-06-02 17:19:46 -0700 | [diff] [blame] | 244 | ICPU(INTEL_FAM6_ATOM_SILVERMONT1), /* Valleyview, Bay Trail */ |
| 245 | ICPU(INTEL_FAM6_ATOM_AIRMONT), /* Braswell, Cherry Trail */ |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 246 | {} |
| 247 | }; |
| 248 | |
Rafael J. Wysocki | d6ddaaa | 2014-05-30 14:34:05 +0200 | [diff] [blame] | 249 | #else |
| 250 | |
| 251 | #define LPSS_ADDR(desc) (0UL) |
| 252 | |
| 253 | #endif /* CONFIG_X86_INTEL_LPSS */ |
| 254 | |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 255 | static const struct acpi_device_id acpi_lpss_device_ids[] = { |
Rafael J. Wysocki | b59cc20 | 2013-05-08 11:55:49 +0300 | [diff] [blame] | 256 | /* Generic LPSS devices */ |
Rafael J. Wysocki | d6ddaaa | 2014-05-30 14:34:05 +0200 | [diff] [blame] | 257 | { "INTL9C60", LPSS_ADDR(lpss_dma_desc) }, |
Rafael J. Wysocki | b59cc20 | 2013-05-08 11:55:49 +0300 | [diff] [blame] | 258 | |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 259 | /* Lynxpoint LPSS devices */ |
Rafael J. Wysocki | d6ddaaa | 2014-05-30 14:34:05 +0200 | [diff] [blame] | 260 | { "INT33C0", LPSS_ADDR(lpt_dev_desc) }, |
| 261 | { "INT33C1", LPSS_ADDR(lpt_dev_desc) }, |
| 262 | { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) }, |
| 263 | { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) }, |
| 264 | { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) }, |
| 265 | { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) }, |
| 266 | { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) }, |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 267 | { "INT33C7", }, |
| 268 | |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 269 | /* BayTrail LPSS devices */ |
Rafael J. Wysocki | d6ddaaa | 2014-05-30 14:34:05 +0200 | [diff] [blame] | 270 | { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) }, |
| 271 | { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) }, |
| 272 | { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) }, |
| 273 | { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) }, |
| 274 | { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) }, |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 275 | { "INT33B2", }, |
Jin Yao | 20482d3 | 2014-05-15 18:28:46 +0300 | [diff] [blame] | 276 | { "INT33FC", }, |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 277 | |
Alan Cox | 1bfbd8e | 2014-08-19 15:55:22 +0300 | [diff] [blame] | 278 | /* Braswell LPSS devices */ |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 279 | { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) }, |
| 280 | { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) }, |
Mika Westerberg | 3095794 | 2015-02-18 13:50:17 +0200 | [diff] [blame] | 281 | { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) }, |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 282 | { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) }, |
Alan Cox | 1bfbd8e | 2014-08-19 15:55:22 +0300 | [diff] [blame] | 283 | |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 284 | /* Broadwell LPSS devices */ |
Rafael J. Wysocki | d6ddaaa | 2014-05-30 14:34:05 +0200 | [diff] [blame] | 285 | { "INT3430", LPSS_ADDR(lpt_dev_desc) }, |
| 286 | { "INT3431", LPSS_ADDR(lpt_dev_desc) }, |
| 287 | { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) }, |
| 288 | { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) }, |
| 289 | { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) }, |
| 290 | { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) }, |
| 291 | { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) }, |
Mika Westerberg | a4d9753 | 2013-11-12 11:48:19 +0200 | [diff] [blame] | 292 | { "INT3437", }, |
| 293 | |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 294 | /* Wildcat Point LPSS devices */ |
| 295 | { "INT3438", LPSS_ADDR(lpt_dev_desc) }, |
Jie Yang | 43218a1 | 2014-08-01 09:06:35 +0800 | [diff] [blame] | 296 | |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 297 | { } |
| 298 | }; |
| 299 | |
Rafael J. Wysocki | d6ddaaa | 2014-05-30 14:34:05 +0200 | [diff] [blame] | 300 | #ifdef CONFIG_X86_INTEL_LPSS |
| 301 | |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 302 | static int is_memory(struct acpi_resource *res, void *not_used) |
| 303 | { |
| 304 | struct resource r; |
| 305 | return !acpi_dev_resource_memory(res, &r); |
| 306 | } |
| 307 | |
| 308 | /* LPSS main clock device. */ |
| 309 | static struct platform_device *lpss_clk_dev; |
| 310 | |
| 311 | static inline void lpt_register_clock_device(void) |
| 312 | { |
| 313 | lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0); |
| 314 | } |
| 315 | |
| 316 | static int register_device_clock(struct acpi_device *adev, |
| 317 | struct lpss_private_data *pdata) |
| 318 | { |
| 319 | const struct lpss_device_desc *dev_desc = pdata->dev_desc; |
Heikki Krogerus | ed3a872 | 2014-05-19 14:42:07 +0300 | [diff] [blame] | 320 | const char *devname = dev_name(&adev->dev); |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 321 | struct clk *clk = ERR_PTR(-ENODEV); |
Rafael J. Wysocki | b59cc20 | 2013-05-08 11:55:49 +0300 | [diff] [blame] | 322 | struct lpss_clk_data *clk_data; |
Heikki Krogerus | ed3a872 | 2014-05-19 14:42:07 +0300 | [diff] [blame] | 323 | const char *parent, *clk_name; |
| 324 | void __iomem *prv_base; |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 325 | |
| 326 | if (!lpss_clk_dev) |
| 327 | lpt_register_clock_device(); |
| 328 | |
Rafael J. Wysocki | b59cc20 | 2013-05-08 11:55:49 +0300 | [diff] [blame] | 329 | clk_data = platform_get_drvdata(lpss_clk_dev); |
| 330 | if (!clk_data) |
| 331 | return -ENODEV; |
Heikki Krogerus | b0d00f8 | 2014-09-02 10:55:08 +0300 | [diff] [blame] | 332 | clk = clk_data->clk; |
Rafael J. Wysocki | b59cc20 | 2013-05-08 11:55:49 +0300 | [diff] [blame] | 333 | |
| 334 | if (!pdata->mmio_base |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 335 | || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE) |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 336 | return -ENODATA; |
| 337 | |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 338 | parent = clk_data->name; |
Heikki Krogerus | ed3a872 | 2014-05-19 14:42:07 +0300 | [diff] [blame] | 339 | prv_base = pdata->mmio_base + dev_desc->prv_offset; |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 340 | |
Heikki Krogerus | 03f09f7 | 2014-09-02 10:55:09 +0300 | [diff] [blame] | 341 | if (pdata->fixed_clk_rate) { |
| 342 | clk = clk_register_fixed_rate(NULL, devname, parent, 0, |
| 343 | pdata->fixed_clk_rate); |
| 344 | goto out; |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 345 | } |
| 346 | |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 347 | if (dev_desc->flags & LPSS_CLK_GATE) { |
Heikki Krogerus | ed3a872 | 2014-05-19 14:42:07 +0300 | [diff] [blame] | 348 | clk = clk_register_gate(NULL, devname, parent, 0, |
| 349 | prv_base, 0, 0, NULL); |
| 350 | parent = devname; |
| 351 | } |
| 352 | |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 353 | if (dev_desc->flags & LPSS_CLK_DIVIDER) { |
Heikki Krogerus | ed3a872 | 2014-05-19 14:42:07 +0300 | [diff] [blame] | 354 | /* Prevent division by zero */ |
| 355 | if (!readl(prv_base)) |
| 356 | writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base); |
| 357 | |
| 358 | clk_name = kasprintf(GFP_KERNEL, "%s-div", devname); |
| 359 | if (!clk_name) |
| 360 | return -ENOMEM; |
| 361 | clk = clk_register_fractional_divider(NULL, clk_name, parent, |
| 362 | 0, prv_base, |
| 363 | 1, 15, 16, 15, 0, NULL); |
| 364 | parent = clk_name; |
| 365 | |
| 366 | clk_name = kasprintf(GFP_KERNEL, "%s-update", devname); |
| 367 | if (!clk_name) { |
| 368 | kfree(parent); |
| 369 | return -ENOMEM; |
| 370 | } |
| 371 | clk = clk_register_gate(NULL, clk_name, parent, |
| 372 | CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, |
| 373 | prv_base, 31, 0, NULL); |
| 374 | kfree(parent); |
| 375 | kfree(clk_name); |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 376 | } |
Heikki Krogerus | 03f09f7 | 2014-09-02 10:55:09 +0300 | [diff] [blame] | 377 | out: |
Mika Westerberg | f627217 | 2013-05-13 12:42:44 +0000 | [diff] [blame] | 378 | if (IS_ERR(clk)) |
| 379 | return PTR_ERR(clk); |
| 380 | |
Heikki Krogerus | ed3a872 | 2014-05-19 14:42:07 +0300 | [diff] [blame] | 381 | pdata->clk = clk; |
Heikki Krogerus | fcf0789 | 2015-03-06 15:48:38 +0200 | [diff] [blame] | 382 | clk_register_clkdev(clk, dev_desc->clk_con_id, devname); |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 383 | return 0; |
| 384 | } |
| 385 | |
| 386 | static int acpi_lpss_create_device(struct acpi_device *adev, |
| 387 | const struct acpi_device_id *id) |
| 388 | { |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 389 | const struct lpss_device_desc *dev_desc; |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 390 | struct lpss_private_data *pdata; |
Jiang Liu | 90e9782 | 2015-02-05 13:44:43 +0800 | [diff] [blame] | 391 | struct resource_entry *rentry; |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 392 | struct list_head resource_list; |
Rafael J. Wysocki | 8ce62f8 | 2014-05-25 14:38:52 +0200 | [diff] [blame] | 393 | struct platform_device *pdev; |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 394 | int ret; |
| 395 | |
Mathias Krause | b2687cd | 2015-06-13 14:26:50 +0200 | [diff] [blame] | 396 | dev_desc = (const struct lpss_device_desc *)id->driver_data; |
Rafael J. Wysocki | 8ce62f8 | 2014-05-25 14:38:52 +0200 | [diff] [blame] | 397 | if (!dev_desc) { |
| 398 | pdev = acpi_create_platform_device(adev); |
| 399 | return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1; |
| 400 | } |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 401 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); |
| 402 | if (!pdata) |
| 403 | return -ENOMEM; |
| 404 | |
| 405 | INIT_LIST_HEAD(&resource_list); |
| 406 | ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL); |
| 407 | if (ret < 0) |
| 408 | goto err_out; |
| 409 | |
| 410 | list_for_each_entry(rentry, &resource_list, node) |
Jiang Liu | 90e9782 | 2015-02-05 13:44:43 +0800 | [diff] [blame] | 411 | if (resource_type(rentry->res) == IORESOURCE_MEM) { |
Mika Westerberg | 958c4eb | 2013-06-18 16:51:35 +0300 | [diff] [blame] | 412 | if (dev_desc->prv_size_override) |
| 413 | pdata->mmio_size = dev_desc->prv_size_override; |
| 414 | else |
Jiang Liu | 90e9782 | 2015-02-05 13:44:43 +0800 | [diff] [blame] | 415 | pdata->mmio_size = resource_size(rentry->res); |
| 416 | pdata->mmio_base = ioremap(rentry->res->start, |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 417 | pdata->mmio_size); |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 418 | break; |
| 419 | } |
| 420 | |
| 421 | acpi_dev_free_resource_list(&resource_list); |
| 422 | |
Rafael J. Wysocki | d3e13ff | 2015-07-07 00:31:47 +0200 | [diff] [blame] | 423 | if (!pdata->mmio_base) { |
| 424 | ret = -ENOMEM; |
| 425 | goto err_out; |
| 426 | } |
| 427 | |
Mika Westerberg | af65cfe | 2013-09-02 13:30:25 +0300 | [diff] [blame] | 428 | pdata->dev_desc = dev_desc; |
| 429 | |
Heikki Krogerus | 03f09f7 | 2014-09-02 10:55:09 +0300 | [diff] [blame] | 430 | if (dev_desc->setup) |
| 431 | dev_desc->setup(pdata); |
| 432 | |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 433 | if (dev_desc->flags & LPSS_CLK) { |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 434 | ret = register_device_clock(adev, pdata); |
| 435 | if (ret) { |
Rafael J. Wysocki | b9e95fc | 2013-06-19 00:45:34 +0200 | [diff] [blame] | 436 | /* Skip the device, but continue the namespace scan. */ |
| 437 | ret = 0; |
| 438 | goto err_out; |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 439 | } |
| 440 | } |
| 441 | |
Rafael J. Wysocki | b9e95fc | 2013-06-19 00:45:34 +0200 | [diff] [blame] | 442 | /* |
| 443 | * This works around a known issue in ACPI tables where LPSS devices |
| 444 | * have _PS0 and _PS3 without _PSC (and no power resources), so |
| 445 | * acpi_bus_init_power() will assume that the BIOS has put them into D0. |
| 446 | */ |
| 447 | ret = acpi_device_fix_up_power(adev); |
| 448 | if (ret) { |
| 449 | /* Skip the device, but continue the namespace scan. */ |
| 450 | ret = 0; |
| 451 | goto err_out; |
| 452 | } |
| 453 | |
Heikki Krogerus | a5565cf | 2016-08-23 11:33:27 +0300 | [diff] [blame] | 454 | if (dev_desc->properties) { |
| 455 | ret = device_add_properties(&adev->dev, dev_desc->properties); |
| 456 | if (ret) |
| 457 | goto err_out; |
| 458 | } |
| 459 | |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 460 | adev->driver_data = pdata; |
Rafael J. Wysocki | 8ce62f8 | 2014-05-25 14:38:52 +0200 | [diff] [blame] | 461 | pdev = acpi_create_platform_device(adev); |
| 462 | if (!IS_ERR_OR_NULL(pdev)) { |
Rafael J. Wysocki | 8ce62f8 | 2014-05-25 14:38:52 +0200 | [diff] [blame] | 463 | return 1; |
| 464 | } |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 465 | |
Rafael J. Wysocki | 8ce62f8 | 2014-05-25 14:38:52 +0200 | [diff] [blame] | 466 | ret = PTR_ERR(pdev); |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 467 | adev->driver_data = NULL; |
| 468 | |
| 469 | err_out: |
| 470 | kfree(pdata); |
| 471 | return ret; |
| 472 | } |
| 473 | |
Rafael J. Wysocki | 1a8f835 | 2014-02-11 00:35:53 +0100 | [diff] [blame] | 474 | static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg) |
| 475 | { |
| 476 | return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg); |
| 477 | } |
| 478 | |
| 479 | static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata, |
| 480 | unsigned int reg) |
| 481 | { |
| 482 | writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg); |
| 483 | } |
| 484 | |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 485 | static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val) |
| 486 | { |
| 487 | struct acpi_device *adev; |
| 488 | struct lpss_private_data *pdata; |
| 489 | unsigned long flags; |
| 490 | int ret; |
| 491 | |
| 492 | ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev); |
| 493 | if (WARN_ON(ret)) |
| 494 | return ret; |
| 495 | |
| 496 | spin_lock_irqsave(&dev->power.lock, flags); |
| 497 | if (pm_runtime_suspended(dev)) { |
| 498 | ret = -EAGAIN; |
| 499 | goto out; |
| 500 | } |
| 501 | pdata = acpi_driver_data(adev); |
| 502 | if (WARN_ON(!pdata || !pdata->mmio_base)) { |
| 503 | ret = -ENODEV; |
| 504 | goto out; |
| 505 | } |
Rafael J. Wysocki | 1a8f835 | 2014-02-11 00:35:53 +0100 | [diff] [blame] | 506 | *val = __lpss_reg_read(pdata, reg); |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 507 | |
| 508 | out: |
| 509 | spin_unlock_irqrestore(&dev->power.lock, flags); |
| 510 | return ret; |
| 511 | } |
| 512 | |
| 513 | static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr, |
| 514 | char *buf) |
| 515 | { |
| 516 | u32 ltr_value = 0; |
| 517 | unsigned int reg; |
| 518 | int ret; |
| 519 | |
| 520 | reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR; |
| 521 | ret = lpss_reg_read(dev, reg, <r_value); |
| 522 | if (ret) |
| 523 | return ret; |
| 524 | |
| 525 | return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value); |
| 526 | } |
| 527 | |
| 528 | static ssize_t lpss_ltr_mode_show(struct device *dev, |
| 529 | struct device_attribute *attr, char *buf) |
| 530 | { |
| 531 | u32 ltr_mode = 0; |
| 532 | char *outstr; |
| 533 | int ret; |
| 534 | |
| 535 | ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode); |
| 536 | if (ret) |
| 537 | return ret; |
| 538 | |
| 539 | outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto"; |
| 540 | return sprintf(buf, "%s\n", outstr); |
| 541 | } |
| 542 | |
| 543 | static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL); |
| 544 | static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL); |
| 545 | static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL); |
| 546 | |
| 547 | static struct attribute *lpss_attrs[] = { |
| 548 | &dev_attr_auto_ltr.attr, |
| 549 | &dev_attr_sw_ltr.attr, |
| 550 | &dev_attr_ltr_mode.attr, |
| 551 | NULL, |
| 552 | }; |
| 553 | |
| 554 | static struct attribute_group lpss_attr_group = { |
| 555 | .attrs = lpss_attrs, |
| 556 | .name = "lpss_ltr", |
| 557 | }; |
| 558 | |
Rafael J. Wysocki | 1a8f835 | 2014-02-11 00:35:53 +0100 | [diff] [blame] | 559 | static void acpi_lpss_set_ltr(struct device *dev, s32 val) |
| 560 | { |
| 561 | struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); |
| 562 | u32 ltr_mode, ltr_val; |
| 563 | |
| 564 | ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL); |
| 565 | if (val < 0) { |
| 566 | if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) { |
| 567 | ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW; |
| 568 | __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL); |
| 569 | } |
| 570 | return; |
| 571 | } |
| 572 | ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK; |
| 573 | if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) { |
| 574 | ltr_val |= LPSS_LTR_SNOOP_LAT_32US; |
| 575 | val = LPSS_LTR_MAX_VAL; |
| 576 | } else if (val > LPSS_LTR_MAX_VAL) { |
| 577 | ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ; |
| 578 | val >>= LPSS_LTR_SNOOP_LAT_SHIFT; |
| 579 | } else { |
| 580 | ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ; |
| 581 | } |
| 582 | ltr_val |= val; |
| 583 | __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR); |
| 584 | if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) { |
| 585 | ltr_mode |= LPSS_GENERAL_LTR_MODE_SW; |
| 586 | __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL); |
| 587 | } |
| 588 | } |
| 589 | |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 590 | #ifdef CONFIG_PM |
| 591 | /** |
| 592 | * acpi_lpss_save_ctx() - Save the private registers of LPSS device |
| 593 | * @dev: LPSS device |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 594 | * @pdata: pointer to the private data of the LPSS device |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 595 | * |
| 596 | * Most LPSS devices have private registers which may loose their context when |
| 597 | * the device is powered down. acpi_lpss_save_ctx() saves those registers into |
| 598 | * prv_reg_ctx array. |
| 599 | */ |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 600 | static void acpi_lpss_save_ctx(struct device *dev, |
| 601 | struct lpss_private_data *pdata) |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 602 | { |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 603 | unsigned int i; |
| 604 | |
| 605 | for (i = 0; i < LPSS_PRV_REG_COUNT; i++) { |
| 606 | unsigned long offset = i * sizeof(u32); |
| 607 | |
| 608 | pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset); |
| 609 | dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n", |
| 610 | pdata->prv_reg_ctx[i], offset); |
| 611 | } |
| 612 | } |
| 613 | |
| 614 | /** |
| 615 | * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device |
| 616 | * @dev: LPSS device |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 617 | * @pdata: pointer to the private data of the LPSS device |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 618 | * |
| 619 | * Restores the registers that were previously stored with acpi_lpss_save_ctx(). |
| 620 | */ |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 621 | static void acpi_lpss_restore_ctx(struct device *dev, |
| 622 | struct lpss_private_data *pdata) |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 623 | { |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 624 | unsigned int i; |
| 625 | |
Andy Shevchenko | 02b9854 | 2015-12-04 23:49:21 +0200 | [diff] [blame] | 626 | for (i = 0; i < LPSS_PRV_REG_COUNT; i++) { |
| 627 | unsigned long offset = i * sizeof(u32); |
| 628 | |
| 629 | __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset); |
| 630 | dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n", |
| 631 | pdata->prv_reg_ctx[i], offset); |
| 632 | } |
| 633 | } |
| 634 | |
| 635 | static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata) |
| 636 | { |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 637 | /* |
| 638 | * The following delay is needed or the subsequent write operations may |
| 639 | * fail. The LPSS devices are actually PCI devices and the PCI spec |
| 640 | * expects 10ms delay before the device can be accessed after D3 to D0 |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 641 | * transition. However some platforms like BSW does not need this delay. |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 642 | */ |
Srinidhi Kasagar | b00855a | 2015-08-27 21:30:55 +0530 | [diff] [blame] | 643 | unsigned int delay = 10; /* default 10ms delay */ |
| 644 | |
| 645 | if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY) |
| 646 | delay = 0; |
| 647 | |
| 648 | msleep(delay); |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 649 | } |
| 650 | |
Andy Shevchenko | c3a49cf | 2015-12-04 23:49:20 +0200 | [diff] [blame] | 651 | static int acpi_lpss_activate(struct device *dev) |
| 652 | { |
| 653 | struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); |
| 654 | int ret; |
| 655 | |
| 656 | ret = acpi_dev_runtime_resume(dev); |
| 657 | if (ret) |
| 658 | return ret; |
| 659 | |
| 660 | acpi_lpss_d3_to_d0_delay(pdata); |
| 661 | |
| 662 | /* |
| 663 | * This is called only on ->probe() stage where a device is either in |
| 664 | * known state defined by BIOS or most likely powered off. Due to this |
| 665 | * we have to deassert reset line to be sure that ->probe() will |
| 666 | * recognize the device. |
| 667 | */ |
| 668 | if (pdata->dev_desc->flags & LPSS_SAVE_CTX) |
| 669 | lpss_deassert_reset(pdata); |
| 670 | |
| 671 | return 0; |
| 672 | } |
| 673 | |
| 674 | static void acpi_lpss_dismiss(struct device *dev) |
| 675 | { |
| 676 | acpi_dev_runtime_suspend(dev); |
| 677 | } |
| 678 | |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 679 | #ifdef CONFIG_PM_SLEEP |
| 680 | static int acpi_lpss_suspend_late(struct device *dev) |
| 681 | { |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 682 | struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); |
| 683 | int ret; |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 684 | |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 685 | ret = pm_generic_suspend_late(dev); |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 686 | if (ret) |
| 687 | return ret; |
| 688 | |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 689 | if (pdata->dev_desc->flags & LPSS_SAVE_CTX) |
| 690 | acpi_lpss_save_ctx(dev, pdata); |
| 691 | |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 692 | return acpi_dev_suspend_late(dev); |
| 693 | } |
| 694 | |
Fu Zhonghui | f4168b6 | 2014-09-09 16:30:06 +0200 | [diff] [blame] | 695 | static int acpi_lpss_resume_early(struct device *dev) |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 696 | { |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 697 | struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); |
| 698 | int ret; |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 699 | |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 700 | ret = acpi_dev_resume_early(dev); |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 701 | if (ret) |
| 702 | return ret; |
| 703 | |
Andy Shevchenko | 02b9854 | 2015-12-04 23:49:21 +0200 | [diff] [blame] | 704 | acpi_lpss_d3_to_d0_delay(pdata); |
| 705 | |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 706 | if (pdata->dev_desc->flags & LPSS_SAVE_CTX) |
| 707 | acpi_lpss_restore_ctx(dev, pdata); |
| 708 | |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 709 | return pm_generic_resume_early(dev); |
| 710 | } |
| 711 | #endif /* CONFIG_PM_SLEEP */ |
| 712 | |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 713 | /* IOSF SB for LPSS island */ |
| 714 | #define LPSS_IOSF_UNIT_LPIOEP 0xA0 |
| 715 | #define LPSS_IOSF_UNIT_LPIO1 0xAB |
| 716 | #define LPSS_IOSF_UNIT_LPIO2 0xAC |
| 717 | |
| 718 | #define LPSS_IOSF_PMCSR 0x84 |
| 719 | #define LPSS_PMCSR_D0 0 |
| 720 | #define LPSS_PMCSR_D3hot 3 |
| 721 | #define LPSS_PMCSR_Dx_MASK GENMASK(1, 0) |
| 722 | |
| 723 | #define LPSS_IOSF_GPIODEF0 0x154 |
| 724 | #define LPSS_GPIODEF0_DMA1_D3 BIT(2) |
| 725 | #define LPSS_GPIODEF0_DMA2_D3 BIT(3) |
| 726 | #define LPSS_GPIODEF0_DMA_D3_MASK GENMASK(3, 2) |
| 727 | |
| 728 | static DEFINE_MUTEX(lpss_iosf_mutex); |
| 729 | |
| 730 | static void lpss_iosf_enter_d3_state(void) |
| 731 | { |
| 732 | u32 value1 = 0; |
| 733 | u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK; |
| 734 | u32 value2 = LPSS_PMCSR_D3hot; |
| 735 | u32 mask2 = LPSS_PMCSR_Dx_MASK; |
| 736 | /* |
| 737 | * PMC provides an information about actual status of the LPSS devices. |
| 738 | * Here we read the values related to LPSS power island, i.e. LPSS |
| 739 | * devices, excluding both LPSS DMA controllers, along with SCC domain. |
| 740 | */ |
| 741 | u32 func_dis, d3_sts_0, pmc_status, pmc_mask = 0xfe000ffe; |
| 742 | int ret; |
| 743 | |
| 744 | ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis); |
| 745 | if (ret) |
| 746 | return; |
| 747 | |
| 748 | mutex_lock(&lpss_iosf_mutex); |
| 749 | |
| 750 | ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0); |
| 751 | if (ret) |
| 752 | goto exit; |
| 753 | |
| 754 | /* |
| 755 | * Get the status of entire LPSS power island per device basis. |
| 756 | * Shutdown both LPSS DMA controllers if and only if all other devices |
| 757 | * are already in D3hot. |
| 758 | */ |
| 759 | pmc_status = (~(d3_sts_0 | func_dis)) & pmc_mask; |
| 760 | if (pmc_status) |
| 761 | goto exit; |
| 762 | |
| 763 | iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE, |
| 764 | LPSS_IOSF_PMCSR, value2, mask2); |
| 765 | |
| 766 | iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE, |
| 767 | LPSS_IOSF_PMCSR, value2, mask2); |
| 768 | |
| 769 | iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE, |
| 770 | LPSS_IOSF_GPIODEF0, value1, mask1); |
| 771 | exit: |
| 772 | mutex_unlock(&lpss_iosf_mutex); |
| 773 | } |
| 774 | |
| 775 | static void lpss_iosf_exit_d3_state(void) |
| 776 | { |
| 777 | u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3; |
| 778 | u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK; |
| 779 | u32 value2 = LPSS_PMCSR_D0; |
| 780 | u32 mask2 = LPSS_PMCSR_Dx_MASK; |
| 781 | |
| 782 | mutex_lock(&lpss_iosf_mutex); |
| 783 | |
| 784 | iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE, |
| 785 | LPSS_IOSF_GPIODEF0, value1, mask1); |
| 786 | |
| 787 | iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE, |
| 788 | LPSS_IOSF_PMCSR, value2, mask2); |
| 789 | |
| 790 | iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE, |
| 791 | LPSS_IOSF_PMCSR, value2, mask2); |
| 792 | |
| 793 | mutex_unlock(&lpss_iosf_mutex); |
| 794 | } |
| 795 | |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 796 | static int acpi_lpss_runtime_suspend(struct device *dev) |
| 797 | { |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 798 | struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); |
| 799 | int ret; |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 800 | |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 801 | ret = pm_generic_runtime_suspend(dev); |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 802 | if (ret) |
| 803 | return ret; |
| 804 | |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 805 | if (pdata->dev_desc->flags & LPSS_SAVE_CTX) |
| 806 | acpi_lpss_save_ctx(dev, pdata); |
| 807 | |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 808 | ret = acpi_dev_runtime_suspend(dev); |
| 809 | |
| 810 | /* |
| 811 | * This call must be last in the sequence, otherwise PMC will return |
| 812 | * wrong status for devices being about to be powered off. See |
| 813 | * lpss_iosf_enter_d3_state() for further information. |
| 814 | */ |
| 815 | if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available()) |
| 816 | lpss_iosf_enter_d3_state(); |
| 817 | |
| 818 | return ret; |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 819 | } |
| 820 | |
| 821 | static int acpi_lpss_runtime_resume(struct device *dev) |
| 822 | { |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 823 | struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); |
| 824 | int ret; |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 825 | |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 826 | /* |
| 827 | * This call is kept first to be in symmetry with |
| 828 | * acpi_lpss_runtime_suspend() one. |
| 829 | */ |
| 830 | if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available()) |
| 831 | lpss_iosf_exit_d3_state(); |
| 832 | |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 833 | ret = acpi_dev_runtime_resume(dev); |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 834 | if (ret) |
| 835 | return ret; |
| 836 | |
Andy Shevchenko | 02b9854 | 2015-12-04 23:49:21 +0200 | [diff] [blame] | 837 | acpi_lpss_d3_to_d0_delay(pdata); |
| 838 | |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 839 | if (pdata->dev_desc->flags & LPSS_SAVE_CTX) |
| 840 | acpi_lpss_restore_ctx(dev, pdata); |
| 841 | |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 842 | return pm_generic_runtime_resume(dev); |
| 843 | } |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 844 | #endif /* CONFIG_PM */ |
| 845 | |
| 846 | static struct dev_pm_domain acpi_lpss_pm_domain = { |
Andy Shevchenko | c3a49cf | 2015-12-04 23:49:20 +0200 | [diff] [blame] | 847 | #ifdef CONFIG_PM |
| 848 | .activate = acpi_lpss_activate, |
| 849 | .dismiss = acpi_lpss_dismiss, |
| 850 | #endif |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 851 | .ops = { |
Rafael J. Wysocki | 5de21bb9 | 2014-11-27 22:38:23 +0100 | [diff] [blame] | 852 | #ifdef CONFIG_PM |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 853 | #ifdef CONFIG_PM_SLEEP |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 854 | .prepare = acpi_subsys_prepare, |
Rafael J. Wysocki | 58a1fbb | 2015-10-07 00:50:24 +0200 | [diff] [blame] | 855 | .complete = pm_complete_with_resume_check, |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 856 | .suspend = acpi_subsys_suspend, |
Fu Zhonghui | f4168b6 | 2014-09-09 16:30:06 +0200 | [diff] [blame] | 857 | .suspend_late = acpi_lpss_suspend_late, |
| 858 | .resume_early = acpi_lpss_resume_early, |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 859 | .freeze = acpi_subsys_freeze, |
| 860 | .poweroff = acpi_subsys_suspend, |
Fu Zhonghui | f4168b6 | 2014-09-09 16:30:06 +0200 | [diff] [blame] | 861 | .poweroff_late = acpi_lpss_suspend_late, |
| 862 | .restore_early = acpi_lpss_resume_early, |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 863 | #endif |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 864 | .runtime_suspend = acpi_lpss_runtime_suspend, |
| 865 | .runtime_resume = acpi_lpss_runtime_resume, |
| 866 | #endif |
| 867 | }, |
| 868 | }; |
| 869 | |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 870 | static int acpi_lpss_platform_notify(struct notifier_block *nb, |
| 871 | unsigned long action, void *data) |
| 872 | { |
| 873 | struct platform_device *pdev = to_platform_device(data); |
| 874 | struct lpss_private_data *pdata; |
| 875 | struct acpi_device *adev; |
| 876 | const struct acpi_device_id *id; |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 877 | |
| 878 | id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev); |
| 879 | if (!id || !id->driver_data) |
| 880 | return 0; |
| 881 | |
| 882 | if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) |
| 883 | return 0; |
| 884 | |
| 885 | pdata = acpi_driver_data(adev); |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 886 | if (!pdata) |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 887 | return 0; |
| 888 | |
Andy Shevchenko | cb39dcd | 2014-11-05 18:34:45 +0200 | [diff] [blame] | 889 | if (pdata->mmio_base && |
| 890 | pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) { |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 891 | dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n"); |
| 892 | return 0; |
| 893 | } |
| 894 | |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 895 | switch (action) { |
Andy Shevchenko | de16d55 | 2015-12-04 23:49:19 +0200 | [diff] [blame] | 896 | case BUS_NOTIFY_BIND_DRIVER: |
Tomeu Vizoso | 989561d | 2016-01-07 16:46:13 +0100 | [diff] [blame] | 897 | dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain); |
Andy Shevchenko | b5f88dd | 2015-12-04 23:49:18 +0200 | [diff] [blame] | 898 | break; |
Andy Shevchenko | de16d55 | 2015-12-04 23:49:19 +0200 | [diff] [blame] | 899 | case BUS_NOTIFY_DRIVER_NOT_BOUND: |
Andy Shevchenko | b5f88dd | 2015-12-04 23:49:18 +0200 | [diff] [blame] | 900 | case BUS_NOTIFY_UNBOUND_DRIVER: |
Andy Shevchenko | 5be6ada | 2016-02-01 16:17:38 +0200 | [diff] [blame] | 901 | dev_pm_domain_set(&pdev->dev, NULL); |
Andy Shevchenko | b5f88dd | 2015-12-04 23:49:18 +0200 | [diff] [blame] | 902 | break; |
| 903 | case BUS_NOTIFY_ADD_DEVICE: |
Tomeu Vizoso | 989561d | 2016-01-07 16:46:13 +0100 | [diff] [blame] | 904 | dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain); |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 905 | if (pdata->dev_desc->flags & LPSS_LTR) |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 906 | return sysfs_create_group(&pdev->dev.kobj, |
| 907 | &lpss_attr_group); |
Andy Shevchenko | 01ac170 | 2014-11-05 18:34:46 +0200 | [diff] [blame] | 908 | break; |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 909 | case BUS_NOTIFY_DEL_DEVICE: |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 910 | if (pdata->dev_desc->flags & LPSS_LTR) |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 911 | sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group); |
Tomeu Vizoso | 989561d | 2016-01-07 16:46:13 +0100 | [diff] [blame] | 912 | dev_pm_domain_set(&pdev->dev, NULL); |
Andy Shevchenko | 01ac170 | 2014-11-05 18:34:46 +0200 | [diff] [blame] | 913 | break; |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 914 | default: |
| 915 | break; |
| 916 | } |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 917 | |
Heikki Krogerus | c78b083 | 2014-05-23 16:15:09 +0300 | [diff] [blame] | 918 | return 0; |
Rafael J. Wysocki | 2e0f882 | 2013-03-06 23:46:28 +0100 | [diff] [blame] | 919 | } |
| 920 | |
| 921 | static struct notifier_block acpi_lpss_nb = { |
| 922 | .notifier_call = acpi_lpss_platform_notify, |
| 923 | }; |
| 924 | |
Rafael J. Wysocki | 1a8f835 | 2014-02-11 00:35:53 +0100 | [diff] [blame] | 925 | static void acpi_lpss_bind(struct device *dev) |
| 926 | { |
| 927 | struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); |
| 928 | |
Heikki Krogerus | ff8c1af | 2014-09-02 10:55:07 +0300 | [diff] [blame] | 929 | if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR)) |
Rafael J. Wysocki | 1a8f835 | 2014-02-11 00:35:53 +0100 | [diff] [blame] | 930 | return; |
| 931 | |
| 932 | if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) |
| 933 | dev->power.set_latency_tolerance = acpi_lpss_set_ltr; |
| 934 | else |
| 935 | dev_err(dev, "MMIO size insufficient to access LTR\n"); |
| 936 | } |
| 937 | |
| 938 | static void acpi_lpss_unbind(struct device *dev) |
| 939 | { |
| 940 | dev->power.set_latency_tolerance = NULL; |
| 941 | } |
| 942 | |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 943 | static struct acpi_scan_handler lpss_handler = { |
| 944 | .ids = acpi_lpss_device_ids, |
| 945 | .attach = acpi_lpss_create_device, |
Rafael J. Wysocki | 1a8f835 | 2014-02-11 00:35:53 +0100 | [diff] [blame] | 946 | .bind = acpi_lpss_bind, |
| 947 | .unbind = acpi_lpss_unbind, |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 948 | }; |
| 949 | |
| 950 | void __init acpi_lpss_init(void) |
| 951 | { |
Andy Shevchenko | eebb3e8 | 2015-12-12 02:45:06 +0100 | [diff] [blame] | 952 | const struct x86_cpu_id *id; |
| 953 | int ret; |
| 954 | |
| 955 | ret = lpt_clk_init(); |
| 956 | if (ret) |
| 957 | return; |
| 958 | |
| 959 | id = x86_match_cpu(lpss_cpu_ids); |
| 960 | if (id) |
| 961 | lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON; |
| 962 | |
| 963 | bus_register_notifier(&platform_bus_type, &acpi_lpss_nb); |
| 964 | acpi_scan_add_handler(&lpss_handler); |
Rafael J. Wysocki | f58b082 | 2013-03-06 23:46:20 +0100 | [diff] [blame] | 965 | } |
Rafael J. Wysocki | d6ddaaa | 2014-05-30 14:34:05 +0200 | [diff] [blame] | 966 | |
| 967 | #else |
| 968 | |
| 969 | static struct acpi_scan_handler lpss_handler = { |
| 970 | .ids = acpi_lpss_device_ids, |
| 971 | }; |
| 972 | |
| 973 | void __init acpi_lpss_init(void) |
| 974 | { |
| 975 | acpi_scan_add_handler(&lpss_handler); |
| 976 | } |
| 977 | |
| 978 | #endif /* CONFIG_X86_INTEL_LPSS */ |