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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +01007 depends on MMU
Joerg Roedel68255b62011-06-14 15:51:54 +02008 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
Will Deaconfdb1d7b2014-11-14 17:16:49 +000017menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
Will Deacone1d3c0f2014-11-14 17:18:23 +000023config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
Jean Delvared05321e2015-02-23 10:05:21 +010026 depends on ARM || ARM64 || COMPILE_TEST
Will Deacone1d3c0f2014-11-14 17:18:23 +000027 help
28 Enable support for the ARM long descriptor pagetable format.
29 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
30 sizes at both stage-1 and stage-2, as well as address spaces
31 up to 48-bits in size.
32
Will Deaconfe4b9912014-11-17 23:31:12 +000033config IOMMU_IO_PGTABLE_LPAE_SELFTEST
34 bool "LPAE selftests"
35 depends on IOMMU_IO_PGTABLE_LPAE
36 help
37 Enable self-tests for LPAE page table allocator. This performs
38 a series of page-table consistency checks during boot.
39
40 If unsure, say N here.
41
Will Deaconfdb1d7b2014-11-14 17:16:49 +000042endmenu
43
Robin Murphy114150d2015-01-12 17:51:13 +000044config IOMMU_IOVA
45 bool
46
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030047config OF_IOMMU
48 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010049 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030050
Varun Sethi695093e2013-07-15 10:20:57 +053051config FSL_PAMU
52 bool "Freescale IOMMU support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010053 depends on PPC32
54 depends on PPC_E500MC || COMPILE_TEST
Varun Sethi695093e2013-07-15 10:20:57 +053055 select IOMMU_API
56 select GENERIC_ALLOCATOR
57 help
58 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
59 PAMU can authorize memory access, remap the memory address, and remap I/O
60 transaction types.
61
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030062# MSM IOMMU support
63config MSM_IOMMU
64 bool "MSM IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010065 depends on ARM
66 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
Thierry Redinga3f447a2015-02-06 11:44:08 +010067 depends on BROKEN
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030068 select IOMMU_API
69 help
70 Support for the IOMMUs found on certain Qualcomm SOCs.
71 These IOMMUs allow virtualization of the address space used by most
72 cores within the multimedia subsystem.
73
74 If unsure, say N here.
75
76config IOMMU_PGTABLES_L2
77 def_bool y
78 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030079
80# AMD IOMMU support
81config AMD_IOMMU
82 bool "AMD IOMMU support"
83 select SWIOTLB
84 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010085 select PCI_ATS
86 select PCI_PRI
87 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030088 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020089 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030090 ---help---
91 With this option you can enable support for AMD IOMMU hardware in
92 your system. An IOMMU is a hardware component which provides
93 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090094 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030095 system from misbehaving device drivers or hardware.
96
97 You can find out if your system has an AMD IOMMU if you look into
98 your BIOS for an option to enable it or if you have an IVRS ACPI
99 table.
100
101config AMD_IOMMU_STATS
102 bool "Export AMD IOMMU statistics to debugfs"
103 depends on AMD_IOMMU
104 select DEBUG_FS
105 ---help---
106 This option enables code in the AMD IOMMU driver to collect various
107 statistics about whats happening in the driver and exports that
108 information to userspace via debugfs.
109 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300110
Joerg Roedele3c495c2011-11-09 12:31:15 +0100111config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -0800112 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +0200113 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100114 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100115 ---help---
116 This option enables support for the AMD IOMMUv2 features of the IOMMU
117 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +0900118 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +0100119
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300120# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700121config DMAR_TABLE
122 bool
123
124config INTEL_IOMMU
125 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300126 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
127 select IOMMU_API
Robin Murphy114150d2015-01-12 17:51:13 +0000128 select IOMMU_IOVA
Suresh Siddhad3f13812011-08-23 17:05:25 -0700129 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300130 help
131 DMA remapping (DMAR) devices support enables independent address
132 translations for Direct Memory Access (DMA) from devices.
133 These DMA remapping devices are reported via ACPI tables
134 and include PCI device scope covered by these DMA
135 remapping devices.
136
Suresh Siddhad3f13812011-08-23 17:05:25 -0700137config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300138 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700139 prompt "Enable Intel DMA Remapping Devices by default"
140 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300141 help
142 Selecting this option will enable a DMAR device at boot time if
143 one is found. If this option is not selected, DMAR support can
144 be enabled by passing intel_iommu=on to the kernel.
145
Suresh Siddhad3f13812011-08-23 17:05:25 -0700146config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300147 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700148 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300149 ---help---
150 Current Graphics drivers tend to use physical address
151 for DMA and avoid using DMA APIs. Setting this config
152 option permits the IOMMU driver to set a unity map for
153 all the OS-visible memory. Hence the driver can continue
154 to use physical addresses for DMA, at least until this
155 option is removed in the 2.6.32 kernel.
156
Suresh Siddhad3f13812011-08-23 17:05:25 -0700157config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300158 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700159 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300160 ---help---
161 Floppy disk drivers are known to bypass DMA API calls
162 thereby failing to work when IOMMU is enabled. This
163 workaround will setup a 1:1 mapping for the first
164 16MiB to make floppy (an ISA device) work.
165
Suresh Siddhad3f13812011-08-23 17:05:25 -0700166config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800167 bool "Support for Interrupt Remapping"
168 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700169 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300170 ---help---
171 Supports Interrupt remapping for IO-APIC and MSI devices.
172 To use x2apic mode in the CPU's which support x2APIC enhancements or
173 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200174
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300175# OMAP IOMMU support
176config OMAP_IOMMU
177 bool "OMAP IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +0100178 depends on ARM && MMU
179 depends on ARCH_OMAP2PLUS || COMPILE_TEST
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300180 select IOMMU_API
Gerd Hoffmann06b718c2014-11-11 09:17:00 +0100181 ---help---
182 The OMAP3 media platform drivers depend on iommu support,
183 if you need them say Y here.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300184
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300185config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500186 bool "Export OMAP IOMMU internals in DebugFS"
187 depends on OMAP_IOMMU && DEBUG_FS
188 ---help---
189 Select this to see extensive information about
190 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300191
Suman Anna61c75352014-10-22 17:22:30 -0500192 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300193
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800194config ROCKCHIP_IOMMU
195 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100196 depends on ARM
197 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800198 select IOMMU_API
199 select ARM_DMA_USE_IOMMU
200 help
201 Support for IOMMUs found on Rockchip rk32xx SOCs.
202 These IOMMUs allow virtualization of the address space used by most
203 cores within the multimedia subsystem.
204 Say Y here if you are using a Rockchip SoC that includes an IOMMU
205 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300206
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200207config TEGRA_IOMMU_GART
208 bool "Tegra GART IOMMU Support"
209 depends on ARCH_TEGRA_2x_SOC
210 select IOMMU_API
211 help
212 Enables support for remapping discontiguous physical memory
213 shared with the operating system into contiguous I/O virtual
214 space through the GART (Graphics Address Relocation Table)
215 hardware included on Tegra SoCs.
216
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200217config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200218 bool "NVIDIA Tegra SMMU Support"
219 depends on ARCH_TEGRA
220 depends on TEGRA_AHB
221 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200222 select IOMMU_API
223 help
Thierry Reding89184652014-04-16 09:24:44 +0200224 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
Thierry Reding242b1d72014-11-07 16:10:41 +0100225 SoCs (Tegra30 up to Tegra132).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200226
KyongHo Cho2a965362012-05-12 05:56:09 +0900227config EXYNOS_IOMMU
228 bool "Exynos IOMMU Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100229 depends on ARCH_EXYNOS && ARM && MMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900230 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530231 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900232 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530233 Support for the IOMMU (System MMU) of Samsung Exynos application
234 processor family. This enables H/W multimedia accelerators to see
235 non-linear physical memory chunks as linear memory in their
236 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900237
238 If unsure, say N here.
239
240config EXYNOS_IOMMU_DEBUG
241 bool "Debugging log for Exynos IOMMU"
242 depends on EXYNOS_IOMMU
243 help
244 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530245 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900246
Sachin Kamat5455d702014-05-22 09:50:55 +0530247 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900248
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900249config SHMOBILE_IPMMU
250 bool
251
252config SHMOBILE_IPMMU_TLB
253 bool
254
255config SHMOBILE_IOMMU
256 bool "IOMMU for Renesas IPMMU/IPMMUI"
257 default n
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100258 depends on ARM && MMU
Paul Bolleb8354432014-02-08 22:21:54 +0100259 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900260 select IOMMU_API
261 select ARM_DMA_USE_IOMMU
262 select SHMOBILE_IPMMU
263 select SHMOBILE_IPMMU_TLB
264 help
265 Support for Renesas IPMMU/IPMMUI. This option enables
266 remapping of DMA memory accesses from all of the IP blocks
267 on the ICB.
268
269 Warning: Drivers (including userspace drivers of UIO
270 devices) of the IP blocks on the ICB *must* use addresses
271 allocated from the IPMMU (iova) for DMA with this option
272 enabled.
273
274 If unsure, say N.
275
276choice
277 prompt "IPMMU/IPMMUI address space size"
278 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
279 depends on SHMOBILE_IOMMU
280 help
281 This option sets IPMMU/IPMMUI address space size by
282 adjusting the 1st level page table size. The page table size
283 is calculated as follows:
284
285 page table size = number of page table entries * 4 bytes
286 number of page table entries = address space size / 1 MiB
287
288 For example, when the address space size is 2048 MiB, the
289 1st level page table size is 8192 bytes.
290
291 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
292 bool "2 GiB"
293
294 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
295 bool "1 GiB"
296
297 config SHMOBILE_IOMMU_ADDRSIZE_512MB
298 bool "512 MiB"
299
300 config SHMOBILE_IOMMU_ADDRSIZE_256MB
301 bool "256 MiB"
302
303 config SHMOBILE_IOMMU_ADDRSIZE_128MB
304 bool "128 MiB"
305
306 config SHMOBILE_IOMMU_ADDRSIZE_64MB
307 bool "64 MiB"
308
309 config SHMOBILE_IOMMU_ADDRSIZE_32MB
310 bool "32 MiB"
311
312endchoice
313
314config SHMOBILE_IOMMU_L1SIZE
315 int
316 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
317 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
318 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
319 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
320 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
321 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
322 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
323
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200324config IPMMU_VMSA
325 bool "Renesas VMSA-compatible IPMMU"
326 depends on ARM_LPAE
327 depends on ARCH_SHMOBILE || COMPILE_TEST
328 select IOMMU_API
Laurent Pinchartf20ed392015-01-20 18:30:04 +0200329 select IOMMU_IO_PGTABLE_LPAE
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200330 select ARM_DMA_USE_IOMMU
331 help
332 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
333 R-Mobile APE6 and R-Car H2/M2 SoCs.
334
335 If unsure, say N.
336
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000337config SPAPR_TCE_IOMMU
338 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000339 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000340 select IOMMU_API
341 help
342 Enables bits of IOMMU API required by VFIO. The iommu_ops
343 is not implemented as it is not necessary for VFIO.
344
Will Deacon48ec83b2015-05-27 17:25:59 +0100345# ARM IOMMU support
Will Deacon45ae7cf2013-06-24 18:31:25 +0100346config ARM_SMMU
347 bool "ARM Ltd. System MMU (SMMU) Support"
Joerg Roedela20cc762015-02-04 16:53:44 +0100348 depends on (ARM64 || ARM) && MMU
Will Deacon45ae7cf2013-06-24 18:31:25 +0100349 select IOMMU_API
Will Deacon518f7132014-11-14 17:17:54 +0000350 select IOMMU_IO_PGTABLE_LPAE
Will Deacon45ae7cf2013-06-24 18:31:25 +0100351 select ARM_DMA_USE_IOMMU if ARM
352 help
353 Support for implementations of the ARM System MMU architecture
Will Deacon518f7132014-11-14 17:17:54 +0000354 versions 1 and 2.
Will Deacon45ae7cf2013-06-24 18:31:25 +0100355
356 Say Y here if your SoC includes an IOMMU device implementing
357 the ARM SMMU architecture.
358
Will Deacon48ec83b2015-05-27 17:25:59 +0100359config ARM_SMMU_V3
360 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
361 depends on ARM64 && PCI
362 select IOMMU_API
363 select IOMMU_IO_PGTABLE_LPAE
364 help
365 Support for implementations of the ARM System MMU architecture
366 version 3 providing translation support to a PCIe root complex.
367
368 Say Y here if your system includes an IOMMU device implementing
369 the ARM SMMUv3 architecture.
370
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300371endif # IOMMU_SUPPORT