Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for OMAP3 SoC |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public License |
| 7 | * version 2. This program is licensed "as is" without any warranty of any |
| 8 | * kind, whether express or implied. |
| 9 | */ |
| 10 | |
Florian Vaussard | 6d624ea | 2013-05-31 14:32:56 +0200 | [diff] [blame] | 11 | #include <dt-bindings/gpio/gpio.h> |
Florian Vaussard | bcd3cca | 2013-05-31 14:32:59 +0200 | [diff] [blame^] | 12 | #include <dt-bindings/pinctrl/omap.h> |
Florian Vaussard | 6d624ea | 2013-05-31 14:32:56 +0200 | [diff] [blame] | 13 | |
Florian Vaussard | 98ef7957 | 2013-05-31 14:32:55 +0200 | [diff] [blame] | 14 | #include "skeleton.dtsi" |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 15 | |
| 16 | / { |
| 17 | compatible = "ti,omap3430", "ti,omap3"; |
Benoit Cousson | 4c94ac2 | 2012-10-24 10:47:52 +0200 | [diff] [blame] | 18 | interrupt-parent = <&intc>; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 19 | |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 20 | aliases { |
| 21 | serial0 = &uart1; |
| 22 | serial1 = &uart2; |
| 23 | serial2 = &uart3; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 24 | }; |
| 25 | |
Benoit Cousson | 476b679 | 2011-08-16 11:49:08 +0200 | [diff] [blame] | 26 | cpus { |
| 27 | cpu@0 { |
| 28 | compatible = "arm,cortex-a8"; |
| 29 | }; |
| 30 | }; |
| 31 | |
Jon Hunter | 9b07b47 | 2012-10-18 09:28:52 -0500 | [diff] [blame] | 32 | pmu { |
| 33 | compatible = "arm,cortex-a8-pmu"; |
| 34 | interrupts = <3>; |
| 35 | ti,hwmods = "debugss"; |
| 36 | }; |
| 37 | |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 38 | /* |
Christoph Fritz | 161e89a | 2013-03-29 17:32:05 +0100 | [diff] [blame] | 39 | * The soc node represents the soc top level view. It is used for IPs |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 40 | * that are not memory mapped in the MPU view or for the MPU itself. |
| 41 | */ |
| 42 | soc { |
| 43 | compatible = "ti,omap-infra"; |
Benoit Cousson | 476b679 | 2011-08-16 11:49:08 +0200 | [diff] [blame] | 44 | mpu { |
| 45 | compatible = "ti,omap3-mpu"; |
| 46 | ti,hwmods = "mpu"; |
| 47 | }; |
| 48 | |
| 49 | iva { |
| 50 | compatible = "ti,iva2.2"; |
| 51 | ti,hwmods = "iva"; |
| 52 | |
| 53 | dsp { |
| 54 | compatible = "ti,omap3-c64"; |
| 55 | }; |
| 56 | }; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 57 | }; |
| 58 | |
| 59 | /* |
| 60 | * XXX: Use a flat representation of the OMAP3 interconnect. |
| 61 | * The real OMAP interconnect network is quite complex. |
| 62 | * Since that will not bring real advantage to represent that in DT for |
| 63 | * the moment, just use a fake OCP bus entry to represent the whole bus |
| 64 | * hierarchy. |
| 65 | */ |
| 66 | ocp { |
| 67 | compatible = "simple-bus"; |
| 68 | #address-cells = <1>; |
| 69 | #size-cells = <1>; |
| 70 | ranges; |
| 71 | ti,hwmods = "l3_main"; |
| 72 | |
Jon Hunter | 510c0ff | 2012-10-25 14:24:14 -0500 | [diff] [blame] | 73 | counter32k: counter@48320000 { |
| 74 | compatible = "ti,omap-counter32k"; |
| 75 | reg = <0x48320000 0x20>; |
| 76 | ti,hwmods = "counter_32k"; |
| 77 | }; |
| 78 | |
Benoit Cousson | d65c542 | 2011-11-30 19:26:42 +0100 | [diff] [blame] | 79 | intc: interrupt-controller@48200000 { |
| 80 | compatible = "ti,omap2-intc"; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 81 | interrupt-controller; |
| 82 | #interrupt-cells = <1>; |
Benoit Cousson | d65c542 | 2011-11-30 19:26:42 +0100 | [diff] [blame] | 83 | ti,intc-size = <96>; |
| 84 | reg = <0x48200000 0x1000>; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 85 | }; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 86 | |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 87 | sdma: dma-controller@48056000 { |
| 88 | compatible = "ti,omap3630-sdma", "ti,omap3430-sdma"; |
| 89 | reg = <0x48056000 0x1000>; |
| 90 | interrupts = <12>, |
| 91 | <13>, |
| 92 | <14>, |
| 93 | <15>; |
| 94 | #dma-cells = <1>; |
| 95 | #dma-channels = <32>; |
| 96 | #dma-requests = <96>; |
| 97 | }; |
| 98 | |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 99 | omap3_pmx_core: pinmux@48002030 { |
| 100 | compatible = "ti,omap3-padconf", "pinctrl-single"; |
| 101 | reg = <0x48002030 0x05cc>; |
| 102 | #address-cells = <1>; |
| 103 | #size-cells = <0>; |
| 104 | pinctrl-single,register-width = <16>; |
Christoph Fritz | 161e89a | 2013-03-29 17:32:05 +0100 | [diff] [blame] | 105 | pinctrl-single,function-mask = <0x7f1f>; |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 106 | }; |
| 107 | |
Christoph Fritz | 161e89a | 2013-03-29 17:32:05 +0100 | [diff] [blame] | 108 | omap3_pmx_wkup: pinmux@0x48002a00 { |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 109 | compatible = "ti,omap3-padconf", "pinctrl-single"; |
Christoph Fritz | 161e89a | 2013-03-29 17:32:05 +0100 | [diff] [blame] | 110 | reg = <0x48002a00 0x5c>; |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 111 | #address-cells = <1>; |
| 112 | #size-cells = <0>; |
| 113 | pinctrl-single,register-width = <16>; |
Christoph Fritz | 161e89a | 2013-03-29 17:32:05 +0100 | [diff] [blame] | 114 | pinctrl-single,function-mask = <0x7f1f>; |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 115 | }; |
| 116 | |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 117 | gpio1: gpio@48310000 { |
| 118 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 119 | reg = <0x48310000 0x200>; |
| 120 | interrupts = <29>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 121 | ti,hwmods = "gpio1"; |
Jon Hunter | e4b9b9f | 2013-04-04 15:16:16 -0500 | [diff] [blame] | 122 | ti,gpio-always-on; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 123 | gpio-controller; |
| 124 | #gpio-cells = <2>; |
| 125 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 126 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 127 | }; |
| 128 | |
| 129 | gpio2: gpio@49050000 { |
| 130 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 131 | reg = <0x49050000 0x200>; |
| 132 | interrupts = <30>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 133 | ti,hwmods = "gpio2"; |
| 134 | gpio-controller; |
| 135 | #gpio-cells = <2>; |
| 136 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 137 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 138 | }; |
| 139 | |
| 140 | gpio3: gpio@49052000 { |
| 141 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 142 | reg = <0x49052000 0x200>; |
| 143 | interrupts = <31>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 144 | ti,hwmods = "gpio3"; |
| 145 | gpio-controller; |
| 146 | #gpio-cells = <2>; |
| 147 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 148 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 149 | }; |
| 150 | |
| 151 | gpio4: gpio@49054000 { |
| 152 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 153 | reg = <0x49054000 0x200>; |
| 154 | interrupts = <32>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 155 | ti,hwmods = "gpio4"; |
| 156 | gpio-controller; |
| 157 | #gpio-cells = <2>; |
| 158 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 159 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 160 | }; |
| 161 | |
| 162 | gpio5: gpio@49056000 { |
| 163 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 164 | reg = <0x49056000 0x200>; |
| 165 | interrupts = <33>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 166 | ti,hwmods = "gpio5"; |
| 167 | gpio-controller; |
| 168 | #gpio-cells = <2>; |
| 169 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 170 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 171 | }; |
| 172 | |
| 173 | gpio6: gpio@49058000 { |
| 174 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 175 | reg = <0x49058000 0x200>; |
| 176 | interrupts = <34>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 177 | ti,hwmods = "gpio6"; |
| 178 | gpio-controller; |
| 179 | #gpio-cells = <2>; |
| 180 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 181 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 182 | }; |
| 183 | |
Benoit Cousson | 19bfb76 | 2012-02-16 11:55:27 +0100 | [diff] [blame] | 184 | uart1: serial@4806a000 { |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 185 | compatible = "ti,omap3-uart"; |
| 186 | ti,hwmods = "uart1"; |
| 187 | clock-frequency = <48000000>; |
| 188 | }; |
| 189 | |
Benoit Cousson | 19bfb76 | 2012-02-16 11:55:27 +0100 | [diff] [blame] | 190 | uart2: serial@4806c000 { |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 191 | compatible = "ti,omap3-uart"; |
| 192 | ti,hwmods = "uart2"; |
| 193 | clock-frequency = <48000000>; |
| 194 | }; |
| 195 | |
Benoit Cousson | 19bfb76 | 2012-02-16 11:55:27 +0100 | [diff] [blame] | 196 | uart3: serial@49020000 { |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 197 | compatible = "ti,omap3-uart"; |
| 198 | ti,hwmods = "uart3"; |
| 199 | clock-frequency = <48000000>; |
| 200 | }; |
| 201 | |
Benoit Cousson | ca59a5c | 2011-08-30 16:50:24 +0200 | [diff] [blame] | 202 | i2c1: i2c@48070000 { |
| 203 | compatible = "ti,omap3-i2c"; |
| 204 | #address-cells = <1>; |
| 205 | #size-cells = <0>; |
| 206 | ti,hwmods = "i2c1"; |
| 207 | }; |
| 208 | |
| 209 | i2c2: i2c@48072000 { |
| 210 | compatible = "ti,omap3-i2c"; |
| 211 | #address-cells = <1>; |
| 212 | #size-cells = <0>; |
| 213 | ti,hwmods = "i2c2"; |
| 214 | }; |
| 215 | |
| 216 | i2c3: i2c@48060000 { |
| 217 | compatible = "ti,omap3-i2c"; |
| 218 | #address-cells = <1>; |
| 219 | #size-cells = <0>; |
| 220 | ti,hwmods = "i2c3"; |
| 221 | }; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 222 | |
| 223 | mcspi1: spi@48098000 { |
| 224 | compatible = "ti,omap2-mcspi"; |
| 225 | #address-cells = <1>; |
| 226 | #size-cells = <0>; |
| 227 | ti,hwmods = "mcspi1"; |
| 228 | ti,spi-num-cs = <4>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 229 | dmas = <&sdma 35>, |
| 230 | <&sdma 36>, |
| 231 | <&sdma 37>, |
| 232 | <&sdma 38>, |
| 233 | <&sdma 39>, |
| 234 | <&sdma 40>, |
| 235 | <&sdma 41>, |
| 236 | <&sdma 42>; |
| 237 | dma-names = "tx0", "rx0", "tx1", "rx1", |
| 238 | "tx2", "rx2", "tx3", "rx3"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 239 | }; |
| 240 | |
| 241 | mcspi2: spi@4809a000 { |
| 242 | compatible = "ti,omap2-mcspi"; |
| 243 | #address-cells = <1>; |
| 244 | #size-cells = <0>; |
| 245 | ti,hwmods = "mcspi2"; |
| 246 | ti,spi-num-cs = <2>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 247 | dmas = <&sdma 43>, |
| 248 | <&sdma 44>, |
| 249 | <&sdma 45>, |
| 250 | <&sdma 46>; |
| 251 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 252 | }; |
| 253 | |
| 254 | mcspi3: spi@480b8000 { |
| 255 | compatible = "ti,omap2-mcspi"; |
| 256 | #address-cells = <1>; |
| 257 | #size-cells = <0>; |
| 258 | ti,hwmods = "mcspi3"; |
| 259 | ti,spi-num-cs = <2>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 260 | dmas = <&sdma 15>, |
| 261 | <&sdma 16>, |
| 262 | <&sdma 23>, |
| 263 | <&sdma 24>; |
| 264 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 265 | }; |
| 266 | |
| 267 | mcspi4: spi@480ba000 { |
| 268 | compatible = "ti,omap2-mcspi"; |
| 269 | #address-cells = <1>; |
| 270 | #size-cells = <0>; |
| 271 | ti,hwmods = "mcspi4"; |
| 272 | ti,spi-num-cs = <1>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 273 | dmas = <&sdma 70>, <&sdma 71>; |
| 274 | dma-names = "tx0", "rx0"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 275 | }; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 276 | |
| 277 | mmc1: mmc@4809c000 { |
| 278 | compatible = "ti,omap3-hsmmc"; |
| 279 | ti,hwmods = "mmc1"; |
| 280 | ti,dual-volt; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 281 | dmas = <&sdma 61>, <&sdma 62>; |
| 282 | dma-names = "tx", "rx"; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 283 | }; |
| 284 | |
| 285 | mmc2: mmc@480b4000 { |
| 286 | compatible = "ti,omap3-hsmmc"; |
| 287 | ti,hwmods = "mmc2"; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 288 | dmas = <&sdma 47>, <&sdma 48>; |
| 289 | dma-names = "tx", "rx"; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 290 | }; |
| 291 | |
| 292 | mmc3: mmc@480ad000 { |
| 293 | compatible = "ti,omap3-hsmmc"; |
| 294 | ti,hwmods = "mmc3"; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 295 | dmas = <&sdma 77>, <&sdma 78>; |
| 296 | dma-names = "tx", "rx"; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 297 | }; |
Xiao Jiang | 94c3073 | 2012-06-01 12:44:14 +0800 | [diff] [blame] | 298 | |
| 299 | wdt2: wdt@48314000 { |
| 300 | compatible = "ti,omap3-wdt"; |
| 301 | ti,hwmods = "wd_timer2"; |
| 302 | }; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 303 | |
| 304 | mcbsp1: mcbsp@48074000 { |
| 305 | compatible = "ti,omap3-mcbsp"; |
| 306 | reg = <0x48074000 0xff>; |
| 307 | reg-names = "mpu"; |
| 308 | interrupts = <16>, /* OCP compliant interrupt */ |
| 309 | <59>, /* TX interrupt */ |
| 310 | <60>; /* RX interrupt */ |
| 311 | interrupt-names = "common", "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 312 | ti,buffer-size = <128>; |
| 313 | ti,hwmods = "mcbsp1"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 314 | dmas = <&sdma 31>, |
| 315 | <&sdma 32>; |
| 316 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 317 | }; |
| 318 | |
| 319 | mcbsp2: mcbsp@49022000 { |
| 320 | compatible = "ti,omap3-mcbsp"; |
| 321 | reg = <0x49022000 0xff>, |
| 322 | <0x49028000 0xff>; |
| 323 | reg-names = "mpu", "sidetone"; |
| 324 | interrupts = <17>, /* OCP compliant interrupt */ |
| 325 | <62>, /* TX interrupt */ |
| 326 | <63>, /* RX interrupt */ |
| 327 | <4>; /* Sidetone */ |
| 328 | interrupt-names = "common", "tx", "rx", "sidetone"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 329 | ti,buffer-size = <1280>; |
Peter Ujfalusi | eef6fca | 2012-10-18 11:25:07 +0200 | [diff] [blame] | 330 | ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 331 | dmas = <&sdma 33>, |
| 332 | <&sdma 34>; |
| 333 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 334 | }; |
| 335 | |
| 336 | mcbsp3: mcbsp@49024000 { |
| 337 | compatible = "ti,omap3-mcbsp"; |
| 338 | reg = <0x49024000 0xff>, |
| 339 | <0x4902a000 0xff>; |
| 340 | reg-names = "mpu", "sidetone"; |
| 341 | interrupts = <22>, /* OCP compliant interrupt */ |
| 342 | <89>, /* TX interrupt */ |
| 343 | <90>, /* RX interrupt */ |
| 344 | <5>; /* Sidetone */ |
| 345 | interrupt-names = "common", "tx", "rx", "sidetone"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 346 | ti,buffer-size = <128>; |
Peter Ujfalusi | eef6fca | 2012-10-18 11:25:07 +0200 | [diff] [blame] | 347 | ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 348 | dmas = <&sdma 17>, |
| 349 | <&sdma 18>; |
| 350 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 351 | }; |
| 352 | |
| 353 | mcbsp4: mcbsp@49026000 { |
| 354 | compatible = "ti,omap3-mcbsp"; |
| 355 | reg = <0x49026000 0xff>; |
| 356 | reg-names = "mpu"; |
| 357 | interrupts = <23>, /* OCP compliant interrupt */ |
| 358 | <54>, /* TX interrupt */ |
| 359 | <55>; /* RX interrupt */ |
| 360 | interrupt-names = "common", "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 361 | ti,buffer-size = <128>; |
| 362 | ti,hwmods = "mcbsp4"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 363 | dmas = <&sdma 19>, |
| 364 | <&sdma 20>; |
| 365 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 366 | }; |
| 367 | |
| 368 | mcbsp5: mcbsp@48096000 { |
| 369 | compatible = "ti,omap3-mcbsp"; |
| 370 | reg = <0x48096000 0xff>; |
| 371 | reg-names = "mpu"; |
| 372 | interrupts = <27>, /* OCP compliant interrupt */ |
| 373 | <81>, /* TX interrupt */ |
| 374 | <82>; /* RX interrupt */ |
| 375 | interrupt-names = "common", "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 376 | ti,buffer-size = <128>; |
| 377 | ti,hwmods = "mcbsp5"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 378 | dmas = <&sdma 21>, |
| 379 | <&sdma 22>; |
| 380 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 381 | }; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 382 | |
| 383 | timer1: timer@48318000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 384 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 385 | reg = <0x48318000 0x400>; |
| 386 | interrupts = <37>; |
| 387 | ti,hwmods = "timer1"; |
| 388 | ti,timer-alwon; |
| 389 | }; |
| 390 | |
| 391 | timer2: timer@49032000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 392 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 393 | reg = <0x49032000 0x400>; |
| 394 | interrupts = <38>; |
| 395 | ti,hwmods = "timer2"; |
| 396 | }; |
| 397 | |
| 398 | timer3: timer@49034000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 399 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 400 | reg = <0x49034000 0x400>; |
| 401 | interrupts = <39>; |
| 402 | ti,hwmods = "timer3"; |
| 403 | }; |
| 404 | |
| 405 | timer4: timer@49036000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 406 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 407 | reg = <0x49036000 0x400>; |
| 408 | interrupts = <40>; |
| 409 | ti,hwmods = "timer4"; |
| 410 | }; |
| 411 | |
| 412 | timer5: timer@49038000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 413 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 414 | reg = <0x49038000 0x400>; |
| 415 | interrupts = <41>; |
| 416 | ti,hwmods = "timer5"; |
| 417 | ti,timer-dsp; |
| 418 | }; |
| 419 | |
| 420 | timer6: timer@4903a000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 421 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 422 | reg = <0x4903a000 0x400>; |
| 423 | interrupts = <42>; |
| 424 | ti,hwmods = "timer6"; |
| 425 | ti,timer-dsp; |
| 426 | }; |
| 427 | |
| 428 | timer7: timer@4903c000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 429 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 430 | reg = <0x4903c000 0x400>; |
| 431 | interrupts = <43>; |
| 432 | ti,hwmods = "timer7"; |
| 433 | ti,timer-dsp; |
| 434 | }; |
| 435 | |
| 436 | timer8: timer@4903e000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 437 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 438 | reg = <0x4903e000 0x400>; |
| 439 | interrupts = <44>; |
| 440 | ti,hwmods = "timer8"; |
| 441 | ti,timer-pwm; |
| 442 | ti,timer-dsp; |
| 443 | }; |
| 444 | |
| 445 | timer9: timer@49040000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 446 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 447 | reg = <0x49040000 0x400>; |
| 448 | interrupts = <45>; |
| 449 | ti,hwmods = "timer9"; |
| 450 | ti,timer-pwm; |
| 451 | }; |
| 452 | |
| 453 | timer10: timer@48086000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 454 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 455 | reg = <0x48086000 0x400>; |
| 456 | interrupts = <46>; |
| 457 | ti,hwmods = "timer10"; |
| 458 | ti,timer-pwm; |
| 459 | }; |
| 460 | |
| 461 | timer11: timer@48088000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 462 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 463 | reg = <0x48088000 0x400>; |
| 464 | interrupts = <47>; |
| 465 | ti,hwmods = "timer11"; |
| 466 | ti,timer-pwm; |
| 467 | }; |
| 468 | |
| 469 | timer12: timer@48304000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 470 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 471 | reg = <0x48304000 0x400>; |
| 472 | interrupts = <95>; |
| 473 | ti,hwmods = "timer12"; |
| 474 | ti,timer-alwon; |
| 475 | ti,timer-secure; |
| 476 | }; |
Roger Quadros | af3eb36 | 2013-03-20 17:44:59 +0200 | [diff] [blame] | 477 | |
| 478 | usbhstll: usbhstll@48062000 { |
| 479 | compatible = "ti,usbhs-tll"; |
| 480 | reg = <0x48062000 0x1000>; |
| 481 | interrupts = <78>; |
| 482 | ti,hwmods = "usb_tll_hs"; |
| 483 | }; |
| 484 | |
| 485 | usbhshost: usbhshost@48064000 { |
| 486 | compatible = "ti,usbhs-host"; |
| 487 | reg = <0x48064000 0x400>; |
| 488 | ti,hwmods = "usb_host_hs"; |
| 489 | #address-cells = <1>; |
| 490 | #size-cells = <1>; |
| 491 | ranges; |
| 492 | |
| 493 | usbhsohci: ohci@48064400 { |
| 494 | compatible = "ti,ohci-omap3", "usb-ohci"; |
| 495 | reg = <0x48064400 0x400>; |
| 496 | interrupt-parent = <&intc>; |
| 497 | interrupts = <76>; |
| 498 | }; |
| 499 | |
| 500 | usbhsehci: ehci@48064800 { |
| 501 | compatible = "ti,ehci-omap", "usb-ehci"; |
| 502 | reg = <0x48064800 0x400>; |
| 503 | interrupt-parent = <&intc>; |
| 504 | interrupts = <77>; |
| 505 | }; |
| 506 | }; |
| 507 | |
Florian Vaussard | 6e8489d | 2013-01-28 18:54:07 +0100 | [diff] [blame] | 508 | gpmc: gpmc@6e000000 { |
| 509 | compatible = "ti,omap3430-gpmc"; |
| 510 | ti,hwmods = "gpmc"; |
Javier Martinez Canillas | 41644e7 | 2013-02-27 02:30:51 +0100 | [diff] [blame] | 511 | reg = <0x6e000000 0x02d0>; |
Florian Vaussard | 6e8489d | 2013-01-28 18:54:07 +0100 | [diff] [blame] | 512 | interrupts = <20>; |
| 513 | gpmc,num-cs = <8>; |
| 514 | gpmc,num-waitpins = <4>; |
| 515 | #address-cells = <2>; |
| 516 | #size-cells = <1>; |
| 517 | }; |
Kishon Vijay Abraham I | ad871c1 | 2013-03-07 19:05:16 +0530 | [diff] [blame] | 518 | |
| 519 | usb_otg_hs: usb_otg_hs@480ab000 { |
| 520 | compatible = "ti,omap3-musb"; |
| 521 | reg = <0x480ab000 0x1000>; |
Tony Lindgren | 304e71e | 2013-05-14 20:28:15 -0700 | [diff] [blame] | 522 | interrupts = <92>, <93>; |
Kishon Vijay Abraham I | ad871c1 | 2013-03-07 19:05:16 +0530 | [diff] [blame] | 523 | interrupt-names = "mc", "dma"; |
| 524 | ti,hwmods = "usb_otg_hs"; |
Kishon Vijay Abraham I | ad871c1 | 2013-03-07 19:05:16 +0530 | [diff] [blame] | 525 | multipoint = <1>; |
| 526 | num-eps = <16>; |
| 527 | ram-bits = <12>; |
| 528 | }; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 529 | }; |
| 530 | }; |