Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
| 3 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) |
| 4 | * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #include <linux/types.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/clk.h> |
| 24 | #include <linux/serial_8250.h> |
Mark Brown | fe7316b | 2009-01-15 16:14:30 +0000 | [diff] [blame] | 25 | #include <linux/gpio.h> |
| 26 | #include <linux/i2c.h> |
Gilles Chanteperdrix | d7568f7 | 2008-09-09 10:19:42 +0200 | [diff] [blame] | 27 | #include <linux/irq.h> |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 28 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 29 | #include <mach/hardware.h> |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 30 | #include <asm/mach-types.h> |
| 31 | #include <asm/mach/arch.h> |
Juergen Beisert | d0f349f | 2008-07-05 10:02:50 +0200 | [diff] [blame] | 32 | #include <asm/mach/time.h> |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 33 | #include <asm/memory.h> |
| 34 | #include <asm/mach/map.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 35 | #include <mach/common.h> |
| 36 | #include <mach/board-mx31ads.h> |
Gilles Chanteperdrix | 0741794 | 2008-09-09 10:19:41 +0200 | [diff] [blame] | 37 | #include <mach/imx-uart.h> |
| 38 | #include <mach/iomux-mx3.h> |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 39 | |
Mark Brown | fe7316b | 2009-01-15 16:14:30 +0000 | [diff] [blame] | 40 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 |
| 41 | #include <linux/mfd/wm8350/audio.h> |
| 42 | #include <linux/mfd/wm8350/core.h> |
| 43 | #include <linux/mfd/wm8350/pmic.h> |
| 44 | #endif |
| 45 | |
Sascha Hauer | 2eca047 | 2008-10-17 16:10:38 +0200 | [diff] [blame] | 46 | #include "devices.h" |
| 47 | |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 48 | /*! |
| 49 | * @file mx31ads.c |
| 50 | * |
| 51 | * @brief This file contains the board-specific initialization routines. |
| 52 | * |
| 53 | * @ingroup System |
| 54 | */ |
| 55 | |
| 56 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) |
| 57 | /*! |
| 58 | * The serial port definition structure. |
| 59 | */ |
| 60 | static struct plat_serial8250_port serial_platform_data[] = { |
| 61 | { |
| 62 | .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA), |
| 63 | .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA), |
| 64 | .irq = EXPIO_INT_XUART_INTA, |
| 65 | .uartclk = 14745600, |
| 66 | .regshift = 0, |
| 67 | .iotype = UPIO_MEM, |
| 68 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, |
| 69 | }, { |
| 70 | .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB), |
| 71 | .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB), |
| 72 | .irq = EXPIO_INT_XUART_INTB, |
| 73 | .uartclk = 14745600, |
| 74 | .regshift = 0, |
| 75 | .iotype = UPIO_MEM, |
| 76 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, |
| 77 | }, |
| 78 | {}, |
| 79 | }; |
| 80 | |
| 81 | static struct platform_device serial_device = { |
| 82 | .name = "serial8250", |
| 83 | .id = 0, |
| 84 | .dev = { |
| 85 | .platform_data = serial_platform_data, |
| 86 | }, |
| 87 | }; |
| 88 | |
| 89 | static int __init mxc_init_extuart(void) |
| 90 | { |
| 91 | return platform_device_register(&serial_device); |
| 92 | } |
| 93 | #else |
| 94 | static inline int mxc_init_extuart(void) |
| 95 | { |
| 96 | return 0; |
| 97 | } |
| 98 | #endif |
| 99 | |
Gilles Chanteperdrix | 0741794 | 2008-09-09 10:19:41 +0200 | [diff] [blame] | 100 | #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE) |
| 101 | static struct imxuart_platform_data uart_pdata = { |
| 102 | .flags = IMXUART_HAVE_RTSCTS, |
| 103 | }; |
| 104 | |
Mark Brown | 9070e7a | 2009-04-13 13:02:36 +0100 | [diff] [blame] | 105 | static unsigned int uart_pins[] = { |
Valentin Longchamp | 945c10b | 2009-01-28 15:13:52 +0100 | [diff] [blame] | 106 | MX31_PIN_CTS1__CTS1, |
| 107 | MX31_PIN_RTS1__RTS1, |
| 108 | MX31_PIN_TXD1__TXD1, |
| 109 | MX31_PIN_RXD1__RXD1 |
| 110 | }; |
| 111 | |
Gilles Chanteperdrix | 0741794 | 2008-09-09 10:19:41 +0200 | [diff] [blame] | 112 | static inline void mxc_init_imx_uart(void) |
| 113 | { |
Valentin Longchamp | 945c10b | 2009-01-28 15:13:52 +0100 | [diff] [blame] | 114 | mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); |
Gilles Chanteperdrix | 0741794 | 2008-09-09 10:19:41 +0200 | [diff] [blame] | 115 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
| 116 | } |
| 117 | #else /* !SERIAL_IMX */ |
| 118 | static inline void mxc_init_imx_uart(void) |
| 119 | { |
| 120 | } |
| 121 | #endif /* !SERIAL_IMX */ |
| 122 | |
Gilles Chanteperdrix | d7568f7 | 2008-09-09 10:19:42 +0200 | [diff] [blame] | 123 | static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc) |
| 124 | { |
| 125 | u32 imr_val; |
| 126 | u32 int_valid; |
| 127 | u32 expio_irq; |
| 128 | |
| 129 | imr_val = __raw_readw(PBC_INTMASK_SET_REG); |
| 130 | int_valid = __raw_readw(PBC_INTSTATUS_REG) & imr_val; |
| 131 | |
| 132 | expio_irq = MXC_EXP_IO_BASE; |
| 133 | for (; int_valid != 0; int_valid >>= 1, expio_irq++) { |
| 134 | if ((int_valid & 1) == 0) |
| 135 | continue; |
| 136 | |
| 137 | generic_handle_irq(expio_irq); |
| 138 | } |
| 139 | } |
| 140 | |
| 141 | /* |
| 142 | * Disable an expio pin's interrupt by setting the bit in the imr. |
| 143 | * @param irq an expio virtual irq number |
| 144 | */ |
| 145 | static void expio_mask_irq(u32 irq) |
| 146 | { |
| 147 | u32 expio = MXC_IRQ_TO_EXPIO(irq); |
| 148 | /* mask the interrupt */ |
| 149 | __raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG); |
| 150 | __raw_readw(PBC_INTMASK_CLEAR_REG); |
| 151 | } |
| 152 | |
| 153 | /* |
| 154 | * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. |
| 155 | * @param irq an expanded io virtual irq number |
| 156 | */ |
| 157 | static void expio_ack_irq(u32 irq) |
| 158 | { |
| 159 | u32 expio = MXC_IRQ_TO_EXPIO(irq); |
| 160 | /* clear the interrupt status */ |
| 161 | __raw_writew(1 << expio, PBC_INTSTATUS_REG); |
| 162 | } |
| 163 | |
| 164 | /* |
| 165 | * Enable a expio pin's interrupt by clearing the bit in the imr. |
| 166 | * @param irq a expio virtual irq number |
| 167 | */ |
| 168 | static void expio_unmask_irq(u32 irq) |
| 169 | { |
| 170 | u32 expio = MXC_IRQ_TO_EXPIO(irq); |
| 171 | /* unmask the interrupt */ |
| 172 | __raw_writew(1 << expio, PBC_INTMASK_SET_REG); |
| 173 | } |
| 174 | |
| 175 | static struct irq_chip expio_irq_chip = { |
Mark Brown | bd02acd | 2010-01-05 16:05:15 +0000 | [diff] [blame^] | 176 | .name = "EXPIO(CPLD)", |
Gilles Chanteperdrix | d7568f7 | 2008-09-09 10:19:42 +0200 | [diff] [blame] | 177 | .ack = expio_ack_irq, |
| 178 | .mask = expio_mask_irq, |
| 179 | .unmask = expio_unmask_irq, |
| 180 | }; |
| 181 | |
| 182 | static void __init mx31ads_init_expio(void) |
| 183 | { |
| 184 | int i; |
| 185 | |
| 186 | printk(KERN_INFO "MX31ADS EXPIO(CPLD) hardware\n"); |
| 187 | |
| 188 | /* |
| 189 | * Configure INT line as GPIO input |
| 190 | */ |
Sascha Hauer | 4f163eb | 2009-05-06 12:55:50 +0200 | [diff] [blame] | 191 | mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO), "expio"); |
Gilles Chanteperdrix | d7568f7 | 2008-09-09 10:19:42 +0200 | [diff] [blame] | 192 | |
| 193 | /* disable the interrupt and clear the status */ |
| 194 | __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG); |
| 195 | __raw_writew(0xFFFF, PBC_INTSTATUS_REG); |
| 196 | for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); |
| 197 | i++) { |
| 198 | set_irq_chip(i, &expio_irq_chip); |
| 199 | set_irq_handler(i, handle_level_irq); |
| 200 | set_irq_flags(i, IRQF_VALID); |
| 201 | } |
| 202 | set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH); |
| 203 | set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); |
| 204 | } |
| 205 | |
Mark Brown | fe7316b | 2009-01-15 16:14:30 +0000 | [diff] [blame] | 206 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 |
| 207 | /* This section defines setup for the Wolfson Microelectronics |
| 208 | * 1133-EV1 PMU/audio board. When other PMU boards are supported the |
| 209 | * regulator definitions may be shared with them, but for now they can |
| 210 | * only be used with this board so would generate warnings about |
| 211 | * unused statics and some of the configuration is specific to this |
| 212 | * module. |
| 213 | */ |
| 214 | |
| 215 | /* CPU */ |
| 216 | static struct regulator_consumer_supply sw1a_consumers[] = { |
| 217 | { |
| 218 | .supply = "cpu_vcc", |
| 219 | } |
| 220 | }; |
| 221 | |
| 222 | static struct regulator_init_data sw1a_data = { |
| 223 | .constraints = { |
| 224 | .name = "SW1A", |
| 225 | .min_uV = 1275000, |
| 226 | .max_uV = 1600000, |
| 227 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
| 228 | REGULATOR_CHANGE_MODE, |
| 229 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
| 230 | REGULATOR_MODE_FAST, |
| 231 | .state_mem = { |
| 232 | .uV = 1400000, |
| 233 | .mode = REGULATOR_MODE_NORMAL, |
| 234 | .enabled = 1, |
| 235 | }, |
| 236 | .initial_state = PM_SUSPEND_MEM, |
| 237 | .always_on = 1, |
| 238 | .boot_on = 1, |
| 239 | }, |
| 240 | .num_consumer_supplies = ARRAY_SIZE(sw1a_consumers), |
| 241 | .consumer_supplies = sw1a_consumers, |
| 242 | }; |
| 243 | |
| 244 | /* System IO - High */ |
| 245 | static struct regulator_init_data viohi_data = { |
| 246 | .constraints = { |
| 247 | .name = "VIOHO", |
| 248 | .min_uV = 2800000, |
| 249 | .max_uV = 2800000, |
| 250 | .state_mem = { |
| 251 | .uV = 2800000, |
| 252 | .mode = REGULATOR_MODE_NORMAL, |
| 253 | .enabled = 1, |
| 254 | }, |
| 255 | .initial_state = PM_SUSPEND_MEM, |
| 256 | .always_on = 1, |
| 257 | .boot_on = 1, |
| 258 | }, |
| 259 | }; |
| 260 | |
| 261 | /* System IO - Low */ |
| 262 | static struct regulator_init_data violo_data = { |
| 263 | .constraints = { |
| 264 | .name = "VIOLO", |
| 265 | .min_uV = 1800000, |
| 266 | .max_uV = 1800000, |
| 267 | .state_mem = { |
| 268 | .uV = 1800000, |
| 269 | .mode = REGULATOR_MODE_NORMAL, |
| 270 | .enabled = 1, |
| 271 | }, |
| 272 | .initial_state = PM_SUSPEND_MEM, |
| 273 | .always_on = 1, |
| 274 | .boot_on = 1, |
| 275 | }, |
| 276 | }; |
| 277 | |
| 278 | /* DDR RAM */ |
| 279 | static struct regulator_init_data sw2a_data = { |
| 280 | .constraints = { |
| 281 | .name = "SW2A", |
| 282 | .min_uV = 1800000, |
| 283 | .max_uV = 1800000, |
| 284 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 285 | .state_mem = { |
| 286 | .uV = 1800000, |
| 287 | .mode = REGULATOR_MODE_NORMAL, |
| 288 | .enabled = 1, |
| 289 | }, |
| 290 | .state_disk = { |
| 291 | .mode = REGULATOR_MODE_NORMAL, |
| 292 | .enabled = 0, |
| 293 | }, |
| 294 | .always_on = 1, |
| 295 | .boot_on = 1, |
| 296 | .initial_state = PM_SUSPEND_MEM, |
| 297 | }, |
| 298 | }; |
| 299 | |
| 300 | static struct regulator_init_data ldo1_data = { |
| 301 | .constraints = { |
| 302 | .name = "VCAM/VMMC1/VMMC2", |
| 303 | .min_uV = 2800000, |
| 304 | .max_uV = 2800000, |
| 305 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
Mark Brown | 9f0727f | 2010-01-04 18:24:50 +0000 | [diff] [blame] | 306 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
Mark Brown | fe7316b | 2009-01-15 16:14:30 +0000 | [diff] [blame] | 307 | .apply_uV = 1, |
| 308 | }, |
| 309 | }; |
| 310 | |
| 311 | static struct regulator_consumer_supply ldo2_consumers[] = { |
| 312 | { |
| 313 | .supply = "AVDD", |
| 314 | }, |
| 315 | { |
| 316 | .supply = "HPVDD", |
| 317 | }, |
| 318 | }; |
| 319 | |
| 320 | /* CODEC and SIM */ |
| 321 | static struct regulator_init_data ldo2_data = { |
| 322 | .constraints = { |
| 323 | .name = "VESIM/VSIM/AVDD", |
| 324 | .min_uV = 3300000, |
| 325 | .max_uV = 3300000, |
| 326 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
Mark Brown | 9f0727f | 2010-01-04 18:24:50 +0000 | [diff] [blame] | 327 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
Mark Brown | fe7316b | 2009-01-15 16:14:30 +0000 | [diff] [blame] | 328 | .apply_uV = 1, |
| 329 | }, |
| 330 | .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers), |
| 331 | .consumer_supplies = ldo2_consumers, |
| 332 | }; |
| 333 | |
| 334 | /* General */ |
| 335 | static struct regulator_init_data vdig_data = { |
| 336 | .constraints = { |
| 337 | .name = "VDIG", |
| 338 | .min_uV = 1500000, |
| 339 | .max_uV = 1500000, |
| 340 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 341 | .apply_uV = 1, |
| 342 | .always_on = 1, |
| 343 | .boot_on = 1, |
| 344 | }, |
| 345 | }; |
| 346 | |
| 347 | /* Tranceivers */ |
| 348 | static struct regulator_init_data ldo4_data = { |
| 349 | .constraints = { |
| 350 | .name = "VRF1/CVDD_2.775", |
| 351 | .min_uV = 2500000, |
| 352 | .max_uV = 2500000, |
| 353 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 354 | .apply_uV = 1, |
| 355 | .always_on = 1, |
| 356 | .boot_on = 1, |
| 357 | }, |
| 358 | }; |
| 359 | |
| 360 | static struct wm8350_led_platform_data wm8350_led_data = { |
| 361 | .name = "wm8350:white", |
| 362 | .default_trigger = "heartbeat", |
| 363 | .max_uA = 27899, |
| 364 | }; |
| 365 | |
| 366 | static struct wm8350_audio_platform_data imx32ads_wm8350_setup = { |
| 367 | .vmid_discharge_msecs = 1000, |
| 368 | .drain_msecs = 30, |
| 369 | .cap_discharge_msecs = 700, |
| 370 | .vmid_charge_msecs = 700, |
| 371 | .vmid_s_curve = WM8350_S_CURVE_SLOW, |
| 372 | .dis_out4 = WM8350_DISCHARGE_SLOW, |
| 373 | .dis_out3 = WM8350_DISCHARGE_SLOW, |
| 374 | .dis_out2 = WM8350_DISCHARGE_SLOW, |
| 375 | .dis_out1 = WM8350_DISCHARGE_SLOW, |
| 376 | .vroi_out4 = WM8350_TIE_OFF_500R, |
| 377 | .vroi_out3 = WM8350_TIE_OFF_500R, |
| 378 | .vroi_out2 = WM8350_TIE_OFF_500R, |
| 379 | .vroi_out1 = WM8350_TIE_OFF_500R, |
| 380 | .vroi_enable = 0, |
| 381 | .codec_current_on = WM8350_CODEC_ISEL_1_0, |
| 382 | .codec_current_standby = WM8350_CODEC_ISEL_0_5, |
| 383 | .codec_current_charge = WM8350_CODEC_ISEL_1_5, |
| 384 | }; |
| 385 | |
| 386 | static int mx31_wm8350_init(struct wm8350 *wm8350) |
| 387 | { |
| 388 | int i; |
| 389 | |
| 390 | wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN, |
| 391 | WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW, |
| 392 | WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF, |
| 393 | WM8350_GPIO_DEBOUNCE_ON); |
| 394 | |
| 395 | wm8350_gpio_config(wm8350, 3, WM8350_GPIO_DIR_IN, |
| 396 | WM8350_GPIO3_PWR_OFF_IN, WM8350_GPIO_ACTIVE_HIGH, |
| 397 | WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF, |
| 398 | WM8350_GPIO_DEBOUNCE_ON); |
| 399 | |
| 400 | wm8350_gpio_config(wm8350, 4, WM8350_GPIO_DIR_IN, |
| 401 | WM8350_GPIO4_MR_IN, WM8350_GPIO_ACTIVE_HIGH, |
| 402 | WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF, |
| 403 | WM8350_GPIO_DEBOUNCE_OFF); |
| 404 | |
| 405 | wm8350_gpio_config(wm8350, 7, WM8350_GPIO_DIR_IN, |
| 406 | WM8350_GPIO7_HIBERNATE_IN, WM8350_GPIO_ACTIVE_HIGH, |
| 407 | WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF, |
| 408 | WM8350_GPIO_DEBOUNCE_OFF); |
| 409 | |
| 410 | wm8350_gpio_config(wm8350, 6, WM8350_GPIO_DIR_OUT, |
| 411 | WM8350_GPIO6_SDOUT_OUT, WM8350_GPIO_ACTIVE_HIGH, |
| 412 | WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, |
| 413 | WM8350_GPIO_DEBOUNCE_OFF); |
| 414 | |
| 415 | wm8350_gpio_config(wm8350, 8, WM8350_GPIO_DIR_OUT, |
| 416 | WM8350_GPIO8_VCC_FAULT_OUT, WM8350_GPIO_ACTIVE_LOW, |
| 417 | WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, |
| 418 | WM8350_GPIO_DEBOUNCE_OFF); |
| 419 | |
| 420 | wm8350_gpio_config(wm8350, 9, WM8350_GPIO_DIR_OUT, |
| 421 | WM8350_GPIO9_BATT_FAULT_OUT, WM8350_GPIO_ACTIVE_LOW, |
| 422 | WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, |
| 423 | WM8350_GPIO_DEBOUNCE_OFF); |
| 424 | |
| 425 | /* Fix up for our own supplies. */ |
| 426 | for (i = 0; i < ARRAY_SIZE(ldo2_consumers); i++) |
| 427 | ldo2_consumers[i].dev = wm8350->dev; |
| 428 | |
| 429 | wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data); |
| 430 | wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data); |
| 431 | wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data); |
| 432 | wm8350_register_regulator(wm8350, WM8350_DCDC_6, &sw2a_data); |
| 433 | wm8350_register_regulator(wm8350, WM8350_LDO_1, &ldo1_data); |
| 434 | wm8350_register_regulator(wm8350, WM8350_LDO_2, &ldo2_data); |
| 435 | wm8350_register_regulator(wm8350, WM8350_LDO_3, &vdig_data); |
| 436 | wm8350_register_regulator(wm8350, WM8350_LDO_4, &ldo4_data); |
| 437 | |
| 438 | /* LEDs */ |
| 439 | wm8350_dcdc_set_slot(wm8350, WM8350_DCDC_5, 1, 1, |
| 440 | WM8350_DC5_ERRACT_SHUTDOWN_CONV); |
| 441 | wm8350_isink_set_flash(wm8350, WM8350_ISINK_A, |
| 442 | WM8350_ISINK_FLASH_DISABLE, |
| 443 | WM8350_ISINK_FLASH_TRIG_BIT, |
| 444 | WM8350_ISINK_FLASH_DUR_32MS, |
| 445 | WM8350_ISINK_FLASH_ON_INSTANT, |
| 446 | WM8350_ISINK_FLASH_OFF_INSTANT, |
| 447 | WM8350_ISINK_FLASH_MODE_EN); |
| 448 | wm8350_dcdc25_set_mode(wm8350, WM8350_DCDC_5, |
| 449 | WM8350_ISINK_MODE_BOOST, |
| 450 | WM8350_ISINK_ILIM_NORMAL, |
| 451 | WM8350_DC5_RMP_20V, |
| 452 | WM8350_DC5_FBSRC_ISINKA); |
| 453 | wm8350_register_led(wm8350, 0, WM8350_DCDC_5, WM8350_ISINK_A, |
| 454 | &wm8350_led_data); |
| 455 | |
| 456 | wm8350->codec.platform_data = &imx32ads_wm8350_setup; |
| 457 | |
Mark Brown | 0ac402f | 2009-04-13 13:05:28 +0100 | [diff] [blame] | 458 | regulator_has_full_constraints(); |
| 459 | |
Mark Brown | fe7316b | 2009-01-15 16:14:30 +0000 | [diff] [blame] | 460 | return 0; |
| 461 | } |
| 462 | |
| 463 | static struct wm8350_platform_data __initdata mx31_wm8350_pdata = { |
| 464 | .init = mx31_wm8350_init, |
| 465 | }; |
| 466 | #endif |
| 467 | |
| 468 | #if defined(CONFIG_I2C_IMX) || defined(CONFIG_I2C_IMX_MODULE) |
| 469 | static struct i2c_board_info __initdata mx31ads_i2c1_devices[] = { |
| 470 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 |
| 471 | { |
| 472 | I2C_BOARD_INFO("wm8350", 0x1a), |
| 473 | .platform_data = &mx31_wm8350_pdata, |
| 474 | .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), |
| 475 | }, |
| 476 | #endif |
| 477 | }; |
| 478 | |
| 479 | static void mxc_init_i2c(void) |
| 480 | { |
| 481 | i2c_register_board_info(1, mx31ads_i2c1_devices, |
| 482 | ARRAY_SIZE(mx31ads_i2c1_devices)); |
| 483 | |
| 484 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_ALT1)); |
| 485 | mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_ALT1)); |
| 486 | |
| 487 | mxc_register_device(&mxc_i2c_device1, NULL); |
| 488 | } |
| 489 | #else |
| 490 | static void mxc_init_i2c(void) |
| 491 | { |
| 492 | } |
| 493 | #endif |
| 494 | |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 495 | /*! |
| 496 | * This structure defines static mappings for the i.MX31ADS board. |
| 497 | */ |
| 498 | static struct map_desc mx31ads_io_desc[] __initdata = { |
| 499 | { |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 500 | .virtual = CS4_BASE_ADDR_VIRT, |
| 501 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), |
| 502 | .length = CS4_SIZE / 2, |
| 503 | .type = MT_DEVICE |
| 504 | }, |
| 505 | }; |
| 506 | |
| 507 | /*! |
| 508 | * Set up static virtual mappings. |
| 509 | */ |
Mark Brown | 8b785b9 | 2009-01-15 16:14:29 +0000 | [diff] [blame] | 510 | static void __init mx31ads_map_io(void) |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 511 | { |
Sascha Hauer | cd4a05f | 2009-04-02 22:32:10 +0200 | [diff] [blame] | 512 | mx31_map_io(); |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 513 | iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); |
| 514 | } |
| 515 | |
Mark Brown | 8b785b9 | 2009-01-15 16:14:29 +0000 | [diff] [blame] | 516 | static void __init mx31ads_init_irq(void) |
Gilles Chanteperdrix | d7568f7 | 2008-09-09 10:19:42 +0200 | [diff] [blame] | 517 | { |
Sascha Hauer | c5aa0ad | 2009-05-25 17:36:19 +0200 | [diff] [blame] | 518 | mx31_init_irq(); |
Gilles Chanteperdrix | d7568f7 | 2008-09-09 10:19:42 +0200 | [diff] [blame] | 519 | mx31ads_init_expio(); |
| 520 | } |
| 521 | |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 522 | /*! |
| 523 | * Board specific initialization. |
| 524 | */ |
| 525 | static void __init mxc_board_init(void) |
| 526 | { |
| 527 | mxc_init_extuart(); |
Gilles Chanteperdrix | 0741794 | 2008-09-09 10:19:41 +0200 | [diff] [blame] | 528 | mxc_init_imx_uart(); |
Mark Brown | fe7316b | 2009-01-15 16:14:30 +0000 | [diff] [blame] | 529 | mxc_init_i2c(); |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 530 | } |
| 531 | |
Juergen Beisert | d0f349f | 2008-07-05 10:02:50 +0200 | [diff] [blame] | 532 | static void __init mx31ads_timer_init(void) |
| 533 | { |
Sascha Hauer | 30c730f | 2009-02-16 14:36:49 +0100 | [diff] [blame] | 534 | mx31_clocks_init(26000000); |
Juergen Beisert | d0f349f | 2008-07-05 10:02:50 +0200 | [diff] [blame] | 535 | } |
| 536 | |
Mark Brown | 8b785b9 | 2009-01-15 16:14:29 +0000 | [diff] [blame] | 537 | static struct sys_timer mx31ads_timer = { |
Juergen Beisert | d0f349f | 2008-07-05 10:02:50 +0200 | [diff] [blame] | 538 | .init = mx31ads_timer_init, |
| 539 | }; |
| 540 | |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 541 | /* |
| 542 | * The following uses standard kernel macros defined in arch.h in order to |
| 543 | * initialize __mach_desc_MX31ADS data structure. |
| 544 | */ |
| 545 | MACHINE_START(MX31ADS, "Freescale MX31ADS") |
| 546 | /* Maintainer: Freescale Semiconductor, Inc. */ |
| 547 | .phys_io = AIPS1_BASE_ADDR, |
| 548 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
| 549 | .boot_params = PHYS_OFFSET + 0x100, |
| 550 | .map_io = mx31ads_map_io, |
Gilles Chanteperdrix | d7568f7 | 2008-09-09 10:19:42 +0200 | [diff] [blame] | 551 | .init_irq = mx31ads_init_irq, |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 552 | .init_machine = mxc_board_init, |
Juergen Beisert | d0f349f | 2008-07-05 10:02:50 +0200 | [diff] [blame] | 553 | .timer = &mx31ads_timer, |
Quinn Jensen | 52c543f | 2007-07-09 22:06:53 +0100 | [diff] [blame] | 554 | MACHINE_END |