Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Avionic Design GmbH |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 3 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | */ |
| 9 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 10 | #include <linux/host1x.h> |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 11 | #include <linux/idr.h> |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 12 | #include <linux/iommu.h> |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 13 | |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 14 | #include <drm/drm_atomic.h> |
Thierry Reding | 0786696 | 2014-11-24 17:08:06 +0100 | [diff] [blame] | 15 | #include <drm/drm_atomic_helper.h> |
| 16 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 17 | #include "drm.h" |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 18 | #include "gem.h" |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 19 | |
| 20 | #define DRIVER_NAME "tegra" |
| 21 | #define DRIVER_DESC "NVIDIA Tegra graphics" |
| 22 | #define DRIVER_DATE "20120330" |
| 23 | #define DRIVER_MAJOR 0 |
| 24 | #define DRIVER_MINOR 0 |
| 25 | #define DRIVER_PATCHLEVEL 0 |
| 26 | |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 27 | struct tegra_drm_file { |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 28 | struct idr contexts; |
| 29 | struct mutex lock; |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 30 | }; |
| 31 | |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 32 | static void tegra_atomic_schedule(struct tegra_drm *tegra, |
| 33 | struct drm_atomic_state *state) |
| 34 | { |
| 35 | tegra->commit.state = state; |
| 36 | schedule_work(&tegra->commit.work); |
| 37 | } |
| 38 | |
| 39 | static void tegra_atomic_complete(struct tegra_drm *tegra, |
| 40 | struct drm_atomic_state *state) |
| 41 | { |
| 42 | struct drm_device *drm = tegra->drm; |
| 43 | |
| 44 | /* |
| 45 | * Everything below can be run asynchronously without the need to grab |
| 46 | * any modeset locks at all under one condition: It must be guaranteed |
| 47 | * that the asynchronous work has either been cancelled (if the driver |
| 48 | * supports it, which at least requires that the framebuffers get |
| 49 | * cleaned up with drm_atomic_helper_cleanup_planes()) or completed |
| 50 | * before the new state gets committed on the software side with |
| 51 | * drm_atomic_helper_swap_state(). |
| 52 | * |
| 53 | * This scheme allows new atomic state updates to be prepared and |
| 54 | * checked in parallel to the asynchronous completion of the previous |
| 55 | * update. Which is important since compositors need to figure out the |
| 56 | * composition of the next frame right after having submitted the |
| 57 | * current layout. |
| 58 | */ |
| 59 | |
Daniel Vetter | 1af434a | 2015-02-22 12:24:19 +0100 | [diff] [blame] | 60 | drm_atomic_helper_commit_modeset_disables(drm, state); |
Daniel Vetter | 1af434a | 2015-02-22 12:24:19 +0100 | [diff] [blame] | 61 | drm_atomic_helper_commit_modeset_enables(drm, state); |
Liu Ying | 2b58e98 | 2016-08-29 17:12:03 +0800 | [diff] [blame] | 62 | drm_atomic_helper_commit_planes(drm, state, |
| 63 | DRM_PLANE_COMMIT_ACTIVE_ONLY); |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 64 | |
| 65 | drm_atomic_helper_wait_for_vblanks(drm, state); |
| 66 | |
| 67 | drm_atomic_helper_cleanup_planes(drm, state); |
Chris Wilson | 0853695 | 2016-10-14 13:18:18 +0100 | [diff] [blame] | 68 | drm_atomic_state_put(state); |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 69 | } |
| 70 | |
| 71 | static void tegra_atomic_work(struct work_struct *work) |
| 72 | { |
| 73 | struct tegra_drm *tegra = container_of(work, struct tegra_drm, |
| 74 | commit.work); |
| 75 | |
| 76 | tegra_atomic_complete(tegra, tegra->commit.state); |
| 77 | } |
| 78 | |
| 79 | static int tegra_atomic_commit(struct drm_device *drm, |
Maarten Lankhorst | 2dacdd7 | 2016-04-26 16:11:42 +0200 | [diff] [blame] | 80 | struct drm_atomic_state *state, bool nonblock) |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 81 | { |
| 82 | struct tegra_drm *tegra = drm->dev_private; |
| 83 | int err; |
| 84 | |
| 85 | err = drm_atomic_helper_prepare_planes(drm, state); |
| 86 | if (err) |
| 87 | return err; |
| 88 | |
Maarten Lankhorst | 2dacdd7 | 2016-04-26 16:11:42 +0200 | [diff] [blame] | 89 | /* serialize outstanding nonblocking commits */ |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 90 | mutex_lock(&tegra->commit.lock); |
| 91 | flush_work(&tegra->commit.work); |
| 92 | |
| 93 | /* |
| 94 | * This is the point of no return - everything below never fails except |
| 95 | * when the hw goes bonghits. Which means we can commit the new state on |
| 96 | * the software side now. |
| 97 | */ |
| 98 | |
Daniel Vetter | 5e84c26 | 2016-06-10 00:06:32 +0200 | [diff] [blame] | 99 | drm_atomic_helper_swap_state(state, true); |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 100 | |
Chris Wilson | 0853695 | 2016-10-14 13:18:18 +0100 | [diff] [blame] | 101 | drm_atomic_state_get(state); |
Maarten Lankhorst | 2dacdd7 | 2016-04-26 16:11:42 +0200 | [diff] [blame] | 102 | if (nonblock) |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 103 | tegra_atomic_schedule(tegra, state); |
| 104 | else |
| 105 | tegra_atomic_complete(tegra, state); |
| 106 | |
| 107 | mutex_unlock(&tegra->commit.lock); |
| 108 | return 0; |
| 109 | } |
| 110 | |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 111 | static const struct drm_mode_config_funcs tegra_drm_mode_funcs = { |
| 112 | .fb_create = tegra_fb_create, |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 113 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 114 | .output_poll_changed = tegra_fb_output_poll_changed, |
| 115 | #endif |
Thierry Reding | 0786696 | 2014-11-24 17:08:06 +0100 | [diff] [blame] | 116 | .atomic_check = drm_atomic_helper_check, |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 117 | .atomic_commit = tegra_atomic_commit, |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 118 | }; |
| 119 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 120 | static int tegra_drm_load(struct drm_device *drm, unsigned long flags) |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 121 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 122 | struct host1x_device *device = to_host1x_device(drm->dev); |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 123 | struct tegra_drm *tegra; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 124 | int err; |
| 125 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 126 | tegra = kzalloc(sizeof(*tegra), GFP_KERNEL); |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 127 | if (!tegra) |
Terje Bergstrom | 692e6d7 | 2013-03-22 16:34:07 +0200 | [diff] [blame] | 128 | return -ENOMEM; |
| 129 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 130 | if (iommu_present(&platform_bus_type)) { |
Thierry Reding | 4553f73 | 2015-01-19 16:15:04 +0100 | [diff] [blame] | 131 | struct iommu_domain_geometry *geometry; |
| 132 | u64 start, end; |
| 133 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 134 | tegra->domain = iommu_domain_alloc(&platform_bus_type); |
Dan Carpenter | bf19b88 | 2014-12-04 14:00:35 +0300 | [diff] [blame] | 135 | if (!tegra->domain) { |
| 136 | err = -ENOMEM; |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 137 | goto free; |
| 138 | } |
| 139 | |
Thierry Reding | 4553f73 | 2015-01-19 16:15:04 +0100 | [diff] [blame] | 140 | geometry = &tegra->domain->geometry; |
| 141 | start = geometry->aperture_start; |
| 142 | end = geometry->aperture_end; |
| 143 | |
Thierry Reding | d2d8c35 | 2015-11-23 16:46:30 +0100 | [diff] [blame] | 144 | DRM_DEBUG_DRIVER("IOMMU aperture initialized (%#llx-%#llx)\n", |
| 145 | start, end); |
Thierry Reding | 4553f73 | 2015-01-19 16:15:04 +0100 | [diff] [blame] | 146 | drm_mm_init(&tegra->mm, start, end - start + 1); |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame] | 147 | mutex_init(&tegra->mm_lock); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 148 | } |
| 149 | |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 150 | mutex_init(&tegra->clients_lock); |
| 151 | INIT_LIST_HEAD(&tegra->clients); |
Thierry Reding | 1503ca4 | 2014-11-24 17:41:23 +0100 | [diff] [blame] | 152 | |
| 153 | mutex_init(&tegra->commit.lock); |
| 154 | INIT_WORK(&tegra->commit.work, tegra_atomic_work); |
| 155 | |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 156 | drm->dev_private = tegra; |
| 157 | tegra->drm = drm; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 158 | |
| 159 | drm_mode_config_init(drm); |
| 160 | |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 161 | drm->mode_config.min_width = 0; |
| 162 | drm->mode_config.min_height = 0; |
| 163 | |
| 164 | drm->mode_config.max_width = 4096; |
| 165 | drm->mode_config.max_height = 4096; |
| 166 | |
| 167 | drm->mode_config.funcs = &tegra_drm_mode_funcs; |
| 168 | |
Thierry Reding | e221532 | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 169 | err = tegra_drm_fb_prepare(drm); |
| 170 | if (err < 0) |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 171 | goto config; |
Thierry Reding | e221532 | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 172 | |
| 173 | drm_kms_helper_poll_init(drm); |
| 174 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 175 | err = host1x_device_init(device); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 176 | if (err < 0) |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 177 | goto fbdev; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 178 | |
Thierry Reding | 603f0cc | 2013-04-22 21:22:14 +0200 | [diff] [blame] | 179 | /* |
| 180 | * We don't use the drm_irq_install() helpers provided by the DRM |
| 181 | * core, so we need to set this manually in order to allow the |
| 182 | * DRM_IOCTL_WAIT_VBLANK to operate correctly. |
| 183 | */ |
Ville Syrjälä | 4423843 | 2013-10-04 14:53:37 +0300 | [diff] [blame] | 184 | drm->irq_enabled = true; |
Thierry Reding | 603f0cc | 2013-04-22 21:22:14 +0200 | [diff] [blame] | 185 | |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 186 | /* syncpoints are used for full 32-bit hardware VBLANK counters */ |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 187 | drm->max_vblank_count = 0xffffffff; |
| 188 | |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 189 | err = drm_vblank_init(drm, drm->mode_config.num_crtc); |
| 190 | if (err < 0) |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 191 | goto device; |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 192 | |
Thierry Reding | 31930d4 | 2015-07-02 17:04:06 +0200 | [diff] [blame] | 193 | drm_mode_config_reset(drm); |
| 194 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 195 | err = tegra_drm_fb_init(drm); |
| 196 | if (err < 0) |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 197 | goto vblank; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 198 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 199 | return 0; |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 200 | |
| 201 | vblank: |
| 202 | drm_vblank_cleanup(drm); |
| 203 | device: |
| 204 | host1x_device_exit(device); |
| 205 | fbdev: |
| 206 | drm_kms_helper_poll_fini(drm); |
| 207 | tegra_drm_fb_free(drm); |
| 208 | config: |
| 209 | drm_mode_config_cleanup(drm); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 210 | |
| 211 | if (tegra->domain) { |
| 212 | iommu_domain_free(tegra->domain); |
| 213 | drm_mm_takedown(&tegra->mm); |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame] | 214 | mutex_destroy(&tegra->mm_lock); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 215 | } |
| 216 | free: |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 217 | kfree(tegra); |
| 218 | return err; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 219 | } |
| 220 | |
Gabriel Krisman Bertazi | 11b3c20 | 2017-01-06 15:57:31 -0200 | [diff] [blame] | 221 | static void tegra_drm_unload(struct drm_device *drm) |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 222 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 223 | struct host1x_device *device = to_host1x_device(drm->dev); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 224 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 225 | int err; |
| 226 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 227 | drm_kms_helper_poll_fini(drm); |
| 228 | tegra_drm_fb_exit(drm); |
Thierry Reding | f002abc | 2013-10-14 14:06:02 +0200 | [diff] [blame] | 229 | drm_mode_config_cleanup(drm); |
Thierry Reding | 4aa3df7 | 2014-11-24 16:27:13 +0100 | [diff] [blame] | 230 | drm_vblank_cleanup(drm); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 231 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 232 | err = host1x_device_exit(device); |
| 233 | if (err < 0) |
Gabriel Krisman Bertazi | 11b3c20 | 2017-01-06 15:57:31 -0200 | [diff] [blame] | 234 | return; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 235 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 236 | if (tegra->domain) { |
| 237 | iommu_domain_free(tegra->domain); |
| 238 | drm_mm_takedown(&tegra->mm); |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame] | 239 | mutex_destroy(&tegra->mm_lock); |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 240 | } |
| 241 | |
Thierry Reding | 1053f4dd | 2014-11-04 16:17:55 +0100 | [diff] [blame] | 242 | kfree(tegra); |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 243 | } |
| 244 | |
| 245 | static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp) |
| 246 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 247 | struct tegra_drm_file *fpriv; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 248 | |
| 249 | fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL); |
| 250 | if (!fpriv) |
| 251 | return -ENOMEM; |
| 252 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 253 | idr_init(&fpriv->contexts); |
| 254 | mutex_init(&fpriv->lock); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 255 | filp->driver_priv = fpriv; |
| 256 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 257 | return 0; |
| 258 | } |
| 259 | |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 260 | static void tegra_drm_context_free(struct tegra_drm_context *context) |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 261 | { |
| 262 | context->client->ops->close_channel(context); |
| 263 | kfree(context); |
| 264 | } |
| 265 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 266 | static void tegra_drm_lastclose(struct drm_device *drm) |
| 267 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 268 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 269 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 270 | |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 271 | tegra_fbdev_restore_mode(tegra->fbdev); |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 272 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 273 | } |
| 274 | |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 275 | static struct host1x_bo * |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 276 | host1x_bo_lookup(struct drm_file *file, u32 handle) |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 277 | { |
| 278 | struct drm_gem_object *gem; |
| 279 | struct tegra_bo *bo; |
| 280 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 281 | gem = drm_gem_object_lookup(file, handle); |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 282 | if (!gem) |
| 283 | return NULL; |
| 284 | |
Daniel Vetter | a07cdfe | 2015-11-23 10:32:48 +0100 | [diff] [blame] | 285 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 286 | |
| 287 | bo = to_tegra_bo(gem); |
| 288 | return &bo->base; |
| 289 | } |
| 290 | |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 291 | static int host1x_reloc_copy_from_user(struct host1x_reloc *dest, |
| 292 | struct drm_tegra_reloc __user *src, |
| 293 | struct drm_device *drm, |
| 294 | struct drm_file *file) |
| 295 | { |
| 296 | u32 cmdbuf, target; |
| 297 | int err; |
| 298 | |
| 299 | err = get_user(cmdbuf, &src->cmdbuf.handle); |
| 300 | if (err < 0) |
| 301 | return err; |
| 302 | |
| 303 | err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset); |
| 304 | if (err < 0) |
| 305 | return err; |
| 306 | |
| 307 | err = get_user(target, &src->target.handle); |
| 308 | if (err < 0) |
| 309 | return err; |
| 310 | |
David Ung | 31f40f8 | 2015-01-20 18:37:35 -0800 | [diff] [blame] | 311 | err = get_user(dest->target.offset, &src->target.offset); |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 312 | if (err < 0) |
| 313 | return err; |
| 314 | |
| 315 | err = get_user(dest->shift, &src->shift); |
| 316 | if (err < 0) |
| 317 | return err; |
| 318 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 319 | dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf); |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 320 | if (!dest->cmdbuf.bo) |
| 321 | return -ENOENT; |
| 322 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 323 | dest->target.bo = host1x_bo_lookup(file, target); |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 324 | if (!dest->target.bo) |
| 325 | return -ENOENT; |
| 326 | |
| 327 | return 0; |
| 328 | } |
| 329 | |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 330 | int tegra_drm_submit(struct tegra_drm_context *context, |
| 331 | struct drm_tegra_submit *args, struct drm_device *drm, |
| 332 | struct drm_file *file) |
| 333 | { |
| 334 | unsigned int num_cmdbufs = args->num_cmdbufs; |
| 335 | unsigned int num_relocs = args->num_relocs; |
| 336 | unsigned int num_waitchks = args->num_waitchks; |
| 337 | struct drm_tegra_cmdbuf __user *cmdbufs = |
Thierry Reding | a7ed68f | 2013-11-08 13:15:43 +0100 | [diff] [blame] | 338 | (void __user *)(uintptr_t)args->cmdbufs; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 339 | struct drm_tegra_reloc __user *relocs = |
Thierry Reding | a7ed68f | 2013-11-08 13:15:43 +0100 | [diff] [blame] | 340 | (void __user *)(uintptr_t)args->relocs; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 341 | struct drm_tegra_waitchk __user *waitchks = |
Thierry Reding | a7ed68f | 2013-11-08 13:15:43 +0100 | [diff] [blame] | 342 | (void __user *)(uintptr_t)args->waitchks; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 343 | struct drm_tegra_syncpt syncpt; |
| 344 | struct host1x_job *job; |
| 345 | int err; |
| 346 | |
| 347 | /* We don't yet support other than one syncpt_incr struct per submit */ |
| 348 | if (args->num_syncpts != 1) |
| 349 | return -EINVAL; |
| 350 | |
| 351 | job = host1x_job_alloc(context->channel, args->num_cmdbufs, |
| 352 | args->num_relocs, args->num_waitchks); |
| 353 | if (!job) |
| 354 | return -ENOMEM; |
| 355 | |
| 356 | job->num_relocs = args->num_relocs; |
| 357 | job->num_waitchk = args->num_waitchks; |
| 358 | job->client = (u32)args->context; |
| 359 | job->class = context->client->base.class; |
| 360 | job->serialize = true; |
| 361 | |
| 362 | while (num_cmdbufs) { |
| 363 | struct drm_tegra_cmdbuf cmdbuf; |
| 364 | struct host1x_bo *bo; |
| 365 | |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 366 | if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) { |
| 367 | err = -EFAULT; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 368 | goto fail; |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 369 | } |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 370 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 371 | bo = host1x_bo_lookup(file, cmdbuf.handle); |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 372 | if (!bo) { |
| 373 | err = -ENOENT; |
| 374 | goto fail; |
| 375 | } |
| 376 | |
| 377 | host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset); |
| 378 | num_cmdbufs--; |
| 379 | cmdbufs++; |
| 380 | } |
| 381 | |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 382 | /* copy and resolve relocations from submit */ |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 383 | while (num_relocs--) { |
Thierry Reding | 961e3be | 2014-06-10 10:25:00 +0200 | [diff] [blame] | 384 | err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs], |
| 385 | &relocs[num_relocs], drm, |
| 386 | file); |
| 387 | if (err < 0) |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 388 | goto fail; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 389 | } |
| 390 | |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 391 | if (copy_from_user(job->waitchk, waitchks, |
| 392 | sizeof(*waitchks) * num_waitchks)) { |
| 393 | err = -EFAULT; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 394 | goto fail; |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 395 | } |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 396 | |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 397 | if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts, |
| 398 | sizeof(syncpt))) { |
| 399 | err = -EFAULT; |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 400 | goto fail; |
Dan Carpenter | 9a99160 | 2013-11-08 13:07:37 +0300 | [diff] [blame] | 401 | } |
Thierry Reding | c40f0f1 | 2013-10-10 11:00:33 +0200 | [diff] [blame] | 402 | |
| 403 | job->is_addr_reg = context->client->ops->is_addr_reg; |
| 404 | job->syncpt_incrs = syncpt.incrs; |
| 405 | job->syncpt_id = syncpt.id; |
| 406 | job->timeout = 10000; |
| 407 | |
| 408 | if (args->timeout && args->timeout < 10000) |
| 409 | job->timeout = args->timeout; |
| 410 | |
| 411 | err = host1x_job_pin(job, context->client->base.dev); |
| 412 | if (err) |
| 413 | goto fail; |
| 414 | |
| 415 | err = host1x_job_submit(job); |
| 416 | if (err) |
| 417 | goto fail_submit; |
| 418 | |
| 419 | args->fence = job->syncpt_end; |
| 420 | |
| 421 | host1x_job_put(job); |
| 422 | return 0; |
| 423 | |
| 424 | fail_submit: |
| 425 | host1x_job_unpin(job); |
| 426 | fail: |
| 427 | host1x_job_put(job); |
| 428 | return err; |
| 429 | } |
| 430 | |
| 431 | |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 432 | #ifdef CONFIG_DRM_TEGRA_STAGING |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 433 | static struct tegra_drm_context * |
| 434 | tegra_drm_file_get_context(struct tegra_drm_file *file, u32 id) |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 435 | { |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 436 | struct tegra_drm_context *context; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 437 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 438 | mutex_lock(&file->lock); |
| 439 | context = idr_find(&file->contexts, id); |
| 440 | mutex_unlock(&file->lock); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 441 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 442 | return context; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 443 | } |
| 444 | |
| 445 | static int tegra_gem_create(struct drm_device *drm, void *data, |
| 446 | struct drm_file *file) |
| 447 | { |
| 448 | struct drm_tegra_gem_create *args = data; |
| 449 | struct tegra_bo *bo; |
| 450 | |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 451 | bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags, |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 452 | &args->handle); |
| 453 | if (IS_ERR(bo)) |
| 454 | return PTR_ERR(bo); |
| 455 | |
| 456 | return 0; |
| 457 | } |
| 458 | |
| 459 | static int tegra_gem_mmap(struct drm_device *drm, void *data, |
| 460 | struct drm_file *file) |
| 461 | { |
| 462 | struct drm_tegra_gem_mmap *args = data; |
| 463 | struct drm_gem_object *gem; |
| 464 | struct tegra_bo *bo; |
| 465 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 466 | gem = drm_gem_object_lookup(file, args->handle); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 467 | if (!gem) |
| 468 | return -EINVAL; |
| 469 | |
| 470 | bo = to_tegra_bo(gem); |
| 471 | |
David Herrmann | 2bc7b0c | 2013-08-13 14:19:58 +0200 | [diff] [blame] | 472 | args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 473 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 474 | drm_gem_object_unreference_unlocked(gem); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 475 | |
| 476 | return 0; |
| 477 | } |
| 478 | |
| 479 | static int tegra_syncpt_read(struct drm_device *drm, void *data, |
| 480 | struct drm_file *file) |
| 481 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 482 | struct host1x *host = dev_get_drvdata(drm->dev->parent); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 483 | struct drm_tegra_syncpt_read *args = data; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 484 | struct host1x_syncpt *sp; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 485 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 486 | sp = host1x_syncpt_get(host, args->id); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 487 | if (!sp) |
| 488 | return -EINVAL; |
| 489 | |
| 490 | args->value = host1x_syncpt_read_min(sp); |
| 491 | return 0; |
| 492 | } |
| 493 | |
| 494 | static int tegra_syncpt_incr(struct drm_device *drm, void *data, |
| 495 | struct drm_file *file) |
| 496 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 497 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 498 | struct drm_tegra_syncpt_incr *args = data; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 499 | struct host1x_syncpt *sp; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 500 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 501 | sp = host1x_syncpt_get(host1x, args->id); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 502 | if (!sp) |
| 503 | return -EINVAL; |
| 504 | |
Arto Merilainen | ebae30b | 2013-05-29 13:26:08 +0300 | [diff] [blame] | 505 | return host1x_syncpt_incr(sp); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 506 | } |
| 507 | |
| 508 | static int tegra_syncpt_wait(struct drm_device *drm, void *data, |
| 509 | struct drm_file *file) |
| 510 | { |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 511 | struct host1x *host1x = dev_get_drvdata(drm->dev->parent); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 512 | struct drm_tegra_syncpt_wait *args = data; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 513 | struct host1x_syncpt *sp; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 514 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 515 | sp = host1x_syncpt_get(host1x, args->id); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 516 | if (!sp) |
| 517 | return -EINVAL; |
| 518 | |
| 519 | return host1x_syncpt_wait(sp, args->thresh, args->timeout, |
| 520 | &args->value); |
| 521 | } |
| 522 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 523 | static int tegra_client_open(struct tegra_drm_file *fpriv, |
| 524 | struct tegra_drm_client *client, |
| 525 | struct tegra_drm_context *context) |
| 526 | { |
| 527 | int err; |
| 528 | |
| 529 | err = client->ops->open_channel(client, context); |
| 530 | if (err < 0) |
| 531 | return err; |
| 532 | |
| 533 | err = idr_alloc(&fpriv->contexts, context, 0, 0, GFP_KERNEL); |
| 534 | if (err < 0) { |
| 535 | client->ops->close_channel(context); |
| 536 | return err; |
| 537 | } |
| 538 | |
| 539 | context->client = client; |
| 540 | context->id = err; |
| 541 | |
| 542 | return 0; |
| 543 | } |
| 544 | |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 545 | static int tegra_open_channel(struct drm_device *drm, void *data, |
| 546 | struct drm_file *file) |
| 547 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 548 | struct tegra_drm_file *fpriv = file->driver_priv; |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 549 | struct tegra_drm *tegra = drm->dev_private; |
| 550 | struct drm_tegra_open_channel *args = data; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 551 | struct tegra_drm_context *context; |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 552 | struct tegra_drm_client *client; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 553 | int err = -ENODEV; |
| 554 | |
| 555 | context = kzalloc(sizeof(*context), GFP_KERNEL); |
| 556 | if (!context) |
| 557 | return -ENOMEM; |
| 558 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 559 | mutex_lock(&fpriv->lock); |
| 560 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 561 | list_for_each_entry(client, &tegra->clients, list) |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 562 | if (client->base.class == args->client) { |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 563 | err = tegra_client_open(fpriv, client, context); |
| 564 | if (err < 0) |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 565 | break; |
| 566 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 567 | args->context = context->id; |
| 568 | break; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 569 | } |
| 570 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 571 | if (err < 0) |
| 572 | kfree(context); |
| 573 | |
| 574 | mutex_unlock(&fpriv->lock); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 575 | return err; |
| 576 | } |
| 577 | |
| 578 | static int tegra_close_channel(struct drm_device *drm, void *data, |
| 579 | struct drm_file *file) |
| 580 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 581 | struct tegra_drm_file *fpriv = file->driver_priv; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 582 | struct drm_tegra_close_channel *args = data; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 583 | struct tegra_drm_context *context; |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 584 | int err = 0; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 585 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 586 | mutex_lock(&fpriv->lock); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 587 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 588 | context = tegra_drm_file_get_context(fpriv, args->context); |
| 589 | if (!context) { |
| 590 | err = -EINVAL; |
| 591 | goto unlock; |
| 592 | } |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 593 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 594 | idr_remove(&fpriv->contexts, context->id); |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 595 | tegra_drm_context_free(context); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 596 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 597 | unlock: |
| 598 | mutex_unlock(&fpriv->lock); |
| 599 | return err; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 600 | } |
| 601 | |
| 602 | static int tegra_get_syncpt(struct drm_device *drm, void *data, |
| 603 | struct drm_file *file) |
| 604 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 605 | struct tegra_drm_file *fpriv = file->driver_priv; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 606 | struct drm_tegra_get_syncpt *args = data; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 607 | struct tegra_drm_context *context; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 608 | struct host1x_syncpt *syncpt; |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 609 | int err = 0; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 610 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 611 | mutex_lock(&fpriv->lock); |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 612 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 613 | context = tegra_drm_file_get_context(fpriv, args->context); |
| 614 | if (!context) { |
| 615 | err = -ENODEV; |
| 616 | goto unlock; |
| 617 | } |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 618 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 619 | if (args->index >= context->client->base.num_syncpts) { |
| 620 | err = -EINVAL; |
| 621 | goto unlock; |
| 622 | } |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 623 | |
Thierry Reding | 53fa7f7 | 2013-09-24 15:35:40 +0200 | [diff] [blame] | 624 | syncpt = context->client->base.syncpts[args->index]; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 625 | args->id = host1x_syncpt_id(syncpt); |
| 626 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 627 | unlock: |
| 628 | mutex_unlock(&fpriv->lock); |
| 629 | return err; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 630 | } |
| 631 | |
| 632 | static int tegra_submit(struct drm_device *drm, void *data, |
| 633 | struct drm_file *file) |
| 634 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 635 | struct tegra_drm_file *fpriv = file->driver_priv; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 636 | struct drm_tegra_submit *args = data; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 637 | struct tegra_drm_context *context; |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 638 | int err; |
Thierry Reding | c88c363 | 2013-09-26 16:08:22 +0200 | [diff] [blame] | 639 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 640 | mutex_lock(&fpriv->lock); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 641 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 642 | context = tegra_drm_file_get_context(fpriv, args->context); |
| 643 | if (!context) { |
| 644 | err = -ENODEV; |
| 645 | goto unlock; |
| 646 | } |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 647 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 648 | err = context->client->ops->submit(context, args, drm, file); |
| 649 | |
| 650 | unlock: |
| 651 | mutex_unlock(&fpriv->lock); |
| 652 | return err; |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 653 | } |
Arto Merilainen | c54a169 | 2013-10-14 15:21:54 +0300 | [diff] [blame] | 654 | |
| 655 | static int tegra_get_syncpt_base(struct drm_device *drm, void *data, |
| 656 | struct drm_file *file) |
| 657 | { |
| 658 | struct tegra_drm_file *fpriv = file->driver_priv; |
| 659 | struct drm_tegra_get_syncpt_base *args = data; |
| 660 | struct tegra_drm_context *context; |
| 661 | struct host1x_syncpt_base *base; |
| 662 | struct host1x_syncpt *syncpt; |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 663 | int err = 0; |
Arto Merilainen | c54a169 | 2013-10-14 15:21:54 +0300 | [diff] [blame] | 664 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 665 | mutex_lock(&fpriv->lock); |
Arto Merilainen | c54a169 | 2013-10-14 15:21:54 +0300 | [diff] [blame] | 666 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 667 | context = tegra_drm_file_get_context(fpriv, args->context); |
| 668 | if (!context) { |
| 669 | err = -ENODEV; |
| 670 | goto unlock; |
| 671 | } |
Arto Merilainen | c54a169 | 2013-10-14 15:21:54 +0300 | [diff] [blame] | 672 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 673 | if (args->syncpt >= context->client->base.num_syncpts) { |
| 674 | err = -EINVAL; |
| 675 | goto unlock; |
| 676 | } |
Arto Merilainen | c54a169 | 2013-10-14 15:21:54 +0300 | [diff] [blame] | 677 | |
| 678 | syncpt = context->client->base.syncpts[args->syncpt]; |
| 679 | |
| 680 | base = host1x_syncpt_get_base(syncpt); |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 681 | if (!base) { |
| 682 | err = -ENXIO; |
| 683 | goto unlock; |
| 684 | } |
Arto Merilainen | c54a169 | 2013-10-14 15:21:54 +0300 | [diff] [blame] | 685 | |
| 686 | args->id = host1x_syncpt_base_id(base); |
| 687 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 688 | unlock: |
| 689 | mutex_unlock(&fpriv->lock); |
| 690 | return err; |
Arto Merilainen | c54a169 | 2013-10-14 15:21:54 +0300 | [diff] [blame] | 691 | } |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 692 | |
| 693 | static int tegra_gem_set_tiling(struct drm_device *drm, void *data, |
| 694 | struct drm_file *file) |
| 695 | { |
| 696 | struct drm_tegra_gem_set_tiling *args = data; |
| 697 | enum tegra_bo_tiling_mode mode; |
| 698 | struct drm_gem_object *gem; |
| 699 | unsigned long value = 0; |
| 700 | struct tegra_bo *bo; |
| 701 | |
| 702 | switch (args->mode) { |
| 703 | case DRM_TEGRA_GEM_TILING_MODE_PITCH: |
| 704 | mode = TEGRA_BO_TILING_MODE_PITCH; |
| 705 | |
| 706 | if (args->value != 0) |
| 707 | return -EINVAL; |
| 708 | |
| 709 | break; |
| 710 | |
| 711 | case DRM_TEGRA_GEM_TILING_MODE_TILED: |
| 712 | mode = TEGRA_BO_TILING_MODE_TILED; |
| 713 | |
| 714 | if (args->value != 0) |
| 715 | return -EINVAL; |
| 716 | |
| 717 | break; |
| 718 | |
| 719 | case DRM_TEGRA_GEM_TILING_MODE_BLOCK: |
| 720 | mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 721 | |
| 722 | if (args->value > 5) |
| 723 | return -EINVAL; |
| 724 | |
| 725 | value = args->value; |
| 726 | break; |
| 727 | |
| 728 | default: |
| 729 | return -EINVAL; |
| 730 | } |
| 731 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 732 | gem = drm_gem_object_lookup(file, args->handle); |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 733 | if (!gem) |
| 734 | return -ENOENT; |
| 735 | |
| 736 | bo = to_tegra_bo(gem); |
| 737 | |
| 738 | bo->tiling.mode = mode; |
| 739 | bo->tiling.value = value; |
| 740 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 741 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 742 | |
| 743 | return 0; |
| 744 | } |
| 745 | |
| 746 | static int tegra_gem_get_tiling(struct drm_device *drm, void *data, |
| 747 | struct drm_file *file) |
| 748 | { |
| 749 | struct drm_tegra_gem_get_tiling *args = data; |
| 750 | struct drm_gem_object *gem; |
| 751 | struct tegra_bo *bo; |
| 752 | int err = 0; |
| 753 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 754 | gem = drm_gem_object_lookup(file, args->handle); |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 755 | if (!gem) |
| 756 | return -ENOENT; |
| 757 | |
| 758 | bo = to_tegra_bo(gem); |
| 759 | |
| 760 | switch (bo->tiling.mode) { |
| 761 | case TEGRA_BO_TILING_MODE_PITCH: |
| 762 | args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH; |
| 763 | args->value = 0; |
| 764 | break; |
| 765 | |
| 766 | case TEGRA_BO_TILING_MODE_TILED: |
| 767 | args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED; |
| 768 | args->value = 0; |
| 769 | break; |
| 770 | |
| 771 | case TEGRA_BO_TILING_MODE_BLOCK: |
| 772 | args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK; |
| 773 | args->value = bo->tiling.value; |
| 774 | break; |
| 775 | |
| 776 | default: |
| 777 | err = -EINVAL; |
| 778 | break; |
| 779 | } |
| 780 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 781 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | 7678d71 | 2014-06-03 14:56:57 +0200 | [diff] [blame] | 782 | |
| 783 | return err; |
| 784 | } |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 785 | |
| 786 | static int tegra_gem_set_flags(struct drm_device *drm, void *data, |
| 787 | struct drm_file *file) |
| 788 | { |
| 789 | struct drm_tegra_gem_set_flags *args = data; |
| 790 | struct drm_gem_object *gem; |
| 791 | struct tegra_bo *bo; |
| 792 | |
| 793 | if (args->flags & ~DRM_TEGRA_GEM_FLAGS) |
| 794 | return -EINVAL; |
| 795 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 796 | gem = drm_gem_object_lookup(file, args->handle); |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 797 | if (!gem) |
| 798 | return -ENOENT; |
| 799 | |
| 800 | bo = to_tegra_bo(gem); |
| 801 | bo->flags = 0; |
| 802 | |
| 803 | if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP) |
| 804 | bo->flags |= TEGRA_BO_BOTTOM_UP; |
| 805 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 806 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 807 | |
| 808 | return 0; |
| 809 | } |
| 810 | |
| 811 | static int tegra_gem_get_flags(struct drm_device *drm, void *data, |
| 812 | struct drm_file *file) |
| 813 | { |
| 814 | struct drm_tegra_gem_get_flags *args = data; |
| 815 | struct drm_gem_object *gem; |
| 816 | struct tegra_bo *bo; |
| 817 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 818 | gem = drm_gem_object_lookup(file, args->handle); |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 819 | if (!gem) |
| 820 | return -ENOENT; |
| 821 | |
| 822 | bo = to_tegra_bo(gem); |
| 823 | args->flags = 0; |
| 824 | |
| 825 | if (bo->flags & TEGRA_BO_BOTTOM_UP) |
| 826 | args->flags |= DRM_TEGRA_GEM_BOTTOM_UP; |
| 827 | |
Daniel Vetter | 1153330 | 2015-11-23 10:32:40 +0100 | [diff] [blame] | 828 | drm_gem_object_unreference_unlocked(gem); |
Thierry Reding | 7b12908 | 2014-06-10 12:04:03 +0200 | [diff] [blame] | 829 | |
| 830 | return 0; |
| 831 | } |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 832 | #endif |
| 833 | |
Rob Clark | baa7094 | 2013-08-02 13:27:49 -0400 | [diff] [blame] | 834 | static const struct drm_ioctl_desc tegra_drm_ioctls[] = { |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 835 | #ifdef CONFIG_DRM_TEGRA_STAGING |
Daniel Vetter | f8c4714 | 2015-09-08 13:56:30 +0200 | [diff] [blame] | 836 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0), |
| 837 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0), |
| 838 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0), |
| 839 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0), |
| 840 | DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0), |
| 841 | DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0), |
| 842 | DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0), |
| 843 | DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0), |
| 844 | DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0), |
| 845 | DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0), |
| 846 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0), |
| 847 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0), |
| 848 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0), |
| 849 | DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0), |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 850 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 851 | }; |
| 852 | |
| 853 | static const struct file_operations tegra_drm_fops = { |
| 854 | .owner = THIS_MODULE, |
| 855 | .open = drm_open, |
| 856 | .release = drm_release, |
| 857 | .unlocked_ioctl = drm_ioctl, |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 858 | .mmap = tegra_drm_mmap, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 859 | .poll = drm_poll, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 860 | .read = drm_read, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 861 | .compat_ioctl = drm_compat_ioctl, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 862 | .llseek = noop_llseek, |
| 863 | }; |
| 864 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 865 | static u32 tegra_drm_get_vblank_counter(struct drm_device *drm, |
| 866 | unsigned int pipe) |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 867 | { |
Shawn Guo | 75bcb05 | 2017-01-09 19:25:44 +0800 | [diff] [blame] | 868 | struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe); |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 869 | struct tegra_dc *dc = to_tegra_dc(crtc); |
Thierry Reding | ed7dae5 | 2014-12-16 16:03:13 +0100 | [diff] [blame] | 870 | |
| 871 | if (!crtc) |
| 872 | return 0; |
| 873 | |
Thierry Reding | 42e9ce0 | 2015-01-28 14:43:05 +0100 | [diff] [blame] | 874 | return tegra_dc_get_vblank_counter(dc); |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 875 | } |
| 876 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 877 | static int tegra_drm_enable_vblank(struct drm_device *drm, unsigned int pipe) |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 878 | { |
Shawn Guo | 75bcb05 | 2017-01-09 19:25:44 +0800 | [diff] [blame] | 879 | struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe); |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 880 | struct tegra_dc *dc = to_tegra_dc(crtc); |
| 881 | |
| 882 | if (!crtc) |
| 883 | return -ENODEV; |
| 884 | |
| 885 | tegra_dc_enable_vblank(dc); |
| 886 | |
| 887 | return 0; |
| 888 | } |
| 889 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 890 | static void tegra_drm_disable_vblank(struct drm_device *drm, unsigned int pipe) |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 891 | { |
Shawn Guo | 75bcb05 | 2017-01-09 19:25:44 +0800 | [diff] [blame] | 892 | struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe); |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 893 | struct tegra_dc *dc = to_tegra_dc(crtc); |
| 894 | |
| 895 | if (crtc) |
| 896 | tegra_dc_disable_vblank(dc); |
| 897 | } |
| 898 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 899 | static int tegra_drm_context_cleanup(int id, void *p, void *data) |
| 900 | { |
| 901 | struct tegra_drm_context *context = p; |
| 902 | |
| 903 | tegra_drm_context_free(context); |
| 904 | |
| 905 | return 0; |
| 906 | } |
| 907 | |
Thierry Reding | 3c03c46 | 2012-11-28 12:00:18 +0100 | [diff] [blame] | 908 | static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file) |
| 909 | { |
Thierry Reding | 08943e6 | 2013-09-26 16:08:18 +0200 | [diff] [blame] | 910 | struct tegra_drm_file *fpriv = file->driver_priv; |
Thierry Reding | 3c03c46 | 2012-11-28 12:00:18 +0100 | [diff] [blame] | 911 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 912 | mutex_lock(&fpriv->lock); |
| 913 | idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL); |
| 914 | mutex_unlock(&fpriv->lock); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 915 | |
Thierry Reding | bdd2f9c | 2017-03-09 20:04:55 +0100 | [diff] [blame^] | 916 | idr_destroy(&fpriv->contexts); |
| 917 | mutex_destroy(&fpriv->lock); |
Terje Bergstrom | d43f81c | 2013-03-22 16:34:09 +0200 | [diff] [blame] | 918 | kfree(fpriv); |
Thierry Reding | 3c03c46 | 2012-11-28 12:00:18 +0100 | [diff] [blame] | 919 | } |
| 920 | |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 921 | #ifdef CONFIG_DEBUG_FS |
| 922 | static int tegra_debugfs_framebuffers(struct seq_file *s, void *data) |
| 923 | { |
| 924 | struct drm_info_node *node = (struct drm_info_node *)s->private; |
| 925 | struct drm_device *drm = node->minor->dev; |
| 926 | struct drm_framebuffer *fb; |
| 927 | |
| 928 | mutex_lock(&drm->mode_config.fb_lock); |
| 929 | |
| 930 | list_for_each_entry(fb, &drm->mode_config.fb_list, head) { |
| 931 | seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n", |
Ville Syrjälä | b00c600 | 2016-12-14 23:31:35 +0200 | [diff] [blame] | 932 | fb->base.id, fb->width, fb->height, |
| 933 | fb->format->depth, |
Ville Syrjälä | 272725c | 2016-12-14 23:32:20 +0200 | [diff] [blame] | 934 | fb->format->cpp[0] * 8, |
Dave Airlie | 747a598 | 2016-04-15 15:10:35 +1000 | [diff] [blame] | 935 | drm_framebuffer_read_refcount(fb)); |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 936 | } |
| 937 | |
| 938 | mutex_unlock(&drm->mode_config.fb_lock); |
| 939 | |
| 940 | return 0; |
| 941 | } |
| 942 | |
Thierry Reding | 28c2337 | 2015-01-23 09:16:03 +0100 | [diff] [blame] | 943 | static int tegra_debugfs_iova(struct seq_file *s, void *data) |
| 944 | { |
| 945 | struct drm_info_node *node = (struct drm_info_node *)s->private; |
| 946 | struct drm_device *drm = node->minor->dev; |
| 947 | struct tegra_drm *tegra = drm->dev_private; |
Daniel Vetter | b5c3714 | 2016-12-29 12:09:24 +0100 | [diff] [blame] | 948 | struct drm_printer p = drm_seq_file_printer(s); |
Thierry Reding | 28c2337 | 2015-01-23 09:16:03 +0100 | [diff] [blame] | 949 | |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame] | 950 | mutex_lock(&tegra->mm_lock); |
Daniel Vetter | b5c3714 | 2016-12-29 12:09:24 +0100 | [diff] [blame] | 951 | drm_mm_print(&tegra->mm, &p); |
Thierry Reding | 347ad49d | 2017-03-09 20:04:56 +0100 | [diff] [blame] | 952 | mutex_unlock(&tegra->mm_lock); |
Daniel Vetter | b5c3714 | 2016-12-29 12:09:24 +0100 | [diff] [blame] | 953 | |
| 954 | return 0; |
Thierry Reding | 28c2337 | 2015-01-23 09:16:03 +0100 | [diff] [blame] | 955 | } |
| 956 | |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 957 | static struct drm_info_list tegra_debugfs_list[] = { |
| 958 | { "framebuffers", tegra_debugfs_framebuffers, 0 }, |
Thierry Reding | 28c2337 | 2015-01-23 09:16:03 +0100 | [diff] [blame] | 959 | { "iova", tegra_debugfs_iova, 0 }, |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 960 | }; |
| 961 | |
| 962 | static int tegra_debugfs_init(struct drm_minor *minor) |
| 963 | { |
| 964 | return drm_debugfs_create_files(tegra_debugfs_list, |
| 965 | ARRAY_SIZE(tegra_debugfs_list), |
| 966 | minor->debugfs_root, minor); |
| 967 | } |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 968 | #endif |
| 969 | |
Thierry Reding | 9b57f5f | 2013-11-08 13:17:14 +0100 | [diff] [blame] | 970 | static struct drm_driver tegra_drm_driver = { |
Thierry Reding | ad90659 | 2015-09-24 18:38:09 +0200 | [diff] [blame] | 971 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | |
| 972 | DRIVER_ATOMIC, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 973 | .load = tegra_drm_load, |
| 974 | .unload = tegra_drm_unload, |
| 975 | .open = tegra_drm_open, |
Thierry Reding | 3c03c46 | 2012-11-28 12:00:18 +0100 | [diff] [blame] | 976 | .preclose = tegra_drm_preclose, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 977 | .lastclose = tegra_drm_lastclose, |
| 978 | |
Thierry Reding | 6e5ff99 | 2012-11-28 11:45:47 +0100 | [diff] [blame] | 979 | .get_vblank_counter = tegra_drm_get_vblank_counter, |
| 980 | .enable_vblank = tegra_drm_enable_vblank, |
| 981 | .disable_vblank = tegra_drm_disable_vblank, |
| 982 | |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 983 | #if defined(CONFIG_DEBUG_FS) |
| 984 | .debugfs_init = tegra_debugfs_init, |
Thierry Reding | e450fcc | 2013-02-13 16:13:16 +0100 | [diff] [blame] | 985 | #endif |
| 986 | |
Daniel Vetter | 1ddbdbd | 2016-04-26 19:30:00 +0200 | [diff] [blame] | 987 | .gem_free_object_unlocked = tegra_bo_free_object, |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 988 | .gem_vm_ops = &tegra_bo_vm_ops, |
Thierry Reding | 3800391 | 2013-12-12 10:00:43 +0100 | [diff] [blame] | 989 | |
| 990 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
| 991 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, |
| 992 | .gem_prime_export = tegra_gem_prime_export, |
| 993 | .gem_prime_import = tegra_gem_prime_import, |
| 994 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 995 | .dumb_create = tegra_bo_dumb_create, |
| 996 | .dumb_map_offset = tegra_bo_dumb_map_offset, |
Daniel Vetter | 43387b3 | 2013-07-16 09:12:04 +0200 | [diff] [blame] | 997 | .dumb_destroy = drm_gem_dumb_destroy, |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 998 | |
| 999 | .ioctls = tegra_drm_ioctls, |
| 1000 | .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls), |
| 1001 | .fops = &tegra_drm_fops, |
| 1002 | |
| 1003 | .name = DRIVER_NAME, |
| 1004 | .desc = DRIVER_DESC, |
| 1005 | .date = DRIVER_DATE, |
| 1006 | .major = DRIVER_MAJOR, |
| 1007 | .minor = DRIVER_MINOR, |
| 1008 | .patchlevel = DRIVER_PATCHLEVEL, |
| 1009 | }; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1010 | |
| 1011 | int tegra_drm_register_client(struct tegra_drm *tegra, |
| 1012 | struct tegra_drm_client *client) |
| 1013 | { |
| 1014 | mutex_lock(&tegra->clients_lock); |
| 1015 | list_add_tail(&client->list, &tegra->clients); |
| 1016 | mutex_unlock(&tegra->clients_lock); |
| 1017 | |
| 1018 | return 0; |
| 1019 | } |
| 1020 | |
| 1021 | int tegra_drm_unregister_client(struct tegra_drm *tegra, |
| 1022 | struct tegra_drm_client *client) |
| 1023 | { |
| 1024 | mutex_lock(&tegra->clients_lock); |
| 1025 | list_del_init(&client->list); |
| 1026 | mutex_unlock(&tegra->clients_lock); |
| 1027 | |
| 1028 | return 0; |
| 1029 | } |
| 1030 | |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 1031 | static int host1x_drm_probe(struct host1x_device *dev) |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1032 | { |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 1033 | struct drm_driver *driver = &tegra_drm_driver; |
| 1034 | struct drm_device *drm; |
| 1035 | int err; |
| 1036 | |
| 1037 | drm = drm_dev_alloc(driver, &dev->dev); |
Tom Gundersen | 0f28860 | 2016-09-21 16:59:19 +0200 | [diff] [blame] | 1038 | if (IS_ERR(drm)) |
| 1039 | return PTR_ERR(drm); |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 1040 | |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 1041 | dev_set_drvdata(&dev->dev, drm); |
| 1042 | |
| 1043 | err = drm_dev_register(drm, 0); |
| 1044 | if (err < 0) |
| 1045 | goto unref; |
| 1046 | |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 1047 | return 0; |
| 1048 | |
| 1049 | unref: |
| 1050 | drm_dev_unref(drm); |
| 1051 | return err; |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1052 | } |
| 1053 | |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 1054 | static int host1x_drm_remove(struct host1x_device *dev) |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1055 | { |
Thierry Reding | 9910f5c | 2014-05-22 09:57:15 +0200 | [diff] [blame] | 1056 | struct drm_device *drm = dev_get_drvdata(&dev->dev); |
| 1057 | |
| 1058 | drm_dev_unregister(drm); |
| 1059 | drm_dev_unref(drm); |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1060 | |
| 1061 | return 0; |
| 1062 | } |
| 1063 | |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1064 | #ifdef CONFIG_PM_SLEEP |
| 1065 | static int host1x_drm_suspend(struct device *dev) |
| 1066 | { |
| 1067 | struct drm_device *drm = dev_get_drvdata(dev); |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 1068 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1069 | |
| 1070 | drm_kms_helper_poll_disable(drm); |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 1071 | tegra_drm_fb_suspend(drm); |
| 1072 | |
| 1073 | tegra->state = drm_atomic_helper_suspend(drm); |
| 1074 | if (IS_ERR(tegra->state)) { |
| 1075 | tegra_drm_fb_resume(drm); |
| 1076 | drm_kms_helper_poll_enable(drm); |
| 1077 | return PTR_ERR(tegra->state); |
| 1078 | } |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1079 | |
| 1080 | return 0; |
| 1081 | } |
| 1082 | |
| 1083 | static int host1x_drm_resume(struct device *dev) |
| 1084 | { |
| 1085 | struct drm_device *drm = dev_get_drvdata(dev); |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 1086 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1087 | |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 1088 | drm_atomic_helper_resume(drm, tegra->state); |
| 1089 | tegra_drm_fb_resume(drm); |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1090 | drm_kms_helper_poll_enable(drm); |
| 1091 | |
| 1092 | return 0; |
| 1093 | } |
| 1094 | #endif |
| 1095 | |
Thierry Reding | a13f1dc | 2015-08-11 13:22:44 +0200 | [diff] [blame] | 1096 | static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend, |
| 1097 | host1x_drm_resume); |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1098 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1099 | static const struct of_device_id host1x_drm_subdevs[] = { |
| 1100 | { .compatible = "nvidia,tegra20-dc", }, |
| 1101 | { .compatible = "nvidia,tegra20-hdmi", }, |
| 1102 | { .compatible = "nvidia,tegra20-gr2d", }, |
Thierry Reding | 5f60ed0 | 2013-02-28 08:08:01 +0100 | [diff] [blame] | 1103 | { .compatible = "nvidia,tegra20-gr3d", }, |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1104 | { .compatible = "nvidia,tegra30-dc", }, |
| 1105 | { .compatible = "nvidia,tegra30-hdmi", }, |
| 1106 | { .compatible = "nvidia,tegra30-gr2d", }, |
Thierry Reding | 5f60ed0 | 2013-02-28 08:08:01 +0100 | [diff] [blame] | 1107 | { .compatible = "nvidia,tegra30-gr3d", }, |
Thierry Reding | dec7273 | 2013-09-03 08:45:46 +0200 | [diff] [blame] | 1108 | { .compatible = "nvidia,tegra114-dsi", }, |
Mikko Perttunen | 7d1d28a | 2013-09-30 16:54:47 +0200 | [diff] [blame] | 1109 | { .compatible = "nvidia,tegra114-hdmi", }, |
Thierry Reding | 5f60ed0 | 2013-02-28 08:08:01 +0100 | [diff] [blame] | 1110 | { .compatible = "nvidia,tegra114-gr3d", }, |
Thierry Reding | 8620fc6 | 2013-12-12 11:03:59 +0100 | [diff] [blame] | 1111 | { .compatible = "nvidia,tegra124-dc", }, |
Thierry Reding | 6b6b604 | 2013-11-15 16:06:05 +0100 | [diff] [blame] | 1112 | { .compatible = "nvidia,tegra124-sor", }, |
Thierry Reding | fb7be70 | 2013-11-15 16:07:32 +0100 | [diff] [blame] | 1113 | { .compatible = "nvidia,tegra124-hdmi", }, |
Thierry Reding | 7d33858 | 2015-04-10 11:35:21 +0200 | [diff] [blame] | 1114 | { .compatible = "nvidia,tegra124-dsi", }, |
Thierry Reding | c06c793 | 2015-04-10 11:35:21 +0200 | [diff] [blame] | 1115 | { .compatible = "nvidia,tegra132-dsi", }, |
Thierry Reding | 5b4f516 | 2015-03-27 10:31:58 +0100 | [diff] [blame] | 1116 | { .compatible = "nvidia,tegra210-dc", }, |
Thierry Reding | ddfb406 | 2015-04-08 16:56:22 +0200 | [diff] [blame] | 1117 | { .compatible = "nvidia,tegra210-dsi", }, |
Thierry Reding | 3309ac8 | 2015-07-30 10:32:46 +0200 | [diff] [blame] | 1118 | { .compatible = "nvidia,tegra210-sor", }, |
Thierry Reding | 459cc2c | 2015-07-30 10:34:24 +0200 | [diff] [blame] | 1119 | { .compatible = "nvidia,tegra210-sor1", }, |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1120 | { /* sentinel */ } |
| 1121 | }; |
| 1122 | |
| 1123 | static struct host1x_driver host1x_drm_driver = { |
Thierry Reding | f4c5cf8 | 2014-12-18 15:29:14 +0100 | [diff] [blame] | 1124 | .driver = { |
| 1125 | .name = "drm", |
Thierry Reding | 359ae68 | 2014-12-18 17:15:25 +0100 | [diff] [blame] | 1126 | .pm = &host1x_drm_pm_ops, |
Thierry Reding | f4c5cf8 | 2014-12-18 15:29:14 +0100 | [diff] [blame] | 1127 | }, |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1128 | .probe = host1x_drm_probe, |
| 1129 | .remove = host1x_drm_remove, |
| 1130 | .subdevs = host1x_drm_subdevs, |
| 1131 | }; |
| 1132 | |
Thierry Reding | 473112e | 2015-09-10 16:07:14 +0200 | [diff] [blame] | 1133 | static struct platform_driver * const drivers[] = { |
| 1134 | &tegra_dc_driver, |
| 1135 | &tegra_hdmi_driver, |
| 1136 | &tegra_dsi_driver, |
| 1137 | &tegra_dpaux_driver, |
| 1138 | &tegra_sor_driver, |
| 1139 | &tegra_gr2d_driver, |
| 1140 | &tegra_gr3d_driver, |
| 1141 | }; |
| 1142 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1143 | static int __init host1x_drm_init(void) |
| 1144 | { |
| 1145 | int err; |
| 1146 | |
| 1147 | err = host1x_driver_register(&host1x_drm_driver); |
| 1148 | if (err < 0) |
| 1149 | return err; |
| 1150 | |
Thierry Reding | 473112e | 2015-09-10 16:07:14 +0200 | [diff] [blame] | 1151 | err = platform_register_drivers(drivers, ARRAY_SIZE(drivers)); |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1152 | if (err < 0) |
| 1153 | goto unregister_host1x; |
| 1154 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1155 | return 0; |
| 1156 | |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1157 | unregister_host1x: |
| 1158 | host1x_driver_unregister(&host1x_drm_driver); |
| 1159 | return err; |
| 1160 | } |
| 1161 | module_init(host1x_drm_init); |
| 1162 | |
| 1163 | static void __exit host1x_drm_exit(void) |
| 1164 | { |
Thierry Reding | 473112e | 2015-09-10 16:07:14 +0200 | [diff] [blame] | 1165 | platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); |
Thierry Reding | 776dc38 | 2013-10-14 14:43:22 +0200 | [diff] [blame] | 1166 | host1x_driver_unregister(&host1x_drm_driver); |
| 1167 | } |
| 1168 | module_exit(host1x_drm_exit); |
| 1169 | |
| 1170 | MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); |
| 1171 | MODULE_DESCRIPTION("NVIDIA Tegra DRM driver"); |
| 1172 | MODULE_LICENSE("GPL v2"); |