blob: 948b529d40974078a6085144e68095f137f8963e [file] [log] [blame]
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Thierry Reding776dc382013-10-14 14:43:22 +020010#include <linux/host1x.h>
Thierry Redingbdd2f9c2017-03-09 20:04:55 +010011#include <linux/idr.h>
Thierry Redingdf06b752014-06-26 21:41:53 +020012#include <linux/iommu.h>
Thierry Reding776dc382013-10-14 14:43:22 +020013
Thierry Reding1503ca42014-11-24 17:41:23 +010014#include <drm/drm_atomic.h>
Thierry Reding07866962014-11-24 17:08:06 +010015#include <drm/drm_atomic_helper.h>
16
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000017#include "drm.h"
Arto Merilainende2ba662013-03-22 16:34:08 +020018#include "gem.h"
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000019
20#define DRIVER_NAME "tegra"
21#define DRIVER_DESC "NVIDIA Tegra graphics"
22#define DRIVER_DATE "20120330"
23#define DRIVER_MAJOR 0
24#define DRIVER_MINOR 0
25#define DRIVER_PATCHLEVEL 0
26
Thierry Reding08943e62013-09-26 16:08:18 +020027struct tegra_drm_file {
Thierry Redingbdd2f9c2017-03-09 20:04:55 +010028 struct idr contexts;
29 struct mutex lock;
Thierry Reding08943e62013-09-26 16:08:18 +020030};
31
Thierry Reding1503ca42014-11-24 17:41:23 +010032static void tegra_atomic_schedule(struct tegra_drm *tegra,
33 struct drm_atomic_state *state)
34{
35 tegra->commit.state = state;
36 schedule_work(&tegra->commit.work);
37}
38
39static void tegra_atomic_complete(struct tegra_drm *tegra,
40 struct drm_atomic_state *state)
41{
42 struct drm_device *drm = tegra->drm;
43
44 /*
45 * Everything below can be run asynchronously without the need to grab
46 * any modeset locks at all under one condition: It must be guaranteed
47 * that the asynchronous work has either been cancelled (if the driver
48 * supports it, which at least requires that the framebuffers get
49 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
50 * before the new state gets committed on the software side with
51 * drm_atomic_helper_swap_state().
52 *
53 * This scheme allows new atomic state updates to be prepared and
54 * checked in parallel to the asynchronous completion of the previous
55 * update. Which is important since compositors need to figure out the
56 * composition of the next frame right after having submitted the
57 * current layout.
58 */
59
Daniel Vetter1af434a2015-02-22 12:24:19 +010060 drm_atomic_helper_commit_modeset_disables(drm, state);
Daniel Vetter1af434a2015-02-22 12:24:19 +010061 drm_atomic_helper_commit_modeset_enables(drm, state);
Liu Ying2b58e982016-08-29 17:12:03 +080062 drm_atomic_helper_commit_planes(drm, state,
63 DRM_PLANE_COMMIT_ACTIVE_ONLY);
Thierry Reding1503ca42014-11-24 17:41:23 +010064
65 drm_atomic_helper_wait_for_vblanks(drm, state);
66
67 drm_atomic_helper_cleanup_planes(drm, state);
Chris Wilson08536952016-10-14 13:18:18 +010068 drm_atomic_state_put(state);
Thierry Reding1503ca42014-11-24 17:41:23 +010069}
70
71static void tegra_atomic_work(struct work_struct *work)
72{
73 struct tegra_drm *tegra = container_of(work, struct tegra_drm,
74 commit.work);
75
76 tegra_atomic_complete(tegra, tegra->commit.state);
77}
78
79static int tegra_atomic_commit(struct drm_device *drm,
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020080 struct drm_atomic_state *state, bool nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +010081{
82 struct tegra_drm *tegra = drm->dev_private;
83 int err;
84
85 err = drm_atomic_helper_prepare_planes(drm, state);
86 if (err)
87 return err;
88
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020089 /* serialize outstanding nonblocking commits */
Thierry Reding1503ca42014-11-24 17:41:23 +010090 mutex_lock(&tegra->commit.lock);
91 flush_work(&tegra->commit.work);
92
93 /*
94 * This is the point of no return - everything below never fails except
95 * when the hw goes bonghits. Which means we can commit the new state on
96 * the software side now.
97 */
98
Daniel Vetter5e84c262016-06-10 00:06:32 +020099 drm_atomic_helper_swap_state(state, true);
Thierry Reding1503ca42014-11-24 17:41:23 +0100100
Chris Wilson08536952016-10-14 13:18:18 +0100101 drm_atomic_state_get(state);
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +0200102 if (nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +0100103 tegra_atomic_schedule(tegra, state);
104 else
105 tegra_atomic_complete(tegra, state);
106
107 mutex_unlock(&tegra->commit.lock);
108 return 0;
109}
110
Thierry Redingf9914212014-11-26 13:03:57 +0100111static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
112 .fb_create = tegra_fb_create,
Archit Tanejab110ef32015-10-27 13:40:59 +0530113#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Redingf9914212014-11-26 13:03:57 +0100114 .output_poll_changed = tegra_fb_output_poll_changed,
115#endif
Thierry Reding07866962014-11-24 17:08:06 +0100116 .atomic_check = drm_atomic_helper_check,
Thierry Reding1503ca42014-11-24 17:41:23 +0100117 .atomic_commit = tegra_atomic_commit,
Thierry Redingf9914212014-11-26 13:03:57 +0100118};
119
Thierry Reding776dc382013-10-14 14:43:22 +0200120static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000121{
Thierry Reding776dc382013-10-14 14:43:22 +0200122 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Reding386a2a72013-09-24 13:22:17 +0200123 struct tegra_drm *tegra;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000124 int err;
125
Thierry Reding776dc382013-10-14 14:43:22 +0200126 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
Thierry Reding386a2a72013-09-24 13:22:17 +0200127 if (!tegra)
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200128 return -ENOMEM;
129
Thierry Redingdf06b752014-06-26 21:41:53 +0200130 if (iommu_present(&platform_bus_type)) {
Thierry Reding4553f732015-01-19 16:15:04 +0100131 struct iommu_domain_geometry *geometry;
132 u64 start, end;
133
Thierry Redingdf06b752014-06-26 21:41:53 +0200134 tegra->domain = iommu_domain_alloc(&platform_bus_type);
Dan Carpenterbf19b882014-12-04 14:00:35 +0300135 if (!tegra->domain) {
136 err = -ENOMEM;
Thierry Redingdf06b752014-06-26 21:41:53 +0200137 goto free;
138 }
139
Thierry Reding4553f732015-01-19 16:15:04 +0100140 geometry = &tegra->domain->geometry;
141 start = geometry->aperture_start;
142 end = geometry->aperture_end;
143
Thierry Redingd2d8c352015-11-23 16:46:30 +0100144 DRM_DEBUG_DRIVER("IOMMU aperture initialized (%#llx-%#llx)\n",
145 start, end);
Thierry Reding4553f732015-01-19 16:15:04 +0100146 drm_mm_init(&tegra->mm, start, end - start + 1);
Thierry Reding347ad49d2017-03-09 20:04:56 +0100147 mutex_init(&tegra->mm_lock);
Thierry Redingdf06b752014-06-26 21:41:53 +0200148 }
149
Thierry Reding386a2a72013-09-24 13:22:17 +0200150 mutex_init(&tegra->clients_lock);
151 INIT_LIST_HEAD(&tegra->clients);
Thierry Reding1503ca42014-11-24 17:41:23 +0100152
153 mutex_init(&tegra->commit.lock);
154 INIT_WORK(&tegra->commit.work, tegra_atomic_work);
155
Thierry Reding386a2a72013-09-24 13:22:17 +0200156 drm->dev_private = tegra;
157 tegra->drm = drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000158
159 drm_mode_config_init(drm);
160
Thierry Redingf9914212014-11-26 13:03:57 +0100161 drm->mode_config.min_width = 0;
162 drm->mode_config.min_height = 0;
163
164 drm->mode_config.max_width = 4096;
165 drm->mode_config.max_height = 4096;
166
167 drm->mode_config.funcs = &tegra_drm_mode_funcs;
168
Thierry Redinge2215322014-06-27 17:19:25 +0200169 err = tegra_drm_fb_prepare(drm);
170 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100171 goto config;
Thierry Redinge2215322014-06-27 17:19:25 +0200172
173 drm_kms_helper_poll_init(drm);
174
Thierry Reding776dc382013-10-14 14:43:22 +0200175 err = host1x_device_init(device);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000176 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100177 goto fbdev;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000178
Thierry Reding603f0cc2013-04-22 21:22:14 +0200179 /*
180 * We don't use the drm_irq_install() helpers provided by the DRM
181 * core, so we need to set this manually in order to allow the
182 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
183 */
Ville Syrjälä44238432013-10-04 14:53:37 +0300184 drm->irq_enabled = true;
Thierry Reding603f0cc2013-04-22 21:22:14 +0200185
Thierry Reding42e9ce02015-01-28 14:43:05 +0100186 /* syncpoints are used for full 32-bit hardware VBLANK counters */
Thierry Reding42e9ce02015-01-28 14:43:05 +0100187 drm->max_vblank_count = 0xffffffff;
188
Thierry Reding6e5ff992012-11-28 11:45:47 +0100189 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
190 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100191 goto device;
Thierry Reding6e5ff992012-11-28 11:45:47 +0100192
Thierry Reding31930d42015-07-02 17:04:06 +0200193 drm_mode_config_reset(drm);
194
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000195 err = tegra_drm_fb_init(drm);
196 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100197 goto vblank;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000198
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000199 return 0;
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100200
201vblank:
202 drm_vblank_cleanup(drm);
203device:
204 host1x_device_exit(device);
205fbdev:
206 drm_kms_helper_poll_fini(drm);
207 tegra_drm_fb_free(drm);
208config:
209 drm_mode_config_cleanup(drm);
Thierry Redingdf06b752014-06-26 21:41:53 +0200210
211 if (tegra->domain) {
212 iommu_domain_free(tegra->domain);
213 drm_mm_takedown(&tegra->mm);
Thierry Reding347ad49d2017-03-09 20:04:56 +0100214 mutex_destroy(&tegra->mm_lock);
Thierry Redingdf06b752014-06-26 21:41:53 +0200215 }
216free:
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100217 kfree(tegra);
218 return err;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000219}
220
Gabriel Krisman Bertazi11b3c202017-01-06 15:57:31 -0200221static void tegra_drm_unload(struct drm_device *drm)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000222{
Thierry Reding776dc382013-10-14 14:43:22 +0200223 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Redingdf06b752014-06-26 21:41:53 +0200224 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding776dc382013-10-14 14:43:22 +0200225 int err;
226
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000227 drm_kms_helper_poll_fini(drm);
228 tegra_drm_fb_exit(drm);
Thierry Redingf002abc2013-10-14 14:06:02 +0200229 drm_mode_config_cleanup(drm);
Thierry Reding4aa3df72014-11-24 16:27:13 +0100230 drm_vblank_cleanup(drm);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000231
Thierry Reding776dc382013-10-14 14:43:22 +0200232 err = host1x_device_exit(device);
233 if (err < 0)
Gabriel Krisman Bertazi11b3c202017-01-06 15:57:31 -0200234 return;
Thierry Reding776dc382013-10-14 14:43:22 +0200235
Thierry Redingdf06b752014-06-26 21:41:53 +0200236 if (tegra->domain) {
237 iommu_domain_free(tegra->domain);
238 drm_mm_takedown(&tegra->mm);
Thierry Reding347ad49d2017-03-09 20:04:56 +0100239 mutex_destroy(&tegra->mm_lock);
Thierry Redingdf06b752014-06-26 21:41:53 +0200240 }
241
Thierry Reding1053f4dd2014-11-04 16:17:55 +0100242 kfree(tegra);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000243}
244
245static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
246{
Thierry Reding08943e62013-09-26 16:08:18 +0200247 struct tegra_drm_file *fpriv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200248
249 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
250 if (!fpriv)
251 return -ENOMEM;
252
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100253 idr_init(&fpriv->contexts);
254 mutex_init(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200255 filp->driver_priv = fpriv;
256
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000257 return 0;
258}
259
Thierry Redingc88c3632013-09-26 16:08:22 +0200260static void tegra_drm_context_free(struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200261{
262 context->client->ops->close_channel(context);
263 kfree(context);
264}
265
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000266static void tegra_drm_lastclose(struct drm_device *drm)
267{
Archit Tanejab110ef32015-10-27 13:40:59 +0530268#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Reding386a2a72013-09-24 13:22:17 +0200269 struct tegra_drm *tegra = drm->dev_private;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000270
Thierry Reding386a2a72013-09-24 13:22:17 +0200271 tegra_fbdev_restore_mode(tegra->fbdev);
Thierry Reding60c2f702013-10-31 13:28:50 +0100272#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000273}
274
Thierry Redingc40f0f12013-10-10 11:00:33 +0200275static struct host1x_bo *
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100276host1x_bo_lookup(struct drm_file *file, u32 handle)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200277{
278 struct drm_gem_object *gem;
279 struct tegra_bo *bo;
280
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100281 gem = drm_gem_object_lookup(file, handle);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200282 if (!gem)
283 return NULL;
284
Daniel Vettera07cdfe2015-11-23 10:32:48 +0100285 drm_gem_object_unreference_unlocked(gem);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200286
287 bo = to_tegra_bo(gem);
288 return &bo->base;
289}
290
Thierry Reding961e3be2014-06-10 10:25:00 +0200291static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
292 struct drm_tegra_reloc __user *src,
293 struct drm_device *drm,
294 struct drm_file *file)
295{
296 u32 cmdbuf, target;
297 int err;
298
299 err = get_user(cmdbuf, &src->cmdbuf.handle);
300 if (err < 0)
301 return err;
302
303 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
304 if (err < 0)
305 return err;
306
307 err = get_user(target, &src->target.handle);
308 if (err < 0)
309 return err;
310
David Ung31f40f82015-01-20 18:37:35 -0800311 err = get_user(dest->target.offset, &src->target.offset);
Thierry Reding961e3be2014-06-10 10:25:00 +0200312 if (err < 0)
313 return err;
314
315 err = get_user(dest->shift, &src->shift);
316 if (err < 0)
317 return err;
318
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100319 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
Thierry Reding961e3be2014-06-10 10:25:00 +0200320 if (!dest->cmdbuf.bo)
321 return -ENOENT;
322
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100323 dest->target.bo = host1x_bo_lookup(file, target);
Thierry Reding961e3be2014-06-10 10:25:00 +0200324 if (!dest->target.bo)
325 return -ENOENT;
326
327 return 0;
328}
329
Thierry Redingc40f0f12013-10-10 11:00:33 +0200330int tegra_drm_submit(struct tegra_drm_context *context,
331 struct drm_tegra_submit *args, struct drm_device *drm,
332 struct drm_file *file)
333{
334 unsigned int num_cmdbufs = args->num_cmdbufs;
335 unsigned int num_relocs = args->num_relocs;
336 unsigned int num_waitchks = args->num_waitchks;
337 struct drm_tegra_cmdbuf __user *cmdbufs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100338 (void __user *)(uintptr_t)args->cmdbufs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200339 struct drm_tegra_reloc __user *relocs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100340 (void __user *)(uintptr_t)args->relocs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200341 struct drm_tegra_waitchk __user *waitchks =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100342 (void __user *)(uintptr_t)args->waitchks;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200343 struct drm_tegra_syncpt syncpt;
344 struct host1x_job *job;
345 int err;
346
347 /* We don't yet support other than one syncpt_incr struct per submit */
348 if (args->num_syncpts != 1)
349 return -EINVAL;
350
351 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
352 args->num_relocs, args->num_waitchks);
353 if (!job)
354 return -ENOMEM;
355
356 job->num_relocs = args->num_relocs;
357 job->num_waitchk = args->num_waitchks;
358 job->client = (u32)args->context;
359 job->class = context->client->base.class;
360 job->serialize = true;
361
362 while (num_cmdbufs) {
363 struct drm_tegra_cmdbuf cmdbuf;
364 struct host1x_bo *bo;
365
Dan Carpenter9a991602013-11-08 13:07:37 +0300366 if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
367 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200368 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300369 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200370
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100371 bo = host1x_bo_lookup(file, cmdbuf.handle);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200372 if (!bo) {
373 err = -ENOENT;
374 goto fail;
375 }
376
377 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
378 num_cmdbufs--;
379 cmdbufs++;
380 }
381
Thierry Reding961e3be2014-06-10 10:25:00 +0200382 /* copy and resolve relocations from submit */
Thierry Redingc40f0f12013-10-10 11:00:33 +0200383 while (num_relocs--) {
Thierry Reding961e3be2014-06-10 10:25:00 +0200384 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
385 &relocs[num_relocs], drm,
386 file);
387 if (err < 0)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200388 goto fail;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200389 }
390
Dan Carpenter9a991602013-11-08 13:07:37 +0300391 if (copy_from_user(job->waitchk, waitchks,
392 sizeof(*waitchks) * num_waitchks)) {
393 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200394 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300395 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200396
Dan Carpenter9a991602013-11-08 13:07:37 +0300397 if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
398 sizeof(syncpt))) {
399 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200400 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300401 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200402
403 job->is_addr_reg = context->client->ops->is_addr_reg;
404 job->syncpt_incrs = syncpt.incrs;
405 job->syncpt_id = syncpt.id;
406 job->timeout = 10000;
407
408 if (args->timeout && args->timeout < 10000)
409 job->timeout = args->timeout;
410
411 err = host1x_job_pin(job, context->client->base.dev);
412 if (err)
413 goto fail;
414
415 err = host1x_job_submit(job);
416 if (err)
417 goto fail_submit;
418
419 args->fence = job->syncpt_end;
420
421 host1x_job_put(job);
422 return 0;
423
424fail_submit:
425 host1x_job_unpin(job);
426fail:
427 host1x_job_put(job);
428 return err;
429}
430
431
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200432#ifdef CONFIG_DRM_TEGRA_STAGING
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100433static struct tegra_drm_context *
434tegra_drm_file_get_context(struct tegra_drm_file *file, u32 id)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200435{
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100436 struct tegra_drm_context *context;
Thierry Redingc88c3632013-09-26 16:08:22 +0200437
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100438 mutex_lock(&file->lock);
439 context = idr_find(&file->contexts, id);
440 mutex_unlock(&file->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200441
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100442 return context;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200443}
444
445static int tegra_gem_create(struct drm_device *drm, void *data,
446 struct drm_file *file)
447{
448 struct drm_tegra_gem_create *args = data;
449 struct tegra_bo *bo;
450
Thierry Reding773af772013-10-04 22:34:01 +0200451 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200452 &args->handle);
453 if (IS_ERR(bo))
454 return PTR_ERR(bo);
455
456 return 0;
457}
458
459static int tegra_gem_mmap(struct drm_device *drm, void *data,
460 struct drm_file *file)
461{
462 struct drm_tegra_gem_mmap *args = data;
463 struct drm_gem_object *gem;
464 struct tegra_bo *bo;
465
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100466 gem = drm_gem_object_lookup(file, args->handle);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200467 if (!gem)
468 return -EINVAL;
469
470 bo = to_tegra_bo(gem);
471
David Herrmann2bc7b0c2013-08-13 14:19:58 +0200472 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200473
Daniel Vetter11533302015-11-23 10:32:40 +0100474 drm_gem_object_unreference_unlocked(gem);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200475
476 return 0;
477}
478
479static int tegra_syncpt_read(struct drm_device *drm, void *data,
480 struct drm_file *file)
481{
Thierry Reding776dc382013-10-14 14:43:22 +0200482 struct host1x *host = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200483 struct drm_tegra_syncpt_read *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200484 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200485
Thierry Reding776dc382013-10-14 14:43:22 +0200486 sp = host1x_syncpt_get(host, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200487 if (!sp)
488 return -EINVAL;
489
490 args->value = host1x_syncpt_read_min(sp);
491 return 0;
492}
493
494static int tegra_syncpt_incr(struct drm_device *drm, void *data,
495 struct drm_file *file)
496{
Thierry Reding776dc382013-10-14 14:43:22 +0200497 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200498 struct drm_tegra_syncpt_incr *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200499 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200500
Thierry Reding776dc382013-10-14 14:43:22 +0200501 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200502 if (!sp)
503 return -EINVAL;
504
Arto Merilainenebae30b2013-05-29 13:26:08 +0300505 return host1x_syncpt_incr(sp);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200506}
507
508static int tegra_syncpt_wait(struct drm_device *drm, void *data,
509 struct drm_file *file)
510{
Thierry Reding776dc382013-10-14 14:43:22 +0200511 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200512 struct drm_tegra_syncpt_wait *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200513 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200514
Thierry Reding776dc382013-10-14 14:43:22 +0200515 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200516 if (!sp)
517 return -EINVAL;
518
519 return host1x_syncpt_wait(sp, args->thresh, args->timeout,
520 &args->value);
521}
522
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100523static int tegra_client_open(struct tegra_drm_file *fpriv,
524 struct tegra_drm_client *client,
525 struct tegra_drm_context *context)
526{
527 int err;
528
529 err = client->ops->open_channel(client, context);
530 if (err < 0)
531 return err;
532
533 err = idr_alloc(&fpriv->contexts, context, 0, 0, GFP_KERNEL);
534 if (err < 0) {
535 client->ops->close_channel(context);
536 return err;
537 }
538
539 context->client = client;
540 context->id = err;
541
542 return 0;
543}
544
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200545static int tegra_open_channel(struct drm_device *drm, void *data,
546 struct drm_file *file)
547{
Thierry Reding08943e62013-09-26 16:08:18 +0200548 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding386a2a72013-09-24 13:22:17 +0200549 struct tegra_drm *tegra = drm->dev_private;
550 struct drm_tegra_open_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200551 struct tegra_drm_context *context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200552 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200553 int err = -ENODEV;
554
555 context = kzalloc(sizeof(*context), GFP_KERNEL);
556 if (!context)
557 return -ENOMEM;
558
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100559 mutex_lock(&fpriv->lock);
560
Thierry Reding776dc382013-10-14 14:43:22 +0200561 list_for_each_entry(client, &tegra->clients, list)
Thierry Reding53fa7f72013-09-24 15:35:40 +0200562 if (client->base.class == args->client) {
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100563 err = tegra_client_open(fpriv, client, context);
564 if (err < 0)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200565 break;
566
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100567 args->context = context->id;
568 break;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200569 }
570
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100571 if (err < 0)
572 kfree(context);
573
574 mutex_unlock(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200575 return err;
576}
577
578static int tegra_close_channel(struct drm_device *drm, void *data,
579 struct drm_file *file)
580{
Thierry Reding08943e62013-09-26 16:08:18 +0200581 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding776dc382013-10-14 14:43:22 +0200582 struct drm_tegra_close_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200583 struct tegra_drm_context *context;
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100584 int err = 0;
Thierry Redingc88c3632013-09-26 16:08:22 +0200585
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100586 mutex_lock(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200587
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100588 context = tegra_drm_file_get_context(fpriv, args->context);
589 if (!context) {
590 err = -EINVAL;
591 goto unlock;
592 }
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200593
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100594 idr_remove(&fpriv->contexts, context->id);
Thierry Redingc88c3632013-09-26 16:08:22 +0200595 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200596
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100597unlock:
598 mutex_unlock(&fpriv->lock);
599 return err;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200600}
601
602static int tegra_get_syncpt(struct drm_device *drm, void *data,
603 struct drm_file *file)
604{
Thierry Reding08943e62013-09-26 16:08:18 +0200605 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200606 struct drm_tegra_get_syncpt *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200607 struct tegra_drm_context *context;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200608 struct host1x_syncpt *syncpt;
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100609 int err = 0;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200610
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100611 mutex_lock(&fpriv->lock);
Thierry Redingc88c3632013-09-26 16:08:22 +0200612
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100613 context = tegra_drm_file_get_context(fpriv, args->context);
614 if (!context) {
615 err = -ENODEV;
616 goto unlock;
617 }
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200618
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100619 if (args->index >= context->client->base.num_syncpts) {
620 err = -EINVAL;
621 goto unlock;
622 }
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200623
Thierry Reding53fa7f72013-09-24 15:35:40 +0200624 syncpt = context->client->base.syncpts[args->index];
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200625 args->id = host1x_syncpt_id(syncpt);
626
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100627unlock:
628 mutex_unlock(&fpriv->lock);
629 return err;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200630}
631
632static int tegra_submit(struct drm_device *drm, void *data,
633 struct drm_file *file)
634{
Thierry Reding08943e62013-09-26 16:08:18 +0200635 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200636 struct drm_tegra_submit *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200637 struct tegra_drm_context *context;
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100638 int err;
Thierry Redingc88c3632013-09-26 16:08:22 +0200639
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100640 mutex_lock(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200641
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100642 context = tegra_drm_file_get_context(fpriv, args->context);
643 if (!context) {
644 err = -ENODEV;
645 goto unlock;
646 }
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200647
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100648 err = context->client->ops->submit(context, args, drm, file);
649
650unlock:
651 mutex_unlock(&fpriv->lock);
652 return err;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200653}
Arto Merilainenc54a1692013-10-14 15:21:54 +0300654
655static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
656 struct drm_file *file)
657{
658 struct tegra_drm_file *fpriv = file->driver_priv;
659 struct drm_tegra_get_syncpt_base *args = data;
660 struct tegra_drm_context *context;
661 struct host1x_syncpt_base *base;
662 struct host1x_syncpt *syncpt;
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100663 int err = 0;
Arto Merilainenc54a1692013-10-14 15:21:54 +0300664
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100665 mutex_lock(&fpriv->lock);
Arto Merilainenc54a1692013-10-14 15:21:54 +0300666
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100667 context = tegra_drm_file_get_context(fpriv, args->context);
668 if (!context) {
669 err = -ENODEV;
670 goto unlock;
671 }
Arto Merilainenc54a1692013-10-14 15:21:54 +0300672
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100673 if (args->syncpt >= context->client->base.num_syncpts) {
674 err = -EINVAL;
675 goto unlock;
676 }
Arto Merilainenc54a1692013-10-14 15:21:54 +0300677
678 syncpt = context->client->base.syncpts[args->syncpt];
679
680 base = host1x_syncpt_get_base(syncpt);
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100681 if (!base) {
682 err = -ENXIO;
683 goto unlock;
684 }
Arto Merilainenc54a1692013-10-14 15:21:54 +0300685
686 args->id = host1x_syncpt_base_id(base);
687
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100688unlock:
689 mutex_unlock(&fpriv->lock);
690 return err;
Arto Merilainenc54a1692013-10-14 15:21:54 +0300691}
Thierry Reding7678d712014-06-03 14:56:57 +0200692
693static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
694 struct drm_file *file)
695{
696 struct drm_tegra_gem_set_tiling *args = data;
697 enum tegra_bo_tiling_mode mode;
698 struct drm_gem_object *gem;
699 unsigned long value = 0;
700 struct tegra_bo *bo;
701
702 switch (args->mode) {
703 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
704 mode = TEGRA_BO_TILING_MODE_PITCH;
705
706 if (args->value != 0)
707 return -EINVAL;
708
709 break;
710
711 case DRM_TEGRA_GEM_TILING_MODE_TILED:
712 mode = TEGRA_BO_TILING_MODE_TILED;
713
714 if (args->value != 0)
715 return -EINVAL;
716
717 break;
718
719 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
720 mode = TEGRA_BO_TILING_MODE_BLOCK;
721
722 if (args->value > 5)
723 return -EINVAL;
724
725 value = args->value;
726 break;
727
728 default:
729 return -EINVAL;
730 }
731
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100732 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7678d712014-06-03 14:56:57 +0200733 if (!gem)
734 return -ENOENT;
735
736 bo = to_tegra_bo(gem);
737
738 bo->tiling.mode = mode;
739 bo->tiling.value = value;
740
Daniel Vetter11533302015-11-23 10:32:40 +0100741 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200742
743 return 0;
744}
745
746static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
747 struct drm_file *file)
748{
749 struct drm_tegra_gem_get_tiling *args = data;
750 struct drm_gem_object *gem;
751 struct tegra_bo *bo;
752 int err = 0;
753
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100754 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7678d712014-06-03 14:56:57 +0200755 if (!gem)
756 return -ENOENT;
757
758 bo = to_tegra_bo(gem);
759
760 switch (bo->tiling.mode) {
761 case TEGRA_BO_TILING_MODE_PITCH:
762 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
763 args->value = 0;
764 break;
765
766 case TEGRA_BO_TILING_MODE_TILED:
767 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
768 args->value = 0;
769 break;
770
771 case TEGRA_BO_TILING_MODE_BLOCK:
772 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
773 args->value = bo->tiling.value;
774 break;
775
776 default:
777 err = -EINVAL;
778 break;
779 }
780
Daniel Vetter11533302015-11-23 10:32:40 +0100781 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200782
783 return err;
784}
Thierry Reding7b129082014-06-10 12:04:03 +0200785
786static int tegra_gem_set_flags(struct drm_device *drm, void *data,
787 struct drm_file *file)
788{
789 struct drm_tegra_gem_set_flags *args = data;
790 struct drm_gem_object *gem;
791 struct tegra_bo *bo;
792
793 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
794 return -EINVAL;
795
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100796 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7b129082014-06-10 12:04:03 +0200797 if (!gem)
798 return -ENOENT;
799
800 bo = to_tegra_bo(gem);
801 bo->flags = 0;
802
803 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
804 bo->flags |= TEGRA_BO_BOTTOM_UP;
805
Daniel Vetter11533302015-11-23 10:32:40 +0100806 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200807
808 return 0;
809}
810
811static int tegra_gem_get_flags(struct drm_device *drm, void *data,
812 struct drm_file *file)
813{
814 struct drm_tegra_gem_get_flags *args = data;
815 struct drm_gem_object *gem;
816 struct tegra_bo *bo;
817
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100818 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7b129082014-06-10 12:04:03 +0200819 if (!gem)
820 return -ENOENT;
821
822 bo = to_tegra_bo(gem);
823 args->flags = 0;
824
825 if (bo->flags & TEGRA_BO_BOTTOM_UP)
826 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
827
Daniel Vetter11533302015-11-23 10:32:40 +0100828 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200829
830 return 0;
831}
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200832#endif
833
Rob Clarkbaa70942013-08-02 13:27:49 -0400834static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200835#ifdef CONFIG_DRM_TEGRA_STAGING
Daniel Vetterf8c47142015-09-08 13:56:30 +0200836 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0),
837 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0),
838 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0),
839 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0),
840 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0),
841 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0),
842 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0),
843 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0),
844 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0),
845 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0),
846 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0),
847 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0),
848 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0),
849 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0),
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200850#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000851};
852
853static const struct file_operations tegra_drm_fops = {
854 .owner = THIS_MODULE,
855 .open = drm_open,
856 .release = drm_release,
857 .unlocked_ioctl = drm_ioctl,
Arto Merilainende2ba662013-03-22 16:34:08 +0200858 .mmap = tegra_drm_mmap,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000859 .poll = drm_poll,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000860 .read = drm_read,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000861 .compat_ioctl = drm_compat_ioctl,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000862 .llseek = noop_llseek,
863};
864
Thierry Reding88e72712015-09-24 18:35:31 +0200865static u32 tegra_drm_get_vblank_counter(struct drm_device *drm,
866 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100867{
Shawn Guo75bcb052017-01-09 19:25:44 +0800868 struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
Thierry Reding42e9ce02015-01-28 14:43:05 +0100869 struct tegra_dc *dc = to_tegra_dc(crtc);
Thierry Redinged7dae52014-12-16 16:03:13 +0100870
871 if (!crtc)
872 return 0;
873
Thierry Reding42e9ce02015-01-28 14:43:05 +0100874 return tegra_dc_get_vblank_counter(dc);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100875}
876
Thierry Reding88e72712015-09-24 18:35:31 +0200877static int tegra_drm_enable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100878{
Shawn Guo75bcb052017-01-09 19:25:44 +0800879 struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100880 struct tegra_dc *dc = to_tegra_dc(crtc);
881
882 if (!crtc)
883 return -ENODEV;
884
885 tegra_dc_enable_vblank(dc);
886
887 return 0;
888}
889
Thierry Reding88e72712015-09-24 18:35:31 +0200890static void tegra_drm_disable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100891{
Shawn Guo75bcb052017-01-09 19:25:44 +0800892 struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100893 struct tegra_dc *dc = to_tegra_dc(crtc);
894
895 if (crtc)
896 tegra_dc_disable_vblank(dc);
897}
898
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100899static int tegra_drm_context_cleanup(int id, void *p, void *data)
900{
901 struct tegra_drm_context *context = p;
902
903 tegra_drm_context_free(context);
904
905 return 0;
906}
907
Thierry Reding3c03c462012-11-28 12:00:18 +0100908static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
909{
Thierry Reding08943e62013-09-26 16:08:18 +0200910 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding3c03c462012-11-28 12:00:18 +0100911
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100912 mutex_lock(&fpriv->lock);
913 idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
914 mutex_unlock(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200915
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100916 idr_destroy(&fpriv->contexts);
917 mutex_destroy(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200918 kfree(fpriv);
Thierry Reding3c03c462012-11-28 12:00:18 +0100919}
920
Thierry Redinge450fcc2013-02-13 16:13:16 +0100921#ifdef CONFIG_DEBUG_FS
922static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
923{
924 struct drm_info_node *node = (struct drm_info_node *)s->private;
925 struct drm_device *drm = node->minor->dev;
926 struct drm_framebuffer *fb;
927
928 mutex_lock(&drm->mode_config.fb_lock);
929
930 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
931 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
Ville Syrjäläb00c6002016-12-14 23:31:35 +0200932 fb->base.id, fb->width, fb->height,
933 fb->format->depth,
Ville Syrjälä272725c2016-12-14 23:32:20 +0200934 fb->format->cpp[0] * 8,
Dave Airlie747a5982016-04-15 15:10:35 +1000935 drm_framebuffer_read_refcount(fb));
Thierry Redinge450fcc2013-02-13 16:13:16 +0100936 }
937
938 mutex_unlock(&drm->mode_config.fb_lock);
939
940 return 0;
941}
942
Thierry Reding28c23372015-01-23 09:16:03 +0100943static int tegra_debugfs_iova(struct seq_file *s, void *data)
944{
945 struct drm_info_node *node = (struct drm_info_node *)s->private;
946 struct drm_device *drm = node->minor->dev;
947 struct tegra_drm *tegra = drm->dev_private;
Daniel Vetterb5c37142016-12-29 12:09:24 +0100948 struct drm_printer p = drm_seq_file_printer(s);
Thierry Reding28c23372015-01-23 09:16:03 +0100949
Thierry Reding347ad49d2017-03-09 20:04:56 +0100950 mutex_lock(&tegra->mm_lock);
Daniel Vetterb5c37142016-12-29 12:09:24 +0100951 drm_mm_print(&tegra->mm, &p);
Thierry Reding347ad49d2017-03-09 20:04:56 +0100952 mutex_unlock(&tegra->mm_lock);
Daniel Vetterb5c37142016-12-29 12:09:24 +0100953
954 return 0;
Thierry Reding28c23372015-01-23 09:16:03 +0100955}
956
Thierry Redinge450fcc2013-02-13 16:13:16 +0100957static struct drm_info_list tegra_debugfs_list[] = {
958 { "framebuffers", tegra_debugfs_framebuffers, 0 },
Thierry Reding28c23372015-01-23 09:16:03 +0100959 { "iova", tegra_debugfs_iova, 0 },
Thierry Redinge450fcc2013-02-13 16:13:16 +0100960};
961
962static int tegra_debugfs_init(struct drm_minor *minor)
963{
964 return drm_debugfs_create_files(tegra_debugfs_list,
965 ARRAY_SIZE(tegra_debugfs_list),
966 minor->debugfs_root, minor);
967}
Thierry Redinge450fcc2013-02-13 16:13:16 +0100968#endif
969
Thierry Reding9b57f5f2013-11-08 13:17:14 +0100970static struct drm_driver tegra_drm_driver = {
Thierry Redingad906592015-09-24 18:38:09 +0200971 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
972 DRIVER_ATOMIC,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000973 .load = tegra_drm_load,
974 .unload = tegra_drm_unload,
975 .open = tegra_drm_open,
Thierry Reding3c03c462012-11-28 12:00:18 +0100976 .preclose = tegra_drm_preclose,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000977 .lastclose = tegra_drm_lastclose,
978
Thierry Reding6e5ff992012-11-28 11:45:47 +0100979 .get_vblank_counter = tegra_drm_get_vblank_counter,
980 .enable_vblank = tegra_drm_enable_vblank,
981 .disable_vblank = tegra_drm_disable_vblank,
982
Thierry Redinge450fcc2013-02-13 16:13:16 +0100983#if defined(CONFIG_DEBUG_FS)
984 .debugfs_init = tegra_debugfs_init,
Thierry Redinge450fcc2013-02-13 16:13:16 +0100985#endif
986
Daniel Vetter1ddbdbd2016-04-26 19:30:00 +0200987 .gem_free_object_unlocked = tegra_bo_free_object,
Arto Merilainende2ba662013-03-22 16:34:08 +0200988 .gem_vm_ops = &tegra_bo_vm_ops,
Thierry Reding38003912013-12-12 10:00:43 +0100989
990 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
991 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
992 .gem_prime_export = tegra_gem_prime_export,
993 .gem_prime_import = tegra_gem_prime_import,
994
Arto Merilainende2ba662013-03-22 16:34:08 +0200995 .dumb_create = tegra_bo_dumb_create,
996 .dumb_map_offset = tegra_bo_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200997 .dumb_destroy = drm_gem_dumb_destroy,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000998
999 .ioctls = tegra_drm_ioctls,
1000 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
1001 .fops = &tegra_drm_fops,
1002
1003 .name = DRIVER_NAME,
1004 .desc = DRIVER_DESC,
1005 .date = DRIVER_DATE,
1006 .major = DRIVER_MAJOR,
1007 .minor = DRIVER_MINOR,
1008 .patchlevel = DRIVER_PATCHLEVEL,
1009};
Thierry Reding776dc382013-10-14 14:43:22 +02001010
1011int tegra_drm_register_client(struct tegra_drm *tegra,
1012 struct tegra_drm_client *client)
1013{
1014 mutex_lock(&tegra->clients_lock);
1015 list_add_tail(&client->list, &tegra->clients);
1016 mutex_unlock(&tegra->clients_lock);
1017
1018 return 0;
1019}
1020
1021int tegra_drm_unregister_client(struct tegra_drm *tegra,
1022 struct tegra_drm_client *client)
1023{
1024 mutex_lock(&tegra->clients_lock);
1025 list_del_init(&client->list);
1026 mutex_unlock(&tegra->clients_lock);
1027
1028 return 0;
1029}
1030
Thierry Reding9910f5c2014-05-22 09:57:15 +02001031static int host1x_drm_probe(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +02001032{
Thierry Reding9910f5c2014-05-22 09:57:15 +02001033 struct drm_driver *driver = &tegra_drm_driver;
1034 struct drm_device *drm;
1035 int err;
1036
1037 drm = drm_dev_alloc(driver, &dev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +02001038 if (IS_ERR(drm))
1039 return PTR_ERR(drm);
Thierry Reding9910f5c2014-05-22 09:57:15 +02001040
Thierry Reding9910f5c2014-05-22 09:57:15 +02001041 dev_set_drvdata(&dev->dev, drm);
1042
1043 err = drm_dev_register(drm, 0);
1044 if (err < 0)
1045 goto unref;
1046
Thierry Reding9910f5c2014-05-22 09:57:15 +02001047 return 0;
1048
1049unref:
1050 drm_dev_unref(drm);
1051 return err;
Thierry Reding776dc382013-10-14 14:43:22 +02001052}
1053
Thierry Reding9910f5c2014-05-22 09:57:15 +02001054static int host1x_drm_remove(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +02001055{
Thierry Reding9910f5c2014-05-22 09:57:15 +02001056 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1057
1058 drm_dev_unregister(drm);
1059 drm_dev_unref(drm);
Thierry Reding776dc382013-10-14 14:43:22 +02001060
1061 return 0;
1062}
1063
Thierry Reding359ae682014-12-18 17:15:25 +01001064#ifdef CONFIG_PM_SLEEP
1065static int host1x_drm_suspend(struct device *dev)
1066{
1067 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001068 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001069
1070 drm_kms_helper_poll_disable(drm);
Thierry Reding986c58d2015-08-11 13:11:49 +02001071 tegra_drm_fb_suspend(drm);
1072
1073 tegra->state = drm_atomic_helper_suspend(drm);
1074 if (IS_ERR(tegra->state)) {
1075 tegra_drm_fb_resume(drm);
1076 drm_kms_helper_poll_enable(drm);
1077 return PTR_ERR(tegra->state);
1078 }
Thierry Reding359ae682014-12-18 17:15:25 +01001079
1080 return 0;
1081}
1082
1083static int host1x_drm_resume(struct device *dev)
1084{
1085 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001086 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001087
Thierry Reding986c58d2015-08-11 13:11:49 +02001088 drm_atomic_helper_resume(drm, tegra->state);
1089 tegra_drm_fb_resume(drm);
Thierry Reding359ae682014-12-18 17:15:25 +01001090 drm_kms_helper_poll_enable(drm);
1091
1092 return 0;
1093}
1094#endif
1095
Thierry Redinga13f1dc2015-08-11 13:22:44 +02001096static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1097 host1x_drm_resume);
Thierry Reding359ae682014-12-18 17:15:25 +01001098
Thierry Reding776dc382013-10-14 14:43:22 +02001099static const struct of_device_id host1x_drm_subdevs[] = {
1100 { .compatible = "nvidia,tegra20-dc", },
1101 { .compatible = "nvidia,tegra20-hdmi", },
1102 { .compatible = "nvidia,tegra20-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001103 { .compatible = "nvidia,tegra20-gr3d", },
Thierry Reding776dc382013-10-14 14:43:22 +02001104 { .compatible = "nvidia,tegra30-dc", },
1105 { .compatible = "nvidia,tegra30-hdmi", },
1106 { .compatible = "nvidia,tegra30-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001107 { .compatible = "nvidia,tegra30-gr3d", },
Thierry Redingdec72732013-09-03 08:45:46 +02001108 { .compatible = "nvidia,tegra114-dsi", },
Mikko Perttunen7d1d28a2013-09-30 16:54:47 +02001109 { .compatible = "nvidia,tegra114-hdmi", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001110 { .compatible = "nvidia,tegra114-gr3d", },
Thierry Reding8620fc62013-12-12 11:03:59 +01001111 { .compatible = "nvidia,tegra124-dc", },
Thierry Reding6b6b6042013-11-15 16:06:05 +01001112 { .compatible = "nvidia,tegra124-sor", },
Thierry Redingfb7be702013-11-15 16:07:32 +01001113 { .compatible = "nvidia,tegra124-hdmi", },
Thierry Reding7d338582015-04-10 11:35:21 +02001114 { .compatible = "nvidia,tegra124-dsi", },
Thierry Redingc06c7932015-04-10 11:35:21 +02001115 { .compatible = "nvidia,tegra132-dsi", },
Thierry Reding5b4f5162015-03-27 10:31:58 +01001116 { .compatible = "nvidia,tegra210-dc", },
Thierry Redingddfb4062015-04-08 16:56:22 +02001117 { .compatible = "nvidia,tegra210-dsi", },
Thierry Reding3309ac82015-07-30 10:32:46 +02001118 { .compatible = "nvidia,tegra210-sor", },
Thierry Reding459cc2c2015-07-30 10:34:24 +02001119 { .compatible = "nvidia,tegra210-sor1", },
Thierry Reding776dc382013-10-14 14:43:22 +02001120 { /* sentinel */ }
1121};
1122
1123static struct host1x_driver host1x_drm_driver = {
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001124 .driver = {
1125 .name = "drm",
Thierry Reding359ae682014-12-18 17:15:25 +01001126 .pm = &host1x_drm_pm_ops,
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001127 },
Thierry Reding776dc382013-10-14 14:43:22 +02001128 .probe = host1x_drm_probe,
1129 .remove = host1x_drm_remove,
1130 .subdevs = host1x_drm_subdevs,
1131};
1132
Thierry Reding473112e2015-09-10 16:07:14 +02001133static struct platform_driver * const drivers[] = {
1134 &tegra_dc_driver,
1135 &tegra_hdmi_driver,
1136 &tegra_dsi_driver,
1137 &tegra_dpaux_driver,
1138 &tegra_sor_driver,
1139 &tegra_gr2d_driver,
1140 &tegra_gr3d_driver,
1141};
1142
Thierry Reding776dc382013-10-14 14:43:22 +02001143static int __init host1x_drm_init(void)
1144{
1145 int err;
1146
1147 err = host1x_driver_register(&host1x_drm_driver);
1148 if (err < 0)
1149 return err;
1150
Thierry Reding473112e2015-09-10 16:07:14 +02001151 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001152 if (err < 0)
1153 goto unregister_host1x;
1154
Thierry Reding776dc382013-10-14 14:43:22 +02001155 return 0;
1156
Thierry Reding776dc382013-10-14 14:43:22 +02001157unregister_host1x:
1158 host1x_driver_unregister(&host1x_drm_driver);
1159 return err;
1160}
1161module_init(host1x_drm_init);
1162
1163static void __exit host1x_drm_exit(void)
1164{
Thierry Reding473112e2015-09-10 16:07:14 +02001165 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001166 host1x_driver_unregister(&host1x_drm_driver);
1167}
1168module_exit(host1x_drm_exit);
1169
1170MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1171MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1172MODULE_LICENSE("GPL v2");