Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1 | /* QLogic qed NIC Driver |
Mintz, Yuval | e8f1cb5 | 2017-01-01 13:57:00 +0200 | [diff] [blame] | 2 | * Copyright (c) 2015-2017 QLogic Corporation |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 3 | * |
Mintz, Yuval | e8f1cb5 | 2017-01-01 13:57:00 +0200 | [diff] [blame] | 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and /or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 31 | */ |
| 32 | |
| 33 | #ifndef __ISCSI_COMMON__ |
| 34 | #define __ISCSI_COMMON__ |
| 35 | /**********************/ |
| 36 | /* ISCSI FW CONSTANTS */ |
| 37 | /**********************/ |
| 38 | |
| 39 | /* iSCSI HSI constants */ |
| 40 | #define ISCSI_DEFAULT_MTU (1500) |
| 41 | |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 42 | /* KWQ (kernel work queue) layer codes */ |
| 43 | #define ISCSI_SLOW_PATH_LAYER_CODE (6) |
| 44 | |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 45 | /* iSCSI parameter defaults */ |
| 46 | #define ISCSI_DEFAULT_HEADER_DIGEST (0) |
| 47 | #define ISCSI_DEFAULT_DATA_DIGEST (0) |
| 48 | #define ISCSI_DEFAULT_INITIAL_R2T (1) |
| 49 | #define ISCSI_DEFAULT_IMMEDIATE_DATA (1) |
| 50 | #define ISCSI_DEFAULT_MAX_PDU_LENGTH (0x2000) |
| 51 | #define ISCSI_DEFAULT_FIRST_BURST_LENGTH (0x10000) |
| 52 | #define ISCSI_DEFAULT_MAX_BURST_LENGTH (0x40000) |
| 53 | #define ISCSI_DEFAULT_MAX_OUTSTANDING_R2T (1) |
| 54 | |
| 55 | /* iSCSI parameter limits */ |
| 56 | #define ISCSI_MIN_VAL_MAX_PDU_LENGTH (0x200) |
| 57 | #define ISCSI_MAX_VAL_MAX_PDU_LENGTH (0xffffff) |
| 58 | #define ISCSI_MIN_VAL_BURST_LENGTH (0x200) |
| 59 | #define ISCSI_MAX_VAL_BURST_LENGTH (0xffffff) |
| 60 | #define ISCSI_MIN_VAL_MAX_OUTSTANDING_R2T (1) |
| 61 | #define ISCSI_MAX_VAL_MAX_OUTSTANDING_R2T (0xff) |
| 62 | |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 63 | #define ISCSI_AHS_CNTL_SIZE 4 |
| 64 | |
| 65 | #define ISCSI_WQE_NUM_SGES_SLOWIO (0xf) |
| 66 | |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 67 | /* iSCSI reserved params */ |
| 68 | #define ISCSI_ITT_ALL_ONES (0xffffffff) |
| 69 | #define ISCSI_TTT_ALL_ONES (0xffffffff) |
| 70 | |
| 71 | #define ISCSI_OPTION_1_OFF_CHIP_TCP 1 |
| 72 | #define ISCSI_OPTION_2_ON_CHIP_TCP 2 |
| 73 | |
| 74 | #define ISCSI_INITIATOR_MODE 0 |
| 75 | #define ISCSI_TARGET_MODE 1 |
| 76 | |
| 77 | /* iSCSI request op codes */ |
| 78 | #define ISCSI_OPCODE_NOP_OUT_NO_IMM (0) |
| 79 | #define ISCSI_OPCODE_NOP_OUT ( \ |
| 80 | ISCSI_OPCODE_NOP_OUT_NO_IMM | 0x40) |
| 81 | #define ISCSI_OPCODE_SCSI_CMD_NO_IMM (1) |
| 82 | #define ISCSI_OPCODE_SCSI_CMD ( \ |
| 83 | ISCSI_OPCODE_SCSI_CMD_NO_IMM | 0x40) |
| 84 | #define ISCSI_OPCODE_TMF_REQUEST_NO_IMM (2) |
| 85 | #define ISCSI_OPCODE_TMF_REQUEST ( \ |
| 86 | ISCSI_OPCODE_TMF_REQUEST_NO_IMM | 0x40) |
| 87 | #define ISCSI_OPCODE_LOGIN_REQUEST_NO_IMM (3) |
| 88 | #define ISCSI_OPCODE_LOGIN_REQUEST ( \ |
| 89 | ISCSI_OPCODE_LOGIN_REQUEST_NO_IMM | 0x40) |
| 90 | #define ISCSI_OPCODE_TEXT_REQUEST_NO_IMM (4) |
| 91 | #define ISCSI_OPCODE_TEXT_REQUEST ( \ |
| 92 | ISCSI_OPCODE_TEXT_REQUEST_NO_IMM | 0x40) |
| 93 | #define ISCSI_OPCODE_DATA_OUT (5) |
| 94 | #define ISCSI_OPCODE_LOGOUT_REQUEST_NO_IMM (6) |
| 95 | #define ISCSI_OPCODE_LOGOUT_REQUEST ( \ |
| 96 | ISCSI_OPCODE_LOGOUT_REQUEST_NO_IMM | 0x40) |
| 97 | |
| 98 | /* iSCSI response/messages op codes */ |
| 99 | #define ISCSI_OPCODE_NOP_IN (0x20) |
| 100 | #define ISCSI_OPCODE_SCSI_RESPONSE (0x21) |
| 101 | #define ISCSI_OPCODE_TMF_RESPONSE (0x22) |
| 102 | #define ISCSI_OPCODE_LOGIN_RESPONSE (0x23) |
| 103 | #define ISCSI_OPCODE_TEXT_RESPONSE (0x24) |
| 104 | #define ISCSI_OPCODE_DATA_IN (0x25) |
| 105 | #define ISCSI_OPCODE_LOGOUT_RESPONSE (0x26) |
| 106 | #define ISCSI_OPCODE_R2T (0x31) |
| 107 | #define ISCSI_OPCODE_ASYNC_MSG (0x32) |
| 108 | #define ISCSI_OPCODE_REJECT (0x3f) |
| 109 | |
| 110 | /* iSCSI stages */ |
| 111 | #define ISCSI_STAGE_SECURITY_NEGOTIATION (0) |
| 112 | #define ISCSI_STAGE_LOGIN_OPERATIONAL_NEGOTIATION (1) |
| 113 | #define ISCSI_STAGE_FULL_FEATURE_PHASE (3) |
| 114 | |
| 115 | /* iSCSI CQE errors */ |
| 116 | #define CQE_ERROR_BITMAP_DATA_DIGEST (0x08) |
| 117 | #define CQE_ERROR_BITMAP_RCV_ON_INVALID_CONN (0x10) |
| 118 | #define CQE_ERROR_BITMAP_DATA_TRUNCATED (0x20) |
| 119 | |
| 120 | struct cqe_error_bitmap { |
| 121 | u8 cqe_error_status_bits; |
| 122 | #define CQE_ERROR_BITMAP_DIF_ERR_BITS_MASK 0x7 |
| 123 | #define CQE_ERROR_BITMAP_DIF_ERR_BITS_SHIFT 0 |
| 124 | #define CQE_ERROR_BITMAP_DATA_DIGEST_ERR_MASK 0x1 |
| 125 | #define CQE_ERROR_BITMAP_DATA_DIGEST_ERR_SHIFT 3 |
| 126 | #define CQE_ERROR_BITMAP_RCV_ON_INVALID_CONN_MASK 0x1 |
| 127 | #define CQE_ERROR_BITMAP_RCV_ON_INVALID_CONN_SHIFT 4 |
| 128 | #define CQE_ERROR_BITMAP_DATA_TRUNCATED_ERR_MASK 0x1 |
| 129 | #define CQE_ERROR_BITMAP_DATA_TRUNCATED_ERR_SHIFT 5 |
| 130 | #define CQE_ERROR_BITMAP_UNDER_RUN_ERR_MASK 0x1 |
| 131 | #define CQE_ERROR_BITMAP_UNDER_RUN_ERR_SHIFT 6 |
| 132 | #define CQE_ERROR_BITMAP_RESERVED2_MASK 0x1 |
| 133 | #define CQE_ERROR_BITMAP_RESERVED2_SHIFT 7 |
| 134 | }; |
| 135 | |
| 136 | union cqe_error_status { |
| 137 | u8 error_status; |
| 138 | struct cqe_error_bitmap error_bits; |
| 139 | }; |
| 140 | |
| 141 | struct data_hdr { |
| 142 | __le32 data[12]; |
| 143 | }; |
| 144 | |
| 145 | struct iscsi_async_msg_hdr { |
| 146 | __le16 reserved0; |
| 147 | u8 flags_attr; |
| 148 | #define ISCSI_ASYNC_MSG_HDR_RSRV_MASK 0x7F |
| 149 | #define ISCSI_ASYNC_MSG_HDR_RSRV_SHIFT 0 |
| 150 | #define ISCSI_ASYNC_MSG_HDR_CONST1_MASK 0x1 |
| 151 | #define ISCSI_ASYNC_MSG_HDR_CONST1_SHIFT 7 |
| 152 | u8 opcode; |
| 153 | __le32 hdr_second_dword; |
| 154 | #define ISCSI_ASYNC_MSG_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 155 | #define ISCSI_ASYNC_MSG_HDR_DATA_SEG_LEN_SHIFT 0 |
| 156 | #define ISCSI_ASYNC_MSG_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 157 | #define ISCSI_ASYNC_MSG_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 158 | struct regpair lun; |
| 159 | __le32 all_ones; |
| 160 | __le32 reserved1; |
| 161 | __le32 stat_sn; |
| 162 | __le32 exp_cmd_sn; |
| 163 | __le32 max_cmd_sn; |
| 164 | __le16 param1_rsrv; |
| 165 | u8 async_vcode; |
| 166 | u8 async_event; |
| 167 | __le16 param3_rsrv; |
| 168 | __le16 param2_rsrv; |
| 169 | __le32 reserved7; |
| 170 | }; |
| 171 | |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 172 | struct iscsi_cmd_hdr { |
| 173 | __le16 reserved1; |
| 174 | u8 flags_attr; |
| 175 | #define ISCSI_CMD_HDR_ATTR_MASK 0x7 |
| 176 | #define ISCSI_CMD_HDR_ATTR_SHIFT 0 |
| 177 | #define ISCSI_CMD_HDR_RSRV_MASK 0x3 |
| 178 | #define ISCSI_CMD_HDR_RSRV_SHIFT 3 |
| 179 | #define ISCSI_CMD_HDR_WRITE_MASK 0x1 |
| 180 | #define ISCSI_CMD_HDR_WRITE_SHIFT 5 |
| 181 | #define ISCSI_CMD_HDR_READ_MASK 0x1 |
| 182 | #define ISCSI_CMD_HDR_READ_SHIFT 6 |
| 183 | #define ISCSI_CMD_HDR_FINAL_MASK 0x1 |
| 184 | #define ISCSI_CMD_HDR_FINAL_SHIFT 7 |
| 185 | u8 opcode; |
| 186 | __le32 hdr_second_dword; |
| 187 | #define ISCSI_CMD_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 188 | #define ISCSI_CMD_HDR_DATA_SEG_LEN_SHIFT 0 |
| 189 | #define ISCSI_CMD_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 190 | #define ISCSI_CMD_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 191 | struct regpair lun; |
| 192 | __le32 itt; |
| 193 | __le32 expected_transfer_length; |
| 194 | __le32 cmd_sn; |
| 195 | __le32 exp_stat_sn; |
| 196 | __le32 cdb[4]; |
| 197 | }; |
| 198 | |
| 199 | struct iscsi_common_hdr { |
| 200 | u8 hdr_status; |
| 201 | u8 hdr_response; |
| 202 | u8 hdr_flags; |
| 203 | u8 hdr_first_byte; |
| 204 | #define ISCSI_COMMON_HDR_OPCODE_MASK 0x3F |
| 205 | #define ISCSI_COMMON_HDR_OPCODE_SHIFT 0 |
| 206 | #define ISCSI_COMMON_HDR_IMM_MASK 0x1 |
| 207 | #define ISCSI_COMMON_HDR_IMM_SHIFT 6 |
| 208 | #define ISCSI_COMMON_HDR_RSRV_MASK 0x1 |
| 209 | #define ISCSI_COMMON_HDR_RSRV_SHIFT 7 |
| 210 | __le32 hdr_second_dword; |
| 211 | #define ISCSI_COMMON_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 212 | #define ISCSI_COMMON_HDR_DATA_SEG_LEN_SHIFT 0 |
| 213 | #define ISCSI_COMMON_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 214 | #define ISCSI_COMMON_HDR_TOTAL_AHS_LEN_SHIFT 24 |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 215 | struct regpair lun_reserved; |
| 216 | __le32 itt; |
| 217 | __le32 ttt; |
| 218 | __le32 cmdstat_sn; |
| 219 | __le32 exp_statcmd_sn; |
| 220 | __le32 max_cmd_sn; |
| 221 | __le32 data[3]; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 222 | }; |
| 223 | |
| 224 | struct iscsi_conn_offload_params { |
| 225 | struct regpair sq_pbl_addr; |
| 226 | struct regpair r2tq_pbl_addr; |
| 227 | struct regpair xhq_pbl_addr; |
| 228 | struct regpair uhq_pbl_addr; |
| 229 | __le32 initial_ack; |
| 230 | __le16 physical_q0; |
| 231 | __le16 physical_q1; |
| 232 | u8 flags; |
| 233 | #define ISCSI_CONN_OFFLOAD_PARAMS_TCP_ON_CHIP_1B_MASK 0x1 |
| 234 | #define ISCSI_CONN_OFFLOAD_PARAMS_TCP_ON_CHIP_1B_SHIFT 0 |
| 235 | #define ISCSI_CONN_OFFLOAD_PARAMS_TARGET_MODE_MASK 0x1 |
| 236 | #define ISCSI_CONN_OFFLOAD_PARAMS_TARGET_MODE_SHIFT 1 |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 237 | #define ISCSI_CONN_OFFLOAD_PARAMS_RESTRICTED_MODE_MASK 0x1 |
| 238 | #define ISCSI_CONN_OFFLOAD_PARAMS_RESTRICTED_MODE_SHIFT 2 |
| 239 | #define ISCSI_CONN_OFFLOAD_PARAMS_RESERVED1_MASK 0x1F |
| 240 | #define ISCSI_CONN_OFFLOAD_PARAMS_RESERVED1_SHIFT 3 |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 241 | u8 pbl_page_size_log; |
| 242 | u8 pbe_page_size_log; |
| 243 | u8 default_cq; |
| 244 | __le32 stat_sn; |
| 245 | }; |
| 246 | |
| 247 | struct iscsi_slow_path_hdr { |
| 248 | u8 op_code; |
| 249 | u8 flags; |
| 250 | #define ISCSI_SLOW_PATH_HDR_RESERVED0_MASK 0xF |
| 251 | #define ISCSI_SLOW_PATH_HDR_RESERVED0_SHIFT 0 |
| 252 | #define ISCSI_SLOW_PATH_HDR_LAYER_CODE_MASK 0x7 |
| 253 | #define ISCSI_SLOW_PATH_HDR_LAYER_CODE_SHIFT 4 |
| 254 | #define ISCSI_SLOW_PATH_HDR_RESERVED1_MASK 0x1 |
| 255 | #define ISCSI_SLOW_PATH_HDR_RESERVED1_SHIFT 7 |
| 256 | }; |
| 257 | |
| 258 | struct iscsi_conn_update_ramrod_params { |
| 259 | struct iscsi_slow_path_hdr hdr; |
| 260 | __le16 conn_id; |
| 261 | __le32 fw_cid; |
| 262 | u8 flags; |
| 263 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_HD_EN_MASK 0x1 |
| 264 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_HD_EN_SHIFT 0 |
| 265 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DD_EN_MASK 0x1 |
| 266 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DD_EN_SHIFT 1 |
| 267 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_INITIAL_R2T_MASK 0x1 |
| 268 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_INITIAL_R2T_SHIFT 2 |
| 269 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_IMMEDIATE_DATA_MASK 0x1 |
| 270 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_IMMEDIATE_DATA_SHIFT 3 |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 271 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DIF_BLOCK_SIZE_MASK 0x1 |
| 272 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DIF_BLOCK_SIZE_SHIFT 4 |
| 273 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DIF_ON_HOST_EN_MASK 0x1 |
| 274 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DIF_ON_HOST_EN_SHIFT 5 |
| 275 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_RESERVED1_MASK 0x3 |
| 276 | #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_RESERVED1_SHIFT 6 |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 277 | u8 reserved0[3]; |
| 278 | __le32 max_seq_size; |
| 279 | __le32 max_send_pdu_length; |
| 280 | __le32 max_recv_pdu_length; |
| 281 | __le32 first_seq_length; |
| 282 | __le32 exp_stat_sn; |
| 283 | }; |
| 284 | |
| 285 | struct iscsi_ext_cdb_cmd_hdr { |
| 286 | __le16 reserved1; |
| 287 | u8 flags_attr; |
| 288 | #define ISCSI_EXT_CDB_CMD_HDR_ATTR_MASK 0x7 |
| 289 | #define ISCSI_EXT_CDB_CMD_HDR_ATTR_SHIFT 0 |
| 290 | #define ISCSI_EXT_CDB_CMD_HDR_RSRV_MASK 0x3 |
| 291 | #define ISCSI_EXT_CDB_CMD_HDR_RSRV_SHIFT 3 |
| 292 | #define ISCSI_EXT_CDB_CMD_HDR_WRITE_MASK 0x1 |
| 293 | #define ISCSI_EXT_CDB_CMD_HDR_WRITE_SHIFT 5 |
| 294 | #define ISCSI_EXT_CDB_CMD_HDR_READ_MASK 0x1 |
| 295 | #define ISCSI_EXT_CDB_CMD_HDR_READ_SHIFT 6 |
| 296 | #define ISCSI_EXT_CDB_CMD_HDR_FINAL_MASK 0x1 |
| 297 | #define ISCSI_EXT_CDB_CMD_HDR_FINAL_SHIFT 7 |
| 298 | u8 opcode; |
| 299 | __le32 hdr_second_dword; |
| 300 | #define ISCSI_EXT_CDB_CMD_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 301 | #define ISCSI_EXT_CDB_CMD_HDR_DATA_SEG_LEN_SHIFT 0 |
| 302 | #define ISCSI_EXT_CDB_CMD_HDR_CDB_SIZE_MASK 0xFF |
| 303 | #define ISCSI_EXT_CDB_CMD_HDR_CDB_SIZE_SHIFT 24 |
| 304 | struct regpair lun; |
| 305 | __le32 itt; |
| 306 | __le32 expected_transfer_length; |
| 307 | __le32 cmd_sn; |
| 308 | __le32 exp_stat_sn; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 309 | struct scsi_sge cdb_sge; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 310 | }; |
| 311 | |
| 312 | struct iscsi_login_req_hdr { |
| 313 | u8 version_min; |
| 314 | u8 version_max; |
| 315 | u8 flags_attr; |
| 316 | #define ISCSI_LOGIN_REQ_HDR_NSG_MASK 0x3 |
| 317 | #define ISCSI_LOGIN_REQ_HDR_NSG_SHIFT 0 |
| 318 | #define ISCSI_LOGIN_REQ_HDR_CSG_MASK 0x3 |
| 319 | #define ISCSI_LOGIN_REQ_HDR_CSG_SHIFT 2 |
| 320 | #define ISCSI_LOGIN_REQ_HDR_RSRV_MASK 0x3 |
| 321 | #define ISCSI_LOGIN_REQ_HDR_RSRV_SHIFT 4 |
| 322 | #define ISCSI_LOGIN_REQ_HDR_C_MASK 0x1 |
| 323 | #define ISCSI_LOGIN_REQ_HDR_C_SHIFT 6 |
| 324 | #define ISCSI_LOGIN_REQ_HDR_T_MASK 0x1 |
| 325 | #define ISCSI_LOGIN_REQ_HDR_T_SHIFT 7 |
| 326 | u8 opcode; |
| 327 | __le32 hdr_second_dword; |
| 328 | #define ISCSI_LOGIN_REQ_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 329 | #define ISCSI_LOGIN_REQ_HDR_DATA_SEG_LEN_SHIFT 0 |
| 330 | #define ISCSI_LOGIN_REQ_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 331 | #define ISCSI_LOGIN_REQ_HDR_TOTAL_AHS_LEN_SHIFT 24 |
Yuval Mintz | 05fafbf | 2016-08-19 09:33:31 +0300 | [diff] [blame] | 332 | __le32 isid_tabc; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 333 | __le16 tsih; |
| 334 | __le16 isid_d; |
| 335 | __le32 itt; |
| 336 | __le16 reserved1; |
| 337 | __le16 cid; |
| 338 | __le32 cmd_sn; |
| 339 | __le32 exp_stat_sn; |
| 340 | __le32 reserved2[4]; |
| 341 | }; |
| 342 | |
| 343 | struct iscsi_logout_req_hdr { |
| 344 | __le16 reserved0; |
| 345 | u8 reason_code; |
| 346 | u8 opcode; |
| 347 | __le32 reserved1; |
| 348 | __le32 reserved2[2]; |
| 349 | __le32 itt; |
| 350 | __le16 reserved3; |
| 351 | __le16 cid; |
| 352 | __le32 cmd_sn; |
| 353 | __le32 exp_stat_sn; |
| 354 | __le32 reserved4[4]; |
| 355 | }; |
| 356 | |
| 357 | struct iscsi_data_out_hdr { |
| 358 | __le16 reserved1; |
| 359 | u8 flags_attr; |
| 360 | #define ISCSI_DATA_OUT_HDR_RSRV_MASK 0x7F |
| 361 | #define ISCSI_DATA_OUT_HDR_RSRV_SHIFT 0 |
| 362 | #define ISCSI_DATA_OUT_HDR_FINAL_MASK 0x1 |
| 363 | #define ISCSI_DATA_OUT_HDR_FINAL_SHIFT 7 |
| 364 | u8 opcode; |
| 365 | __le32 reserved2; |
| 366 | struct regpair lun; |
| 367 | __le32 itt; |
| 368 | __le32 ttt; |
| 369 | __le32 reserved3; |
| 370 | __le32 exp_stat_sn; |
| 371 | __le32 reserved4; |
| 372 | __le32 data_sn; |
| 373 | __le32 buffer_offset; |
| 374 | __le32 reserved5; |
| 375 | }; |
| 376 | |
| 377 | struct iscsi_data_in_hdr { |
| 378 | u8 status_rsvd; |
| 379 | u8 reserved1; |
| 380 | u8 flags; |
| 381 | #define ISCSI_DATA_IN_HDR_STATUS_MASK 0x1 |
| 382 | #define ISCSI_DATA_IN_HDR_STATUS_SHIFT 0 |
| 383 | #define ISCSI_DATA_IN_HDR_UNDERFLOW_MASK 0x1 |
| 384 | #define ISCSI_DATA_IN_HDR_UNDERFLOW_SHIFT 1 |
| 385 | #define ISCSI_DATA_IN_HDR_OVERFLOW_MASK 0x1 |
| 386 | #define ISCSI_DATA_IN_HDR_OVERFLOW_SHIFT 2 |
| 387 | #define ISCSI_DATA_IN_HDR_RSRV_MASK 0x7 |
| 388 | #define ISCSI_DATA_IN_HDR_RSRV_SHIFT 3 |
| 389 | #define ISCSI_DATA_IN_HDR_ACK_MASK 0x1 |
| 390 | #define ISCSI_DATA_IN_HDR_ACK_SHIFT 6 |
| 391 | #define ISCSI_DATA_IN_HDR_FINAL_MASK 0x1 |
| 392 | #define ISCSI_DATA_IN_HDR_FINAL_SHIFT 7 |
| 393 | u8 opcode; |
| 394 | __le32 reserved2; |
| 395 | struct regpair lun; |
| 396 | __le32 itt; |
| 397 | __le32 ttt; |
| 398 | __le32 stat_sn; |
| 399 | __le32 exp_cmd_sn; |
| 400 | __le32 max_cmd_sn; |
| 401 | __le32 data_sn; |
| 402 | __le32 buffer_offset; |
| 403 | __le32 residual_count; |
| 404 | }; |
| 405 | |
| 406 | struct iscsi_r2t_hdr { |
| 407 | u8 reserved0[3]; |
| 408 | u8 opcode; |
| 409 | __le32 reserved2; |
| 410 | struct regpair lun; |
| 411 | __le32 itt; |
| 412 | __le32 ttt; |
| 413 | __le32 stat_sn; |
| 414 | __le32 exp_cmd_sn; |
| 415 | __le32 max_cmd_sn; |
| 416 | __le32 r2t_sn; |
| 417 | __le32 buffer_offset; |
| 418 | __le32 desired_data_trns_len; |
| 419 | }; |
| 420 | |
| 421 | struct iscsi_nop_out_hdr { |
| 422 | __le16 reserved1; |
| 423 | u8 flags_attr; |
| 424 | #define ISCSI_NOP_OUT_HDR_RSRV_MASK 0x7F |
| 425 | #define ISCSI_NOP_OUT_HDR_RSRV_SHIFT 0 |
| 426 | #define ISCSI_NOP_OUT_HDR_CONST1_MASK 0x1 |
| 427 | #define ISCSI_NOP_OUT_HDR_CONST1_SHIFT 7 |
| 428 | u8 opcode; |
| 429 | __le32 reserved2; |
| 430 | struct regpair lun; |
| 431 | __le32 itt; |
| 432 | __le32 ttt; |
| 433 | __le32 cmd_sn; |
| 434 | __le32 exp_stat_sn; |
| 435 | __le32 reserved3; |
| 436 | __le32 reserved4; |
| 437 | __le32 reserved5; |
| 438 | __le32 reserved6; |
| 439 | }; |
| 440 | |
| 441 | struct iscsi_nop_in_hdr { |
| 442 | __le16 reserved0; |
| 443 | u8 flags_attr; |
| 444 | #define ISCSI_NOP_IN_HDR_RSRV_MASK 0x7F |
| 445 | #define ISCSI_NOP_IN_HDR_RSRV_SHIFT 0 |
| 446 | #define ISCSI_NOP_IN_HDR_CONST1_MASK 0x1 |
| 447 | #define ISCSI_NOP_IN_HDR_CONST1_SHIFT 7 |
| 448 | u8 opcode; |
| 449 | __le32 hdr_second_dword; |
| 450 | #define ISCSI_NOP_IN_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 451 | #define ISCSI_NOP_IN_HDR_DATA_SEG_LEN_SHIFT 0 |
| 452 | #define ISCSI_NOP_IN_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 453 | #define ISCSI_NOP_IN_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 454 | struct regpair lun; |
| 455 | __le32 itt; |
| 456 | __le32 ttt; |
| 457 | __le32 stat_sn; |
| 458 | __le32 exp_cmd_sn; |
| 459 | __le32 max_cmd_sn; |
| 460 | __le32 reserved5; |
| 461 | __le32 reserved6; |
| 462 | __le32 reserved7; |
| 463 | }; |
| 464 | |
| 465 | struct iscsi_login_response_hdr { |
| 466 | u8 version_active; |
| 467 | u8 version_max; |
| 468 | u8 flags_attr; |
| 469 | #define ISCSI_LOGIN_RESPONSE_HDR_NSG_MASK 0x3 |
| 470 | #define ISCSI_LOGIN_RESPONSE_HDR_NSG_SHIFT 0 |
| 471 | #define ISCSI_LOGIN_RESPONSE_HDR_CSG_MASK 0x3 |
| 472 | #define ISCSI_LOGIN_RESPONSE_HDR_CSG_SHIFT 2 |
| 473 | #define ISCSI_LOGIN_RESPONSE_HDR_RSRV_MASK 0x3 |
| 474 | #define ISCSI_LOGIN_RESPONSE_HDR_RSRV_SHIFT 4 |
| 475 | #define ISCSI_LOGIN_RESPONSE_HDR_C_MASK 0x1 |
| 476 | #define ISCSI_LOGIN_RESPONSE_HDR_C_SHIFT 6 |
| 477 | #define ISCSI_LOGIN_RESPONSE_HDR_T_MASK 0x1 |
| 478 | #define ISCSI_LOGIN_RESPONSE_HDR_T_SHIFT 7 |
| 479 | u8 opcode; |
| 480 | __le32 hdr_second_dword; |
| 481 | #define ISCSI_LOGIN_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 482 | #define ISCSI_LOGIN_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0 |
| 483 | #define ISCSI_LOGIN_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 484 | #define ISCSI_LOGIN_RESPONSE_HDR_TOTAL_AHS_LEN_SHIFT 24 |
Yuval Mintz | 05fafbf | 2016-08-19 09:33:31 +0300 | [diff] [blame] | 485 | __le32 isid_tabc; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 486 | __le16 tsih; |
| 487 | __le16 isid_d; |
| 488 | __le32 itt; |
| 489 | __le32 reserved1; |
| 490 | __le32 stat_sn; |
| 491 | __le32 exp_cmd_sn; |
| 492 | __le32 max_cmd_sn; |
| 493 | __le16 reserved2; |
| 494 | u8 status_detail; |
| 495 | u8 status_class; |
| 496 | __le32 reserved4[2]; |
| 497 | }; |
| 498 | |
| 499 | struct iscsi_logout_response_hdr { |
| 500 | u8 reserved1; |
| 501 | u8 response; |
| 502 | u8 flags; |
| 503 | u8 opcode; |
| 504 | __le32 hdr_second_dword; |
| 505 | #define ISCSI_LOGOUT_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 506 | #define ISCSI_LOGOUT_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0 |
| 507 | #define ISCSI_LOGOUT_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 508 | #define ISCSI_LOGOUT_RESPONSE_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 509 | __le32 reserved2[2]; |
| 510 | __le32 itt; |
| 511 | __le32 reserved3; |
| 512 | __le32 stat_sn; |
| 513 | __le32 exp_cmd_sn; |
| 514 | __le32 max_cmd_sn; |
| 515 | __le32 reserved4; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 516 | __le16 time_2_retain; |
| 517 | __le16 time_2_wait; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 518 | __le32 reserved5[1]; |
| 519 | }; |
| 520 | |
| 521 | struct iscsi_text_request_hdr { |
| 522 | __le16 reserved0; |
| 523 | u8 flags_attr; |
| 524 | #define ISCSI_TEXT_REQUEST_HDR_RSRV_MASK 0x3F |
| 525 | #define ISCSI_TEXT_REQUEST_HDR_RSRV_SHIFT 0 |
| 526 | #define ISCSI_TEXT_REQUEST_HDR_C_MASK 0x1 |
| 527 | #define ISCSI_TEXT_REQUEST_HDR_C_SHIFT 6 |
| 528 | #define ISCSI_TEXT_REQUEST_HDR_F_MASK 0x1 |
| 529 | #define ISCSI_TEXT_REQUEST_HDR_F_SHIFT 7 |
| 530 | u8 opcode; |
| 531 | __le32 hdr_second_dword; |
| 532 | #define ISCSI_TEXT_REQUEST_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 533 | #define ISCSI_TEXT_REQUEST_HDR_DATA_SEG_LEN_SHIFT 0 |
| 534 | #define ISCSI_TEXT_REQUEST_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 535 | #define ISCSI_TEXT_REQUEST_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 536 | struct regpair lun; |
| 537 | __le32 itt; |
| 538 | __le32 ttt; |
| 539 | __le32 cmd_sn; |
| 540 | __le32 exp_stat_sn; |
| 541 | __le32 reserved4[4]; |
| 542 | }; |
| 543 | |
| 544 | struct iscsi_text_response_hdr { |
| 545 | __le16 reserved1; |
| 546 | u8 flags; |
| 547 | #define ISCSI_TEXT_RESPONSE_HDR_RSRV_MASK 0x3F |
| 548 | #define ISCSI_TEXT_RESPONSE_HDR_RSRV_SHIFT 0 |
| 549 | #define ISCSI_TEXT_RESPONSE_HDR_C_MASK 0x1 |
| 550 | #define ISCSI_TEXT_RESPONSE_HDR_C_SHIFT 6 |
| 551 | #define ISCSI_TEXT_RESPONSE_HDR_F_MASK 0x1 |
| 552 | #define ISCSI_TEXT_RESPONSE_HDR_F_SHIFT 7 |
| 553 | u8 opcode; |
| 554 | __le32 hdr_second_dword; |
| 555 | #define ISCSI_TEXT_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 556 | #define ISCSI_TEXT_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0 |
| 557 | #define ISCSI_TEXT_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 558 | #define ISCSI_TEXT_RESPONSE_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 559 | struct regpair lun; |
| 560 | __le32 itt; |
| 561 | __le32 ttt; |
| 562 | __le32 stat_sn; |
| 563 | __le32 exp_cmd_sn; |
| 564 | __le32 max_cmd_sn; |
| 565 | __le32 reserved4[3]; |
| 566 | }; |
| 567 | |
| 568 | struct iscsi_tmf_request_hdr { |
| 569 | __le16 reserved0; |
| 570 | u8 function; |
| 571 | u8 opcode; |
| 572 | __le32 hdr_second_dword; |
| 573 | #define ISCSI_TMF_REQUEST_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 574 | #define ISCSI_TMF_REQUEST_HDR_DATA_SEG_LEN_SHIFT 0 |
| 575 | #define ISCSI_TMF_REQUEST_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 576 | #define ISCSI_TMF_REQUEST_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 577 | struct regpair lun; |
| 578 | __le32 itt; |
| 579 | __le32 rtt; |
| 580 | __le32 cmd_sn; |
| 581 | __le32 exp_stat_sn; |
| 582 | __le32 ref_cmd_sn; |
| 583 | __le32 exp_data_sn; |
| 584 | __le32 reserved4[2]; |
| 585 | }; |
| 586 | |
| 587 | struct iscsi_tmf_response_hdr { |
| 588 | u8 reserved2; |
| 589 | u8 hdr_response; |
| 590 | u8 hdr_flags; |
| 591 | u8 opcode; |
| 592 | __le32 hdr_second_dword; |
| 593 | #define ISCSI_TMF_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 594 | #define ISCSI_TMF_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0 |
| 595 | #define ISCSI_TMF_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 596 | #define ISCSI_TMF_RESPONSE_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 597 | struct regpair reserved0; |
| 598 | __le32 itt; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 599 | __le32 reserved1; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 600 | __le32 stat_sn; |
| 601 | __le32 exp_cmd_sn; |
| 602 | __le32 max_cmd_sn; |
| 603 | __le32 reserved4[3]; |
| 604 | }; |
| 605 | |
| 606 | struct iscsi_response_hdr { |
| 607 | u8 hdr_status; |
| 608 | u8 hdr_response; |
| 609 | u8 hdr_flags; |
| 610 | u8 opcode; |
| 611 | __le32 hdr_second_dword; |
| 612 | #define ISCSI_RESPONSE_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 613 | #define ISCSI_RESPONSE_HDR_DATA_SEG_LEN_SHIFT 0 |
| 614 | #define ISCSI_RESPONSE_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 615 | #define ISCSI_RESPONSE_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 616 | struct regpair lun; |
| 617 | __le32 itt; |
| 618 | __le32 snack_tag; |
| 619 | __le32 stat_sn; |
| 620 | __le32 exp_cmd_sn; |
| 621 | __le32 max_cmd_sn; |
| 622 | __le32 exp_data_sn; |
| 623 | __le32 bi_residual_count; |
| 624 | __le32 residual_count; |
| 625 | }; |
| 626 | |
| 627 | struct iscsi_reject_hdr { |
| 628 | u8 reserved4; |
| 629 | u8 hdr_reason; |
| 630 | u8 hdr_flags; |
| 631 | u8 opcode; |
| 632 | __le32 hdr_second_dword; |
| 633 | #define ISCSI_REJECT_HDR_DATA_SEG_LEN_MASK 0xFFFFFF |
| 634 | #define ISCSI_REJECT_HDR_DATA_SEG_LEN_SHIFT 0 |
| 635 | #define ISCSI_REJECT_HDR_TOTAL_AHS_LEN_MASK 0xFF |
| 636 | #define ISCSI_REJECT_HDR_TOTAL_AHS_LEN_SHIFT 24 |
| 637 | struct regpair reserved0; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 638 | __le32 all_ones; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 639 | __le32 reserved2; |
| 640 | __le32 stat_sn; |
| 641 | __le32 exp_cmd_sn; |
| 642 | __le32 max_cmd_sn; |
| 643 | __le32 data_sn; |
| 644 | __le32 reserved3[2]; |
| 645 | }; |
| 646 | |
| 647 | union iscsi_task_hdr { |
| 648 | struct iscsi_common_hdr common; |
| 649 | struct data_hdr data; |
| 650 | struct iscsi_cmd_hdr cmd; |
| 651 | struct iscsi_ext_cdb_cmd_hdr ext_cdb_cmd; |
| 652 | struct iscsi_login_req_hdr login_req; |
| 653 | struct iscsi_logout_req_hdr logout_req; |
| 654 | struct iscsi_data_out_hdr data_out; |
| 655 | struct iscsi_data_in_hdr data_in; |
| 656 | struct iscsi_r2t_hdr r2t; |
| 657 | struct iscsi_nop_out_hdr nop_out; |
| 658 | struct iscsi_nop_in_hdr nop_in; |
| 659 | struct iscsi_login_response_hdr login_response; |
| 660 | struct iscsi_logout_response_hdr logout_response; |
| 661 | struct iscsi_text_request_hdr text_request; |
| 662 | struct iscsi_text_response_hdr text_response; |
| 663 | struct iscsi_tmf_request_hdr tmf_request; |
| 664 | struct iscsi_tmf_response_hdr tmf_response; |
| 665 | struct iscsi_response_hdr response; |
| 666 | struct iscsi_reject_hdr reject; |
| 667 | struct iscsi_async_msg_hdr async_msg; |
| 668 | }; |
| 669 | |
| 670 | struct iscsi_cqe_common { |
| 671 | __le16 conn_id; |
| 672 | u8 cqe_type; |
| 673 | union cqe_error_status error_bitmap; |
| 674 | __le32 reserved[3]; |
| 675 | union iscsi_task_hdr iscsi_hdr; |
| 676 | }; |
| 677 | |
| 678 | struct iscsi_cqe_solicited { |
| 679 | __le16 conn_id; |
| 680 | u8 cqe_type; |
| 681 | union cqe_error_status error_bitmap; |
| 682 | __le16 itid; |
| 683 | u8 task_type; |
| 684 | u8 fw_dbg_field; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 685 | u8 caused_conn_err; |
| 686 | u8 reserved0[3]; |
| 687 | __le32 reserved1[1]; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 688 | union iscsi_task_hdr iscsi_hdr; |
| 689 | }; |
| 690 | |
| 691 | struct iscsi_cqe_unsolicited { |
| 692 | __le16 conn_id; |
| 693 | u8 cqe_type; |
| 694 | union cqe_error_status error_bitmap; |
| 695 | __le16 reserved0; |
| 696 | u8 reserved1; |
| 697 | u8 unsol_cqe_type; |
| 698 | struct regpair rqe_opaque; |
| 699 | union iscsi_task_hdr iscsi_hdr; |
| 700 | }; |
| 701 | |
| 702 | union iscsi_cqe { |
| 703 | struct iscsi_cqe_common cqe_common; |
| 704 | struct iscsi_cqe_solicited cqe_solicited; |
| 705 | struct iscsi_cqe_unsolicited cqe_unsolicited; |
| 706 | }; |
| 707 | |
| 708 | enum iscsi_cqes_type { |
| 709 | ISCSI_CQE_TYPE_SOLICITED = 1, |
| 710 | ISCSI_CQE_TYPE_UNSOLICITED, |
Yuval Mintz | 05fafbf | 2016-08-19 09:33:31 +0300 | [diff] [blame] | 711 | ISCSI_CQE_TYPE_SOLICITED_WITH_SENSE, |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 712 | ISCSI_CQE_TYPE_TASK_CLEANUP, |
| 713 | ISCSI_CQE_TYPE_DUMMY, |
| 714 | MAX_ISCSI_CQES_TYPE |
| 715 | }; |
| 716 | |
| 717 | enum iscsi_cqe_unsolicited_type { |
| 718 | ISCSI_CQE_UNSOLICITED_NONE, |
| 719 | ISCSI_CQE_UNSOLICITED_SINGLE, |
| 720 | ISCSI_CQE_UNSOLICITED_FIRST, |
| 721 | ISCSI_CQE_UNSOLICITED_MIDDLE, |
| 722 | ISCSI_CQE_UNSOLICITED_LAST, |
| 723 | MAX_ISCSI_CQE_UNSOLICITED_TYPE |
| 724 | }; |
| 725 | |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 726 | |
| 727 | struct iscsi_debug_modes { |
| 728 | u8 flags; |
| 729 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RX_CONN_ERROR_MASK 0x1 |
| 730 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RX_CONN_ERROR_SHIFT 0 |
| 731 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_RESET_MASK 0x1 |
| 732 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_RESET_SHIFT 1 |
| 733 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_FIN_MASK 0x1 |
| 734 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_FIN_SHIFT 2 |
| 735 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_CLEANUP_MASK 0x1 |
| 736 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_CLEANUP_SHIFT 3 |
| 737 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_REJECT_OR_ASYNC_MASK 0x1 |
| 738 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_REJECT_OR_ASYNC_SHIFT 4 |
| 739 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_NOP_MASK 0x1 |
| 740 | #define ISCSI_DEBUG_MODES_ASSERT_IF_RECV_NOP_SHIFT 5 |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 741 | #define ISCSI_DEBUG_MODES_ASSERT_IF_DATA_DIGEST_ERROR_MASK 0x1 |
| 742 | #define ISCSI_DEBUG_MODES_ASSERT_IF_DATA_DIGEST_ERROR_SHIFT 6 |
| 743 | #define ISCSI_DEBUG_MODES_ASSERT_IF_DIF_ERROR_MASK 0x1 |
| 744 | #define ISCSI_DEBUG_MODES_ASSERT_IF_DIF_ERROR_SHIFT 7 |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 745 | }; |
| 746 | |
| 747 | struct iscsi_dif_flags { |
| 748 | u8 flags; |
| 749 | #define ISCSI_DIF_FLAGS_PROT_INTERVAL_SIZE_LOG_MASK 0xF |
| 750 | #define ISCSI_DIF_FLAGS_PROT_INTERVAL_SIZE_LOG_SHIFT 0 |
| 751 | #define ISCSI_DIF_FLAGS_DIF_TO_PEER_MASK 0x1 |
| 752 | #define ISCSI_DIF_FLAGS_DIF_TO_PEER_SHIFT 4 |
| 753 | #define ISCSI_DIF_FLAGS_HOST_INTERFACE_MASK 0x7 |
| 754 | #define ISCSI_DIF_FLAGS_HOST_INTERFACE_SHIFT 5 |
| 755 | }; |
| 756 | |
| 757 | enum iscsi_eqe_opcode { |
| 758 | ISCSI_EVENT_TYPE_INIT_FUNC = 0, |
| 759 | ISCSI_EVENT_TYPE_DESTROY_FUNC, |
| 760 | ISCSI_EVENT_TYPE_OFFLOAD_CONN, |
| 761 | ISCSI_EVENT_TYPE_UPDATE_CONN, |
| 762 | ISCSI_EVENT_TYPE_CLEAR_SQ, |
| 763 | ISCSI_EVENT_TYPE_TERMINATE_CONN, |
Yuval Mintz | 05fafbf | 2016-08-19 09:33:31 +0300 | [diff] [blame] | 764 | ISCSI_EVENT_TYPE_MAC_UPDATE_CONN, |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 765 | ISCSI_EVENT_TYPE_ASYN_CONNECT_COMPLETE, |
| 766 | ISCSI_EVENT_TYPE_ASYN_TERMINATE_DONE, |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 767 | RESERVED9, |
| 768 | ISCSI_EVENT_TYPE_START_OF_ERROR_TYPES = 10, |
| 769 | ISCSI_EVENT_TYPE_ASYN_ABORT_RCVD, |
| 770 | ISCSI_EVENT_TYPE_ASYN_CLOSE_RCVD, |
| 771 | ISCSI_EVENT_TYPE_ASYN_SYN_RCVD, |
| 772 | ISCSI_EVENT_TYPE_ASYN_MAX_RT_TIME, |
| 773 | ISCSI_EVENT_TYPE_ASYN_MAX_RT_CNT, |
| 774 | ISCSI_EVENT_TYPE_ASYN_MAX_KA_PROBES_CNT, |
| 775 | ISCSI_EVENT_TYPE_ASYN_FIN_WAIT2, |
| 776 | ISCSI_EVENT_TYPE_ISCSI_CONN_ERROR, |
| 777 | ISCSI_EVENT_TYPE_TCP_CONN_ERROR, |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 778 | MAX_ISCSI_EQE_OPCODE |
| 779 | }; |
| 780 | |
| 781 | enum iscsi_error_types { |
| 782 | ISCSI_STATUS_NONE = 0, |
| 783 | ISCSI_CQE_ERROR_UNSOLICITED_RCV_ON_INVALID_CONN = 1, |
| 784 | ISCSI_CONN_ERROR_TASK_CID_MISMATCH, |
| 785 | ISCSI_CONN_ERROR_TASK_NOT_VALID, |
| 786 | ISCSI_CONN_ERROR_RQ_RING_IS_FULL, |
| 787 | ISCSI_CONN_ERROR_CMDQ_RING_IS_FULL, |
| 788 | ISCSI_CONN_ERROR_HQE_CACHING_FAILED, |
| 789 | ISCSI_CONN_ERROR_HEADER_DIGEST_ERROR, |
| 790 | ISCSI_CONN_ERROR_LOCAL_COMPLETION_ERROR, |
| 791 | ISCSI_CONN_ERROR_DATA_OVERRUN, |
| 792 | ISCSI_CONN_ERROR_OUT_OF_SGES_ERROR, |
| 793 | ISCSI_CONN_ERROR_TCP_SEG_PROC_URG_ERROR, |
| 794 | ISCSI_CONN_ERROR_TCP_SEG_PROC_IP_OPTIONS_ERROR, |
| 795 | ISCSI_CONN_ERROR_TCP_SEG_PROC_CONNECT_INVALID_WS_OPTION, |
| 796 | ISCSI_CONN_ERROR_TCP_IP_FRAGMENT_ERROR, |
| 797 | ISCSI_CONN_ERROR_PROTOCOL_ERR_AHS_LEN, |
| 798 | ISCSI_CONN_ERROR_PROTOCOL_ERR_AHS_TYPE, |
| 799 | ISCSI_CONN_ERROR_PROTOCOL_ERR_ITT_OUT_OF_RANGE, |
| 800 | ISCSI_CONN_ERROR_PROTOCOL_ERR_TTT_OUT_OF_RANGE, |
| 801 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DATA_SEG_LEN_EXCEEDS_PDU_SIZE, |
| 802 | ISCSI_CONN_ERROR_PROTOCOL_ERR_INVALID_OPCODE, |
| 803 | ISCSI_CONN_ERROR_PROTOCOL_ERR_INVALID_OPCODE_BEFORE_UPDATE, |
| 804 | ISCSI_CONN_ERROR_UNVALID_NOPIN_DSL, |
| 805 | ISCSI_CONN_ERROR_PROTOCOL_ERR_R2T_CARRIES_NO_DATA, |
| 806 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DATA_SN, |
| 807 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DATA_IN_TTT, |
| 808 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DATA_OUT_ITT, |
| 809 | ISCSI_CONN_ERROR_PROTOCOL_ERR_R2T_TTT, |
| 810 | ISCSI_CONN_ERROR_PROTOCOL_ERR_R2T_BUFFER_OFFSET, |
| 811 | ISCSI_CONN_ERROR_PROTOCOL_ERR_BUFFER_OFFSET_OOO, |
| 812 | ISCSI_CONN_ERROR_PROTOCOL_ERR_R2T_SN, |
| 813 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DESIRED_DATA_TRNS_LEN_0, |
| 814 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DESIRED_DATA_TRNS_LEN_1, |
| 815 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DESIRED_DATA_TRNS_LEN_2, |
| 816 | ISCSI_CONN_ERROR_PROTOCOL_ERR_LUN, |
| 817 | ISCSI_CONN_ERROR_PROTOCOL_ERR_F_BIT_ZERO, |
| 818 | ISCSI_CONN_ERROR_PROTOCOL_ERR_F_BIT_ZERO_S_BIT_ONE, |
| 819 | ISCSI_CONN_ERROR_PROTOCOL_ERR_EXP_STAT_SN, |
| 820 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DSL_NOT_ZERO, |
| 821 | ISCSI_CONN_ERROR_PROTOCOL_ERR_INVALID_DSL, |
| 822 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DATA_SEG_LEN_TOO_BIG, |
| 823 | ISCSI_CONN_ERROR_PROTOCOL_ERR_OUTSTANDING_R2T_COUNT, |
| 824 | ISCSI_CONN_ERROR_PROTOCOL_ERR_DIF_TX, |
| 825 | ISCSI_CONN_ERROR_SENSE_DATA_LENGTH, |
| 826 | ISCSI_CONN_ERROR_DATA_PLACEMENT_ERROR, |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 827 | ISCSI_CONN_ERROR_INVALID_ITT, |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 828 | ISCSI_ERROR_UNKNOWN, |
| 829 | MAX_ISCSI_ERROR_TYPES |
| 830 | }; |
| 831 | |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 832 | |
| 833 | enum iscsi_ramrod_cmd_id { |
| 834 | ISCSI_RAMROD_CMD_ID_UNUSED = 0, |
| 835 | ISCSI_RAMROD_CMD_ID_INIT_FUNC = 1, |
| 836 | ISCSI_RAMROD_CMD_ID_DESTROY_FUNC = 2, |
| 837 | ISCSI_RAMROD_CMD_ID_OFFLOAD_CONN = 3, |
| 838 | ISCSI_RAMROD_CMD_ID_UPDATE_CONN = 4, |
| 839 | ISCSI_RAMROD_CMD_ID_TERMINATION_CONN = 5, |
| 840 | ISCSI_RAMROD_CMD_ID_CLEAR_SQ = 6, |
Yuval Mintz | 05fafbf | 2016-08-19 09:33:31 +0300 | [diff] [blame] | 841 | ISCSI_RAMROD_CMD_ID_MAC_UPDATE = 7, |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 842 | MAX_ISCSI_RAMROD_CMD_ID |
| 843 | }; |
| 844 | |
| 845 | struct iscsi_reg1 { |
| 846 | __le32 reg1_map; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 847 | #define ISCSI_REG1_NUM_SGES_MASK 0xF |
| 848 | #define ISCSI_REG1_NUM_SGES_SHIFT 0 |
| 849 | #define ISCSI_REG1_RESERVED1_MASK 0xFFFFFFF |
| 850 | #define ISCSI_REG1_RESERVED1_SHIFT 4 |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 851 | }; |
| 852 | |
| 853 | union iscsi_seq_num { |
| 854 | __le16 data_sn; |
| 855 | __le16 r2t_sn; |
| 856 | }; |
| 857 | |
Yuval Mintz | 05fafbf | 2016-08-19 09:33:31 +0300 | [diff] [blame] | 858 | struct iscsi_spe_conn_mac_update { |
| 859 | struct iscsi_slow_path_hdr hdr; |
| 860 | __le16 conn_id; |
| 861 | __le32 fw_cid; |
| 862 | __le16 remote_mac_addr_lo; |
| 863 | __le16 remote_mac_addr_mid; |
| 864 | __le16 remote_mac_addr_hi; |
| 865 | u8 reserved0[2]; |
| 866 | }; |
| 867 | |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 868 | struct iscsi_spe_conn_offload { |
| 869 | struct iscsi_slow_path_hdr hdr; |
| 870 | __le16 conn_id; |
| 871 | __le32 fw_cid; |
| 872 | struct iscsi_conn_offload_params iscsi; |
| 873 | struct tcp_offload_params tcp; |
| 874 | }; |
| 875 | |
| 876 | struct iscsi_spe_conn_offload_option2 { |
| 877 | struct iscsi_slow_path_hdr hdr; |
| 878 | __le16 conn_id; |
| 879 | __le32 fw_cid; |
| 880 | struct iscsi_conn_offload_params iscsi; |
| 881 | struct tcp_offload_params_opt2 tcp; |
| 882 | }; |
| 883 | |
| 884 | struct iscsi_spe_conn_termination { |
| 885 | struct iscsi_slow_path_hdr hdr; |
| 886 | __le16 conn_id; |
| 887 | __le32 fw_cid; |
| 888 | u8 abortive; |
| 889 | u8 reserved0[7]; |
| 890 | struct regpair queue_cnts_addr; |
| 891 | struct regpair query_params_addr; |
| 892 | }; |
| 893 | |
| 894 | struct iscsi_spe_func_dstry { |
| 895 | struct iscsi_slow_path_hdr hdr; |
| 896 | __le16 reserved0; |
| 897 | __le32 reserved1; |
| 898 | }; |
| 899 | |
| 900 | struct iscsi_spe_func_init { |
| 901 | struct iscsi_slow_path_hdr hdr; |
| 902 | __le16 half_way_close_timeout; |
| 903 | u8 num_sq_pages_in_ring; |
| 904 | u8 num_r2tq_pages_in_ring; |
| 905 | u8 num_uhq_pages_in_ring; |
| 906 | u8 ll2_rx_queue_id; |
| 907 | u8 ooo_enable; |
| 908 | struct iscsi_debug_modes debug_mode; |
| 909 | __le16 reserved1; |
| 910 | __le32 reserved2; |
| 911 | __le32 reserved3; |
| 912 | __le32 reserved4; |
| 913 | struct scsi_init_func_params func_params; |
| 914 | struct scsi_init_func_queues q_params; |
| 915 | }; |
| 916 | |
| 917 | struct ystorm_iscsi_task_state { |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 918 | struct scsi_cached_sges data_desc; |
| 919 | struct scsi_sgl_params sgl_params; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 920 | __le32 exp_r2t_sn; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 921 | __le32 buffer_offset; |
| 922 | union iscsi_seq_num seq_num; |
| 923 | struct iscsi_dif_flags dif_flags; |
| 924 | u8 flags; |
| 925 | #define YSTORM_ISCSI_TASK_STATE_LOCAL_COMP_MASK 0x1 |
| 926 | #define YSTORM_ISCSI_TASK_STATE_LOCAL_COMP_SHIFT 0 |
| 927 | #define YSTORM_ISCSI_TASK_STATE_SLOW_IO_MASK 0x1 |
| 928 | #define YSTORM_ISCSI_TASK_STATE_SLOW_IO_SHIFT 1 |
| 929 | #define YSTORM_ISCSI_TASK_STATE_RESERVED0_MASK 0x3F |
| 930 | #define YSTORM_ISCSI_TASK_STATE_RESERVED0_SHIFT 2 |
| 931 | }; |
| 932 | |
| 933 | struct ystorm_iscsi_task_rxmit_opt { |
| 934 | __le32 fast_rxmit_sge_offset; |
| 935 | __le32 scan_start_buffer_offset; |
| 936 | __le32 fast_rxmit_buffer_offset; |
| 937 | u8 scan_start_sgl_index; |
| 938 | u8 fast_rxmit_sgl_index; |
| 939 | __le16 reserved; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 940 | }; |
| 941 | |
| 942 | struct ystorm_iscsi_task_st_ctx { |
| 943 | struct ystorm_iscsi_task_state state; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 944 | struct ystorm_iscsi_task_rxmit_opt rxmit_opt; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 945 | union iscsi_task_hdr pdu_hdr; |
| 946 | }; |
| 947 | |
| 948 | struct ystorm_iscsi_task_ag_ctx { |
| 949 | u8 reserved; |
| 950 | u8 byte1; |
| 951 | __le16 word0; |
| 952 | u8 flags0; |
| 953 | #define YSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_MASK 0xF |
| 954 | #define YSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_SHIFT 0 |
| 955 | #define YSTORM_ISCSI_TASK_AG_CTX_BIT0_MASK 0x1 |
| 956 | #define YSTORM_ISCSI_TASK_AG_CTX_BIT0_SHIFT 4 |
| 957 | #define YSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 |
| 958 | #define YSTORM_ISCSI_TASK_AG_CTX_BIT1_SHIFT 5 |
| 959 | #define YSTORM_ISCSI_TASK_AG_CTX_VALID_MASK 0x1 |
| 960 | #define YSTORM_ISCSI_TASK_AG_CTX_VALID_SHIFT 6 |
| 961 | #define YSTORM_ISCSI_TASK_AG_CTX_BIT3_MASK 0x1 |
| 962 | #define YSTORM_ISCSI_TASK_AG_CTX_BIT3_SHIFT 7 |
| 963 | u8 flags1; |
| 964 | #define YSTORM_ISCSI_TASK_AG_CTX_CF0_MASK 0x3 |
| 965 | #define YSTORM_ISCSI_TASK_AG_CTX_CF0_SHIFT 0 |
| 966 | #define YSTORM_ISCSI_TASK_AG_CTX_CF1_MASK 0x3 |
| 967 | #define YSTORM_ISCSI_TASK_AG_CTX_CF1_SHIFT 2 |
| 968 | #define YSTORM_ISCSI_TASK_AG_CTX_CF2SPECIAL_MASK 0x3 |
| 969 | #define YSTORM_ISCSI_TASK_AG_CTX_CF2SPECIAL_SHIFT 4 |
| 970 | #define YSTORM_ISCSI_TASK_AG_CTX_CF0EN_MASK 0x1 |
| 971 | #define YSTORM_ISCSI_TASK_AG_CTX_CF0EN_SHIFT 6 |
| 972 | #define YSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK 0x1 |
| 973 | #define YSTORM_ISCSI_TASK_AG_CTX_CF1EN_SHIFT 7 |
| 974 | u8 flags2; |
| 975 | #define YSTORM_ISCSI_TASK_AG_CTX_BIT4_MASK 0x1 |
| 976 | #define YSTORM_ISCSI_TASK_AG_CTX_BIT4_SHIFT 0 |
| 977 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK 0x1 |
| 978 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE0EN_SHIFT 1 |
| 979 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 |
| 980 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE1EN_SHIFT 2 |
| 981 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK 0x1 |
| 982 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE2EN_SHIFT 3 |
| 983 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 |
| 984 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT 4 |
| 985 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 |
| 986 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE4EN_SHIFT 5 |
| 987 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 |
| 988 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE5EN_SHIFT 6 |
| 989 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK 0x1 |
| 990 | #define YSTORM_ISCSI_TASK_AG_CTX_RULE6EN_SHIFT 7 |
| 991 | u8 byte2; |
| 992 | __le32 TTT; |
| 993 | u8 byte3; |
| 994 | u8 byte4; |
| 995 | __le16 word1; |
| 996 | }; |
| 997 | |
| 998 | struct mstorm_iscsi_task_ag_ctx { |
| 999 | u8 cdu_validation; |
| 1000 | u8 byte1; |
| 1001 | __le16 task_cid; |
| 1002 | u8 flags0; |
| 1003 | #define MSTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_MASK 0xF |
| 1004 | #define MSTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_SHIFT 0 |
| 1005 | #define MSTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_MASK 0x1 |
| 1006 | #define MSTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_SHIFT 4 |
| 1007 | #define MSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 |
| 1008 | #define MSTORM_ISCSI_TASK_AG_CTX_BIT1_SHIFT 5 |
| 1009 | #define MSTORM_ISCSI_TASK_AG_CTX_VALID_MASK 0x1 |
| 1010 | #define MSTORM_ISCSI_TASK_AG_CTX_VALID_SHIFT 6 |
| 1011 | #define MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_FLAG_MASK 0x1 |
| 1012 | #define MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_FLAG_SHIFT 7 |
| 1013 | u8 flags1; |
| 1014 | #define MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_MASK 0x3 |
| 1015 | #define MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_SHIFT 0 |
| 1016 | #define MSTORM_ISCSI_TASK_AG_CTX_CF1_MASK 0x3 |
| 1017 | #define MSTORM_ISCSI_TASK_AG_CTX_CF1_SHIFT 2 |
| 1018 | #define MSTORM_ISCSI_TASK_AG_CTX_CF2_MASK 0x3 |
| 1019 | #define MSTORM_ISCSI_TASK_AG_CTX_CF2_SHIFT 4 |
| 1020 | #define MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_EN_MASK 0x1 |
| 1021 | #define MSTORM_ISCSI_TASK_AG_CTX_TASK_CLEANUP_CF_EN_SHIFT 6 |
| 1022 | #define MSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK 0x1 |
| 1023 | #define MSTORM_ISCSI_TASK_AG_CTX_CF1EN_SHIFT 7 |
| 1024 | u8 flags2; |
| 1025 | #define MSTORM_ISCSI_TASK_AG_CTX_CF2EN_MASK 0x1 |
| 1026 | #define MSTORM_ISCSI_TASK_AG_CTX_CF2EN_SHIFT 0 |
| 1027 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK 0x1 |
| 1028 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE0EN_SHIFT 1 |
| 1029 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 |
| 1030 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE1EN_SHIFT 2 |
| 1031 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK 0x1 |
| 1032 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE2EN_SHIFT 3 |
| 1033 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 |
| 1034 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT 4 |
| 1035 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 |
| 1036 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE4EN_SHIFT 5 |
| 1037 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 |
| 1038 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE5EN_SHIFT 6 |
| 1039 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK 0x1 |
| 1040 | #define MSTORM_ISCSI_TASK_AG_CTX_RULE6EN_SHIFT 7 |
| 1041 | u8 byte2; |
| 1042 | __le32 reg0; |
| 1043 | u8 byte3; |
| 1044 | u8 byte4; |
| 1045 | __le16 word1; |
| 1046 | }; |
| 1047 | |
| 1048 | struct ustorm_iscsi_task_ag_ctx { |
| 1049 | u8 reserved; |
| 1050 | u8 state; |
| 1051 | __le16 icid; |
| 1052 | u8 flags0; |
| 1053 | #define USTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_MASK 0xF |
| 1054 | #define USTORM_ISCSI_TASK_AG_CTX_CONNECTION_TYPE_SHIFT 0 |
| 1055 | #define USTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_MASK 0x1 |
| 1056 | #define USTORM_ISCSI_TASK_AG_CTX_EXIST_IN_QM0_SHIFT 4 |
| 1057 | #define USTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 |
| 1058 | #define USTORM_ISCSI_TASK_AG_CTX_BIT1_SHIFT 5 |
| 1059 | #define USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_MASK 0x3 |
| 1060 | #define USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_SHIFT 6 |
| 1061 | u8 flags1; |
| 1062 | #define USTORM_ISCSI_TASK_AG_CTX_RESERVED1_MASK 0x3 |
| 1063 | #define USTORM_ISCSI_TASK_AG_CTX_RESERVED1_SHIFT 0 |
| 1064 | #define USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_MASK 0x3 |
| 1065 | #define USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_SHIFT 2 |
| 1066 | #define USTORM_ISCSI_TASK_AG_CTX_CF3_MASK 0x3 |
| 1067 | #define USTORM_ISCSI_TASK_AG_CTX_CF3_SHIFT 4 |
| 1068 | #define USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_MASK 0x3 |
| 1069 | #define USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_SHIFT 6 |
| 1070 | u8 flags2; |
| 1071 | #define USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_EN_MASK 0x1 |
| 1072 | #define USTORM_ISCSI_TASK_AG_CTX_HQ_SCANNED_CF_EN_SHIFT 0 |
| 1073 | #define USTORM_ISCSI_TASK_AG_CTX_DISABLE_DATA_ACKED_MASK 0x1 |
| 1074 | #define USTORM_ISCSI_TASK_AG_CTX_DISABLE_DATA_ACKED_SHIFT 1 |
| 1075 | #define USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_EN_MASK 0x1 |
| 1076 | #define USTORM_ISCSI_TASK_AG_CTX_R2T2RECV_EN_SHIFT 2 |
| 1077 | #define USTORM_ISCSI_TASK_AG_CTX_CF3EN_MASK 0x1 |
| 1078 | #define USTORM_ISCSI_TASK_AG_CTX_CF3EN_SHIFT 3 |
| 1079 | #define USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_EN_MASK 0x1 |
| 1080 | #define USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_CF_EN_SHIFT 4 |
| 1081 | #define USTORM_ISCSI_TASK_AG_CTX_CMP_DATA_TOTAL_EXP_EN_MASK 0x1 |
| 1082 | #define USTORM_ISCSI_TASK_AG_CTX_CMP_DATA_TOTAL_EXP_EN_SHIFT 5 |
| 1083 | #define USTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 |
| 1084 | #define USTORM_ISCSI_TASK_AG_CTX_RULE1EN_SHIFT 6 |
| 1085 | #define USTORM_ISCSI_TASK_AG_CTX_CMP_CONT_RCV_EXP_EN_MASK 0x1 |
| 1086 | #define USTORM_ISCSI_TASK_AG_CTX_CMP_CONT_RCV_EXP_EN_SHIFT 7 |
| 1087 | u8 flags3; |
| 1088 | #define USTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 |
| 1089 | #define USTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT 0 |
| 1090 | #define USTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 |
| 1091 | #define USTORM_ISCSI_TASK_AG_CTX_RULE4EN_SHIFT 1 |
| 1092 | #define USTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 |
| 1093 | #define USTORM_ISCSI_TASK_AG_CTX_RULE5EN_SHIFT 2 |
| 1094 | #define USTORM_ISCSI_TASK_AG_CTX_RULE6EN_MASK 0x1 |
| 1095 | #define USTORM_ISCSI_TASK_AG_CTX_RULE6EN_SHIFT 3 |
| 1096 | #define USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_TYPE_MASK 0xF |
| 1097 | #define USTORM_ISCSI_TASK_AG_CTX_DIF_ERROR_TYPE_SHIFT 4 |
| 1098 | __le32 dif_err_intervals; |
| 1099 | __le32 dif_error_1st_interval; |
| 1100 | __le32 rcv_cont_len; |
| 1101 | __le32 exp_cont_len; |
| 1102 | __le32 total_data_acked; |
| 1103 | __le32 exp_data_acked; |
| 1104 | u8 next_tid_valid; |
| 1105 | u8 byte3; |
| 1106 | __le16 word1; |
| 1107 | __le16 next_tid; |
| 1108 | __le16 word3; |
| 1109 | __le32 hdr_residual_count; |
| 1110 | __le32 exp_r2t_sn; |
| 1111 | }; |
| 1112 | |
| 1113 | struct mstorm_iscsi_task_st_ctx { |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 1114 | struct scsi_cached_sges data_desc; |
| 1115 | struct scsi_sgl_params sgl_params; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1116 | __le32 rem_task_size; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 1117 | __le32 data_buffer_offset; |
| 1118 | u8 task_type; |
| 1119 | struct iscsi_dif_flags dif_flags; |
| 1120 | u8 reserved0[2]; |
| 1121 | struct regpair sense_db; |
| 1122 | __le32 expected_itt; |
| 1123 | __le32 reserved1; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1124 | }; |
| 1125 | |
| 1126 | struct ustorm_iscsi_task_st_ctx { |
| 1127 | __le32 rem_rcv_len; |
| 1128 | __le32 exp_data_transfer_len; |
| 1129 | __le32 exp_data_sn; |
| 1130 | struct regpair lun; |
| 1131 | struct iscsi_reg1 reg1; |
| 1132 | u8 flags2; |
| 1133 | #define USTORM_ISCSI_TASK_ST_CTX_AHS_EXIST_MASK 0x1 |
| 1134 | #define USTORM_ISCSI_TASK_ST_CTX_AHS_EXIST_SHIFT 0 |
| 1135 | #define USTORM_ISCSI_TASK_ST_CTX_RESERVED1_MASK 0x7F |
| 1136 | #define USTORM_ISCSI_TASK_ST_CTX_RESERVED1_SHIFT 1 |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 1137 | struct iscsi_dif_flags dif_flags; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1138 | __le16 reserved3; |
| 1139 | __le32 reserved4; |
| 1140 | __le32 reserved5; |
| 1141 | __le32 reserved6; |
| 1142 | __le32 reserved7; |
| 1143 | u8 task_type; |
| 1144 | u8 error_flags; |
| 1145 | #define USTORM_ISCSI_TASK_ST_CTX_DATA_DIGEST_ERROR_MASK 0x1 |
| 1146 | #define USTORM_ISCSI_TASK_ST_CTX_DATA_DIGEST_ERROR_SHIFT 0 |
| 1147 | #define USTORM_ISCSI_TASK_ST_CTX_DATA_TRUNCATED_ERROR_MASK 0x1 |
| 1148 | #define USTORM_ISCSI_TASK_ST_CTX_DATA_TRUNCATED_ERROR_SHIFT 1 |
| 1149 | #define USTORM_ISCSI_TASK_ST_CTX_UNDER_RUN_ERROR_MASK 0x1 |
| 1150 | #define USTORM_ISCSI_TASK_ST_CTX_UNDER_RUN_ERROR_SHIFT 2 |
| 1151 | #define USTORM_ISCSI_TASK_ST_CTX_RESERVED8_MASK 0x1F |
| 1152 | #define USTORM_ISCSI_TASK_ST_CTX_RESERVED8_SHIFT 3 |
| 1153 | u8 flags; |
| 1154 | #define USTORM_ISCSI_TASK_ST_CTX_CQE_WRITE_MASK 0x3 |
| 1155 | #define USTORM_ISCSI_TASK_ST_CTX_CQE_WRITE_SHIFT 0 |
| 1156 | #define USTORM_ISCSI_TASK_ST_CTX_LOCAL_COMP_MASK 0x1 |
| 1157 | #define USTORM_ISCSI_TASK_ST_CTX_LOCAL_COMP_SHIFT 2 |
| 1158 | #define USTORM_ISCSI_TASK_ST_CTX_Q0_R2TQE_WRITE_MASK 0x1 |
| 1159 | #define USTORM_ISCSI_TASK_ST_CTX_Q0_R2TQE_WRITE_SHIFT 3 |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 1160 | #define USTORM_ISCSI_TASK_ST_CTX_TOTAL_DATA_ACKED_DONE_MASK 0x1 |
| 1161 | #define USTORM_ISCSI_TASK_ST_CTX_TOTAL_DATA_ACKED_DONE_SHIFT 4 |
| 1162 | #define USTORM_ISCSI_TASK_ST_CTX_HQ_SCANNED_DONE_MASK 0x1 |
| 1163 | #define USTORM_ISCSI_TASK_ST_CTX_HQ_SCANNED_DONE_SHIFT 5 |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1164 | #define USTORM_ISCSI_TASK_ST_CTX_R2T2RECV_DONE_MASK 0x1 |
| 1165 | #define USTORM_ISCSI_TASK_ST_CTX_R2T2RECV_DONE_SHIFT 6 |
| 1166 | #define USTORM_ISCSI_TASK_ST_CTX_RESERVED0_MASK 0x1 |
| 1167 | #define USTORM_ISCSI_TASK_ST_CTX_RESERVED0_SHIFT 7 |
| 1168 | u8 cq_rss_number; |
| 1169 | }; |
| 1170 | |
| 1171 | struct iscsi_task_context { |
| 1172 | struct ystorm_iscsi_task_st_ctx ystorm_st_context; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1173 | struct ystorm_iscsi_task_ag_ctx ystorm_ag_context; |
| 1174 | struct regpair ystorm_ag_padding[2]; |
| 1175 | struct tdif_task_context tdif_context; |
| 1176 | struct mstorm_iscsi_task_ag_ctx mstorm_ag_context; |
| 1177 | struct regpair mstorm_ag_padding[2]; |
| 1178 | struct ustorm_iscsi_task_ag_ctx ustorm_ag_context; |
| 1179 | struct mstorm_iscsi_task_st_ctx mstorm_st_context; |
| 1180 | struct ustorm_iscsi_task_st_ctx ustorm_st_context; |
| 1181 | struct rdif_task_context rdif_context; |
| 1182 | }; |
| 1183 | |
| 1184 | enum iscsi_task_type { |
| 1185 | ISCSI_TASK_TYPE_INITIATOR_WRITE, |
| 1186 | ISCSI_TASK_TYPE_INITIATOR_READ, |
| 1187 | ISCSI_TASK_TYPE_MIDPATH, |
| 1188 | ISCSI_TASK_TYPE_UNSOLIC, |
| 1189 | ISCSI_TASK_TYPE_EXCHCLEANUP, |
| 1190 | ISCSI_TASK_TYPE_IRRELEVANT, |
| 1191 | ISCSI_TASK_TYPE_TARGET_WRITE, |
| 1192 | ISCSI_TASK_TYPE_TARGET_READ, |
| 1193 | ISCSI_TASK_TYPE_TARGET_RESPONSE, |
| 1194 | ISCSI_TASK_TYPE_LOGIN_RESPONSE, |
| 1195 | MAX_ISCSI_TASK_TYPE |
| 1196 | }; |
| 1197 | |
| 1198 | union iscsi_ttt_txlen_union { |
| 1199 | __le32 desired_tx_len; |
| 1200 | __le32 ttt; |
| 1201 | }; |
| 1202 | |
| 1203 | struct iscsi_uhqe { |
| 1204 | __le32 reg1; |
| 1205 | #define ISCSI_UHQE_PDU_PAYLOAD_LEN_MASK 0xFFFFF |
| 1206 | #define ISCSI_UHQE_PDU_PAYLOAD_LEN_SHIFT 0 |
| 1207 | #define ISCSI_UHQE_LOCAL_COMP_MASK 0x1 |
| 1208 | #define ISCSI_UHQE_LOCAL_COMP_SHIFT 20 |
| 1209 | #define ISCSI_UHQE_TOGGLE_BIT_MASK 0x1 |
| 1210 | #define ISCSI_UHQE_TOGGLE_BIT_SHIFT 21 |
| 1211 | #define ISCSI_UHQE_PURE_PAYLOAD_MASK 0x1 |
| 1212 | #define ISCSI_UHQE_PURE_PAYLOAD_SHIFT 22 |
| 1213 | #define ISCSI_UHQE_LOGIN_RESPONSE_PDU_MASK 0x1 |
| 1214 | #define ISCSI_UHQE_LOGIN_RESPONSE_PDU_SHIFT 23 |
| 1215 | #define ISCSI_UHQE_TASK_ID_HI_MASK 0xFF |
| 1216 | #define ISCSI_UHQE_TASK_ID_HI_SHIFT 24 |
| 1217 | __le32 reg2; |
| 1218 | #define ISCSI_UHQE_BUFFER_OFFSET_MASK 0xFFFFFF |
| 1219 | #define ISCSI_UHQE_BUFFER_OFFSET_SHIFT 0 |
| 1220 | #define ISCSI_UHQE_TASK_ID_LO_MASK 0xFF |
| 1221 | #define ISCSI_UHQE_TASK_ID_LO_SHIFT 24 |
| 1222 | }; |
| 1223 | |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1224 | |
| 1225 | struct iscsi_wqe { |
| 1226 | __le16 task_id; |
| 1227 | u8 flags; |
| 1228 | #define ISCSI_WQE_WQE_TYPE_MASK 0x7 |
| 1229 | #define ISCSI_WQE_WQE_TYPE_SHIFT 0 |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 1230 | #define ISCSI_WQE_NUM_SGES_MASK 0xF |
| 1231 | #define ISCSI_WQE_NUM_SGES_SHIFT 3 |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1232 | #define ISCSI_WQE_RESPONSE_MASK 0x1 |
| 1233 | #define ISCSI_WQE_RESPONSE_SHIFT 7 |
| 1234 | struct iscsi_dif_flags prot_flags; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 1235 | __le32 contlen_cdbsize; |
| 1236 | #define ISCSI_WQE_CONT_LEN_MASK 0xFFFFFF |
| 1237 | #define ISCSI_WQE_CONT_LEN_SHIFT 0 |
| 1238 | #define ISCSI_WQE_CDB_SIZE_MASK 0xFF |
| 1239 | #define ISCSI_WQE_CDB_SIZE_SHIFT 24 |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1240 | }; |
| 1241 | |
| 1242 | enum iscsi_wqe_type { |
| 1243 | ISCSI_WQE_TYPE_NORMAL, |
| 1244 | ISCSI_WQE_TYPE_TASK_CLEANUP, |
| 1245 | ISCSI_WQE_TYPE_MIDDLE_PATH, |
| 1246 | ISCSI_WQE_TYPE_LOGIN, |
| 1247 | ISCSI_WQE_TYPE_FIRST_R2T_CONT, |
| 1248 | ISCSI_WQE_TYPE_NONFIRST_R2T_CONT, |
| 1249 | ISCSI_WQE_TYPE_RESPONSE, |
| 1250 | MAX_ISCSI_WQE_TYPE |
| 1251 | }; |
| 1252 | |
| 1253 | struct iscsi_xhqe { |
| 1254 | union iscsi_ttt_txlen_union ttt_or_txlen; |
| 1255 | __le32 exp_stat_sn; |
| 1256 | struct iscsi_dif_flags prot_flags; |
| 1257 | u8 total_ahs_length; |
| 1258 | u8 opcode; |
| 1259 | u8 flags; |
Mintz, Yuval | be086e7 | 2017-03-11 18:39:18 +0200 | [diff] [blame^] | 1260 | #define ISCSI_XHQE_FINAL_MASK 0x1 |
| 1261 | #define ISCSI_XHQE_FINAL_SHIFT 0 |
| 1262 | #define ISCSI_XHQE_STATUS_BIT_MASK 0x1 |
| 1263 | #define ISCSI_XHQE_STATUS_BIT_SHIFT 1 |
| 1264 | #define ISCSI_XHQE_NUM_SGES_MASK 0xF |
| 1265 | #define ISCSI_XHQE_NUM_SGES_SHIFT 2 |
| 1266 | #define ISCSI_XHQE_RESERVED0_MASK 0x3 |
| 1267 | #define ISCSI_XHQE_RESERVED0_SHIFT 6 |
| 1268 | union iscsi_seq_num seq_num; |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1269 | __le16 reserved1; |
| 1270 | }; |
| 1271 | |
| 1272 | struct mstorm_iscsi_stats_drv { |
| 1273 | struct regpair iscsi_rx_dropped_pdus_task_not_valid; |
| 1274 | }; |
| 1275 | |
Yuval Mintz | 7a9b6b8 | 2016-06-03 14:35:33 +0300 | [diff] [blame] | 1276 | struct pstorm_iscsi_stats_drv { |
| 1277 | struct regpair iscsi_tx_bytes_cnt; |
| 1278 | struct regpair iscsi_tx_packet_cnt; |
| 1279 | }; |
| 1280 | |
| 1281 | struct tstorm_iscsi_stats_drv { |
| 1282 | struct regpair iscsi_rx_bytes_cnt; |
| 1283 | struct regpair iscsi_rx_packet_cnt; |
| 1284 | struct regpair iscsi_rx_new_ooo_isle_events_cnt; |
| 1285 | __le32 iscsi_cmdq_threshold_cnt; |
| 1286 | __le32 iscsi_rq_threshold_cnt; |
| 1287 | __le32 iscsi_immq_threshold_cnt; |
| 1288 | }; |
| 1289 | |
| 1290 | struct ustorm_iscsi_stats_drv { |
| 1291 | struct regpair iscsi_rx_data_pdu_cnt; |
| 1292 | struct regpair iscsi_rx_r2t_pdu_cnt; |
| 1293 | struct regpair iscsi_rx_total_pdu_cnt; |
| 1294 | }; |
| 1295 | |
| 1296 | struct xstorm_iscsi_stats_drv { |
| 1297 | struct regpair iscsi_tx_go_to_slow_start_event_cnt; |
| 1298 | struct regpair iscsi_tx_fast_retransmit_event_cnt; |
| 1299 | }; |
| 1300 | |
| 1301 | struct ystorm_iscsi_stats_drv { |
| 1302 | struct regpair iscsi_tx_data_pdu_cnt; |
| 1303 | struct regpair iscsi_tx_r2t_pdu_cnt; |
| 1304 | struct regpair iscsi_tx_total_pdu_cnt; |
| 1305 | }; |
| 1306 | |
| 1307 | struct iscsi_db_data { |
| 1308 | u8 params; |
| 1309 | #define ISCSI_DB_DATA_DEST_MASK 0x3 |
| 1310 | #define ISCSI_DB_DATA_DEST_SHIFT 0 |
| 1311 | #define ISCSI_DB_DATA_AGG_CMD_MASK 0x3 |
| 1312 | #define ISCSI_DB_DATA_AGG_CMD_SHIFT 2 |
| 1313 | #define ISCSI_DB_DATA_BYPASS_EN_MASK 0x1 |
| 1314 | #define ISCSI_DB_DATA_BYPASS_EN_SHIFT 4 |
| 1315 | #define ISCSI_DB_DATA_RESERVED_MASK 0x1 |
| 1316 | #define ISCSI_DB_DATA_RESERVED_SHIFT 5 |
| 1317 | #define ISCSI_DB_DATA_AGG_VAL_SEL_MASK 0x3 |
| 1318 | #define ISCSI_DB_DATA_AGG_VAL_SEL_SHIFT 6 |
| 1319 | u8 agg_flags; |
| 1320 | __le16 sq_prod; |
| 1321 | }; |
| 1322 | |
| 1323 | struct tstorm_iscsi_task_ag_ctx { |
| 1324 | u8 byte0; |
| 1325 | u8 byte1; |
| 1326 | __le16 word0; |
| 1327 | u8 flags0; |
| 1328 | #define TSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_MASK 0xF |
| 1329 | #define TSTORM_ISCSI_TASK_AG_CTX_NIBBLE0_SHIFT 0 |
| 1330 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT0_MASK 0x1 |
| 1331 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT0_SHIFT 4 |
| 1332 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT1_MASK 0x1 |
| 1333 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT1_SHIFT 5 |
| 1334 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT2_MASK 0x1 |
| 1335 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT2_SHIFT 6 |
| 1336 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT3_MASK 0x1 |
| 1337 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT3_SHIFT 7 |
| 1338 | u8 flags1; |
| 1339 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT4_MASK 0x1 |
| 1340 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT4_SHIFT 0 |
| 1341 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT5_MASK 0x1 |
| 1342 | #define TSTORM_ISCSI_TASK_AG_CTX_BIT5_SHIFT 1 |
| 1343 | #define TSTORM_ISCSI_TASK_AG_CTX_CF0_MASK 0x3 |
| 1344 | #define TSTORM_ISCSI_TASK_AG_CTX_CF0_SHIFT 2 |
| 1345 | #define TSTORM_ISCSI_TASK_AG_CTX_CF1_MASK 0x3 |
| 1346 | #define TSTORM_ISCSI_TASK_AG_CTX_CF1_SHIFT 4 |
| 1347 | #define TSTORM_ISCSI_TASK_AG_CTX_CF2_MASK 0x3 |
| 1348 | #define TSTORM_ISCSI_TASK_AG_CTX_CF2_SHIFT 6 |
| 1349 | u8 flags2; |
| 1350 | #define TSTORM_ISCSI_TASK_AG_CTX_CF3_MASK 0x3 |
| 1351 | #define TSTORM_ISCSI_TASK_AG_CTX_CF3_SHIFT 0 |
| 1352 | #define TSTORM_ISCSI_TASK_AG_CTX_CF4_MASK 0x3 |
| 1353 | #define TSTORM_ISCSI_TASK_AG_CTX_CF4_SHIFT 2 |
| 1354 | #define TSTORM_ISCSI_TASK_AG_CTX_CF5_MASK 0x3 |
| 1355 | #define TSTORM_ISCSI_TASK_AG_CTX_CF5_SHIFT 4 |
| 1356 | #define TSTORM_ISCSI_TASK_AG_CTX_CF6_MASK 0x3 |
| 1357 | #define TSTORM_ISCSI_TASK_AG_CTX_CF6_SHIFT 6 |
| 1358 | u8 flags3; |
| 1359 | #define TSTORM_ISCSI_TASK_AG_CTX_CF7_MASK 0x3 |
| 1360 | #define TSTORM_ISCSI_TASK_AG_CTX_CF7_SHIFT 0 |
| 1361 | #define TSTORM_ISCSI_TASK_AG_CTX_CF0EN_MASK 0x1 |
| 1362 | #define TSTORM_ISCSI_TASK_AG_CTX_CF0EN_SHIFT 2 |
| 1363 | #define TSTORM_ISCSI_TASK_AG_CTX_CF1EN_MASK 0x1 |
| 1364 | #define TSTORM_ISCSI_TASK_AG_CTX_CF1EN_SHIFT 3 |
| 1365 | #define TSTORM_ISCSI_TASK_AG_CTX_CF2EN_MASK 0x1 |
| 1366 | #define TSTORM_ISCSI_TASK_AG_CTX_CF2EN_SHIFT 4 |
| 1367 | #define TSTORM_ISCSI_TASK_AG_CTX_CF3EN_MASK 0x1 |
| 1368 | #define TSTORM_ISCSI_TASK_AG_CTX_CF3EN_SHIFT 5 |
| 1369 | #define TSTORM_ISCSI_TASK_AG_CTX_CF4EN_MASK 0x1 |
| 1370 | #define TSTORM_ISCSI_TASK_AG_CTX_CF4EN_SHIFT 6 |
| 1371 | #define TSTORM_ISCSI_TASK_AG_CTX_CF5EN_MASK 0x1 |
| 1372 | #define TSTORM_ISCSI_TASK_AG_CTX_CF5EN_SHIFT 7 |
| 1373 | u8 flags4; |
| 1374 | #define TSTORM_ISCSI_TASK_AG_CTX_CF6EN_MASK 0x1 |
| 1375 | #define TSTORM_ISCSI_TASK_AG_CTX_CF6EN_SHIFT 0 |
| 1376 | #define TSTORM_ISCSI_TASK_AG_CTX_CF7EN_MASK 0x1 |
| 1377 | #define TSTORM_ISCSI_TASK_AG_CTX_CF7EN_SHIFT 1 |
| 1378 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE0EN_MASK 0x1 |
| 1379 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE0EN_SHIFT 2 |
| 1380 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE1EN_MASK 0x1 |
| 1381 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE1EN_SHIFT 3 |
| 1382 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE2EN_MASK 0x1 |
| 1383 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE2EN_SHIFT 4 |
| 1384 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE3EN_MASK 0x1 |
| 1385 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE3EN_SHIFT 5 |
| 1386 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE4EN_MASK 0x1 |
| 1387 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE4EN_SHIFT 6 |
| 1388 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE5EN_MASK 0x1 |
| 1389 | #define TSTORM_ISCSI_TASK_AG_CTX_RULE5EN_SHIFT 7 |
| 1390 | u8 byte2; |
| 1391 | __le16 word1; |
| 1392 | __le32 reg0; |
| 1393 | u8 byte3; |
| 1394 | u8 byte4; |
| 1395 | __le16 word2; |
| 1396 | __le16 word3; |
| 1397 | __le16 word4; |
| 1398 | __le32 reg1; |
| 1399 | __le32 reg2; |
| 1400 | }; |
| 1401 | |
| 1402 | #endif /* __ISCSI_COMMON__ */ |