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Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +05301/*
2 * ALSA SoC Synopsys I2S Audio Layer
3 *
Rajeev Kumar22a4adf2013-06-11 09:29:08 +05304 * sound/soc/dwc/designware_i2s.c
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +05305 *
6 * Copyright (C) 2010 ST Microelectronics
Rajeev Kumar9a302c32014-09-05 16:47:04 +05307 * Rajeev Kumar <rajeevkumar.linux@gmail.com>
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +05308 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/clk.h>
15#include <linux/device.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/interrupt.h>
19#include <linux/module.h>
20#include <linux/slab.h>
21#include <sound/designware_i2s.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
25
26/* common register for all channel */
27#define IER 0x000
28#define IRER 0x004
29#define ITER 0x008
30#define CER 0x00C
31#define CCR 0x010
32#define RXFFR 0x014
33#define TXFFR 0x018
34
35/* I2STxRxRegisters for all channels */
36#define LRBR_LTHR(x) (0x40 * x + 0x020)
37#define RRBR_RTHR(x) (0x40 * x + 0x024)
38#define RER(x) (0x40 * x + 0x028)
39#define TER(x) (0x40 * x + 0x02C)
40#define RCR(x) (0x40 * x + 0x030)
41#define TCR(x) (0x40 * x + 0x034)
42#define ISR(x) (0x40 * x + 0x038)
43#define IMR(x) (0x40 * x + 0x03C)
44#define ROR(x) (0x40 * x + 0x040)
45#define TOR(x) (0x40 * x + 0x044)
46#define RFCR(x) (0x40 * x + 0x048)
47#define TFCR(x) (0x40 * x + 0x04C)
48#define RFF(x) (0x40 * x + 0x050)
49#define TFF(x) (0x40 * x + 0x054)
50
51/* I2SCOMPRegisters */
52#define I2S_COMP_PARAM_2 0x01F0
53#define I2S_COMP_PARAM_1 0x01F4
54#define I2S_COMP_VERSION 0x01F8
55#define I2S_COMP_TYPE 0x01FC
56
57#define MAX_CHANNEL_NUM 8
58#define MIN_CHANNEL_NUM 2
59
60struct dw_i2s_dev {
61 void __iomem *i2s_base;
62 struct clk *clk;
63 int active;
64 unsigned int capability;
65 struct device *dev;
66
67 /* data related to DMA transfers b/w i2s and DMAC */
68 struct i2s_dma_data play_dma_data;
69 struct i2s_dma_data capture_dma_data;
70 struct i2s_clk_config_data config;
71 int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
72};
73
Mark Brown6b4a21b2012-06-28 13:11:47 +010074static inline void i2s_write_reg(void __iomem *io_base, int reg, u32 val)
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +053075{
76 writel(val, io_base + reg);
77}
78
Mark Brown6b4a21b2012-06-28 13:11:47 +010079static inline u32 i2s_read_reg(void __iomem *io_base, int reg)
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +053080{
81 return readl(io_base + reg);
82}
83
84static inline void i2s_disable_channels(struct dw_i2s_dev *dev, u32 stream)
85{
86 u32 i = 0;
87
88 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
89 for (i = 0; i < 4; i++)
90 i2s_write_reg(dev->i2s_base, TER(i), 0);
91 } else {
92 for (i = 0; i < 4; i++)
93 i2s_write_reg(dev->i2s_base, RER(i), 0);
94 }
95}
96
97static inline void i2s_clear_irqs(struct dw_i2s_dev *dev, u32 stream)
98{
99 u32 i = 0;
100
101 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
102 for (i = 0; i < 4; i++)
103 i2s_write_reg(dev->i2s_base, TOR(i), 0);
104 } else {
105 for (i = 0; i < 4; i++)
106 i2s_write_reg(dev->i2s_base, ROR(i), 0);
107 }
108}
109
Mark Brown1520ffd2012-07-04 19:04:11 +0100110static void i2s_start(struct dw_i2s_dev *dev,
111 struct snd_pcm_substream *substream)
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530112{
113
114 i2s_write_reg(dev->i2s_base, IER, 1);
115
116 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
117 i2s_write_reg(dev->i2s_base, ITER, 1);
118 else
119 i2s_write_reg(dev->i2s_base, IRER, 1);
120
121 i2s_write_reg(dev->i2s_base, CER, 1);
122}
123
124static void i2s_stop(struct dw_i2s_dev *dev,
125 struct snd_pcm_substream *substream)
126{
127 u32 i = 0, irq;
128
129 i2s_clear_irqs(dev, substream->stream);
130 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
131 i2s_write_reg(dev->i2s_base, ITER, 0);
132
133 for (i = 0; i < 4; i++) {
134 irq = i2s_read_reg(dev->i2s_base, IMR(i));
135 i2s_write_reg(dev->i2s_base, IMR(i), irq | 0x30);
136 }
137 } else {
138 i2s_write_reg(dev->i2s_base, IRER, 0);
139
140 for (i = 0; i < 4; i++) {
141 irq = i2s_read_reg(dev->i2s_base, IMR(i));
142 i2s_write_reg(dev->i2s_base, IMR(i), irq | 0x03);
143 }
144 }
145
146 if (!dev->active) {
147 i2s_write_reg(dev->i2s_base, CER, 0);
148 i2s_write_reg(dev->i2s_base, IER, 0);
149 }
150}
151
152static int dw_i2s_startup(struct snd_pcm_substream *substream,
153 struct snd_soc_dai *cpu_dai)
154{
155 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
156 struct i2s_dma_data *dma_data = NULL;
157
158 if (!(dev->capability & DWC_I2S_RECORD) &&
159 (substream->stream == SNDRV_PCM_STREAM_CAPTURE))
160 return -EINVAL;
161
162 if (!(dev->capability & DWC_I2S_PLAY) &&
163 (substream->stream == SNDRV_PCM_STREAM_PLAYBACK))
164 return -EINVAL;
165
166 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
167 dma_data = &dev->play_dma_data;
168 else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
169 dma_data = &dev->capture_dma_data;
170
171 snd_soc_dai_set_dma_data(cpu_dai, substream, (void *)dma_data);
172
173 return 0;
174}
175
176static int dw_i2s_hw_params(struct snd_pcm_substream *substream,
177 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
178{
179 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
180 struct i2s_clk_config_data *config = &dev->config;
181 u32 ccr, xfer_resolution, ch_reg, irq;
182 int ret;
183
184 switch (params_format(params)) {
185 case SNDRV_PCM_FORMAT_S16_LE:
186 config->data_width = 16;
187 ccr = 0x00;
188 xfer_resolution = 0x02;
189 break;
190
191 case SNDRV_PCM_FORMAT_S24_LE:
192 config->data_width = 24;
193 ccr = 0x08;
194 xfer_resolution = 0x04;
195 break;
196
197 case SNDRV_PCM_FORMAT_S32_LE:
198 config->data_width = 32;
199 ccr = 0x10;
200 xfer_resolution = 0x05;
201 break;
202
203 default:
204 dev_err(dev->dev, "designware-i2s: unsuppted PCM fmt");
205 return -EINVAL;
206 }
207
208 config->chan_nr = params_channels(params);
209
210 switch (config->chan_nr) {
211 case EIGHT_CHANNEL_SUPPORT:
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530212 case SIX_CHANNEL_SUPPORT:
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530213 case FOUR_CHANNEL_SUPPORT:
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530214 case TWO_CHANNEL_SUPPORT:
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530215 break;
216 default:
217 dev_err(dev->dev, "channel not supported\n");
Dan Carpenter0099d242013-01-25 09:43:43 +0300218 return -EINVAL;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530219 }
220
221 i2s_disable_channels(dev, substream->stream);
222
Andrew Jacksondb2c1f92014-12-19 16:18:06 +0000223 for (ch_reg = 0; ch_reg < (config->chan_nr / 2); ch_reg++) {
224 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
225 i2s_write_reg(dev->i2s_base, TCR(ch_reg),
226 xfer_resolution);
227 i2s_write_reg(dev->i2s_base, TFCR(ch_reg), 0x02);
228 irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
229 i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x30);
230 i2s_write_reg(dev->i2s_base, TER(ch_reg), 1);
231 } else {
232 i2s_write_reg(dev->i2s_base, RCR(ch_reg),
233 xfer_resolution);
234 i2s_write_reg(dev->i2s_base, RFCR(ch_reg), 0x07);
235 irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
236 i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x03);
237 i2s_write_reg(dev->i2s_base, RER(ch_reg), 1);
238 }
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530239 }
240
241 i2s_write_reg(dev->i2s_base, CCR, ccr);
242
243 config->sample_rate = params_rate(params);
244
245 if (!dev->i2s_clk_cfg)
246 return -EINVAL;
247
248 ret = dev->i2s_clk_cfg(config);
249 if (ret < 0) {
250 dev_err(dev->dev, "runtime audio clk config fail\n");
251 return ret;
252 }
253
254 return 0;
255}
256
257static void dw_i2s_shutdown(struct snd_pcm_substream *substream,
258 struct snd_soc_dai *dai)
259{
260 snd_soc_dai_set_dma_data(dai, substream, NULL);
261}
262
Andrew Jackson3475c3d2014-12-19 16:18:05 +0000263static int dw_i2s_prepare(struct snd_pcm_substream *substream,
264 struct snd_soc_dai *dai)
265{
266 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
267
268 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
269 i2s_write_reg(dev->i2s_base, TXFFR, 1);
270 else
271 i2s_write_reg(dev->i2s_base, RXFFR, 1);
272
273 return 0;
274}
275
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530276static int dw_i2s_trigger(struct snd_pcm_substream *substream,
277 int cmd, struct snd_soc_dai *dai)
278{
279 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
280 int ret = 0;
281
282 switch (cmd) {
283 case SNDRV_PCM_TRIGGER_START:
284 case SNDRV_PCM_TRIGGER_RESUME:
285 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
286 dev->active++;
287 i2s_start(dev, substream);
288 break;
289
290 case SNDRV_PCM_TRIGGER_STOP:
291 case SNDRV_PCM_TRIGGER_SUSPEND:
292 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
293 dev->active--;
294 i2s_stop(dev, substream);
295 break;
296 default:
297 ret = -EINVAL;
298 break;
299 }
300 return ret;
301}
302
303static struct snd_soc_dai_ops dw_i2s_dai_ops = {
304 .startup = dw_i2s_startup,
305 .shutdown = dw_i2s_shutdown,
306 .hw_params = dw_i2s_hw_params,
Andrew Jackson3475c3d2014-12-19 16:18:05 +0000307 .prepare = dw_i2s_prepare,
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530308 .trigger = dw_i2s_trigger,
309};
310
Kuninori Morimoto92eaa322013-03-21 03:31:30 -0700311static const struct snd_soc_component_driver dw_i2s_component = {
312 .name = "dw-i2s",
313};
314
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530315#ifdef CONFIG_PM
316
317static int dw_i2s_suspend(struct snd_soc_dai *dai)
318{
319 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
320
321 clk_disable(dev->clk);
322 return 0;
323}
324
325static int dw_i2s_resume(struct snd_soc_dai *dai)
326{
327 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
328
329 clk_enable(dev->clk);
330 return 0;
331}
332
333#else
334#define dw_i2s_suspend NULL
335#define dw_i2s_resume NULL
336#endif
337
338static int dw_i2s_probe(struct platform_device *pdev)
339{
340 const struct i2s_platform_data *pdata = pdev->dev.platform_data;
341 struct dw_i2s_dev *dev;
342 struct resource *res;
343 int ret;
344 unsigned int cap;
345 struct snd_soc_dai_driver *dw_i2s_dai;
346
347 if (!pdata) {
348 dev_err(&pdev->dev, "Invalid platform data\n");
349 return -EINVAL;
350 }
351
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530352 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
353 if (!dev) {
354 dev_warn(&pdev->dev, "kzalloc fail\n");
355 return -ENOMEM;
356 }
357
Andrew Jacksonb163be42014-12-03 16:38:46 +0000358 dw_i2s_dai = devm_kzalloc(&pdev->dev, sizeof(*dw_i2s_dai), GFP_KERNEL);
359 if (!dw_i2s_dai) {
360 dev_err(&pdev->dev, "mem allocation failed for dai driver\n");
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530361 return -ENOMEM;
362 }
363
Andrew Jacksonb163be42014-12-03 16:38:46 +0000364 dw_i2s_dai->ops = &dw_i2s_dai_ops;
365 dw_i2s_dai->suspend = dw_i2s_suspend;
366 dw_i2s_dai->resume = dw_i2s_resume;
367
368 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
369 if (!res) {
370 dev_err(&pdev->dev, "no i2s resource defined\n");
371 return -ENODEV;
372 }
373
374 dev->i2s_base = devm_ioremap_resource(&pdev->dev, res);
375 if (IS_ERR(dev->i2s_base)) {
376 dev_err(&pdev->dev, "ioremap fail for i2s_region\n");
377 return PTR_ERR(dev->i2s_base);
378 }
379
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530380 cap = pdata->cap;
381 dev->capability = cap;
382 dev->i2s_clk_cfg = pdata->i2s_clk_cfg;
383
384 /* Set DMA slaves info */
385
386 dev->play_dma_data.data = pdata->play_dma_data;
387 dev->capture_dma_data.data = pdata->capture_dma_data;
388 dev->play_dma_data.addr = res->start + I2S_TXDMA;
389 dev->capture_dma_data.addr = res->start + I2S_RXDMA;
390 dev->play_dma_data.max_burst = 16;
391 dev->capture_dma_data.max_burst = 16;
392 dev->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
393 dev->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
394 dev->play_dma_data.filter = pdata->filter;
395 dev->capture_dma_data.filter = pdata->filter;
396
397 dev->clk = clk_get(&pdev->dev, NULL);
398 if (IS_ERR(dev->clk))
399 return PTR_ERR(dev->clk);
400
401 ret = clk_enable(dev->clk);
402 if (ret < 0)
403 goto err_clk_put;
404
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530405 if (cap & DWC_I2S_PLAY) {
Rajeev Kumar5e83c162013-06-11 09:29:07 +0530406 dev_dbg(&pdev->dev, " designware: play supported\n");
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530407 dw_i2s_dai->playback.channels_min = MIN_CHANNEL_NUM;
408 dw_i2s_dai->playback.channels_max = pdata->channel;
409 dw_i2s_dai->playback.formats = pdata->snd_fmts;
410 dw_i2s_dai->playback.rates = pdata->snd_rates;
411 }
412
413 if (cap & DWC_I2S_RECORD) {
Rajeev Kumar5e83c162013-06-11 09:29:07 +0530414 dev_dbg(&pdev->dev, "designware: record supported\n");
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530415 dw_i2s_dai->capture.channels_min = MIN_CHANNEL_NUM;
416 dw_i2s_dai->capture.channels_max = pdata->channel;
417 dw_i2s_dai->capture.formats = pdata->snd_fmts;
418 dw_i2s_dai->capture.rates = pdata->snd_rates;
419 }
420
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530421 dev->dev = &pdev->dev;
422 dev_set_drvdata(&pdev->dev, dev);
Kuninori Morimoto92eaa322013-03-21 03:31:30 -0700423 ret = snd_soc_register_component(&pdev->dev, &dw_i2s_component,
424 dw_i2s_dai, 1);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530425 if (ret != 0) {
426 dev_err(&pdev->dev, "not able to register dai\n");
Fabio Estevame925a6b2013-08-26 09:25:15 -0300427 goto err_clk_disable;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530428 }
429
430 return 0;
431
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530432err_clk_disable:
433 clk_disable(dev->clk);
434err_clk_put:
435 clk_put(dev->clk);
436 return ret;
437}
438
439static int dw_i2s_remove(struct platform_device *pdev)
440{
441 struct dw_i2s_dev *dev = dev_get_drvdata(&pdev->dev);
442
Kuninori Morimoto92eaa322013-03-21 03:31:30 -0700443 snd_soc_unregister_component(&pdev->dev);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530444
445 clk_put(dev->clk);
446
447 return 0;
448}
449
450static struct platform_driver dw_i2s_driver = {
451 .probe = dw_i2s_probe,
452 .remove = dw_i2s_remove,
453 .driver = {
454 .name = "designware-i2s",
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530455 },
456};
457
458module_platform_driver(dw_i2s_driver);
459
Rajeev Kumarb794dbc2014-09-09 12:27:19 +0530460MODULE_AUTHOR("Rajeev Kumar <rajeevkumar.linux@gmail.com>");
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530461MODULE_DESCRIPTION("DESIGNWARE I2S SoC Interface");
462MODULE_LICENSE("GPL");
463MODULE_ALIAS("platform:designware_i2s");