Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* $Id: aty128fb.c,v 1.1.1.1.36.1 1999/12/11 09:03:05 Exp $ |
| 2 | * linux/drivers/video/aty128fb.c -- Frame buffer device for ATI Rage128 |
| 3 | * |
| 4 | * Copyright (C) 1999-2003, Brad Douglas <brad@neruo.com> |
| 5 | * Copyright (C) 1999, Anthony Tong <atong@uiuc.edu> |
| 6 | * |
| 7 | * Ani Joshi / Jeff Garzik |
| 8 | * - Code cleanup |
| 9 | * |
| 10 | * Michel Danzer <michdaen@iiic.ethz.ch> |
| 11 | * - 15/16 bit cleanup |
| 12 | * - fix panning |
| 13 | * |
| 14 | * Benjamin Herrenschmidt |
| 15 | * - pmac-specific PM stuff |
| 16 | * - various fixes & cleanups |
| 17 | * |
| 18 | * Andreas Hundt <andi@convergence.de> |
| 19 | * - FB_ACTIVATE fixes |
| 20 | * |
| 21 | * Paul Mackerras <paulus@samba.org> |
| 22 | * - Convert to new framebuffer API, |
| 23 | * fix colormap setting at 16 bits/pixel (565) |
| 24 | * |
| 25 | * Paul Mundt |
| 26 | * - PCI hotplug |
| 27 | * |
| 28 | * Jon Smirl <jonsmirl@yahoo.com> |
| 29 | * - PCI ID update |
| 30 | * - replace ROM BIOS search |
| 31 | * |
| 32 | * Based off of Geert's atyfb.c and vfb.c. |
| 33 | * |
| 34 | * TODO: |
| 35 | * - monitor sensing (DDC) |
| 36 | * - virtual display |
| 37 | * - other platform support (only ppc/x86 supported) |
| 38 | * - hardware cursor support |
| 39 | * |
| 40 | * Please cc: your patches to brad@neruo.com. |
| 41 | */ |
| 42 | |
| 43 | /* |
| 44 | * A special note of gratitude to ATI's devrel for providing documentation, |
| 45 | * example code and hardware. Thanks Nitya. -atong and brad |
| 46 | */ |
| 47 | |
| 48 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | #include <linux/module.h> |
| 50 | #include <linux/moduleparam.h> |
| 51 | #include <linux/kernel.h> |
| 52 | #include <linux/errno.h> |
| 53 | #include <linux/string.h> |
| 54 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | #include <linux/vmalloc.h> |
| 56 | #include <linux/delay.h> |
| 57 | #include <linux/interrupt.h> |
Krzysztof Helt | 84902b7 | 2007-10-16 01:29:04 -0700 | [diff] [blame] | 58 | #include <linux/uaccess.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | #include <linux/fb.h> |
| 60 | #include <linux/init.h> |
| 61 | #include <linux/pci.h> |
| 62 | #include <linux/ioport.h> |
| 63 | #include <linux/console.h> |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 64 | #include <linux/backlight.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | #include <asm/io.h> |
| 66 | |
| 67 | #ifdef CONFIG_PPC_PMAC |
Benjamin Herrenschmidt | e822250 | 2006-03-28 23:15:54 +1100 | [diff] [blame] | 68 | #include <asm/machdep.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | #include <asm/pmac_feature.h> |
| 70 | #include <asm/prom.h> |
| 71 | #include <asm/pci-bridge.h> |
| 72 | #include "../macmodes.h" |
| 73 | #endif |
| 74 | |
| 75 | #ifdef CONFIG_PMAC_BACKLIGHT |
| 76 | #include <asm/backlight.h> |
| 77 | #endif |
| 78 | |
| 79 | #ifdef CONFIG_BOOTX_TEXT |
| 80 | #include <asm/btext.h> |
| 81 | #endif /* CONFIG_BOOTX_TEXT */ |
| 82 | |
| 83 | #ifdef CONFIG_MTRR |
| 84 | #include <asm/mtrr.h> |
| 85 | #endif |
| 86 | |
| 87 | #include <video/aty128.h> |
| 88 | |
| 89 | /* Debug flag */ |
| 90 | #undef DEBUG |
| 91 | |
| 92 | #ifdef DEBUG |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 93 | #define DBG(fmt, args...) \ |
| 94 | printk(KERN_DEBUG "aty128fb: %s " fmt, __func__, ##args); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | #else |
| 96 | #define DBG(fmt, args...) |
| 97 | #endif |
| 98 | |
| 99 | #ifndef CONFIG_PPC_PMAC |
| 100 | /* default mode */ |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 101 | static struct fb_var_screeninfo default_var = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */ |
| 103 | 640, 480, 640, 480, 0, 0, 8, 0, |
| 104 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, |
| 105 | 0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2, |
| 106 | 0, FB_VMODE_NONINTERLACED |
| 107 | }; |
| 108 | |
| 109 | #else /* CONFIG_PPC_PMAC */ |
| 110 | /* default to 1024x768 at 75Hz on PPC - this will work |
| 111 | * on the iMac, the usual 640x480 @ 60Hz doesn't. */ |
| 112 | static struct fb_var_screeninfo default_var = { |
| 113 | /* 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) */ |
| 114 | 1024, 768, 1024, 768, 0, 0, 8, 0, |
| 115 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, |
| 116 | 0, 0, -1, -1, 0, 12699, 160, 32, 28, 1, 96, 3, |
| 117 | FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 118 | FB_VMODE_NONINTERLACED |
| 119 | }; |
| 120 | #endif /* CONFIG_PPC_PMAC */ |
| 121 | |
| 122 | /* default modedb mode */ |
| 123 | /* 640x480, 60 Hz, Non-Interlaced (25.172 MHz dotclock) */ |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 124 | static struct fb_videomode defaultmode = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | .refresh = 60, |
| 126 | .xres = 640, |
| 127 | .yres = 480, |
| 128 | .pixclock = 39722, |
| 129 | .left_margin = 48, |
| 130 | .right_margin = 16, |
| 131 | .upper_margin = 33, |
| 132 | .lower_margin = 10, |
| 133 | .hsync_len = 96, |
| 134 | .vsync_len = 2, |
| 135 | .sync = 0, |
| 136 | .vmode = FB_VMODE_NONINTERLACED |
| 137 | }; |
| 138 | |
| 139 | /* Chip generations */ |
| 140 | enum { |
| 141 | rage_128, |
| 142 | rage_128_pci, |
| 143 | rage_128_pro, |
| 144 | rage_128_pro_pci, |
| 145 | rage_M3, |
| 146 | rage_M3_pci, |
| 147 | rage_M4, |
| 148 | rage_128_ultra, |
| 149 | }; |
| 150 | |
| 151 | /* Must match above enum */ |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 152 | static char * const r128_family[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | "AGP", |
| 154 | "PCI", |
| 155 | "PRO AGP", |
| 156 | "PRO PCI", |
| 157 | "M3 AGP", |
| 158 | "M3 PCI", |
| 159 | "M4 AGP", |
| 160 | "Ultra AGP", |
| 161 | }; |
| 162 | |
| 163 | /* |
| 164 | * PCI driver prototypes |
| 165 | */ |
| 166 | static int aty128_probe(struct pci_dev *pdev, |
| 167 | const struct pci_device_id *ent); |
| 168 | static void aty128_remove(struct pci_dev *pdev); |
| 169 | static int aty128_pci_suspend(struct pci_dev *pdev, pm_message_t state); |
| 170 | static int aty128_pci_resume(struct pci_dev *pdev); |
| 171 | static int aty128_do_resume(struct pci_dev *pdev); |
| 172 | |
| 173 | /* supported Rage128 chipsets */ |
| 174 | static struct pci_device_id aty128_pci_tbl[] = { |
| 175 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LE, |
| 176 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3_pci }, |
| 177 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LF, |
| 178 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 }, |
| 179 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_MF, |
| 180 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M4 }, |
| 181 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_ML, |
| 182 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M4 }, |
| 183 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PA, |
| 184 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 185 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PB, |
| 186 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 187 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PC, |
| 188 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 189 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PD, |
| 190 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro_pci }, |
| 191 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PE, |
| 192 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 193 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PF, |
| 194 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 195 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PG, |
| 196 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 197 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PH, |
| 198 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 199 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PI, |
| 200 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 201 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PJ, |
| 202 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 203 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PK, |
| 204 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 205 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PL, |
| 206 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 207 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PM, |
| 208 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 209 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PN, |
| 210 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 211 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PO, |
| 212 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 213 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PP, |
| 214 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro_pci }, |
| 215 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PQ, |
| 216 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 217 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PR, |
| 218 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro_pci }, |
| 219 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PS, |
| 220 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 221 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PT, |
| 222 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 223 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PU, |
| 224 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 225 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PV, |
| 226 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 227 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PW, |
| 228 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 229 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PX, |
| 230 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, |
| 231 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RE, |
| 232 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pci }, |
| 233 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RF, |
| 234 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 235 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RG, |
| 236 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 237 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RK, |
| 238 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pci }, |
| 239 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RL, |
| 240 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 241 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SE, |
| 242 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 243 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SF, |
| 244 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pci }, |
| 245 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SG, |
| 246 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 247 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SH, |
| 248 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 249 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SK, |
| 250 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 251 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SL, |
| 252 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 253 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SM, |
| 254 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 255 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SN, |
| 256 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, |
| 257 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TF, |
| 258 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, |
| 259 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TL, |
| 260 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, |
| 261 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TR, |
| 262 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, |
| 263 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TS, |
| 264 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, |
| 265 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TT, |
| 266 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, |
| 267 | { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TU, |
| 268 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, |
| 269 | { 0, } |
| 270 | }; |
| 271 | |
| 272 | MODULE_DEVICE_TABLE(pci, aty128_pci_tbl); |
| 273 | |
| 274 | static struct pci_driver aty128fb_driver = { |
| 275 | .name = "aty128fb", |
| 276 | .id_table = aty128_pci_tbl, |
| 277 | .probe = aty128_probe, |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 278 | .remove = aty128_remove, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | .suspend = aty128_pci_suspend, |
| 280 | .resume = aty128_pci_resume, |
| 281 | }; |
| 282 | |
| 283 | /* packed BIOS settings */ |
| 284 | #ifndef CONFIG_PPC |
| 285 | typedef struct { |
| 286 | u8 clock_chip_type; |
| 287 | u8 struct_size; |
| 288 | u8 accelerator_entry; |
| 289 | u8 VGA_entry; |
| 290 | u16 VGA_table_offset; |
| 291 | u16 POST_table_offset; |
| 292 | u16 XCLK; |
| 293 | u16 MCLK; |
| 294 | u8 num_PLL_blocks; |
| 295 | u8 size_PLL_blocks; |
| 296 | u16 PCLK_ref_freq; |
| 297 | u16 PCLK_ref_divider; |
| 298 | u32 PCLK_min_freq; |
| 299 | u32 PCLK_max_freq; |
| 300 | u16 MCLK_ref_freq; |
| 301 | u16 MCLK_ref_divider; |
| 302 | u32 MCLK_min_freq; |
| 303 | u32 MCLK_max_freq; |
| 304 | u16 XCLK_ref_freq; |
| 305 | u16 XCLK_ref_divider; |
| 306 | u32 XCLK_min_freq; |
| 307 | u32 XCLK_max_freq; |
| 308 | } __attribute__ ((packed)) PLL_BLOCK; |
| 309 | #endif /* !CONFIG_PPC */ |
| 310 | |
| 311 | /* onboard memory information */ |
| 312 | struct aty128_meminfo { |
| 313 | u8 ML; |
| 314 | u8 MB; |
| 315 | u8 Trcd; |
| 316 | u8 Trp; |
| 317 | u8 Twr; |
| 318 | u8 CL; |
| 319 | u8 Tr2w; |
| 320 | u8 LoopLatency; |
| 321 | u8 DspOn; |
| 322 | u8 Rloop; |
| 323 | const char *name; |
| 324 | }; |
| 325 | |
| 326 | /* various memory configurations */ |
| 327 | static const struct aty128_meminfo sdr_128 = |
| 328 | { 4, 4, 3, 3, 1, 3, 1, 16, 30, 16, "128-bit SDR SGRAM (1:1)" }; |
| 329 | static const struct aty128_meminfo sdr_64 = |
| 330 | { 4, 8, 3, 3, 1, 3, 1, 17, 46, 17, "64-bit SDR SGRAM (1:1)" }; |
| 331 | static const struct aty128_meminfo sdr_sgram = |
| 332 | { 4, 4, 1, 2, 1, 2, 1, 16, 24, 16, "64-bit SDR SGRAM (2:1)" }; |
| 333 | static const struct aty128_meminfo ddr_sgram = |
| 334 | { 4, 4, 3, 3, 2, 3, 1, 16, 31, 16, "64-bit DDR SGRAM" }; |
| 335 | |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 336 | static struct fb_fix_screeninfo aty128fb_fix = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | .id = "ATY Rage128", |
| 338 | .type = FB_TYPE_PACKED_PIXELS, |
| 339 | .visual = FB_VISUAL_PSEUDOCOLOR, |
| 340 | .xpanstep = 8, |
| 341 | .ypanstep = 1, |
| 342 | .mmio_len = 0x2000, |
| 343 | .accel = FB_ACCEL_ATI_RAGE128, |
| 344 | }; |
| 345 | |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 346 | static char *mode_option = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | |
| 348 | #ifdef CONFIG_PPC_PMAC |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 349 | static int default_vmode = VMODE_1024_768_60; |
| 350 | static int default_cmode = CMODE_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 351 | #endif |
| 352 | |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 353 | static int default_crt_on = 0; |
| 354 | static int default_lcd_on = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | |
| 356 | #ifdef CONFIG_MTRR |
Rusty Russell | 9a71af2 | 2009-06-12 21:46:53 -0600 | [diff] [blame] | 357 | static bool mtrr = true; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | #endif |
| 359 | |
David Howells | a79530e | 2014-01-23 15:54:06 -0800 | [diff] [blame] | 360 | #ifdef CONFIG_FB_ATY128_BACKLIGHT |
Richard Purdie | 202d4e6 | 2007-03-03 17:43:52 +0000 | [diff] [blame] | 361 | #ifdef CONFIG_PMAC_BACKLIGHT |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 362 | static int backlight = 1; |
Richard Purdie | 202d4e6 | 2007-03-03 17:43:52 +0000 | [diff] [blame] | 363 | #else |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 364 | static int backlight = 0; |
Richard Purdie | 202d4e6 | 2007-03-03 17:43:52 +0000 | [diff] [blame] | 365 | #endif |
David Howells | a79530e | 2014-01-23 15:54:06 -0800 | [diff] [blame] | 366 | #endif |
Richard Purdie | 202d4e6 | 2007-03-03 17:43:52 +0000 | [diff] [blame] | 367 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | /* PLL constants */ |
| 369 | struct aty128_constants { |
| 370 | u32 ref_clk; |
| 371 | u32 ppll_min; |
| 372 | u32 ppll_max; |
| 373 | u32 ref_divider; |
| 374 | u32 xclk; |
| 375 | u32 fifo_width; |
| 376 | u32 fifo_depth; |
| 377 | }; |
| 378 | |
| 379 | struct aty128_crtc { |
| 380 | u32 gen_cntl; |
| 381 | u32 h_total, h_sync_strt_wid; |
| 382 | u32 v_total, v_sync_strt_wid; |
| 383 | u32 pitch; |
| 384 | u32 offset, offset_cntl; |
| 385 | u32 xoffset, yoffset; |
| 386 | u32 vxres, vyres; |
| 387 | u32 depth, bpp; |
| 388 | }; |
| 389 | |
| 390 | struct aty128_pll { |
| 391 | u32 post_divider; |
| 392 | u32 feedback_divider; |
| 393 | u32 vclk; |
| 394 | }; |
| 395 | |
| 396 | struct aty128_ddafifo { |
| 397 | u32 dda_config; |
| 398 | u32 dda_on_off; |
| 399 | }; |
| 400 | |
| 401 | /* register values for a specific mode */ |
| 402 | struct aty128fb_par { |
| 403 | struct aty128_crtc crtc; |
| 404 | struct aty128_pll pll; |
| 405 | struct aty128_ddafifo fifo_reg; |
| 406 | u32 accel_flags; |
| 407 | struct aty128_constants constants; /* PLL and others */ |
| 408 | void __iomem *regbase; /* remapped mmio */ |
| 409 | u32 vram_size; /* onboard video ram */ |
| 410 | int chip_gen; |
| 411 | const struct aty128_meminfo *mem; /* onboard mem info */ |
| 412 | #ifdef CONFIG_MTRR |
| 413 | struct { int vram; int vram_valid; } mtrr; |
| 414 | #endif |
| 415 | int blitter_may_be_busy; |
| 416 | int fifo_slots; /* free slots in FIFO (64 max) */ |
| 417 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 418 | int crt_on, lcd_on; |
| 419 | struct pci_dev *pdev; |
| 420 | struct fb_info *next; |
| 421 | int asleep; |
| 422 | int lock_blank; |
| 423 | |
| 424 | u8 red[32]; /* see aty128fb_setcolreg */ |
| 425 | u8 green[64]; |
| 426 | u8 blue[32]; |
| 427 | u32 pseudo_palette[16]; /* used for TRUECOLOR */ |
| 428 | }; |
| 429 | |
| 430 | |
| 431 | #define round_div(n, d) ((n+(d/2))/d) |
| 432 | |
| 433 | static int aty128fb_check_var(struct fb_var_screeninfo *var, |
| 434 | struct fb_info *info); |
| 435 | static int aty128fb_set_par(struct fb_info *info); |
| 436 | static int aty128fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
| 437 | u_int transp, struct fb_info *info); |
| 438 | static int aty128fb_pan_display(struct fb_var_screeninfo *var, |
| 439 | struct fb_info *fb); |
| 440 | static int aty128fb_blank(int blank, struct fb_info *fb); |
Christoph Hellwig | 67a6680 | 2006-01-14 13:21:25 -0800 | [diff] [blame] | 441 | static int aty128fb_ioctl(struct fb_info *info, u_int cmd, unsigned long arg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | static int aty128fb_sync(struct fb_info *info); |
| 443 | |
| 444 | /* |
| 445 | * Internal routines |
| 446 | */ |
| 447 | |
| 448 | static int aty128_encode_var(struct fb_var_screeninfo *var, |
| 449 | const struct aty128fb_par *par); |
| 450 | static int aty128_decode_var(struct fb_var_screeninfo *var, |
| 451 | struct aty128fb_par *par); |
| 452 | #if 0 |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 453 | static void aty128_get_pllinfo(struct aty128fb_par *par, void __iomem *bios); |
| 454 | static void __iomem *aty128_map_ROM(struct pci_dev *pdev, |
| 455 | const struct aty128fb_par *par); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | #endif |
| 457 | static void aty128_timings(struct aty128fb_par *par); |
| 458 | static void aty128_init_engine(struct aty128fb_par *par); |
| 459 | static void aty128_reset_engine(const struct aty128fb_par *par); |
| 460 | static void aty128_flush_pixel_cache(const struct aty128fb_par *par); |
| 461 | static void do_wait_for_fifo(u16 entries, struct aty128fb_par *par); |
| 462 | static void wait_for_fifo(u16 entries, struct aty128fb_par *par); |
| 463 | static void wait_for_idle(struct aty128fb_par *par); |
| 464 | static u32 depth_to_dst(u32 depth); |
Michael Hanselmann | 4b75599 | 2006-07-30 03:04:19 -0700 | [diff] [blame] | 465 | |
| 466 | #ifdef CONFIG_FB_ATY128_BACKLIGHT |
Michael Hanselmann | e01af03 | 2006-07-10 04:44:45 -0700 | [diff] [blame] | 467 | static void aty128_bl_set_power(struct fb_info *info, int power); |
Michael Hanselmann | 4b75599 | 2006-07-30 03:04:19 -0700 | [diff] [blame] | 468 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 469 | |
| 470 | #define BIOS_IN8(v) (readb(bios + (v))) |
| 471 | #define BIOS_IN16(v) (readb(bios + (v)) | \ |
| 472 | (readb(bios + (v) + 1) << 8)) |
| 473 | #define BIOS_IN32(v) (readb(bios + (v)) | \ |
| 474 | (readb(bios + (v) + 1) << 8) | \ |
| 475 | (readb(bios + (v) + 2) << 16) | \ |
| 476 | (readb(bios + (v) + 3) << 24)) |
| 477 | |
| 478 | |
| 479 | static struct fb_ops aty128fb_ops = { |
| 480 | .owner = THIS_MODULE, |
| 481 | .fb_check_var = aty128fb_check_var, |
| 482 | .fb_set_par = aty128fb_set_par, |
| 483 | .fb_setcolreg = aty128fb_setcolreg, |
| 484 | .fb_pan_display = aty128fb_pan_display, |
| 485 | .fb_blank = aty128fb_blank, |
| 486 | .fb_ioctl = aty128fb_ioctl, |
| 487 | .fb_sync = aty128fb_sync, |
| 488 | .fb_fillrect = cfb_fillrect, |
| 489 | .fb_copyarea = cfb_copyarea, |
| 490 | .fb_imageblit = cfb_imageblit, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 491 | }; |
| 492 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 493 | /* |
| 494 | * Functions to read from/write to the mmio registers |
| 495 | * - endian conversions may possibly be avoided by |
| 496 | * using the other register aperture. TODO. |
| 497 | */ |
| 498 | static inline u32 _aty_ld_le32(volatile unsigned int regindex, |
| 499 | const struct aty128fb_par *par) |
| 500 | { |
| 501 | return readl (par->regbase + regindex); |
| 502 | } |
| 503 | |
| 504 | static inline void _aty_st_le32(volatile unsigned int regindex, u32 val, |
| 505 | const struct aty128fb_par *par) |
| 506 | { |
| 507 | writel (val, par->regbase + regindex); |
| 508 | } |
| 509 | |
| 510 | static inline u8 _aty_ld_8(unsigned int regindex, |
| 511 | const struct aty128fb_par *par) |
| 512 | { |
| 513 | return readb (par->regbase + regindex); |
| 514 | } |
| 515 | |
| 516 | static inline void _aty_st_8(unsigned int regindex, u8 val, |
| 517 | const struct aty128fb_par *par) |
| 518 | { |
| 519 | writeb (val, par->regbase + regindex); |
| 520 | } |
| 521 | |
| 522 | #define aty_ld_le32(regindex) _aty_ld_le32(regindex, par) |
| 523 | #define aty_st_le32(regindex, val) _aty_st_le32(regindex, val, par) |
| 524 | #define aty_ld_8(regindex) _aty_ld_8(regindex, par) |
| 525 | #define aty_st_8(regindex, val) _aty_st_8(regindex, val, par) |
| 526 | |
| 527 | /* |
| 528 | * Functions to read from/write to the pll registers |
| 529 | */ |
| 530 | |
| 531 | #define aty_ld_pll(pll_index) _aty_ld_pll(pll_index, par) |
| 532 | #define aty_st_pll(pll_index, val) _aty_st_pll(pll_index, val, par) |
| 533 | |
| 534 | |
| 535 | static u32 _aty_ld_pll(unsigned int pll_index, |
| 536 | const struct aty128fb_par *par) |
| 537 | { |
| 538 | aty_st_8(CLOCK_CNTL_INDEX, pll_index & 0x3F); |
| 539 | return aty_ld_le32(CLOCK_CNTL_DATA); |
| 540 | } |
| 541 | |
| 542 | |
| 543 | static void _aty_st_pll(unsigned int pll_index, u32 val, |
| 544 | const struct aty128fb_par *par) |
| 545 | { |
| 546 | aty_st_8(CLOCK_CNTL_INDEX, (pll_index & 0x3F) | PLL_WR_EN); |
| 547 | aty_st_le32(CLOCK_CNTL_DATA, val); |
| 548 | } |
| 549 | |
| 550 | |
| 551 | /* return true when the PLL has completed an atomic update */ |
| 552 | static int aty_pll_readupdate(const struct aty128fb_par *par) |
| 553 | { |
| 554 | return !(aty_ld_pll(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); |
| 555 | } |
| 556 | |
| 557 | |
| 558 | static void aty_pll_wait_readupdate(const struct aty128fb_par *par) |
| 559 | { |
| 560 | unsigned long timeout = jiffies + HZ/100; // should be more than enough |
| 561 | int reset = 1; |
| 562 | |
| 563 | while (time_before(jiffies, timeout)) |
| 564 | if (aty_pll_readupdate(par)) { |
| 565 | reset = 0; |
| 566 | break; |
| 567 | } |
| 568 | |
| 569 | if (reset) /* reset engine?? */ |
| 570 | printk(KERN_DEBUG "aty128fb: PLL write timeout!\n"); |
| 571 | } |
| 572 | |
| 573 | |
| 574 | /* tell PLL to update */ |
| 575 | static void aty_pll_writeupdate(const struct aty128fb_par *par) |
| 576 | { |
| 577 | aty_pll_wait_readupdate(par); |
| 578 | |
| 579 | aty_st_pll(PPLL_REF_DIV, |
| 580 | aty_ld_pll(PPLL_REF_DIV) | PPLL_ATOMIC_UPDATE_W); |
| 581 | } |
| 582 | |
| 583 | |
| 584 | /* write to the scratch register to test r/w functionality */ |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 585 | static int register_test(const struct aty128fb_par *par) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | { |
| 587 | u32 val; |
| 588 | int flag = 0; |
| 589 | |
| 590 | val = aty_ld_le32(BIOS_0_SCRATCH); |
| 591 | |
| 592 | aty_st_le32(BIOS_0_SCRATCH, 0x55555555); |
| 593 | if (aty_ld_le32(BIOS_0_SCRATCH) == 0x55555555) { |
| 594 | aty_st_le32(BIOS_0_SCRATCH, 0xAAAAAAAA); |
| 595 | |
| 596 | if (aty_ld_le32(BIOS_0_SCRATCH) == 0xAAAAAAAA) |
| 597 | flag = 1; |
| 598 | } |
| 599 | |
| 600 | aty_st_le32(BIOS_0_SCRATCH, val); // restore value |
| 601 | return flag; |
| 602 | } |
| 603 | |
| 604 | |
| 605 | /* |
| 606 | * Accelerator engine functions |
| 607 | */ |
| 608 | static void do_wait_for_fifo(u16 entries, struct aty128fb_par *par) |
| 609 | { |
| 610 | int i; |
| 611 | |
| 612 | for (;;) { |
| 613 | for (i = 0; i < 2000000; i++) { |
| 614 | par->fifo_slots = aty_ld_le32(GUI_STAT) & 0x0fff; |
| 615 | if (par->fifo_slots >= entries) |
| 616 | return; |
| 617 | } |
| 618 | aty128_reset_engine(par); |
| 619 | } |
| 620 | } |
| 621 | |
| 622 | |
| 623 | static void wait_for_idle(struct aty128fb_par *par) |
| 624 | { |
| 625 | int i; |
| 626 | |
| 627 | do_wait_for_fifo(64, par); |
| 628 | |
| 629 | for (;;) { |
| 630 | for (i = 0; i < 2000000; i++) { |
| 631 | if (!(aty_ld_le32(GUI_STAT) & (1 << 31))) { |
| 632 | aty128_flush_pixel_cache(par); |
| 633 | par->blitter_may_be_busy = 0; |
| 634 | return; |
| 635 | } |
| 636 | } |
| 637 | aty128_reset_engine(par); |
| 638 | } |
| 639 | } |
| 640 | |
| 641 | |
| 642 | static void wait_for_fifo(u16 entries, struct aty128fb_par *par) |
| 643 | { |
| 644 | if (par->fifo_slots < entries) |
| 645 | do_wait_for_fifo(64, par); |
| 646 | par->fifo_slots -= entries; |
| 647 | } |
| 648 | |
| 649 | |
| 650 | static void aty128_flush_pixel_cache(const struct aty128fb_par *par) |
| 651 | { |
| 652 | int i; |
| 653 | u32 tmp; |
| 654 | |
| 655 | tmp = aty_ld_le32(PC_NGUI_CTLSTAT); |
| 656 | tmp &= ~(0x00ff); |
| 657 | tmp |= 0x00ff; |
| 658 | aty_st_le32(PC_NGUI_CTLSTAT, tmp); |
| 659 | |
| 660 | for (i = 0; i < 2000000; i++) |
| 661 | if (!(aty_ld_le32(PC_NGUI_CTLSTAT) & PC_BUSY)) |
| 662 | break; |
| 663 | } |
| 664 | |
| 665 | |
| 666 | static void aty128_reset_engine(const struct aty128fb_par *par) |
| 667 | { |
| 668 | u32 gen_reset_cntl, clock_cntl_index, mclk_cntl; |
| 669 | |
| 670 | aty128_flush_pixel_cache(par); |
| 671 | |
| 672 | clock_cntl_index = aty_ld_le32(CLOCK_CNTL_INDEX); |
| 673 | mclk_cntl = aty_ld_pll(MCLK_CNTL); |
| 674 | |
| 675 | aty_st_pll(MCLK_CNTL, mclk_cntl | 0x00030000); |
| 676 | |
| 677 | gen_reset_cntl = aty_ld_le32(GEN_RESET_CNTL); |
| 678 | aty_st_le32(GEN_RESET_CNTL, gen_reset_cntl | SOFT_RESET_GUI); |
| 679 | aty_ld_le32(GEN_RESET_CNTL); |
| 680 | aty_st_le32(GEN_RESET_CNTL, gen_reset_cntl & ~(SOFT_RESET_GUI)); |
| 681 | aty_ld_le32(GEN_RESET_CNTL); |
| 682 | |
| 683 | aty_st_pll(MCLK_CNTL, mclk_cntl); |
| 684 | aty_st_le32(CLOCK_CNTL_INDEX, clock_cntl_index); |
| 685 | aty_st_le32(GEN_RESET_CNTL, gen_reset_cntl); |
| 686 | |
| 687 | /* use old pio mode */ |
| 688 | aty_st_le32(PM4_BUFFER_CNTL, PM4_BUFFER_CNTL_NONPM4); |
| 689 | |
| 690 | DBG("engine reset"); |
| 691 | } |
| 692 | |
| 693 | |
| 694 | static void aty128_init_engine(struct aty128fb_par *par) |
| 695 | { |
| 696 | u32 pitch_value; |
| 697 | |
| 698 | wait_for_idle(par); |
| 699 | |
| 700 | /* 3D scaler not spoken here */ |
| 701 | wait_for_fifo(1, par); |
| 702 | aty_st_le32(SCALE_3D_CNTL, 0x00000000); |
| 703 | |
| 704 | aty128_reset_engine(par); |
| 705 | |
| 706 | pitch_value = par->crtc.pitch; |
| 707 | if (par->crtc.bpp == 24) { |
| 708 | pitch_value = pitch_value * 3; |
| 709 | } |
| 710 | |
| 711 | wait_for_fifo(4, par); |
| 712 | /* setup engine offset registers */ |
| 713 | aty_st_le32(DEFAULT_OFFSET, 0x00000000); |
| 714 | |
| 715 | /* setup engine pitch registers */ |
| 716 | aty_st_le32(DEFAULT_PITCH, pitch_value); |
| 717 | |
| 718 | /* set the default scissor register to max dimensions */ |
| 719 | aty_st_le32(DEFAULT_SC_BOTTOM_RIGHT, (0x1FFF << 16) | 0x1FFF); |
| 720 | |
| 721 | /* set the drawing controls registers */ |
| 722 | aty_st_le32(DP_GUI_MASTER_CNTL, |
| 723 | GMC_SRC_PITCH_OFFSET_DEFAULT | |
| 724 | GMC_DST_PITCH_OFFSET_DEFAULT | |
| 725 | GMC_SRC_CLIP_DEFAULT | |
| 726 | GMC_DST_CLIP_DEFAULT | |
| 727 | GMC_BRUSH_SOLIDCOLOR | |
| 728 | (depth_to_dst(par->crtc.depth) << 8) | |
| 729 | GMC_SRC_DSTCOLOR | |
| 730 | GMC_BYTE_ORDER_MSB_TO_LSB | |
| 731 | GMC_DP_CONVERSION_TEMP_6500 | |
| 732 | ROP3_PATCOPY | |
| 733 | GMC_DP_SRC_RECT | |
| 734 | GMC_3D_FCN_EN_CLR | |
| 735 | GMC_DST_CLR_CMP_FCN_CLEAR | |
| 736 | GMC_AUX_CLIP_CLEAR | |
| 737 | GMC_WRITE_MASK_SET); |
| 738 | |
| 739 | wait_for_fifo(8, par); |
| 740 | /* clear the line drawing registers */ |
| 741 | aty_st_le32(DST_BRES_ERR, 0); |
| 742 | aty_st_le32(DST_BRES_INC, 0); |
| 743 | aty_st_le32(DST_BRES_DEC, 0); |
| 744 | |
| 745 | /* set brush color registers */ |
| 746 | aty_st_le32(DP_BRUSH_FRGD_CLR, 0xFFFFFFFF); /* white */ |
| 747 | aty_st_le32(DP_BRUSH_BKGD_CLR, 0x00000000); /* black */ |
| 748 | |
| 749 | /* set source color registers */ |
| 750 | aty_st_le32(DP_SRC_FRGD_CLR, 0xFFFFFFFF); /* white */ |
| 751 | aty_st_le32(DP_SRC_BKGD_CLR, 0x00000000); /* black */ |
| 752 | |
| 753 | /* default write mask */ |
| 754 | aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF); |
| 755 | |
| 756 | /* Wait for all the writes to be completed before returning */ |
| 757 | wait_for_idle(par); |
| 758 | } |
| 759 | |
| 760 | |
| 761 | /* convert depth values to their register representation */ |
| 762 | static u32 depth_to_dst(u32 depth) |
| 763 | { |
| 764 | if (depth <= 8) |
| 765 | return DST_8BPP; |
| 766 | else if (depth <= 15) |
| 767 | return DST_15BPP; |
| 768 | else if (depth == 16) |
| 769 | return DST_16BPP; |
| 770 | else if (depth <= 24) |
| 771 | return DST_24BPP; |
| 772 | else if (depth <= 32) |
| 773 | return DST_32BPP; |
| 774 | |
| 775 | return -EINVAL; |
| 776 | } |
| 777 | |
| 778 | /* |
| 779 | * PLL informations retreival |
| 780 | */ |
| 781 | |
| 782 | |
| 783 | #ifndef __sparc__ |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 784 | static void __iomem *aty128_map_ROM(const struct aty128fb_par *par, |
| 785 | struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 786 | { |
| 787 | u16 dptr; |
| 788 | u8 rom_type; |
| 789 | void __iomem *bios; |
| 790 | size_t rom_size; |
| 791 | |
| 792 | /* Fix from ATI for problem with Rage128 hardware not leaving ROM enabled */ |
| 793 | unsigned int temp; |
| 794 | temp = aty_ld_le32(RAGE128_MPP_TB_CONFIG); |
| 795 | temp &= 0x00ffffffu; |
| 796 | temp |= 0x04 << 24; |
| 797 | aty_st_le32(RAGE128_MPP_TB_CONFIG, temp); |
| 798 | temp = aty_ld_le32(RAGE128_MPP_TB_CONFIG); |
| 799 | |
| 800 | bios = pci_map_rom(dev, &rom_size); |
| 801 | |
| 802 | if (!bios) { |
| 803 | printk(KERN_ERR "aty128fb: ROM failed to map\n"); |
| 804 | return NULL; |
| 805 | } |
| 806 | |
| 807 | /* Very simple test to make sure it appeared */ |
| 808 | if (BIOS_IN16(0) != 0xaa55) { |
Olaf Hering | 3b4abff | 2005-09-09 13:10:06 -0700 | [diff] [blame] | 809 | printk(KERN_DEBUG "aty128fb: Invalid ROM signature %x should " |
| 810 | " be 0xaa55\n", BIOS_IN16(0)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 811 | goto failed; |
| 812 | } |
| 813 | |
| 814 | /* Look for the PCI data to check the ROM type */ |
| 815 | dptr = BIOS_IN16(0x18); |
| 816 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 817 | /* Check the PCI data signature. If it's wrong, we still assume a normal |
| 818 | * x86 ROM for now, until I've verified this works everywhere. |
| 819 | * The goal here is more to phase out Open Firmware images. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | * |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 821 | * Currently, we only look at the first PCI data, we could iteratre and |
| 822 | * deal with them all, and we should use fb_bios_start relative to start |
| 823 | * of image and not relative start of ROM, but so far, I never found a |
| 824 | * dual-image ATI card. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 825 | * |
| 826 | * typedef struct { |
| 827 | * u32 signature; + 0x00 |
| 828 | * u16 vendor; + 0x04 |
| 829 | * u16 device; + 0x06 |
| 830 | * u16 reserved_1; + 0x08 |
| 831 | * u16 dlen; + 0x0a |
| 832 | * u8 drevision; + 0x0c |
| 833 | * u8 class_hi; + 0x0d |
| 834 | * u16 class_lo; + 0x0e |
| 835 | * u16 ilen; + 0x10 |
| 836 | * u16 irevision; + 0x12 |
| 837 | * u8 type; + 0x14 |
| 838 | * u8 indicator; + 0x15 |
| 839 | * u16 reserved_2; + 0x16 |
| 840 | * } pci_data_t; |
| 841 | */ |
| 842 | if (BIOS_IN32(dptr) != (('R' << 24) | ('I' << 16) | ('C' << 8) | 'P')) { |
| 843 | printk(KERN_WARNING "aty128fb: PCI DATA signature in ROM incorrect: %08x\n", |
| 844 | BIOS_IN32(dptr)); |
| 845 | goto anyway; |
| 846 | } |
| 847 | rom_type = BIOS_IN8(dptr + 0x14); |
| 848 | switch(rom_type) { |
| 849 | case 0: |
| 850 | printk(KERN_INFO "aty128fb: Found Intel x86 BIOS ROM Image\n"); |
| 851 | break; |
| 852 | case 1: |
| 853 | printk(KERN_INFO "aty128fb: Found Open Firmware ROM Image\n"); |
| 854 | goto failed; |
| 855 | case 2: |
| 856 | printk(KERN_INFO "aty128fb: Found HP PA-RISC ROM Image\n"); |
| 857 | goto failed; |
| 858 | default: |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 859 | printk(KERN_INFO "aty128fb: Found unknown type %d ROM Image\n", |
| 860 | rom_type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | goto failed; |
| 862 | } |
| 863 | anyway: |
| 864 | return bios; |
| 865 | |
| 866 | failed: |
| 867 | pci_unmap_rom(dev, bios); |
| 868 | return NULL; |
| 869 | } |
| 870 | |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 871 | static void aty128_get_pllinfo(struct aty128fb_par *par, |
| 872 | unsigned char __iomem *bios) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 873 | { |
| 874 | unsigned int bios_hdr; |
| 875 | unsigned int bios_pll; |
| 876 | |
| 877 | bios_hdr = BIOS_IN16(0x48); |
| 878 | bios_pll = BIOS_IN16(bios_hdr + 0x30); |
| 879 | |
| 880 | par->constants.ppll_max = BIOS_IN32(bios_pll + 0x16); |
| 881 | par->constants.ppll_min = BIOS_IN32(bios_pll + 0x12); |
| 882 | par->constants.xclk = BIOS_IN16(bios_pll + 0x08); |
| 883 | par->constants.ref_divider = BIOS_IN16(bios_pll + 0x10); |
| 884 | par->constants.ref_clk = BIOS_IN16(bios_pll + 0x0e); |
| 885 | |
| 886 | DBG("ppll_max %d ppll_min %d xclk %d ref_divider %d ref clock %d\n", |
| 887 | par->constants.ppll_max, par->constants.ppll_min, |
| 888 | par->constants.xclk, par->constants.ref_divider, |
| 889 | par->constants.ref_clk); |
| 890 | |
| 891 | } |
| 892 | |
| 893 | #ifdef CONFIG_X86 |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 894 | static void __iomem *aty128_find_mem_vbios(struct aty128fb_par *par) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 895 | { |
| 896 | /* I simplified this code as we used to miss the signatures in |
| 897 | * a lot of case. It's now closer to XFree, we just don't check |
| 898 | * for signatures at all... Something better will have to be done |
| 899 | * if we end up having conflicts |
| 900 | */ |
| 901 | u32 segstart; |
| 902 | unsigned char __iomem *rom_base = NULL; |
| 903 | |
| 904 | for (segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) { |
| 905 | rom_base = ioremap(segstart, 0x10000); |
| 906 | if (rom_base == NULL) |
| 907 | return NULL; |
| 908 | if (readb(rom_base) == 0x55 && readb(rom_base + 1) == 0xaa) |
| 909 | break; |
| 910 | iounmap(rom_base); |
| 911 | rom_base = NULL; |
| 912 | } |
| 913 | return rom_base; |
| 914 | } |
| 915 | #endif |
| 916 | #endif /* ndef(__sparc__) */ |
| 917 | |
| 918 | /* fill in known card constants if pll_block is not available */ |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 919 | static void aty128_timings(struct aty128fb_par *par) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | { |
| 921 | #ifdef CONFIG_PPC_OF |
| 922 | /* instead of a table lookup, assume OF has properly |
| 923 | * setup the PLL registers and use their values |
| 924 | * to set the XCLK values and reference divider values */ |
| 925 | |
| 926 | u32 x_mpll_ref_fb_div; |
| 927 | u32 xclk_cntl; |
| 928 | u32 Nx, M; |
| 929 | unsigned PostDivSet[] = { 0, 1, 2, 4, 8, 3, 6, 12 }; |
| 930 | #endif |
| 931 | |
| 932 | if (!par->constants.ref_clk) |
| 933 | par->constants.ref_clk = 2950; |
| 934 | |
| 935 | #ifdef CONFIG_PPC_OF |
| 936 | x_mpll_ref_fb_div = aty_ld_pll(X_MPLL_REF_FB_DIV); |
| 937 | xclk_cntl = aty_ld_pll(XCLK_CNTL) & 0x7; |
| 938 | Nx = (x_mpll_ref_fb_div & 0x00ff00) >> 8; |
| 939 | M = x_mpll_ref_fb_div & 0x0000ff; |
| 940 | |
| 941 | par->constants.xclk = round_div((2 * Nx * par->constants.ref_clk), |
| 942 | (M * PostDivSet[xclk_cntl])); |
| 943 | |
| 944 | par->constants.ref_divider = |
| 945 | aty_ld_pll(PPLL_REF_DIV) & PPLL_REF_DIV_MASK; |
| 946 | #endif |
| 947 | |
| 948 | if (!par->constants.ref_divider) { |
| 949 | par->constants.ref_divider = 0x3b; |
| 950 | |
| 951 | aty_st_pll(X_MPLL_REF_FB_DIV, 0x004c4c1e); |
| 952 | aty_pll_writeupdate(par); |
| 953 | } |
| 954 | aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider); |
| 955 | aty_pll_writeupdate(par); |
| 956 | |
| 957 | /* from documentation */ |
| 958 | if (!par->constants.ppll_min) |
| 959 | par->constants.ppll_min = 12500; |
| 960 | if (!par->constants.ppll_max) |
| 961 | par->constants.ppll_max = 25000; /* 23000 on some cards? */ |
| 962 | if (!par->constants.xclk) |
| 963 | par->constants.xclk = 0x1d4d; /* same as mclk */ |
| 964 | |
| 965 | par->constants.fifo_width = 128; |
| 966 | par->constants.fifo_depth = 32; |
| 967 | |
| 968 | switch (aty_ld_le32(MEM_CNTL) & 0x3) { |
| 969 | case 0: |
| 970 | par->mem = &sdr_128; |
| 971 | break; |
| 972 | case 1: |
| 973 | par->mem = &sdr_sgram; |
| 974 | break; |
| 975 | case 2: |
| 976 | par->mem = &ddr_sgram; |
| 977 | break; |
| 978 | default: |
| 979 | par->mem = &sdr_sgram; |
| 980 | } |
| 981 | } |
| 982 | |
| 983 | |
| 984 | |
| 985 | /* |
| 986 | * CRTC programming |
| 987 | */ |
| 988 | |
| 989 | /* Program the CRTC registers */ |
| 990 | static void aty128_set_crtc(const struct aty128_crtc *crtc, |
| 991 | const struct aty128fb_par *par) |
| 992 | { |
| 993 | aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl); |
| 994 | aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_total); |
| 995 | aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid); |
| 996 | aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_total); |
| 997 | aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid); |
| 998 | aty_st_le32(CRTC_PITCH, crtc->pitch); |
| 999 | aty_st_le32(CRTC_OFFSET, crtc->offset); |
| 1000 | aty_st_le32(CRTC_OFFSET_CNTL, crtc->offset_cntl); |
| 1001 | /* Disable ATOMIC updating. Is this the right place? */ |
| 1002 | aty_st_pll(PPLL_CNTL, aty_ld_pll(PPLL_CNTL) & ~(0x00030000)); |
| 1003 | } |
| 1004 | |
| 1005 | |
| 1006 | static int aty128_var_to_crtc(const struct fb_var_screeninfo *var, |
| 1007 | struct aty128_crtc *crtc, |
| 1008 | const struct aty128fb_par *par) |
| 1009 | { |
| 1010 | u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp, dst; |
| 1011 | u32 left, right, upper, lower, hslen, vslen, sync, vmode; |
| 1012 | u32 h_total, h_disp, h_sync_strt, h_sync_wid, h_sync_pol; |
| 1013 | u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync; |
| 1014 | u32 depth, bytpp; |
| 1015 | u8 mode_bytpp[7] = { 0, 0, 1, 2, 2, 3, 4 }; |
| 1016 | |
| 1017 | /* input */ |
| 1018 | xres = var->xres; |
| 1019 | yres = var->yres; |
| 1020 | vxres = var->xres_virtual; |
| 1021 | vyres = var->yres_virtual; |
| 1022 | xoffset = var->xoffset; |
| 1023 | yoffset = var->yoffset; |
| 1024 | bpp = var->bits_per_pixel; |
| 1025 | left = var->left_margin; |
| 1026 | right = var->right_margin; |
| 1027 | upper = var->upper_margin; |
| 1028 | lower = var->lower_margin; |
| 1029 | hslen = var->hsync_len; |
| 1030 | vslen = var->vsync_len; |
| 1031 | sync = var->sync; |
| 1032 | vmode = var->vmode; |
| 1033 | |
| 1034 | if (bpp != 16) |
| 1035 | depth = bpp; |
| 1036 | else |
| 1037 | depth = (var->green.length == 6) ? 16 : 15; |
| 1038 | |
| 1039 | /* check for mode eligibility |
| 1040 | * accept only non interlaced modes */ |
| 1041 | if ((vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED) |
| 1042 | return -EINVAL; |
| 1043 | |
| 1044 | /* convert (and round up) and validate */ |
| 1045 | xres = (xres + 7) & ~7; |
| 1046 | xoffset = (xoffset + 7) & ~7; |
| 1047 | |
| 1048 | if (vxres < xres + xoffset) |
| 1049 | vxres = xres + xoffset; |
| 1050 | |
| 1051 | if (vyres < yres + yoffset) |
| 1052 | vyres = yres + yoffset; |
| 1053 | |
| 1054 | /* convert depth into ATI register depth */ |
| 1055 | dst = depth_to_dst(depth); |
| 1056 | |
| 1057 | if (dst == -EINVAL) { |
| 1058 | printk(KERN_ERR "aty128fb: Invalid depth or RGBA\n"); |
| 1059 | return -EINVAL; |
| 1060 | } |
| 1061 | |
| 1062 | /* convert register depth to bytes per pixel */ |
| 1063 | bytpp = mode_bytpp[dst]; |
| 1064 | |
| 1065 | /* make sure there is enough video ram for the mode */ |
| 1066 | if ((u32)(vxres * vyres * bytpp) > par->vram_size) { |
| 1067 | printk(KERN_ERR "aty128fb: Not enough memory for mode\n"); |
| 1068 | return -EINVAL; |
| 1069 | } |
| 1070 | |
| 1071 | h_disp = (xres >> 3) - 1; |
| 1072 | h_total = (((xres + right + hslen + left) >> 3) - 1) & 0xFFFFL; |
| 1073 | |
| 1074 | v_disp = yres - 1; |
| 1075 | v_total = (yres + upper + vslen + lower - 1) & 0xFFFFL; |
| 1076 | |
| 1077 | /* check to make sure h_total and v_total are in range */ |
| 1078 | if (((h_total >> 3) - 1) > 0x1ff || (v_total - 1) > 0x7FF) { |
| 1079 | printk(KERN_ERR "aty128fb: invalid width ranges\n"); |
| 1080 | return -EINVAL; |
| 1081 | } |
| 1082 | |
| 1083 | h_sync_wid = (hslen + 7) >> 3; |
| 1084 | if (h_sync_wid == 0) |
| 1085 | h_sync_wid = 1; |
| 1086 | else if (h_sync_wid > 0x3f) /* 0x3f = max hwidth */ |
| 1087 | h_sync_wid = 0x3f; |
| 1088 | |
| 1089 | h_sync_strt = (h_disp << 3) + right; |
| 1090 | |
| 1091 | v_sync_wid = vslen; |
| 1092 | if (v_sync_wid == 0) |
| 1093 | v_sync_wid = 1; |
| 1094 | else if (v_sync_wid > 0x1f) /* 0x1f = max vwidth */ |
| 1095 | v_sync_wid = 0x1f; |
| 1096 | |
| 1097 | v_sync_strt = v_disp + lower; |
| 1098 | |
| 1099 | h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1; |
| 1100 | v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1; |
| 1101 | |
| 1102 | c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? (1 << 4) : 0; |
| 1103 | |
| 1104 | crtc->gen_cntl = 0x3000000L | c_sync | (dst << 8); |
| 1105 | |
| 1106 | crtc->h_total = h_total | (h_disp << 16); |
| 1107 | crtc->v_total = v_total | (v_disp << 16); |
| 1108 | |
| 1109 | crtc->h_sync_strt_wid = h_sync_strt | (h_sync_wid << 16) | |
| 1110 | (h_sync_pol << 23); |
| 1111 | crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid << 16) | |
| 1112 | (v_sync_pol << 23); |
| 1113 | |
| 1114 | crtc->pitch = vxres >> 3; |
| 1115 | |
| 1116 | crtc->offset = 0; |
| 1117 | |
| 1118 | if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) |
| 1119 | crtc->offset_cntl = 0x00010000; |
| 1120 | else |
| 1121 | crtc->offset_cntl = 0; |
| 1122 | |
| 1123 | crtc->vxres = vxres; |
| 1124 | crtc->vyres = vyres; |
| 1125 | crtc->xoffset = xoffset; |
| 1126 | crtc->yoffset = yoffset; |
| 1127 | crtc->depth = depth; |
| 1128 | crtc->bpp = bpp; |
| 1129 | |
| 1130 | return 0; |
| 1131 | } |
| 1132 | |
| 1133 | |
| 1134 | static int aty128_pix_width_to_var(int pix_width, struct fb_var_screeninfo *var) |
| 1135 | { |
| 1136 | |
| 1137 | /* fill in pixel info */ |
| 1138 | var->red.msb_right = 0; |
| 1139 | var->green.msb_right = 0; |
| 1140 | var->blue.offset = 0; |
| 1141 | var->blue.msb_right = 0; |
| 1142 | var->transp.offset = 0; |
| 1143 | var->transp.length = 0; |
| 1144 | var->transp.msb_right = 0; |
| 1145 | switch (pix_width) { |
| 1146 | case CRTC_PIX_WIDTH_8BPP: |
| 1147 | var->bits_per_pixel = 8; |
| 1148 | var->red.offset = 0; |
| 1149 | var->red.length = 8; |
| 1150 | var->green.offset = 0; |
| 1151 | var->green.length = 8; |
| 1152 | var->blue.length = 8; |
| 1153 | break; |
| 1154 | case CRTC_PIX_WIDTH_15BPP: |
| 1155 | var->bits_per_pixel = 16; |
| 1156 | var->red.offset = 10; |
| 1157 | var->red.length = 5; |
| 1158 | var->green.offset = 5; |
| 1159 | var->green.length = 5; |
| 1160 | var->blue.length = 5; |
| 1161 | break; |
| 1162 | case CRTC_PIX_WIDTH_16BPP: |
| 1163 | var->bits_per_pixel = 16; |
| 1164 | var->red.offset = 11; |
| 1165 | var->red.length = 5; |
| 1166 | var->green.offset = 5; |
| 1167 | var->green.length = 6; |
| 1168 | var->blue.length = 5; |
| 1169 | break; |
| 1170 | case CRTC_PIX_WIDTH_24BPP: |
| 1171 | var->bits_per_pixel = 24; |
| 1172 | var->red.offset = 16; |
| 1173 | var->red.length = 8; |
| 1174 | var->green.offset = 8; |
| 1175 | var->green.length = 8; |
| 1176 | var->blue.length = 8; |
| 1177 | break; |
| 1178 | case CRTC_PIX_WIDTH_32BPP: |
| 1179 | var->bits_per_pixel = 32; |
| 1180 | var->red.offset = 16; |
| 1181 | var->red.length = 8; |
| 1182 | var->green.offset = 8; |
| 1183 | var->green.length = 8; |
| 1184 | var->blue.length = 8; |
| 1185 | var->transp.offset = 24; |
| 1186 | var->transp.length = 8; |
| 1187 | break; |
| 1188 | default: |
| 1189 | printk(KERN_ERR "aty128fb: Invalid pixel width\n"); |
| 1190 | return -EINVAL; |
| 1191 | } |
| 1192 | |
| 1193 | return 0; |
| 1194 | } |
| 1195 | |
| 1196 | |
| 1197 | static int aty128_crtc_to_var(const struct aty128_crtc *crtc, |
| 1198 | struct fb_var_screeninfo *var) |
| 1199 | { |
| 1200 | u32 xres, yres, left, right, upper, lower, hslen, vslen, sync; |
| 1201 | u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol; |
| 1202 | u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync; |
| 1203 | u32 pix_width; |
| 1204 | |
| 1205 | /* fun with masking */ |
| 1206 | h_total = crtc->h_total & 0x1ff; |
| 1207 | h_disp = (crtc->h_total >> 16) & 0xff; |
| 1208 | h_sync_strt = (crtc->h_sync_strt_wid >> 3) & 0x1ff; |
| 1209 | h_sync_dly = crtc->h_sync_strt_wid & 0x7; |
| 1210 | h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x3f; |
| 1211 | h_sync_pol = (crtc->h_sync_strt_wid >> 23) & 0x1; |
| 1212 | v_total = crtc->v_total & 0x7ff; |
| 1213 | v_disp = (crtc->v_total >> 16) & 0x7ff; |
| 1214 | v_sync_strt = crtc->v_sync_strt_wid & 0x7ff; |
| 1215 | v_sync_wid = (crtc->v_sync_strt_wid >> 16) & 0x1f; |
| 1216 | v_sync_pol = (crtc->v_sync_strt_wid >> 23) & 0x1; |
| 1217 | c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0; |
| 1218 | pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK; |
| 1219 | |
| 1220 | /* do conversions */ |
| 1221 | xres = (h_disp + 1) << 3; |
| 1222 | yres = v_disp + 1; |
| 1223 | left = ((h_total - h_sync_strt - h_sync_wid) << 3) - h_sync_dly; |
| 1224 | right = ((h_sync_strt - h_disp) << 3) + h_sync_dly; |
| 1225 | hslen = h_sync_wid << 3; |
| 1226 | upper = v_total - v_sync_strt - v_sync_wid; |
| 1227 | lower = v_sync_strt - v_disp; |
| 1228 | vslen = v_sync_wid; |
| 1229 | sync = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) | |
| 1230 | (v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) | |
| 1231 | (c_sync ? FB_SYNC_COMP_HIGH_ACT : 0); |
| 1232 | |
| 1233 | aty128_pix_width_to_var(pix_width, var); |
| 1234 | |
| 1235 | var->xres = xres; |
| 1236 | var->yres = yres; |
| 1237 | var->xres_virtual = crtc->vxres; |
| 1238 | var->yres_virtual = crtc->vyres; |
| 1239 | var->xoffset = crtc->xoffset; |
| 1240 | var->yoffset = crtc->yoffset; |
| 1241 | var->left_margin = left; |
| 1242 | var->right_margin = right; |
| 1243 | var->upper_margin = upper; |
| 1244 | var->lower_margin = lower; |
| 1245 | var->hsync_len = hslen; |
| 1246 | var->vsync_len = vslen; |
| 1247 | var->sync = sync; |
| 1248 | var->vmode = FB_VMODE_NONINTERLACED; |
| 1249 | |
| 1250 | return 0; |
| 1251 | } |
| 1252 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1253 | static void aty128_set_crt_enable(struct aty128fb_par *par, int on) |
| 1254 | { |
| 1255 | if (on) { |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1256 | aty_st_le32(CRTC_EXT_CNTL, aty_ld_le32(CRTC_EXT_CNTL) | |
| 1257 | CRT_CRTC_ON); |
| 1258 | aty_st_le32(DAC_CNTL, (aty_ld_le32(DAC_CNTL) | |
| 1259 | DAC_PALETTE2_SNOOP_EN)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1260 | } else |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1261 | aty_st_le32(CRTC_EXT_CNTL, aty_ld_le32(CRTC_EXT_CNTL) & |
| 1262 | ~CRT_CRTC_ON); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1263 | } |
| 1264 | |
| 1265 | static void aty128_set_lcd_enable(struct aty128fb_par *par, int on) |
| 1266 | { |
| 1267 | u32 reg; |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1268 | #ifdef CONFIG_FB_ATY128_BACKLIGHT |
| 1269 | struct fb_info *info = pci_get_drvdata(par->pdev); |
| 1270 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1271 | |
| 1272 | if (on) { |
| 1273 | reg = aty_ld_le32(LVDS_GEN_CNTL); |
| 1274 | reg |= LVDS_ON | LVDS_EN | LVDS_BLON | LVDS_DIGION; |
| 1275 | reg &= ~LVDS_DISPLAY_DIS; |
| 1276 | aty_st_le32(LVDS_GEN_CNTL, reg); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1277 | #ifdef CONFIG_FB_ATY128_BACKLIGHT |
Michael Hanselmann | e01af03 | 2006-07-10 04:44:45 -0700 | [diff] [blame] | 1278 | aty128_bl_set_power(info, FB_BLANK_UNBLANK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1279 | #endif |
| 1280 | } else { |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1281 | #ifdef CONFIG_FB_ATY128_BACKLIGHT |
Michael Hanselmann | e01af03 | 2006-07-10 04:44:45 -0700 | [diff] [blame] | 1282 | aty128_bl_set_power(info, FB_BLANK_POWERDOWN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1283 | #endif |
| 1284 | reg = aty_ld_le32(LVDS_GEN_CNTL); |
| 1285 | reg |= LVDS_DISPLAY_DIS; |
| 1286 | aty_st_le32(LVDS_GEN_CNTL, reg); |
| 1287 | mdelay(100); |
| 1288 | reg &= ~(LVDS_ON /*| LVDS_EN*/); |
| 1289 | aty_st_le32(LVDS_GEN_CNTL, reg); |
| 1290 | } |
| 1291 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1292 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1293 | static void aty128_set_pll(struct aty128_pll *pll, |
| 1294 | const struct aty128fb_par *par) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1295 | { |
| 1296 | u32 div3; |
| 1297 | |
| 1298 | unsigned char post_conv[] = /* register values for post dividers */ |
| 1299 | { 2, 0, 1, 4, 2, 2, 6, 2, 3, 2, 2, 2, 7 }; |
| 1300 | |
| 1301 | /* select PPLL_DIV_3 */ |
| 1302 | aty_st_le32(CLOCK_CNTL_INDEX, aty_ld_le32(CLOCK_CNTL_INDEX) | (3 << 8)); |
| 1303 | |
| 1304 | /* reset PLL */ |
| 1305 | aty_st_pll(PPLL_CNTL, |
| 1306 | aty_ld_pll(PPLL_CNTL) | PPLL_RESET | PPLL_ATOMIC_UPDATE_EN); |
| 1307 | |
| 1308 | /* write the reference divider */ |
| 1309 | aty_pll_wait_readupdate(par); |
| 1310 | aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider & 0x3ff); |
| 1311 | aty_pll_writeupdate(par); |
| 1312 | |
| 1313 | div3 = aty_ld_pll(PPLL_DIV_3); |
| 1314 | div3 &= ~PPLL_FB3_DIV_MASK; |
| 1315 | div3 |= pll->feedback_divider; |
| 1316 | div3 &= ~PPLL_POST3_DIV_MASK; |
| 1317 | div3 |= post_conv[pll->post_divider] << 16; |
| 1318 | |
| 1319 | /* write feedback and post dividers */ |
| 1320 | aty_pll_wait_readupdate(par); |
| 1321 | aty_st_pll(PPLL_DIV_3, div3); |
| 1322 | aty_pll_writeupdate(par); |
| 1323 | |
| 1324 | aty_pll_wait_readupdate(par); |
| 1325 | aty_st_pll(HTOTAL_CNTL, 0); /* no horiz crtc adjustment */ |
| 1326 | aty_pll_writeupdate(par); |
| 1327 | |
| 1328 | /* clear the reset, just in case */ |
| 1329 | aty_st_pll(PPLL_CNTL, aty_ld_pll(PPLL_CNTL) & ~PPLL_RESET); |
| 1330 | } |
| 1331 | |
| 1332 | |
| 1333 | static int aty128_var_to_pll(u32 period_in_ps, struct aty128_pll *pll, |
| 1334 | const struct aty128fb_par *par) |
| 1335 | { |
| 1336 | const struct aty128_constants c = par->constants; |
| 1337 | unsigned char post_dividers[] = {1,2,4,8,3,6,12}; |
| 1338 | u32 output_freq; |
| 1339 | u32 vclk; /* in .01 MHz */ |
Antonino A. Daplas | 8e65098 | 2006-03-11 03:27:27 -0800 | [diff] [blame] | 1340 | int i = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1341 | u32 n, d; |
| 1342 | |
| 1343 | vclk = 100000000 / period_in_ps; /* convert units to 10 kHz */ |
| 1344 | |
| 1345 | /* adjust pixel clock if necessary */ |
| 1346 | if (vclk > c.ppll_max) |
| 1347 | vclk = c.ppll_max; |
| 1348 | if (vclk * 12 < c.ppll_min) |
| 1349 | vclk = c.ppll_min/12; |
| 1350 | |
| 1351 | /* now, find an acceptable divider */ |
Roel Kluin | 816664f | 2008-07-23 21:31:17 -0700 | [diff] [blame] | 1352 | for (i = 0; i < ARRAY_SIZE(post_dividers); i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1353 | output_freq = post_dividers[i] * vclk; |
Antonino A. Daplas | 8e65098 | 2006-03-11 03:27:27 -0800 | [diff] [blame] | 1354 | if (output_freq >= c.ppll_min && output_freq <= c.ppll_max) { |
| 1355 | pll->post_divider = post_dividers[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1356 | break; |
Antonino A. Daplas | 8e65098 | 2006-03-11 03:27:27 -0800 | [diff] [blame] | 1357 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1358 | } |
| 1359 | |
Roel Kluin | 816664f | 2008-07-23 21:31:17 -0700 | [diff] [blame] | 1360 | if (i == ARRAY_SIZE(post_dividers)) |
Jeff Garzik | fd71768 | 2006-12-08 02:40:17 -0800 | [diff] [blame] | 1361 | return -EINVAL; |
| 1362 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1363 | /* calculate feedback divider */ |
| 1364 | n = c.ref_divider * output_freq; |
| 1365 | d = c.ref_clk; |
| 1366 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1367 | pll->feedback_divider = round_div(n, d); |
| 1368 | pll->vclk = vclk; |
| 1369 | |
| 1370 | DBG("post %d feedback %d vlck %d output %d ref_divider %d " |
| 1371 | "vclk_per: %d\n", pll->post_divider, |
| 1372 | pll->feedback_divider, vclk, output_freq, |
| 1373 | c.ref_divider, period_in_ps); |
| 1374 | |
| 1375 | return 0; |
| 1376 | } |
| 1377 | |
| 1378 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1379 | static int aty128_pll_to_var(const struct aty128_pll *pll, |
| 1380 | struct fb_var_screeninfo *var) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1381 | { |
| 1382 | var->pixclock = 100000000 / pll->vclk; |
| 1383 | |
| 1384 | return 0; |
| 1385 | } |
| 1386 | |
| 1387 | |
| 1388 | static void aty128_set_fifo(const struct aty128_ddafifo *dsp, |
| 1389 | const struct aty128fb_par *par) |
| 1390 | { |
| 1391 | aty_st_le32(DDA_CONFIG, dsp->dda_config); |
| 1392 | aty_st_le32(DDA_ON_OFF, dsp->dda_on_off); |
| 1393 | } |
| 1394 | |
| 1395 | |
| 1396 | static int aty128_ddafifo(struct aty128_ddafifo *dsp, |
| 1397 | const struct aty128_pll *pll, |
| 1398 | u32 depth, |
| 1399 | const struct aty128fb_par *par) |
| 1400 | { |
| 1401 | const struct aty128_meminfo *m = par->mem; |
| 1402 | u32 xclk = par->constants.xclk; |
| 1403 | u32 fifo_width = par->constants.fifo_width; |
| 1404 | u32 fifo_depth = par->constants.fifo_depth; |
| 1405 | s32 x, b, p, ron, roff; |
| 1406 | u32 n, d, bpp; |
| 1407 | |
| 1408 | /* round up to multiple of 8 */ |
| 1409 | bpp = (depth+7) & ~7; |
| 1410 | |
| 1411 | n = xclk * fifo_width; |
| 1412 | d = pll->vclk * bpp; |
| 1413 | x = round_div(n, d); |
| 1414 | |
| 1415 | ron = 4 * m->MB + |
| 1416 | 3 * ((m->Trcd - 2 > 0) ? m->Trcd - 2 : 0) + |
| 1417 | 2 * m->Trp + |
| 1418 | m->Twr + |
| 1419 | m->CL + |
| 1420 | m->Tr2w + |
| 1421 | x; |
| 1422 | |
| 1423 | DBG("x %x\n", x); |
| 1424 | |
| 1425 | b = 0; |
| 1426 | while (x) { |
| 1427 | x >>= 1; |
| 1428 | b++; |
| 1429 | } |
| 1430 | p = b + 1; |
| 1431 | |
| 1432 | ron <<= (11 - p); |
| 1433 | |
| 1434 | n <<= (11 - p); |
| 1435 | x = round_div(n, d); |
| 1436 | roff = x * (fifo_depth - 4); |
| 1437 | |
| 1438 | if ((ron + m->Rloop) >= roff) { |
| 1439 | printk(KERN_ERR "aty128fb: Mode out of range!\n"); |
| 1440 | return -EINVAL; |
| 1441 | } |
| 1442 | |
| 1443 | DBG("p: %x rloop: %x x: %x ron: %x roff: %x\n", |
| 1444 | p, m->Rloop, x, ron, roff); |
| 1445 | |
| 1446 | dsp->dda_config = p << 16 | m->Rloop << 20 | x; |
| 1447 | dsp->dda_on_off = ron << 16 | roff; |
| 1448 | |
| 1449 | return 0; |
| 1450 | } |
| 1451 | |
| 1452 | |
| 1453 | /* |
| 1454 | * This actually sets the video mode. |
| 1455 | */ |
| 1456 | static int aty128fb_set_par(struct fb_info *info) |
| 1457 | { |
| 1458 | struct aty128fb_par *par = info->par; |
| 1459 | u32 config; |
| 1460 | int err; |
| 1461 | |
| 1462 | if ((err = aty128_decode_var(&info->var, par)) != 0) |
| 1463 | return err; |
| 1464 | |
| 1465 | if (par->blitter_may_be_busy) |
| 1466 | wait_for_idle(par); |
| 1467 | |
| 1468 | /* clear all registers that may interfere with mode setting */ |
| 1469 | aty_st_le32(OVR_CLR, 0); |
| 1470 | aty_st_le32(OVR_WID_LEFT_RIGHT, 0); |
| 1471 | aty_st_le32(OVR_WID_TOP_BOTTOM, 0); |
| 1472 | aty_st_le32(OV0_SCALE_CNTL, 0); |
| 1473 | aty_st_le32(MPP_TB_CONFIG, 0); |
| 1474 | aty_st_le32(MPP_GP_CONFIG, 0); |
| 1475 | aty_st_le32(SUBPIC_CNTL, 0); |
| 1476 | aty_st_le32(VIPH_CONTROL, 0); |
| 1477 | aty_st_le32(I2C_CNTL_1, 0); /* turn off i2c */ |
| 1478 | aty_st_le32(GEN_INT_CNTL, 0); /* turn off interrupts */ |
| 1479 | aty_st_le32(CAP0_TRIG_CNTL, 0); |
| 1480 | aty_st_le32(CAP1_TRIG_CNTL, 0); |
| 1481 | |
| 1482 | aty_st_8(CRTC_EXT_CNTL + 1, 4); /* turn video off */ |
| 1483 | |
| 1484 | aty128_set_crtc(&par->crtc, par); |
| 1485 | aty128_set_pll(&par->pll, par); |
| 1486 | aty128_set_fifo(&par->fifo_reg, par); |
| 1487 | |
Randy Dunlap | fe86175 | 2009-02-04 15:12:20 -0800 | [diff] [blame] | 1488 | config = aty_ld_le32(CNFG_CNTL) & ~3; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1489 | |
| 1490 | #if defined(__BIG_ENDIAN) |
| 1491 | if (par->crtc.bpp == 32) |
| 1492 | config |= 2; /* make aperture do 32 bit swapping */ |
| 1493 | else if (par->crtc.bpp == 16) |
| 1494 | config |= 1; /* make aperture do 16 bit swapping */ |
| 1495 | #endif |
| 1496 | |
Randy Dunlap | fe86175 | 2009-02-04 15:12:20 -0800 | [diff] [blame] | 1497 | aty_st_le32(CNFG_CNTL, config); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1498 | aty_st_8(CRTC_EXT_CNTL + 1, 0); /* turn the video back on */ |
| 1499 | |
| 1500 | info->fix.line_length = (par->crtc.vxres * par->crtc.bpp) >> 3; |
| 1501 | info->fix.visual = par->crtc.bpp == 8 ? FB_VISUAL_PSEUDOCOLOR |
| 1502 | : FB_VISUAL_DIRECTCOLOR; |
| 1503 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1504 | if (par->chip_gen == rage_M3) { |
| 1505 | aty128_set_crt_enable(par, par->crt_on); |
| 1506 | aty128_set_lcd_enable(par, par->lcd_on); |
| 1507 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1508 | if (par->accel_flags & FB_ACCELF_TEXT) |
| 1509 | aty128_init_engine(par); |
| 1510 | |
| 1511 | #ifdef CONFIG_BOOTX_TEXT |
| 1512 | btext_update_display(info->fix.smem_start, |
| 1513 | (((par->crtc.h_total>>16) & 0xff)+1)*8, |
| 1514 | ((par->crtc.v_total>>16) & 0x7ff)+1, |
| 1515 | par->crtc.bpp, |
| 1516 | par->crtc.vxres*par->crtc.bpp/8); |
| 1517 | #endif /* CONFIG_BOOTX_TEXT */ |
| 1518 | |
| 1519 | return 0; |
| 1520 | } |
| 1521 | |
| 1522 | /* |
| 1523 | * encode/decode the User Defined Part of the Display |
| 1524 | */ |
| 1525 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1526 | static int aty128_decode_var(struct fb_var_screeninfo *var, |
| 1527 | struct aty128fb_par *par) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1528 | { |
| 1529 | int err; |
| 1530 | struct aty128_crtc crtc; |
| 1531 | struct aty128_pll pll; |
| 1532 | struct aty128_ddafifo fifo_reg; |
| 1533 | |
| 1534 | if ((err = aty128_var_to_crtc(var, &crtc, par))) |
| 1535 | return err; |
| 1536 | |
| 1537 | if ((err = aty128_var_to_pll(var->pixclock, &pll, par))) |
| 1538 | return err; |
| 1539 | |
| 1540 | if ((err = aty128_ddafifo(&fifo_reg, &pll, crtc.depth, par))) |
| 1541 | return err; |
| 1542 | |
| 1543 | par->crtc = crtc; |
| 1544 | par->pll = pll; |
| 1545 | par->fifo_reg = fifo_reg; |
| 1546 | par->accel_flags = var->accel_flags; |
| 1547 | |
| 1548 | return 0; |
| 1549 | } |
| 1550 | |
| 1551 | |
| 1552 | static int aty128_encode_var(struct fb_var_screeninfo *var, |
| 1553 | const struct aty128fb_par *par) |
| 1554 | { |
| 1555 | int err; |
| 1556 | |
| 1557 | if ((err = aty128_crtc_to_var(&par->crtc, var))) |
| 1558 | return err; |
| 1559 | |
| 1560 | if ((err = aty128_pll_to_var(&par->pll, var))) |
| 1561 | return err; |
| 1562 | |
| 1563 | var->nonstd = 0; |
| 1564 | var->activate = 0; |
| 1565 | |
| 1566 | var->height = -1; |
| 1567 | var->width = -1; |
| 1568 | var->accel_flags = par->accel_flags; |
| 1569 | |
| 1570 | return 0; |
| 1571 | } |
| 1572 | |
| 1573 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1574 | static int aty128fb_check_var(struct fb_var_screeninfo *var, |
| 1575 | struct fb_info *info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1576 | { |
| 1577 | struct aty128fb_par par; |
| 1578 | int err; |
| 1579 | |
| 1580 | par = *(struct aty128fb_par *)info->par; |
| 1581 | if ((err = aty128_decode_var(var, &par)) != 0) |
| 1582 | return err; |
| 1583 | aty128_encode_var(var, &par); |
| 1584 | return 0; |
| 1585 | } |
| 1586 | |
| 1587 | |
| 1588 | /* |
| 1589 | * Pan or Wrap the Display |
| 1590 | */ |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1591 | static int aty128fb_pan_display(struct fb_var_screeninfo *var, |
| 1592 | struct fb_info *fb) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1593 | { |
| 1594 | struct aty128fb_par *par = fb->par; |
| 1595 | u32 xoffset, yoffset; |
| 1596 | u32 offset; |
| 1597 | u32 xres, yres; |
| 1598 | |
| 1599 | xres = (((par->crtc.h_total >> 16) & 0xff) + 1) << 3; |
| 1600 | yres = ((par->crtc.v_total >> 16) & 0x7ff) + 1; |
| 1601 | |
| 1602 | xoffset = (var->xoffset +7) & ~7; |
| 1603 | yoffset = var->yoffset; |
| 1604 | |
| 1605 | if (xoffset+xres > par->crtc.vxres || yoffset+yres > par->crtc.vyres) |
| 1606 | return -EINVAL; |
| 1607 | |
| 1608 | par->crtc.xoffset = xoffset; |
| 1609 | par->crtc.yoffset = yoffset; |
| 1610 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1611 | offset = ((yoffset * par->crtc.vxres + xoffset) * (par->crtc.bpp >> 3)) |
| 1612 | & ~7; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1613 | |
| 1614 | if (par->crtc.bpp == 24) |
| 1615 | offset += 8 * (offset % 3); /* Must be multiple of 8 and 3 */ |
| 1616 | |
| 1617 | aty_st_le32(CRTC_OFFSET, offset); |
| 1618 | |
| 1619 | return 0; |
| 1620 | } |
| 1621 | |
| 1622 | |
| 1623 | /* |
| 1624 | * Helper function to store a single palette register |
| 1625 | */ |
| 1626 | static void aty128_st_pal(u_int regno, u_int red, u_int green, u_int blue, |
| 1627 | struct aty128fb_par *par) |
| 1628 | { |
| 1629 | if (par->chip_gen == rage_M3) { |
| 1630 | #if 0 |
| 1631 | /* Note: For now, on M3, we set palette on both heads, which may |
| 1632 | * be useless. Can someone with a M3 check this ? |
| 1633 | * |
| 1634 | * This code would still be useful if using the second CRTC to |
| 1635 | * do mirroring |
| 1636 | */ |
| 1637 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1638 | aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) | |
| 1639 | DAC_PALETTE_ACCESS_CNTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1640 | aty_st_8(PALETTE_INDEX, regno); |
| 1641 | aty_st_le32(PALETTE_DATA, (red<<16)|(green<<8)|blue); |
| 1642 | #endif |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1643 | aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) & |
| 1644 | ~DAC_PALETTE_ACCESS_CNTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1645 | } |
| 1646 | |
| 1647 | aty_st_8(PALETTE_INDEX, regno); |
| 1648 | aty_st_le32(PALETTE_DATA, (red<<16)|(green<<8)|blue); |
| 1649 | } |
| 1650 | |
| 1651 | static int aty128fb_sync(struct fb_info *info) |
| 1652 | { |
| 1653 | struct aty128fb_par *par = info->par; |
| 1654 | |
| 1655 | if (par->blitter_may_be_busy) |
| 1656 | wait_for_idle(par); |
| 1657 | return 0; |
| 1658 | } |
| 1659 | |
| 1660 | #ifndef MODULE |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 1661 | static int aty128fb_setup(char *options) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1662 | { |
| 1663 | char *this_opt; |
| 1664 | |
| 1665 | if (!options || !*options) |
| 1666 | return 0; |
| 1667 | |
| 1668 | while ((this_opt = strsep(&options, ",")) != NULL) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1669 | if (!strncmp(this_opt, "lcd:", 4)) { |
| 1670 | default_lcd_on = simple_strtoul(this_opt+4, NULL, 0); |
| 1671 | continue; |
| 1672 | } else if (!strncmp(this_opt, "crt:", 4)) { |
| 1673 | default_crt_on = simple_strtoul(this_opt+4, NULL, 0); |
| 1674 | continue; |
Richard Purdie | 202d4e6 | 2007-03-03 17:43:52 +0000 | [diff] [blame] | 1675 | } else if (!strncmp(this_opt, "backlight:", 10)) { |
David Howells | a79530e | 2014-01-23 15:54:06 -0800 | [diff] [blame] | 1676 | #ifdef CONFIG_FB_ATY128_BACKLIGHT |
Richard Purdie | 202d4e6 | 2007-03-03 17:43:52 +0000 | [diff] [blame] | 1677 | backlight = simple_strtoul(this_opt+10, NULL, 0); |
David Howells | a79530e | 2014-01-23 15:54:06 -0800 | [diff] [blame] | 1678 | #endif |
Richard Purdie | 202d4e6 | 2007-03-03 17:43:52 +0000 | [diff] [blame] | 1679 | continue; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1680 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1681 | #ifdef CONFIG_MTRR |
| 1682 | if(!strncmp(this_opt, "nomtrr", 6)) { |
| 1683 | mtrr = 0; |
| 1684 | continue; |
| 1685 | } |
| 1686 | #endif |
| 1687 | #ifdef CONFIG_PPC_PMAC |
| 1688 | /* vmode and cmode deprecated */ |
| 1689 | if (!strncmp(this_opt, "vmode:", 6)) { |
| 1690 | unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0); |
| 1691 | if (vmode > 0 && vmode <= VMODE_MAX) |
| 1692 | default_vmode = vmode; |
| 1693 | continue; |
| 1694 | } else if (!strncmp(this_opt, "cmode:", 6)) { |
| 1695 | unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0); |
| 1696 | switch (cmode) { |
| 1697 | case 0: |
| 1698 | case 8: |
| 1699 | default_cmode = CMODE_8; |
| 1700 | break; |
| 1701 | case 15: |
| 1702 | case 16: |
| 1703 | default_cmode = CMODE_16; |
| 1704 | break; |
| 1705 | case 24: |
| 1706 | case 32: |
| 1707 | default_cmode = CMODE_32; |
| 1708 | break; |
| 1709 | } |
| 1710 | continue; |
| 1711 | } |
| 1712 | #endif /* CONFIG_PPC_PMAC */ |
| 1713 | mode_option = this_opt; |
| 1714 | } |
| 1715 | return 0; |
| 1716 | } |
| 1717 | #endif /* MODULE */ |
| 1718 | |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1719 | /* Backlight */ |
| 1720 | #ifdef CONFIG_FB_ATY128_BACKLIGHT |
| 1721 | #define MAX_LEVEL 0xFF |
| 1722 | |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1723 | static int aty128_bl_get_level_brightness(struct aty128fb_par *par, |
| 1724 | int level) |
| 1725 | { |
| 1726 | struct fb_info *info = pci_get_drvdata(par->pdev); |
| 1727 | int atylevel; |
| 1728 | |
| 1729 | /* Get and convert the value */ |
Richard Purdie | 37ce69a | 2007-02-10 14:10:33 +0000 | [diff] [blame] | 1730 | /* No locking of bl_curve since we read a single value */ |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1731 | atylevel = MAX_LEVEL - |
| 1732 | (info->bl_curve[level] * FB_BACKLIGHT_MAX / MAX_LEVEL); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1733 | |
| 1734 | if (atylevel < 0) |
| 1735 | atylevel = 0; |
| 1736 | else if (atylevel > MAX_LEVEL) |
| 1737 | atylevel = MAX_LEVEL; |
| 1738 | |
| 1739 | return atylevel; |
| 1740 | } |
| 1741 | |
| 1742 | /* We turn off the LCD completely instead of just dimming the backlight. |
| 1743 | * This provides greater power saving and the display is useless without |
| 1744 | * backlight anyway |
| 1745 | */ |
| 1746 | #define BACKLIGHT_LVDS_OFF |
| 1747 | /* That one prevents proper CRT output with LCD off */ |
| 1748 | #undef BACKLIGHT_DAC_OFF |
| 1749 | |
Richard Purdie | 37ce69a | 2007-02-10 14:10:33 +0000 | [diff] [blame] | 1750 | static int aty128_bl_update_status(struct backlight_device *bd) |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1751 | { |
Richard Purdie | 655bfd7 | 2007-07-09 12:17:24 +0100 | [diff] [blame] | 1752 | struct aty128fb_par *par = bl_get_data(bd); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1753 | unsigned int reg = aty_ld_le32(LVDS_GEN_CNTL); |
| 1754 | int level; |
| 1755 | |
Richard Purdie | 599a52d | 2007-02-10 23:07:48 +0000 | [diff] [blame] | 1756 | if (bd->props.power != FB_BLANK_UNBLANK || |
| 1757 | bd->props.fb_blank != FB_BLANK_UNBLANK || |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1758 | !par->lcd_on) |
| 1759 | level = 0; |
| 1760 | else |
Richard Purdie | 599a52d | 2007-02-10 23:07:48 +0000 | [diff] [blame] | 1761 | level = bd->props.brightness; |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1762 | |
| 1763 | reg |= LVDS_BL_MOD_EN | LVDS_BLON; |
| 1764 | if (level > 0) { |
| 1765 | reg |= LVDS_DIGION; |
| 1766 | if (!(reg & LVDS_ON)) { |
| 1767 | reg &= ~LVDS_BLON; |
| 1768 | aty_st_le32(LVDS_GEN_CNTL, reg); |
| 1769 | aty_ld_le32(LVDS_GEN_CNTL); |
| 1770 | mdelay(10); |
| 1771 | reg |= LVDS_BLON; |
| 1772 | aty_st_le32(LVDS_GEN_CNTL, reg); |
| 1773 | } |
| 1774 | reg &= ~LVDS_BL_MOD_LEVEL_MASK; |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1775 | reg |= (aty128_bl_get_level_brightness(par, level) << |
| 1776 | LVDS_BL_MOD_LEVEL_SHIFT); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1777 | #ifdef BACKLIGHT_LVDS_OFF |
| 1778 | reg |= LVDS_ON | LVDS_EN; |
| 1779 | reg &= ~LVDS_DISPLAY_DIS; |
| 1780 | #endif |
| 1781 | aty_st_le32(LVDS_GEN_CNTL, reg); |
| 1782 | #ifdef BACKLIGHT_DAC_OFF |
| 1783 | aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) & (~DAC_PDWN)); |
| 1784 | #endif |
| 1785 | } else { |
| 1786 | reg &= ~LVDS_BL_MOD_LEVEL_MASK; |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1787 | reg |= (aty128_bl_get_level_brightness(par, 0) << |
| 1788 | LVDS_BL_MOD_LEVEL_SHIFT); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1789 | #ifdef BACKLIGHT_LVDS_OFF |
| 1790 | reg |= LVDS_DISPLAY_DIS; |
| 1791 | aty_st_le32(LVDS_GEN_CNTL, reg); |
| 1792 | aty_ld_le32(LVDS_GEN_CNTL); |
| 1793 | udelay(10); |
| 1794 | reg &= ~(LVDS_ON | LVDS_EN | LVDS_BLON | LVDS_DIGION); |
| 1795 | #endif |
| 1796 | aty_st_le32(LVDS_GEN_CNTL, reg); |
| 1797 | #ifdef BACKLIGHT_DAC_OFF |
| 1798 | aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) | DAC_PDWN); |
| 1799 | #endif |
| 1800 | } |
| 1801 | |
| 1802 | return 0; |
| 1803 | } |
| 1804 | |
| 1805 | static int aty128_bl_get_brightness(struct backlight_device *bd) |
| 1806 | { |
Richard Purdie | 599a52d | 2007-02-10 23:07:48 +0000 | [diff] [blame] | 1807 | return bd->props.brightness; |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1808 | } |
| 1809 | |
Lionel Debroux | acc2472 | 2010-11-16 14:14:02 +0100 | [diff] [blame] | 1810 | static const struct backlight_ops aty128_bl_data = { |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1811 | .get_brightness = aty128_bl_get_brightness, |
| 1812 | .update_status = aty128_bl_update_status, |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1813 | }; |
| 1814 | |
Michael Hanselmann | e01af03 | 2006-07-10 04:44:45 -0700 | [diff] [blame] | 1815 | static void aty128_bl_set_power(struct fb_info *info, int power) |
| 1816 | { |
Benjamin Herrenschmidt | a930363 | 2006-08-31 21:27:54 -0700 | [diff] [blame] | 1817 | if (info->bl_dev) { |
Richard Purdie | 599a52d | 2007-02-10 23:07:48 +0000 | [diff] [blame] | 1818 | info->bl_dev->props.power = power; |
Richard Purdie | 37ce69a | 2007-02-10 14:10:33 +0000 | [diff] [blame] | 1819 | backlight_update_status(info->bl_dev); |
Benjamin Herrenschmidt | a930363 | 2006-08-31 21:27:54 -0700 | [diff] [blame] | 1820 | } |
Michael Hanselmann | e01af03 | 2006-07-10 04:44:45 -0700 | [diff] [blame] | 1821 | } |
| 1822 | |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1823 | static void aty128_bl_init(struct aty128fb_par *par) |
| 1824 | { |
Matthew Garrett | a19a6ee | 2010-02-17 16:39:44 -0500 | [diff] [blame] | 1825 | struct backlight_properties props; |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1826 | struct fb_info *info = pci_get_drvdata(par->pdev); |
| 1827 | struct backlight_device *bd; |
| 1828 | char name[12]; |
| 1829 | |
| 1830 | /* Could be extended to Rage128Pro LVDS output too */ |
| 1831 | if (par->chip_gen != rage_M3) |
| 1832 | return; |
| 1833 | |
| 1834 | #ifdef CONFIG_PMAC_BACKLIGHT |
| 1835 | if (!pmac_has_backlight_type("ati")) |
| 1836 | return; |
| 1837 | #endif |
| 1838 | |
| 1839 | snprintf(name, sizeof(name), "aty128bl%d", info->node); |
| 1840 | |
Matthew Garrett | a19a6ee | 2010-02-17 16:39:44 -0500 | [diff] [blame] | 1841 | memset(&props, 0, sizeof(struct backlight_properties)); |
Matthew Garrett | bb7ca74 | 2011-03-22 16:30:21 -0700 | [diff] [blame] | 1842 | props.type = BACKLIGHT_RAW; |
Matthew Garrett | a19a6ee | 2010-02-17 16:39:44 -0500 | [diff] [blame] | 1843 | props.max_brightness = FB_BACKLIGHT_LEVELS - 1; |
| 1844 | bd = backlight_device_register(name, info->dev, par, &aty128_bl_data, |
| 1845 | &props); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1846 | if (IS_ERR(bd)) { |
| 1847 | info->bl_dev = NULL; |
Benjamin Herrenschmidt | 98a3c78 | 2006-08-31 14:04:34 +1000 | [diff] [blame] | 1848 | printk(KERN_WARNING "aty128: Backlight registration failed\n"); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1849 | goto error; |
| 1850 | } |
| 1851 | |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1852 | info->bl_dev = bd; |
| 1853 | fb_bl_default_curve(info, 0, |
| 1854 | 63 * FB_BACKLIGHT_MAX / MAX_LEVEL, |
| 1855 | 219 * FB_BACKLIGHT_MAX / MAX_LEVEL); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1856 | |
Richard Purdie | 599a52d | 2007-02-10 23:07:48 +0000 | [diff] [blame] | 1857 | bd->props.brightness = bd->props.max_brightness; |
| 1858 | bd->props.power = FB_BLANK_UNBLANK; |
Richard Purdie | 28ee086 | 2007-02-08 22:25:09 +0000 | [diff] [blame] | 1859 | backlight_update_status(bd); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1860 | |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1861 | printk("aty128: Backlight initialized (%s)\n", name); |
| 1862 | |
| 1863 | return; |
| 1864 | |
| 1865 | error: |
| 1866 | return; |
| 1867 | } |
| 1868 | |
Richard Purdie | 37ce69a | 2007-02-10 14:10:33 +0000 | [diff] [blame] | 1869 | static void aty128_bl_exit(struct backlight_device *bd) |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1870 | { |
Richard Purdie | 321709c | 2007-02-10 15:04:08 +0000 | [diff] [blame] | 1871 | backlight_device_unregister(bd); |
| 1872 | printk("aty128: Backlight unloaded\n"); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 1873 | } |
| 1874 | #endif /* CONFIG_FB_ATY128_BACKLIGHT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1875 | |
| 1876 | /* |
| 1877 | * Initialisation |
| 1878 | */ |
| 1879 | |
Benjamin Herrenschmidt | d801cec | 2009-03-11 10:45:17 +1100 | [diff] [blame] | 1880 | #ifdef CONFIG_PPC_PMAC__disabled |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1881 | static void aty128_early_resume(void *data) |
| 1882 | { |
| 1883 | struct aty128fb_par *par = data; |
| 1884 | |
Torben Hohn | ac751ef | 2011-01-25 15:07:35 -0800 | [diff] [blame] | 1885 | if (!console_trylock()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1886 | return; |
Benjamin Herrenschmidt | d801cec | 2009-03-11 10:45:17 +1100 | [diff] [blame] | 1887 | pci_restore_state(par->pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1888 | aty128_do_resume(par->pdev); |
Torben Hohn | ac751ef | 2011-01-25 15:07:35 -0800 | [diff] [blame] | 1889 | console_unlock(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1890 | } |
| 1891 | #endif /* CONFIG_PPC_PMAC */ |
| 1892 | |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 1893 | static int aty128_init(struct pci_dev *pdev, const struct pci_device_id *ent) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1894 | { |
| 1895 | struct fb_info *info = pci_get_drvdata(pdev); |
| 1896 | struct aty128fb_par *par = info->par; |
| 1897 | struct fb_var_screeninfo var; |
Kay Sievers | ca52a49 | 2008-05-02 06:02:41 +0200 | [diff] [blame] | 1898 | char video_card[50]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1899 | u8 chip_rev; |
| 1900 | u32 dac; |
| 1901 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1902 | /* Get the chip revision */ |
Randy Dunlap | fe86175 | 2009-02-04 15:12:20 -0800 | [diff] [blame] | 1903 | chip_rev = (aty_ld_le32(CNFG_CNTL) >> 16) & 0x1F; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1904 | |
| 1905 | strcpy(video_card, "Rage128 XX "); |
| 1906 | video_card[8] = ent->device >> 8; |
| 1907 | video_card[9] = ent->device & 0xFF; |
Tobias Klauser | d1ae418 | 2006-03-27 01:17:39 -0800 | [diff] [blame] | 1908 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1909 | /* range check to make sure */ |
Tobias Klauser | d1ae418 | 2006-03-27 01:17:39 -0800 | [diff] [blame] | 1910 | if (ent->driver_data < ARRAY_SIZE(r128_family)) |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1911 | strlcat(video_card, r128_family[ent->driver_data], |
| 1912 | sizeof(video_card)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1913 | |
| 1914 | printk(KERN_INFO "aty128fb: %s [chip rev 0x%x] ", video_card, chip_rev); |
| 1915 | |
| 1916 | if (par->vram_size % (1024 * 1024) == 0) |
| 1917 | printk("%dM %s\n", par->vram_size / (1024*1024), par->mem->name); |
| 1918 | else |
| 1919 | printk("%dk %s\n", par->vram_size / 1024, par->mem->name); |
| 1920 | |
| 1921 | par->chip_gen = ent->driver_data; |
| 1922 | |
| 1923 | /* fill in info */ |
| 1924 | info->fbops = &aty128fb_ops; |
| 1925 | info->flags = FBINFO_FLAG_DEFAULT; |
| 1926 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1927 | par->lcd_on = default_lcd_on; |
| 1928 | par->crt_on = default_crt_on; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1929 | |
| 1930 | var = default_var; |
| 1931 | #ifdef CONFIG_PPC_PMAC |
Benjamin Herrenschmidt | e822250 | 2006-03-28 23:15:54 +1100 | [diff] [blame] | 1932 | if (machine_is(powermac)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1933 | /* Indicate sleep capability */ |
| 1934 | if (par->chip_gen == rage_M3) { |
| 1935 | pmac_call_feature(PMAC_FTR_DEVICE_CAN_WAKE, NULL, 0, 1); |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1936 | #if 0 /* Disable the early video resume hack for now as it's causing problems, |
| 1937 | * among others we now rely on the PCI core restoring the config space |
| 1938 | * for us, which isn't the case with that hack, and that code path causes |
| 1939 | * various things to be called with interrupts off while they shouldn't. |
| 1940 | * I'm leaving the code in as it can be useful for debugging purposes |
Benjamin Herrenschmidt | d801cec | 2009-03-11 10:45:17 +1100 | [diff] [blame] | 1941 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1942 | pmac_set_early_video_resume(aty128_early_resume, par); |
Benjamin Herrenschmidt | d801cec | 2009-03-11 10:45:17 +1100 | [diff] [blame] | 1943 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1944 | } |
| 1945 | |
| 1946 | /* Find default mode */ |
| 1947 | if (mode_option) { |
| 1948 | if (!mac_find_mode(&var, info, mode_option, 8)) |
| 1949 | var = default_var; |
| 1950 | } else { |
| 1951 | if (default_vmode <= 0 || default_vmode > VMODE_MAX) |
| 1952 | default_vmode = VMODE_1024_768_60; |
| 1953 | |
| 1954 | /* iMacs need that resolution |
| 1955 | * PowerMac2,1 first r128 iMacs |
| 1956 | * PowerMac2,2 summer 2000 iMacs |
| 1957 | * PowerMac4,1 january 2001 iMacs "flower power" |
| 1958 | */ |
Grant Likely | 71a157e | 2010-02-01 21:34:14 -0700 | [diff] [blame] | 1959 | if (of_machine_is_compatible("PowerMac2,1") || |
| 1960 | of_machine_is_compatible("PowerMac2,2") || |
| 1961 | of_machine_is_compatible("PowerMac4,1")) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1962 | default_vmode = VMODE_1024_768_75; |
| 1963 | |
| 1964 | /* iBook SE */ |
Grant Likely | 71a157e | 2010-02-01 21:34:14 -0700 | [diff] [blame] | 1965 | if (of_machine_is_compatible("PowerBook2,2")) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1966 | default_vmode = VMODE_800_600_60; |
| 1967 | |
| 1968 | /* PowerBook Firewire (Pismo), iBook Dual USB */ |
Grant Likely | 71a157e | 2010-02-01 21:34:14 -0700 | [diff] [blame] | 1969 | if (of_machine_is_compatible("PowerBook3,1") || |
| 1970 | of_machine_is_compatible("PowerBook4,1")) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1971 | default_vmode = VMODE_1024_768_60; |
| 1972 | |
| 1973 | /* PowerBook Titanium */ |
Grant Likely | 71a157e | 2010-02-01 21:34:14 -0700 | [diff] [blame] | 1974 | if (of_machine_is_compatible("PowerBook3,2")) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1975 | default_vmode = VMODE_1152_768_60; |
| 1976 | |
| 1977 | if (default_cmode > 16) |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1978 | default_cmode = CMODE_32; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1979 | else if (default_cmode > 8) |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1980 | default_cmode = CMODE_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1981 | else |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 1982 | default_cmode = CMODE_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1983 | |
| 1984 | if (mac_vmode_to_var(default_vmode, default_cmode, &var)) |
| 1985 | var = default_var; |
| 1986 | } |
| 1987 | } else |
| 1988 | #endif /* CONFIG_PPC_PMAC */ |
| 1989 | { |
| 1990 | if (mode_option) |
| 1991 | if (fb_find_mode(&var, info, mode_option, NULL, |
| 1992 | 0, &defaultmode, 8) == 0) |
| 1993 | var = default_var; |
| 1994 | } |
| 1995 | |
| 1996 | var.accel_flags &= ~FB_ACCELF_TEXT; |
| 1997 | // var.accel_flags |= FB_ACCELF_TEXT;/* FIXME Will add accel later */ |
| 1998 | |
| 1999 | if (aty128fb_check_var(&var, info)) { |
| 2000 | printk(KERN_ERR "aty128fb: Cannot set default mode.\n"); |
| 2001 | return 0; |
| 2002 | } |
| 2003 | |
| 2004 | /* setup the DAC the way we like it */ |
| 2005 | dac = aty_ld_le32(DAC_CNTL); |
| 2006 | dac |= (DAC_8BIT_EN | DAC_RANGE_CNTL); |
| 2007 | dac |= DAC_MASK; |
| 2008 | if (par->chip_gen == rage_M3) |
| 2009 | dac |= DAC_PALETTE2_SNOOP_EN; |
| 2010 | aty_st_le32(DAC_CNTL, dac); |
| 2011 | |
| 2012 | /* turn off bus mastering, just in case */ |
| 2013 | aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL) | BUS_MASTER_DIS); |
| 2014 | |
| 2015 | info->var = var; |
| 2016 | fb_alloc_cmap(&info->cmap, 256, 0); |
| 2017 | |
| 2018 | var.activate = FB_ACTIVATE_NOW; |
| 2019 | |
| 2020 | aty128_init_engine(par); |
| 2021 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2022 | par->pdev = pdev; |
| 2023 | par->asleep = 0; |
| 2024 | par->lock_blank = 0; |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 2025 | |
| 2026 | #ifdef CONFIG_FB_ATY128_BACKLIGHT |
Richard Purdie | 202d4e6 | 2007-03-03 17:43:52 +0000 | [diff] [blame] | 2027 | if (backlight) |
| 2028 | aty128_bl_init(par); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 2029 | #endif |
| 2030 | |
Olaf Hering | c3760ae | 2006-08-05 12:13:59 -0700 | [diff] [blame] | 2031 | if (register_framebuffer(info) < 0) |
| 2032 | return 0; |
| 2033 | |
Joe Perches | 31b6780 | 2013-09-19 18:35:55 -0700 | [diff] [blame] | 2034 | fb_info(info, "%s frame buffer device on %s\n", |
| 2035 | info->fix.id, video_card); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2036 | |
| 2037 | return 1; /* success! */ |
| 2038 | } |
| 2039 | |
| 2040 | #ifdef CONFIG_PCI |
| 2041 | /* register a card ++ajoshi */ |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 2042 | static int aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2043 | { |
| 2044 | unsigned long fb_addr, reg_addr; |
| 2045 | struct aty128fb_par *par; |
| 2046 | struct fb_info *info; |
| 2047 | int err; |
| 2048 | #ifndef __sparc__ |
| 2049 | void __iomem *bios = NULL; |
| 2050 | #endif |
| 2051 | |
| 2052 | /* Enable device in PCI config */ |
| 2053 | if ((err = pci_enable_device(pdev))) { |
| 2054 | printk(KERN_ERR "aty128fb: Cannot enable PCI device: %d\n", |
| 2055 | err); |
| 2056 | return -ENODEV; |
| 2057 | } |
| 2058 | |
| 2059 | fb_addr = pci_resource_start(pdev, 0); |
| 2060 | if (!request_mem_region(fb_addr, pci_resource_len(pdev, 0), |
| 2061 | "aty128fb FB")) { |
| 2062 | printk(KERN_ERR "aty128fb: cannot reserve frame " |
| 2063 | "buffer memory\n"); |
| 2064 | return -ENODEV; |
| 2065 | } |
| 2066 | |
| 2067 | reg_addr = pci_resource_start(pdev, 2); |
| 2068 | if (!request_mem_region(reg_addr, pci_resource_len(pdev, 2), |
| 2069 | "aty128fb MMIO")) { |
| 2070 | printk(KERN_ERR "aty128fb: cannot reserve MMIO region\n"); |
| 2071 | goto err_free_fb; |
| 2072 | } |
| 2073 | |
| 2074 | /* We have the resources. Now virtualize them */ |
| 2075 | info = framebuffer_alloc(sizeof(struct aty128fb_par), &pdev->dev); |
| 2076 | if (info == NULL) { |
| 2077 | printk(KERN_ERR "aty128fb: can't alloc fb_info_aty128\n"); |
| 2078 | goto err_free_mmio; |
| 2079 | } |
| 2080 | par = info->par; |
| 2081 | |
| 2082 | info->pseudo_palette = par->pseudo_palette; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2083 | |
| 2084 | /* Virtualize mmio region */ |
| 2085 | info->fix.mmio_start = reg_addr; |
Arjan van de Ven | 3c36aa5 | 2009-01-06 14:42:28 -0800 | [diff] [blame] | 2086 | par->regbase = pci_ioremap_bar(pdev, 2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2087 | if (!par->regbase) |
| 2088 | goto err_free_info; |
| 2089 | |
| 2090 | /* Grab memory size from the card */ |
| 2091 | // How does this relate to the resource length from the PCI hardware? |
Randy Dunlap | fe86175 | 2009-02-04 15:12:20 -0800 | [diff] [blame] | 2092 | par->vram_size = aty_ld_le32(CNFG_MEMSIZE) & 0x03FFFFFF; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2093 | |
| 2094 | /* Virtualize the framebuffer */ |
| 2095 | info->screen_base = ioremap(fb_addr, par->vram_size); |
| 2096 | if (!info->screen_base) |
| 2097 | goto err_unmap_out; |
| 2098 | |
| 2099 | /* Set up info->fix */ |
| 2100 | info->fix = aty128fb_fix; |
| 2101 | info->fix.smem_start = fb_addr; |
| 2102 | info->fix.smem_len = par->vram_size; |
| 2103 | info->fix.mmio_start = reg_addr; |
| 2104 | |
| 2105 | /* If we can't test scratch registers, something is seriously wrong */ |
| 2106 | if (!register_test(par)) { |
| 2107 | printk(KERN_ERR "aty128fb: Can't write to video register!\n"); |
| 2108 | goto err_out; |
| 2109 | } |
| 2110 | |
| 2111 | #ifndef __sparc__ |
| 2112 | bios = aty128_map_ROM(par, pdev); |
| 2113 | #ifdef CONFIG_X86 |
| 2114 | if (bios == NULL) |
| 2115 | bios = aty128_find_mem_vbios(par); |
| 2116 | #endif |
| 2117 | if (bios == NULL) |
| 2118 | printk(KERN_INFO "aty128fb: BIOS not located, guessing timings.\n"); |
| 2119 | else { |
| 2120 | printk(KERN_INFO "aty128fb: Rage128 BIOS located\n"); |
| 2121 | aty128_get_pllinfo(par, bios); |
| 2122 | pci_unmap_rom(pdev, bios); |
| 2123 | } |
| 2124 | #endif /* __sparc__ */ |
| 2125 | |
| 2126 | aty128_timings(par); |
| 2127 | pci_set_drvdata(pdev, info); |
| 2128 | |
| 2129 | if (!aty128_init(pdev, ent)) |
| 2130 | goto err_out; |
| 2131 | |
| 2132 | #ifdef CONFIG_MTRR |
| 2133 | if (mtrr) { |
| 2134 | par->mtrr.vram = mtrr_add(info->fix.smem_start, |
| 2135 | par->vram_size, MTRR_TYPE_WRCOMB, 1); |
| 2136 | par->mtrr.vram_valid = 1; |
| 2137 | /* let there be speed */ |
| 2138 | printk(KERN_INFO "aty128fb: Rage128 MTRR set to ON\n"); |
| 2139 | } |
| 2140 | #endif /* CONFIG_MTRR */ |
| 2141 | return 0; |
| 2142 | |
| 2143 | err_out: |
| 2144 | iounmap(info->screen_base); |
| 2145 | err_unmap_out: |
| 2146 | iounmap(par->regbase); |
| 2147 | err_free_info: |
| 2148 | framebuffer_release(info); |
| 2149 | err_free_mmio: |
| 2150 | release_mem_region(pci_resource_start(pdev, 2), |
| 2151 | pci_resource_len(pdev, 2)); |
| 2152 | err_free_fb: |
| 2153 | release_mem_region(pci_resource_start(pdev, 0), |
| 2154 | pci_resource_len(pdev, 0)); |
| 2155 | return -ENODEV; |
| 2156 | } |
| 2157 | |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 2158 | static void aty128_remove(struct pci_dev *pdev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2159 | { |
| 2160 | struct fb_info *info = pci_get_drvdata(pdev); |
| 2161 | struct aty128fb_par *par; |
| 2162 | |
| 2163 | if (!info) |
| 2164 | return; |
| 2165 | |
| 2166 | par = info->par; |
| 2167 | |
Richard Purdie | 37ce69a | 2007-02-10 14:10:33 +0000 | [diff] [blame] | 2168 | unregister_framebuffer(info); |
| 2169 | |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 2170 | #ifdef CONFIG_FB_ATY128_BACKLIGHT |
Richard Purdie | 37ce69a | 2007-02-10 14:10:33 +0000 | [diff] [blame] | 2171 | aty128_bl_exit(info->bl_dev); |
Michael Hanselmann | 5474c12 | 2006-06-25 05:47:08 -0700 | [diff] [blame] | 2172 | #endif |
| 2173 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2174 | #ifdef CONFIG_MTRR |
| 2175 | if (par->mtrr.vram_valid) |
| 2176 | mtrr_del(par->mtrr.vram, info->fix.smem_start, |
| 2177 | par->vram_size); |
| 2178 | #endif /* CONFIG_MTRR */ |
| 2179 | iounmap(par->regbase); |
| 2180 | iounmap(info->screen_base); |
| 2181 | |
| 2182 | release_mem_region(pci_resource_start(pdev, 0), |
| 2183 | pci_resource_len(pdev, 0)); |
| 2184 | release_mem_region(pci_resource_start(pdev, 2), |
| 2185 | pci_resource_len(pdev, 2)); |
| 2186 | framebuffer_release(info); |
| 2187 | } |
| 2188 | #endif /* CONFIG_PCI */ |
| 2189 | |
| 2190 | |
| 2191 | |
| 2192 | /* |
| 2193 | * Blank the display. |
| 2194 | */ |
| 2195 | static int aty128fb_blank(int blank, struct fb_info *fb) |
| 2196 | { |
| 2197 | struct aty128fb_par *par = fb->par; |
Witold Filipczyk | 125e113 | 2007-05-08 00:37:07 -0700 | [diff] [blame] | 2198 | u8 state; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2199 | |
| 2200 | if (par->lock_blank || par->asleep) |
| 2201 | return 0; |
| 2202 | |
Witold Filipczyk | 125e113 | 2007-05-08 00:37:07 -0700 | [diff] [blame] | 2203 | switch (blank) { |
| 2204 | case FB_BLANK_NORMAL: |
| 2205 | state = 4; |
| 2206 | break; |
| 2207 | case FB_BLANK_VSYNC_SUSPEND: |
| 2208 | state = 6; |
| 2209 | break; |
| 2210 | case FB_BLANK_HSYNC_SUSPEND: |
| 2211 | state = 5; |
| 2212 | break; |
| 2213 | case FB_BLANK_POWERDOWN: |
| 2214 | state = 7; |
| 2215 | break; |
| 2216 | case FB_BLANK_UNBLANK: |
| 2217 | default: |
| 2218 | state = 0; |
| 2219 | break; |
| 2220 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2221 | aty_st_8(CRTC_EXT_CNTL+1, state); |
| 2222 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2223 | if (par->chip_gen == rage_M3) { |
| 2224 | aty128_set_crt_enable(par, par->crt_on && !blank); |
| 2225 | aty128_set_lcd_enable(par, par->lcd_on && !blank); |
| 2226 | } |
Michael Hanselmann | e01af03 | 2006-07-10 04:44:45 -0700 | [diff] [blame] | 2227 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2228 | return 0; |
| 2229 | } |
| 2230 | |
| 2231 | /* |
| 2232 | * Set a single color register. The values supplied are already |
| 2233 | * rounded down to the hardware's capabilities (according to the |
| 2234 | * entries in the var structure). Return != 0 for invalid regno. |
| 2235 | */ |
| 2236 | static int aty128fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
| 2237 | u_int transp, struct fb_info *info) |
| 2238 | { |
| 2239 | struct aty128fb_par *par = info->par; |
| 2240 | |
| 2241 | if (regno > 255 |
| 2242 | || (par->crtc.depth == 16 && regno > 63) |
| 2243 | || (par->crtc.depth == 15 && regno > 31)) |
| 2244 | return 1; |
| 2245 | |
| 2246 | red >>= 8; |
| 2247 | green >>= 8; |
| 2248 | blue >>= 8; |
| 2249 | |
| 2250 | if (regno < 16) { |
| 2251 | int i; |
| 2252 | u32 *pal = info->pseudo_palette; |
| 2253 | |
| 2254 | switch (par->crtc.depth) { |
| 2255 | case 15: |
| 2256 | pal[regno] = (regno << 10) | (regno << 5) | regno; |
| 2257 | break; |
| 2258 | case 16: |
| 2259 | pal[regno] = (regno << 11) | (regno << 6) | regno; |
| 2260 | break; |
| 2261 | case 24: |
| 2262 | pal[regno] = (regno << 16) | (regno << 8) | regno; |
| 2263 | break; |
| 2264 | case 32: |
| 2265 | i = (regno << 8) | regno; |
| 2266 | pal[regno] = (i << 16) | i; |
| 2267 | break; |
| 2268 | } |
| 2269 | } |
| 2270 | |
| 2271 | if (par->crtc.depth == 16 && regno > 0) { |
| 2272 | /* |
| 2273 | * With the 5-6-5 split of bits for RGB at 16 bits/pixel, we |
| 2274 | * have 32 slots for R and B values but 64 slots for G values. |
| 2275 | * Thus the R and B values go in one slot but the G value |
| 2276 | * goes in a different slot, and we have to avoid disturbing |
| 2277 | * the other fields in the slots we touch. |
| 2278 | */ |
| 2279 | par->green[regno] = green; |
| 2280 | if (regno < 32) { |
| 2281 | par->red[regno] = red; |
| 2282 | par->blue[regno] = blue; |
| 2283 | aty128_st_pal(regno * 8, red, par->green[regno*2], |
| 2284 | blue, par); |
| 2285 | } |
| 2286 | red = par->red[regno/2]; |
| 2287 | blue = par->blue[regno/2]; |
| 2288 | regno <<= 2; |
| 2289 | } else if (par->crtc.bpp == 16) |
| 2290 | regno <<= 3; |
| 2291 | aty128_st_pal(regno, red, green, blue, par); |
| 2292 | |
| 2293 | return 0; |
| 2294 | } |
| 2295 | |
| 2296 | #define ATY_MIRROR_LCD_ON 0x00000001 |
| 2297 | #define ATY_MIRROR_CRT_ON 0x00000002 |
| 2298 | |
| 2299 | /* out param: u32* backlight value: 0 to 15 */ |
| 2300 | #define FBIO_ATY128_GET_MIRROR _IOR('@', 1, __u32) |
| 2301 | /* in param: u32* backlight value: 0 to 15 */ |
| 2302 | #define FBIO_ATY128_SET_MIRROR _IOW('@', 2, __u32) |
| 2303 | |
Christoph Hellwig | 67a6680 | 2006-01-14 13:21:25 -0800 | [diff] [blame] | 2304 | static int aty128fb_ioctl(struct fb_info *info, u_int cmd, u_long arg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2305 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2306 | struct aty128fb_par *par = info->par; |
| 2307 | u32 value; |
| 2308 | int rc; |
| 2309 | |
| 2310 | switch (cmd) { |
| 2311 | case FBIO_ATY128_SET_MIRROR: |
| 2312 | if (par->chip_gen != rage_M3) |
| 2313 | return -EINVAL; |
| 2314 | rc = get_user(value, (__u32 __user *)arg); |
| 2315 | if (rc) |
| 2316 | return rc; |
| 2317 | par->lcd_on = (value & 0x01) != 0; |
| 2318 | par->crt_on = (value & 0x02) != 0; |
| 2319 | if (!par->crt_on && !par->lcd_on) |
| 2320 | par->lcd_on = 1; |
| 2321 | aty128_set_crt_enable(par, par->crt_on); |
| 2322 | aty128_set_lcd_enable(par, par->lcd_on); |
| 2323 | return 0; |
| 2324 | case FBIO_ATY128_GET_MIRROR: |
| 2325 | if (par->chip_gen != rage_M3) |
| 2326 | return -EINVAL; |
| 2327 | value = (par->crt_on << 1) | par->lcd_on; |
| 2328 | return put_user(value, (__u32 __user *)arg); |
| 2329 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2330 | return -EINVAL; |
| 2331 | } |
| 2332 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2333 | #if 0 |
| 2334 | /* |
| 2335 | * Accelerated functions |
| 2336 | */ |
| 2337 | |
| 2338 | static inline void aty128_rectcopy(int srcx, int srcy, int dstx, int dsty, |
| 2339 | u_int width, u_int height, |
| 2340 | struct fb_info_aty128 *par) |
| 2341 | { |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2342 | u32 save_dp_datatype, save_dp_cntl, dstval; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2343 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2344 | if (!width || !height) |
| 2345 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2346 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2347 | dstval = depth_to_dst(par->current_par.crtc.depth); |
| 2348 | if (dstval == DST_24BPP) { |
| 2349 | srcx *= 3; |
| 2350 | dstx *= 3; |
| 2351 | width *= 3; |
| 2352 | } else if (dstval == -EINVAL) { |
| 2353 | printk("aty128fb: invalid depth or RGBA\n"); |
| 2354 | return; |
| 2355 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2356 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2357 | wait_for_fifo(2, par); |
| 2358 | save_dp_datatype = aty_ld_le32(DP_DATATYPE); |
| 2359 | save_dp_cntl = aty_ld_le32(DP_CNTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2360 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2361 | wait_for_fifo(6, par); |
| 2362 | aty_st_le32(SRC_Y_X, (srcy << 16) | srcx); |
| 2363 | aty_st_le32(DP_MIX, ROP3_SRCCOPY | DP_SRC_RECT); |
| 2364 | aty_st_le32(DP_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); |
| 2365 | aty_st_le32(DP_DATATYPE, save_dp_datatype | dstval | SRC_DSTCOLOR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2366 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2367 | aty_st_le32(DST_Y_X, (dsty << 16) | dstx); |
| 2368 | aty_st_le32(DST_HEIGHT_WIDTH, (height << 16) | width); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2369 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2370 | par->blitter_may_be_busy = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2371 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2372 | wait_for_fifo(2, par); |
| 2373 | aty_st_le32(DP_DATATYPE, save_dp_datatype); |
| 2374 | aty_st_le32(DP_CNTL, save_dp_cntl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2375 | } |
| 2376 | |
| 2377 | |
| 2378 | /* |
| 2379 | * Text mode accelerated functions |
| 2380 | */ |
| 2381 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2382 | static void fbcon_aty128_bmove(struct display *p, int sy, int sx, int dy, |
| 2383 | int dx, int height, int width) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2384 | { |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2385 | sx *= fontwidth(p); |
| 2386 | sy *= fontheight(p); |
| 2387 | dx *= fontwidth(p); |
| 2388 | dy *= fontheight(p); |
| 2389 | width *= fontwidth(p); |
| 2390 | height *= fontheight(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2391 | |
Emil Goode | 659f675 | 2012-06-08 18:55:20 +0200 | [diff] [blame] | 2392 | aty128_rectcopy(sx, sy, dx, dy, width, height, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2393 | (struct fb_info_aty128 *)p->fb_info); |
| 2394 | } |
| 2395 | #endif /* 0 */ |
| 2396 | |
| 2397 | static void aty128_set_suspend(struct aty128fb_par *par, int suspend) |
| 2398 | { |
| 2399 | u32 pmgt; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2400 | struct pci_dev *pdev = par->pdev; |
| 2401 | |
Jon Mason | 8d0c03d | 2013-09-11 14:35:05 -0700 | [diff] [blame] | 2402 | if (!par->pdev->pm_cap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2403 | return; |
| 2404 | |
| 2405 | /* Set the chip into the appropriate suspend mode (we use D2, |
| 2406 | * D3 would require a complete re-initialisation of the chip, |
| 2407 | * including PCI config registers, clocks, AGP configuration, ...) |
Benjamin Herrenschmidt | b746bb7 | 2009-02-05 12:06:51 +1100 | [diff] [blame] | 2408 | * |
| 2409 | * For resume, the core will have already brought us back to D0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2410 | */ |
| 2411 | if (suspend) { |
| 2412 | /* Make sure CRTC2 is reset. Remove that the day we decide to |
| 2413 | * actually use CRTC2 and replace it with real code for disabling |
| 2414 | * the CRTC2 output during sleep |
| 2415 | */ |
| 2416 | aty_st_le32(CRTC2_GEN_CNTL, aty_ld_le32(CRTC2_GEN_CNTL) & |
| 2417 | ~(CRTC2_EN)); |
| 2418 | |
| 2419 | /* Set the power management mode to be PCI based */ |
| 2420 | /* Use this magic value for now */ |
| 2421 | pmgt = 0x0c005407; |
| 2422 | aty_st_pll(POWER_MANAGEMENT, pmgt); |
| 2423 | (void)aty_ld_pll(POWER_MANAGEMENT); |
| 2424 | aty_st_le32(BUS_CNTL1, 0x00000010); |
| 2425 | aty_st_le32(MEM_POWER_MISC, 0x0c830000); |
| 2426 | mdelay(100); |
Benjamin Herrenschmidt | b746bb7 | 2009-02-05 12:06:51 +1100 | [diff] [blame] | 2427 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2428 | /* Switch PCI power management to D2 */ |
Benjamin Herrenschmidt | b746bb7 | 2009-02-05 12:06:51 +1100 | [diff] [blame] | 2429 | pci_set_power_state(pdev, PCI_D2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2430 | } |
| 2431 | } |
| 2432 | |
| 2433 | static int aty128_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
| 2434 | { |
| 2435 | struct fb_info *info = pci_get_drvdata(pdev); |
| 2436 | struct aty128fb_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2437 | |
Benjamin Herrenschmidt | b746bb7 | 2009-02-05 12:06:51 +1100 | [diff] [blame] | 2438 | /* Because we may change PCI D state ourselves, we need to |
| 2439 | * first save the config space content so the core can |
| 2440 | * restore it properly on resume. |
| 2441 | */ |
| 2442 | pci_save_state(pdev); |
| 2443 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2444 | /* We don't do anything but D2, for now we return 0, but |
| 2445 | * we may want to change that. How do we know if the BIOS |
| 2446 | * can properly take care of D3 ? Also, with swsusp, we |
| 2447 | * know we'll be rebooted, ... |
| 2448 | */ |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 2449 | #ifndef CONFIG_PPC_PMAC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2450 | /* HACK ALERT ! Once I find a proper way to say to each driver |
| 2451 | * individually what will happen with it's PCI slot, I'll change |
| 2452 | * that. On laptops, the AGP slot is just unclocked, so D2 is |
| 2453 | * expected, while on desktops, the card is powered off |
| 2454 | */ |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 2455 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2456 | #endif /* CONFIG_PPC_PMAC */ |
| 2457 | |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 2458 | if (state.event == pdev->dev.power.power_state.event) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2459 | return 0; |
| 2460 | |
| 2461 | printk(KERN_DEBUG "aty128fb: suspending...\n"); |
| 2462 | |
Torben Hohn | ac751ef | 2011-01-25 15:07:35 -0800 | [diff] [blame] | 2463 | console_lock(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2464 | |
| 2465 | fb_set_suspend(info, 1); |
| 2466 | |
| 2467 | /* Make sure engine is reset */ |
| 2468 | wait_for_idle(par); |
| 2469 | aty128_reset_engine(par); |
| 2470 | wait_for_idle(par); |
| 2471 | |
| 2472 | /* Blank display and LCD */ |
Witold Filipczyk | 125e113 | 2007-05-08 00:37:07 -0700 | [diff] [blame] | 2473 | aty128fb_blank(FB_BLANK_POWERDOWN, info); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2474 | |
| 2475 | /* Sleep */ |
| 2476 | par->asleep = 1; |
| 2477 | par->lock_blank = 1; |
| 2478 | |
Benjamin Herrenschmidt | 0c541b4 | 2005-04-16 15:24:19 -0700 | [diff] [blame] | 2479 | #ifdef CONFIG_PPC_PMAC |
| 2480 | /* On powermac, we have hooks to properly suspend/resume AGP now, |
| 2481 | * use them here. We'll ultimately need some generic support here, |
| 2482 | * but the generic code isn't quite ready for that yet |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2483 | */ |
Benjamin Herrenschmidt | 0c541b4 | 2005-04-16 15:24:19 -0700 | [diff] [blame] | 2484 | pmac_suspend_agp_for_card(pdev); |
| 2485 | #endif /* CONFIG_PPC_PMAC */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2486 | |
| 2487 | /* We need a way to make sure the fbdev layer will _not_ touch the |
| 2488 | * framebuffer before we put the chip to suspend state. On 2.4, I |
| 2489 | * used dummy fb ops, 2.5 need proper support for this at the |
| 2490 | * fbdev level |
| 2491 | */ |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 2492 | if (state.event != PM_EVENT_ON) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2493 | aty128_set_suspend(par, 1); |
| 2494 | |
Torben Hohn | ac751ef | 2011-01-25 15:07:35 -0800 | [diff] [blame] | 2495 | console_unlock(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2496 | |
| 2497 | pdev->dev.power.power_state = state; |
| 2498 | |
| 2499 | return 0; |
| 2500 | } |
| 2501 | |
| 2502 | static int aty128_do_resume(struct pci_dev *pdev) |
| 2503 | { |
| 2504 | struct fb_info *info = pci_get_drvdata(pdev); |
| 2505 | struct aty128fb_par *par = info->par; |
| 2506 | |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 2507 | if (pdev->dev.power.power_state.event == PM_EVENT_ON) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2508 | return 0; |
| 2509 | |
Benjamin Herrenschmidt | b746bb7 | 2009-02-05 12:06:51 +1100 | [diff] [blame] | 2510 | /* PCI state will have been restored by the core, so |
| 2511 | * we should be in D0 now with our config space fully |
| 2512 | * restored |
| 2513 | */ |
| 2514 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2515 | /* Wakeup chip */ |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 2516 | aty128_set_suspend(par, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2517 | par->asleep = 0; |
| 2518 | |
| 2519 | /* Restore display & engine */ |
| 2520 | aty128_reset_engine(par); |
| 2521 | wait_for_idle(par); |
| 2522 | aty128fb_set_par(info); |
| 2523 | fb_pan_display(info, &info->var); |
| 2524 | fb_set_cmap(&info->cmap, info); |
| 2525 | |
| 2526 | /* Refresh */ |
| 2527 | fb_set_suspend(info, 0); |
| 2528 | |
| 2529 | /* Unblank */ |
| 2530 | par->lock_blank = 0; |
| 2531 | aty128fb_blank(0, info); |
| 2532 | |
Benjamin Herrenschmidt | 0c541b4 | 2005-04-16 15:24:19 -0700 | [diff] [blame] | 2533 | #ifdef CONFIG_PPC_PMAC |
| 2534 | /* On powermac, we have hooks to properly suspend/resume AGP now, |
| 2535 | * use them here. We'll ultimately need some generic support here, |
| 2536 | * but the generic code isn't quite ready for that yet |
| 2537 | */ |
| 2538 | pmac_resume_agp_for_card(pdev); |
| 2539 | #endif /* CONFIG_PPC_PMAC */ |
| 2540 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2541 | pdev->dev.power.power_state = PMSG_ON; |
| 2542 | |
| 2543 | printk(KERN_DEBUG "aty128fb: resumed !\n"); |
| 2544 | |
| 2545 | return 0; |
| 2546 | } |
| 2547 | |
| 2548 | static int aty128_pci_resume(struct pci_dev *pdev) |
| 2549 | { |
| 2550 | int rc; |
| 2551 | |
Torben Hohn | ac751ef | 2011-01-25 15:07:35 -0800 | [diff] [blame] | 2552 | console_lock(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2553 | rc = aty128_do_resume(pdev); |
Torben Hohn | ac751ef | 2011-01-25 15:07:35 -0800 | [diff] [blame] | 2554 | console_unlock(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2555 | |
| 2556 | return rc; |
| 2557 | } |
| 2558 | |
| 2559 | |
Greg Kroah-Hartman | 48c68c4 | 2012-12-21 13:07:39 -0800 | [diff] [blame] | 2560 | static int aty128fb_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2561 | { |
| 2562 | #ifndef MODULE |
| 2563 | char *option = NULL; |
| 2564 | |
| 2565 | if (fb_get_options("aty128fb", &option)) |
| 2566 | return -ENODEV; |
| 2567 | aty128fb_setup(option); |
| 2568 | #endif |
| 2569 | |
| 2570 | return pci_register_driver(&aty128fb_driver); |
| 2571 | } |
| 2572 | |
| 2573 | static void __exit aty128fb_exit(void) |
| 2574 | { |
| 2575 | pci_unregister_driver(&aty128fb_driver); |
| 2576 | } |
| 2577 | |
| 2578 | module_init(aty128fb_init); |
| 2579 | |
| 2580 | module_exit(aty128fb_exit); |
| 2581 | |
| 2582 | MODULE_AUTHOR("(c)1999-2003 Brad Douglas <brad@neruo.com>"); |
| 2583 | MODULE_DESCRIPTION("FBDev driver for ATI Rage128 / Pro cards"); |
| 2584 | MODULE_LICENSE("GPL"); |
| 2585 | module_param(mode_option, charp, 0); |
| 2586 | MODULE_PARM_DESC(mode_option, "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" "); |
| 2587 | #ifdef CONFIG_MTRR |
| 2588 | module_param_named(nomtrr, mtrr, invbool, 0); |
| 2589 | MODULE_PARM_DESC(nomtrr, "bool: Disable MTRR support (0 or 1=disabled) (default=0)"); |
| 2590 | #endif |
| 2591 | |