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Guennadi Liakhovetski9a7b8e02012-05-09 17:09:13 +02001/*
2 * Dmaengine driver base library for DMA controllers, found on SH-based SoCs
3 *
4 * extracted from shdma.c and headers
5 *
6 * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
7 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
8 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
9 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
10 *
11 * This is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 */
15
16#ifndef SHDMA_BASE_H
17#define SHDMA_BASE_H
18
19#include <linux/dmaengine.h>
20#include <linux/interrupt.h>
21#include <linux/list.h>
22#include <linux/types.h>
23
24/**
25 * shdma_pm_state - DMA channel PM state
26 * SHDMA_PM_ESTABLISHED: either idle or during data transfer
27 * SHDMA_PM_BUSY: during the transfer preparation, when we have to
28 * drop the lock temporarily
29 * SHDMA_PM_PENDING: transfers pending
30 */
31enum shdma_pm_state {
32 SHDMA_PM_ESTABLISHED,
33 SHDMA_PM_BUSY,
34 SHDMA_PM_PENDING,
35};
36
37struct device;
38
39/*
40 * Drivers, using this library are expected to embed struct shdma_dev,
41 * struct shdma_chan, struct shdma_desc, and struct shdma_slave
42 * in their respective device, channel, descriptor and slave objects.
43 */
44
45struct shdma_slave {
46 unsigned int slave_id;
47};
48
49struct shdma_desc {
50 struct list_head node;
51 struct dma_async_tx_descriptor async_tx;
52 enum dma_transfer_direction direction;
53 dma_cookie_t cookie;
54 int chunks;
55 int mark;
56};
57
58struct shdma_chan {
59 spinlock_t chan_lock; /* Channel operation lock */
60 struct list_head ld_queue; /* Link descriptors queue */
61 struct list_head ld_free; /* Free link descriptors */
62 struct dma_chan dma_chan; /* DMA channel */
63 struct device *dev; /* Channel device */
64 void *desc; /* buffer for descriptor array */
65 int desc_num; /* desc count */
66 size_t max_xfer_len; /* max transfer length */
67 int id; /* Raw id of this channel */
68 int irq; /* Channel IRQ */
Guennadi Liakhovetskiecf90fb2012-07-05 12:29:40 +020069 struct shdma_slave *slave; /* Client data for slave DMA */
Guennadi Liakhovetski9a7b8e02012-05-09 17:09:13 +020070 enum shdma_pm_state pm_state;
71};
72
73/**
74 * struct shdma_ops - simple DMA driver operations
75 * desc_completed: return true, if this is the descriptor, that just has
76 * completed (atomic)
77 * halt_channel: stop DMA channel operation (atomic)
78 * channel_busy: return true, if the channel is busy (atomic)
79 * slave_addr: return slave DMA address
80 * desc_setup: set up the hardware specific descriptor portion (atomic)
81 * set_slave: bind channel to a slave
82 * setup_xfer: configure channel hardware for operation (atomic)
83 * start_xfer: start the DMA transfer (atomic)
84 * embedded_desc: return Nth struct shdma_desc pointer from the
85 * descriptor array
86 * chan_irq: process channel IRQ, return true if a transfer has
87 * completed (atomic)
88 */
89struct shdma_ops {
90 bool (*desc_completed)(struct shdma_chan *, struct shdma_desc *);
91 void (*halt_channel)(struct shdma_chan *);
92 bool (*channel_busy)(struct shdma_chan *);
93 dma_addr_t (*slave_addr)(struct shdma_chan *);
94 int (*desc_setup)(struct shdma_chan *, struct shdma_desc *,
95 dma_addr_t, dma_addr_t, size_t *);
96 int (*set_slave)(struct shdma_chan *, struct shdma_slave *);
97 void (*setup_xfer)(struct shdma_chan *, struct shdma_slave *);
98 void (*start_xfer)(struct shdma_chan *, struct shdma_desc *);
99 struct shdma_desc *(*embedded_desc)(void *, int);
100 bool (*chan_irq)(struct shdma_chan *, int);
101};
102
103struct shdma_dev {
104 struct dma_device dma_dev;
105 struct shdma_chan **schan;
106 const struct shdma_ops *ops;
107 size_t desc_size;
108};
109
110#define shdma_for_each_chan(c, d, i) for (i = 0, c = (d)->schan[0]; \
111 i < (d)->dma_dev.chancnt; c = (d)->schan[++i])
112
113int shdma_request_irq(struct shdma_chan *, int,
114 unsigned long, const char *);
115void shdma_free_irq(struct shdma_chan *);
116bool shdma_reset(struct shdma_dev *sdev);
117void shdma_chan_probe(struct shdma_dev *sdev,
118 struct shdma_chan *schan, int id);
119void shdma_chan_remove(struct shdma_chan *schan);
120int shdma_init(struct device *dev, struct shdma_dev *sdev,
121 int chan_num);
122void shdma_cleanup(struct shdma_dev *sdev);
123
124#endif