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gerrit-public.fairphone.software / kernel / msm-4.19 / c50f9fb6c535edf4731eecb53d91ebc297e82e5b / . / include / acpi / cppc_acpi.h
blob: 2010c0516f273f05185d8131b363996c37d68903 [file] [log] [blame]
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]1/*
2 * CPPC (Collaborative Processor Performance Control) methods used
3 * by CPUfreq drivers.
4 *
5 * (C) Copyright 2014, 2015 Linaro Ltd.
6 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; version 2
11 * of the License.
12 */
13
14#ifndef _CPPC_ACPI_H
15#define _CPPC_ACPI_H
16
17#include <linux/acpi.h>
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]18#include <linux/types.h>
19
Hoan Tran866ae692016-06-16 14:09:38 -0700[diff] [blame]20#include <acpi/pcc.h>
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]21#include <acpi/processor.h>
22
23/* Only support CPPCv2 for now. */
24#define CPPC_NUM_ENT 21
25#define CPPC_REV 2
26
Prakash, Prashanth139aee72016-08-16 14:39:44 -0600[diff] [blame]27#define PCC_CMD_COMPLETE_MASK (1 << 0)
28#define PCC_ERROR_MASK (1 << 2)
29
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]30#define MAX_CPC_REG_ENT 19
31
32/* CPPC specific PCC commands. */
33#define CMD_READ 0
34#define CMD_WRITE 1
35
36/* Each register has the folowing format. */
37struct cpc_reg {
38 u8 descriptor;
39 u16 length;
40 u8 space_id;
41 u8 bit_width;
42 u8 bit_offset;
43 u8 access_width;
44 u64 __iomem address;
45} __packed;
46
47/*
48 * Each entry in the CPC table is either
49 * of type ACPI_TYPE_BUFFER or
50 * ACPI_TYPE_INTEGER.
51 */
52struct cpc_register_resource {
53 acpi_object_type type;
Ashwin Chaugule5bbb86a2016-08-16 14:39:38 -0600[diff] [blame]54 u64 __iomem *sys_mem_vaddr;
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]55 union {
56 struct cpc_reg reg;
57 u64 int_value;
58 } cpc_entry;
59};
60
61/* Container to hold the CPC details for each CPU */
62struct cpc_desc {
63 int num_entries;
64 int version;
65 int cpu_id;
Prakash, Prashanth80b82862016-08-16 14:39:40 -0600[diff] [blame]66 int write_cmd_status;
67 int write_cmd_id;
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]68 struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
69 struct acpi_psd_package domain_info;
Ashwin Chaugule158c9982016-08-16 14:39:42 -0600[diff] [blame]70 struct kobject kobj;
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]71};
72
73/* These are indexes into the per-cpu cpc_regs[]. Order is important. */
74enum cppc_regs {
75 HIGHEST_PERF,
76 NOMINAL_PERF,
77 LOW_NON_LINEAR_PERF,
78 LOWEST_PERF,
79 GUARANTEED_PERF,
80 DESIRED_PERF,
81 MIN_PERF,
82 MAX_PERF,
83 PERF_REDUC_TOLERANCE,
84 TIME_WINDOW,
85 CTR_WRAP_TIME,
86 REFERENCE_CTR,
87 DELIVERED_CTR,
88 PERF_LIMITED,
89 ENABLE,
90 AUTO_SEL_ENABLE,
91 AUTO_ACT_WINDOW,
92 ENERGY_PERF,
93 REFERENCE_PERF,
94};
95
96/*
97 * Categorization of registers as described
98 * in the ACPI v.5.1 spec.
99 * XXX: Only filling up ones which are used by governors
100 * today.
101 */
102struct cppc_perf_caps {
103 u32 highest_perf;
104 u32 nominal_perf;
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]105 u32 lowest_perf;
Prakash, Prashanth368520a2017-03-29 13:49:59 -0600[diff] [blame]106 u32 lowest_nonlinear_perf;
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]107};
108
109struct cppc_perf_ctrls {
110 u32 max_perf;
111 u32 min_perf;
112 u32 desired_perf;
113};
114
115struct cppc_perf_fb_ctrs {
116 u64 reference;
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]117 u64 delivered;
Ashwin Chaugule158c9982016-08-16 14:39:42 -0600[diff] [blame]118 u64 reference_perf;
Prakash, Prashanth2c74d842017-03-29 13:50:00 -0600[diff] [blame]119 u64 wraparound_time;
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]120};
121
122/* Per CPU container for runtime CPPC management. */
Srinivas Pandruvada41dd6402016-09-01 13:37:11 -0700[diff] [blame]123struct cppc_cpudata {
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]124 int cpu;
125 struct cppc_perf_caps perf_caps;
126 struct cppc_perf_ctrls perf_ctrls;
127 struct cppc_perf_fb_ctrs perf_fb_ctrs;
128 struct cpufreq_policy *cur_policy;
129 unsigned int shared_type;
130 cpumask_var_t shared_cpu_map;
131};
132
133extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
134extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
135extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
Srinivas Pandruvada41dd6402016-09-01 13:37:11 -0700[diff] [blame]136extern int acpi_get_psd_map(struct cppc_cpudata **);
Prakash, Prashanthbe8b88d2016-08-16 14:39:41 -0600[diff] [blame]137extern unsigned int cppc_get_transition_latency(int cpu);
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]138
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400[diff] [blame]139#endif /* _CPPC_ACPI_H*/