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Auke Kok9d5c8242008-01-24 02:22:38 -08001/*******************************************************************************
2
3 Intel(R) Gigabit Ethernet Linux driver
Alexander Duyck86d5d382009-02-06 23:23:12 +00004 Copyright(c) 2007-2009 Intel Corporation.
Auke Kok9d5c8242008-01-24 02:22:38 -08005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/* Linux PRO/1000 Ethernet Driver main header file */
30
31#ifndef _IGB_H_
32#define _IGB_H_
33
34#include "e1000_mac.h"
35#include "e1000_82575.h"
36
Patrick Ohly38c845c2009-02-12 05:03:41 +000037#include <linux/clocksource.h>
Patrick Ohly33af6bc2009-02-12 05:03:43 +000038#include <linux/timecompare.h>
39#include <linux/net_tstamp.h>
Patrick Ohly38c845c2009-02-12 05:03:41 +000040
Auke Kok9d5c8242008-01-24 02:22:38 -080041struct igb_adapter;
42
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -070043/* ((1000000000ns / (6000ints/s * 1024ns)) << 2 = 648 */
44#define IGB_START_ITR 648
Auke Kok9d5c8242008-01-24 02:22:38 -080045
Auke Kok9d5c8242008-01-24 02:22:38 -080046/* TX/RX descriptor defines */
47#define IGB_DEFAULT_TXD 256
48#define IGB_MIN_TXD 80
49#define IGB_MAX_TXD 4096
50
51#define IGB_DEFAULT_RXD 256
52#define IGB_MIN_RXD 80
53#define IGB_MAX_RXD 4096
54
55#define IGB_DEFAULT_ITR 3 /* dynamic */
56#define IGB_MAX_ITR_USECS 10000
57#define IGB_MIN_ITR_USECS 10
Alexander Duyck047e0032009-10-27 15:49:27 +000058#define NON_Q_VECTORS 1
59#define MAX_Q_VECTORS 8
Auke Kok9d5c8242008-01-24 02:22:38 -080060
61/* Transmit and receive queues */
Alexander Duyck1bfaf072009-02-19 20:39:23 -080062#define IGB_MAX_RX_QUEUES (adapter->vfs_allocated_count ? \
63 (adapter->vfs_allocated_count > 6 ? 1 : 2) : 4)
64#define IGB_MAX_TX_QUEUES IGB_MAX_RX_QUEUES
65#define IGB_ABS_MAX_TX_QUEUES 4
Auke Kok9d5c8242008-01-24 02:22:38 -080066
Alexander Duyck4ae196d2009-02-19 20:40:07 -080067#define IGB_MAX_VF_MC_ENTRIES 30
68#define IGB_MAX_VF_FUNCTIONS 8
69#define IGB_MAX_VFTA_ENTRIES 128
70
71struct vf_data_storage {
72 unsigned char vf_mac_addresses[ETH_ALEN];
73 u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES];
74 u16 num_vf_mc_hashes;
Alexander Duyckae641bd2009-09-03 14:49:33 +000075 u16 vlans_enabled;
Alexander Duyck4ae196d2009-02-19 20:40:07 -080076 bool clear_to_send;
77};
78
Auke Kok9d5c8242008-01-24 02:22:38 -080079/* RX descriptor control thresholds.
80 * PTHRESH - MAC will consider prefetch if it has fewer than this number of
81 * descriptors available in its onboard memory.
82 * Setting this to 0 disables RX descriptor prefetch.
83 * HTHRESH - MAC will only prefetch if there are at least this many descriptors
84 * available in host memory.
85 * If PTHRESH is 0, this should also be 0.
86 * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back
87 * descriptors until either it has this many to write back, or the
88 * ITR timer expires.
89 */
Alexander Duyck85b430b2009-10-27 15:50:29 +000090#define IGB_RX_PTHRESH (hw->mac.type <= e1000_82576 ? 16 : 8)
Auke Kok9d5c8242008-01-24 02:22:38 -080091#define IGB_RX_HTHRESH 8
92#define IGB_RX_WTHRESH 1
Alexander Duyck85b430b2009-10-27 15:50:29 +000093#define IGB_TX_PTHRESH 8
94#define IGB_TX_HTHRESH 1
95#define IGB_TX_WTHRESH ((hw->mac.type == e1000_82576 && \
96 adapter->msix_entries) ? 0 : 16)
Auke Kok9d5c8242008-01-24 02:22:38 -080097
98/* this is the size past which hardware will drop packets when setting LPE=0 */
99#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
100
101/* Supported Rx Buffer Sizes */
102#define IGB_RXBUFFER_128 128 /* Used for packet split */
Auke Kok9d5c8242008-01-24 02:22:38 -0800103#define IGB_RXBUFFER_1024 1024
104#define IGB_RXBUFFER_2048 2048
Auke Kok9d5c8242008-01-24 02:22:38 -0800105#define IGB_RXBUFFER_16384 16384
106
Alexander Duycke1739522009-02-19 20:39:44 -0800107#define MAX_STD_JUMBO_FRAME_SIZE 9234
Auke Kok9d5c8242008-01-24 02:22:38 -0800108
109/* How many Tx Descriptors do we need to call netif_wake_queue ? */
110#define IGB_TX_QUEUE_WAKE 16
111/* How many Rx Buffers do we bundle into one write to the hardware ? */
112#define IGB_RX_BUFFER_WRITE 16 /* Must be power of 2 */
113
114#define AUTO_ALL_MODES 0
115#define IGB_EEPROM_APME 0x0400
116
117#ifndef IGB_MASTER_SLAVE
118/* Switch to override PHY master/slave setting */
119#define IGB_MASTER_SLAVE e1000_ms_hw_default
120#endif
121
122#define IGB_MNG_VLAN_NONE -1
123
124/* wrapper around a pointer to a socket buffer,
125 * so a DMA handle can be stored along with the buffer */
126struct igb_buffer {
127 struct sk_buff *skb;
128 dma_addr_t dma;
129 union {
130 /* TX */
131 struct {
132 unsigned long time_stamp;
Alexander Duyck0e014cb2008-12-26 01:33:18 -0800133 u16 length;
134 u16 next_to_watch;
Auke Kok9d5c8242008-01-24 02:22:38 -0800135 };
136 /* RX */
137 struct {
138 struct page *page;
139 u64 page_dma;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -0700140 unsigned int page_offset;
Auke Kok9d5c8242008-01-24 02:22:38 -0800141 };
142 };
143};
144
Jesper Dangaard Brouer8c0ab702009-05-26 13:50:31 +0000145struct igb_tx_queue_stats {
Auke Kok9d5c8242008-01-24 02:22:38 -0800146 u64 packets;
147 u64 bytes;
Alexander Duyck04a5fcaa2009-10-27 15:52:27 +0000148 u64 restart_queue;
Auke Kok9d5c8242008-01-24 02:22:38 -0800149};
150
Jesper Dangaard Brouer8c0ab702009-05-26 13:50:31 +0000151struct igb_rx_queue_stats {
152 u64 packets;
153 u64 bytes;
154 u64 drops;
Alexander Duyck04a5fcaa2009-10-27 15:52:27 +0000155 u64 csum_err;
156 u64 alloc_failed;
Jesper Dangaard Brouer8c0ab702009-05-26 13:50:31 +0000157};
158
Alexander Duyck047e0032009-10-27 15:49:27 +0000159struct igb_q_vector {
Auke Kok9d5c8242008-01-24 02:22:38 -0800160 struct igb_adapter *adapter; /* backlink */
Alexander Duyck047e0032009-10-27 15:49:27 +0000161 struct igb_ring *rx_ring;
162 struct igb_ring *tx_ring;
163 struct napi_struct napi;
164
165 u32 eims_value;
166 u16 cpu;
167
168 u16 itr_val;
169 u8 set_itr;
170 u8 itr_shift;
171 void __iomem *itr_register;
172
173 char name[IFNAMSIZ + 9];
174};
175
176struct igb_ring {
177 struct igb_q_vector *q_vector; /* backlink to q_vector */
Alexander Duycke694e962009-10-27 15:53:06 +0000178 struct net_device *netdev; /* back pointer to net_device */
Alexander Duyck80785292009-10-27 15:51:47 +0000179 struct pci_dev *pdev; /* pci device for dma mapping */
Alexander Duyck047e0032009-10-27 15:49:27 +0000180 dma_addr_t dma; /* phys address of the ring */
Alexander Duycke694e962009-10-27 15:53:06 +0000181 void *desc; /* descriptor ring memory */
Alexander Duyck047e0032009-10-27 15:49:27 +0000182 unsigned int size; /* length of desc. ring in bytes */
183 unsigned int count; /* number of desc. in the ring */
Auke Kok9d5c8242008-01-24 02:22:38 -0800184 u16 next_to_use;
185 u16 next_to_clean;
Alexander Duyckfce99e32009-10-27 15:51:27 +0000186 void __iomem *head;
187 void __iomem *tail;
Auke Kok9d5c8242008-01-24 02:22:38 -0800188 struct igb_buffer *buffer_info; /* array of buffer info structs */
189
Alexander Duyck047e0032009-10-27 15:49:27 +0000190 u8 queue_index;
191 u8 reg_idx;
Auke Kok9d5c8242008-01-24 02:22:38 -0800192
193 unsigned int total_bytes;
194 unsigned int total_packets;
195
Alexander Duyck85ad76b2009-10-27 15:52:46 +0000196 u32 flags;
197
Auke Kok9d5c8242008-01-24 02:22:38 -0800198 union {
199 /* TX */
200 struct {
Jesper Dangaard Brouer8c0ab702009-05-26 13:50:31 +0000201 struct igb_tx_queue_stats tx_stats;
Auke Kok9d5c8242008-01-24 02:22:38 -0800202 bool detect_tx_hung;
203 };
204 /* RX */
205 struct {
Jesper Dangaard Brouer8c0ab702009-05-26 13:50:31 +0000206 struct igb_rx_queue_stats rx_stats;
Alexander Duyck4c844852009-10-27 15:52:07 +0000207 u32 rx_buffer_len;
Auke Kok9d5c8242008-01-24 02:22:38 -0800208 };
209 };
Auke Kok9d5c8242008-01-24 02:22:38 -0800210};
211
Alexander Duyck85ad76b2009-10-27 15:52:46 +0000212#define IGB_RING_FLAG_RX_CSUM 0x00000001 /* RX CSUM enabled */
213#define IGB_RING_FLAG_RX_SCTP_CSUM 0x00000002 /* SCTP CSUM offload enabled */
214
215#define IGB_RING_FLAG_TX_CTX_IDX 0x00000001 /* HW requires context index */
216
217#define IGB_ADVTXD_DCMD (E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS)
218
Auke Kok9d5c8242008-01-24 02:22:38 -0800219#define E1000_RX_DESC_ADV(R, i) \
220 (&(((union e1000_adv_rx_desc *)((R).desc))[i]))
221#define E1000_TX_DESC_ADV(R, i) \
222 (&(((union e1000_adv_tx_desc *)((R).desc))[i]))
223#define E1000_TX_CTXTDESC_ADV(R, i) \
224 (&(((struct e1000_adv_tx_context_desc *)((R).desc))[i]))
Auke Kok9d5c8242008-01-24 02:22:38 -0800225
Alexander Duyckd7ee5b32009-10-27 15:54:23 +0000226/* igb_desc_unused - calculate if we have unused descriptors */
227static inline int igb_desc_unused(struct igb_ring *ring)
228{
229 if (ring->next_to_clean > ring->next_to_use)
230 return ring->next_to_clean - ring->next_to_use - 1;
231
232 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
233}
234
Auke Kok9d5c8242008-01-24 02:22:38 -0800235/* board specific private data structure */
236
237struct igb_adapter {
238 struct timer_list watchdog_timer;
239 struct timer_list phy_info_timer;
240 struct vlan_group *vlgrp;
241 u16 mng_vlan_id;
242 u32 bd_number;
Auke Kok9d5c8242008-01-24 02:22:38 -0800243 u32 wol;
244 u32 en_mng_pt;
245 u16 link_speed;
246 u16 link_duplex;
247 unsigned int total_tx_bytes;
248 unsigned int total_tx_packets;
249 unsigned int total_rx_bytes;
250 unsigned int total_rx_packets;
251 /* Interrupt Throttle Rate */
Alexander Duyck4fc82ad2009-10-27 23:45:42 +0000252 u32 rx_itr_setting;
253 u32 tx_itr_setting;
Auke Kok9d5c8242008-01-24 02:22:38 -0800254 u16 tx_itr;
255 u16 rx_itr;
Auke Kok9d5c8242008-01-24 02:22:38 -0800256
257 struct work_struct reset_task;
258 struct work_struct watchdog_task;
259 bool fc_autoneg;
260 u8 tx_timeout_factor;
261 struct timer_list blink_timer;
262 unsigned long led_status;
263
264 /* TX */
265 struct igb_ring *tx_ring; /* One per active queue */
Auke Kok9d5c8242008-01-24 02:22:38 -0800266 unsigned long tx_queue_len;
Auke Kok9d5c8242008-01-24 02:22:38 -0800267 u32 gotc;
268 u64 gotc_old;
269 u64 tpt_old;
270 u64 colc_old;
271 u32 tx_timeout_count;
272
273 /* RX */
274 struct igb_ring *rx_ring; /* One per active queue */
275 int num_tx_queues;
276 int num_rx_queues;
277
Auke Kok9d5c8242008-01-24 02:22:38 -0800278 u32 gorc;
279 u64 gorc_old;
Auke Kok9d5c8242008-01-24 02:22:38 -0800280 u32 max_frame_size;
281 u32 min_frame_size;
282
283 /* OS defined structs */
284 struct net_device *netdev;
Auke Kok9d5c8242008-01-24 02:22:38 -0800285 struct pci_dev *pdev;
Patrick Ohly38c845c2009-02-12 05:03:41 +0000286 struct cyclecounter cycles;
287 struct timecounter clock;
Patrick Ohly33af6bc2009-02-12 05:03:43 +0000288 struct timecompare compare;
289 struct hwtstamp_config hwtstamp_config;
Auke Kok9d5c8242008-01-24 02:22:38 -0800290
291 /* structs defined in e1000_hw.h */
292 struct e1000_hw hw;
293 struct e1000_hw_stats stats;
294 struct e1000_phy_info phy_info;
295 struct e1000_phy_stats phy_stats;
296
297 u32 test_icr;
298 struct igb_ring test_tx_ring;
299 struct igb_ring test_rx_ring;
300
301 int msg_enable;
Alexander Duyck047e0032009-10-27 15:49:27 +0000302
303 unsigned int num_q_vectors;
304 struct igb_q_vector *q_vector[MAX_Q_VECTORS];
Auke Kok9d5c8242008-01-24 02:22:38 -0800305 struct msix_entry *msix_entries;
306 u32 eims_enable_mask;
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700307 u32 eims_other;
Auke Kok9d5c8242008-01-24 02:22:38 -0800308
309 /* to not mess up cache alignment, always add to the bottom */
310 unsigned long state;
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700311 unsigned int flags;
Auke Kok9d5c8242008-01-24 02:22:38 -0800312 u32 eeprom_wol;
Taku Izumi42bfd33a2008-06-20 12:10:30 +0900313
Alexander Duyck1bfaf072009-02-19 20:39:23 -0800314 struct igb_ring *multi_tx_table[IGB_ABS_MAX_TX_QUEUES];
Alexander Duyck68fd9912008-11-20 00:48:10 -0800315 unsigned int tx_ring_count;
316 unsigned int rx_ring_count;
Alexander Duyck1bfaf072009-02-19 20:39:23 -0800317 unsigned int vfs_allocated_count;
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800318 struct vf_data_storage *vf_data;
Auke Kok9d5c8242008-01-24 02:22:38 -0800319};
320
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700321#define IGB_FLAG_HAS_MSI (1 << 0)
Alexander Duyckcbd347a2009-02-15 23:59:44 -0800322#define IGB_FLAG_DCA_ENABLED (1 << 1)
323#define IGB_FLAG_QUAD_PORT_A (1 << 2)
Alexander Duyck4fc82ad2009-10-27 23:45:42 +0000324#define IGB_FLAG_QUEUE_PAIRS (1 << 3)
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700325
Auke Kok9d5c8242008-01-24 02:22:38 -0800326enum e1000_state_t {
327 __IGB_TESTING,
328 __IGB_RESETTING,
329 __IGB_DOWN
330};
331
332enum igb_boards {
333 board_82575,
334};
335
336extern char igb_driver_name[];
337extern char igb_driver_version[];
338
339extern char *igb_get_hw_dev_name(struct e1000_hw *hw);
340extern int igb_up(struct igb_adapter *);
341extern void igb_down(struct igb_adapter *);
342extern void igb_reinit_locked(struct igb_adapter *);
343extern void igb_reset(struct igb_adapter *);
344extern int igb_set_spd_dplx(struct igb_adapter *, u16);
Alexander Duyck80785292009-10-27 15:51:47 +0000345extern int igb_setup_tx_resources(struct igb_ring *);
346extern int igb_setup_rx_resources(struct igb_ring *);
Alexander Duyck68fd9912008-11-20 00:48:10 -0800347extern void igb_free_tx_resources(struct igb_ring *);
348extern void igb_free_rx_resources(struct igb_ring *);
Alexander Duyckd7ee5b32009-10-27 15:54:23 +0000349extern void igb_configure_tx_ring(struct igb_adapter *, struct igb_ring *);
350extern void igb_configure_rx_ring(struct igb_adapter *, struct igb_ring *);
351extern void igb_setup_tctl(struct igb_adapter *);
352extern void igb_setup_rctl(struct igb_adapter *);
Alexander Duyckb1a436c2009-10-27 15:54:43 +0000353extern netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *, struct igb_ring *);
354extern void igb_unmap_and_free_tx_resource(struct igb_ring *,
355 struct igb_buffer *);
Alexander Duyckd7ee5b32009-10-27 15:54:23 +0000356extern void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
Auke Kok9d5c8242008-01-24 02:22:38 -0800357extern void igb_update_stats(struct igb_adapter *);
358extern void igb_set_ethtool_ops(struct net_device *);
359
Alexander Duyckf5f4cf02008-11-21 21:30:24 -0800360static inline s32 igb_reset_phy(struct e1000_hw *hw)
361{
Alexander Duycka8d2a0c2009-02-06 23:17:26 +0000362 if (hw->phy.ops.reset)
363 return hw->phy.ops.reset(hw);
Alexander Duyckf5f4cf02008-11-21 21:30:24 -0800364
365 return 0;
366}
367
368static inline s32 igb_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data)
369{
Alexander Duycka8d2a0c2009-02-06 23:17:26 +0000370 if (hw->phy.ops.read_reg)
371 return hw->phy.ops.read_reg(hw, offset, data);
Alexander Duyckf5f4cf02008-11-21 21:30:24 -0800372
373 return 0;
374}
375
376static inline s32 igb_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data)
377{
Alexander Duycka8d2a0c2009-02-06 23:17:26 +0000378 if (hw->phy.ops.write_reg)
379 return hw->phy.ops.write_reg(hw, offset, data);
Alexander Duyckf5f4cf02008-11-21 21:30:24 -0800380
381 return 0;
382}
383
384static inline s32 igb_get_phy_info(struct e1000_hw *hw)
385{
386 if (hw->phy.ops.get_phy_info)
387 return hw->phy.ops.get_phy_info(hw);
388
389 return 0;
390}
391
Auke Kok9d5c8242008-01-24 02:22:38 -0800392#endif /* _IGB_H_ */