| Boris Brezillon | 92a8b06 | 2015-01-14 17:21:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Atmel Corporation. |
| 3 | * |
| 4 | * Memory Controllers (MATRIX, EBI) - System peripherals registers. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H |
| 13 | #define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H |
| 14 | |
| 15 | #define AT91SAM9260_MATRIX_MCFG 0x00 |
| 16 | #define AT91SAM9260_MATRIX_SCFG 0x40 |
| 17 | #define AT91SAM9260_MATRIX_PRS 0x80 |
| 18 | #define AT91SAM9260_MATRIX_MRCR 0x100 |
| 19 | #define AT91SAM9260_MATRIX_EBICSA 0x11c |
| 20 | |
| 21 | #define AT91SAM9261_MATRIX_MRCR 0x0 |
| 22 | #define AT91SAM9261_MATRIX_SCFG 0x4 |
| 23 | #define AT91SAM9261_MATRIX_TCR 0x24 |
| 24 | #define AT91SAM9261_MATRIX_EBICSA 0x30 |
| 25 | #define AT91SAM9261_MATRIX_USBPUCR 0x34 |
| 26 | |
| 27 | #define AT91SAM9263_MATRIX_MCFG 0x00 |
| 28 | #define AT91SAM9263_MATRIX_SCFG 0x40 |
| 29 | #define AT91SAM9263_MATRIX_PRS 0x80 |
| 30 | #define AT91SAM9263_MATRIX_MRCR 0x100 |
| 31 | #define AT91SAM9263_MATRIX_TCR 0x114 |
| 32 | #define AT91SAM9263_MATRIX_EBI0CSA 0x120 |
| 33 | #define AT91SAM9263_MATRIX_EBI1CSA 0x124 |
| 34 | |
| 35 | #define AT91SAM9RL_MATRIX_MCFG 0x00 |
| 36 | #define AT91SAM9RL_MATRIX_SCFG 0x40 |
| 37 | #define AT91SAM9RL_MATRIX_PRS 0x80 |
| 38 | #define AT91SAM9RL_MATRIX_MRCR 0x100 |
| 39 | #define AT91SAM9RL_MATRIX_TCR 0x114 |
| 40 | #define AT91SAM9RL_MATRIX_EBICSA 0x120 |
| 41 | |
| 42 | #define AT91SAM9G45_MATRIX_MCFG 0x00 |
| 43 | #define AT91SAM9G45_MATRIX_SCFG 0x40 |
| 44 | #define AT91SAM9G45_MATRIX_PRS 0x80 |
| 45 | #define AT91SAM9G45_MATRIX_MRCR 0x100 |
| 46 | #define AT91SAM9G45_MATRIX_TCR 0x110 |
| 47 | #define AT91SAM9G45_MATRIX_DDRMPR 0x118 |
| 48 | #define AT91SAM9G45_MATRIX_EBICSA 0x128 |
| 49 | |
| 50 | #define AT91SAM9N12_MATRIX_MCFG 0x00 |
| 51 | #define AT91SAM9N12_MATRIX_SCFG 0x40 |
| 52 | #define AT91SAM9N12_MATRIX_PRS 0x80 |
| 53 | #define AT91SAM9N12_MATRIX_MRCR 0x100 |
| 54 | #define AT91SAM9N12_MATRIX_EBICSA 0x118 |
| 55 | |
| 56 | #define AT91SAM9X5_MATRIX_MCFG 0x00 |
| 57 | #define AT91SAM9X5_MATRIX_SCFG 0x40 |
| 58 | #define AT91SAM9X5_MATRIX_PRS 0x80 |
| 59 | #define AT91SAM9X5_MATRIX_MRCR 0x100 |
| 60 | #define AT91SAM9X5_MATRIX_EBICSA 0x120 |
| 61 | |
| 62 | #define SAMA5D3_MATRIX_MCFG 0x00 |
| 63 | #define SAMA5D3_MATRIX_SCFG 0x40 |
| 64 | #define SAMA5D3_MATRIX_PRS 0x80 |
| 65 | #define SAMA5D3_MATRIX_MRCR 0x100 |
| 66 | |
| 67 | #define AT91_MATRIX_MCFG(o, x) ((o) + ((x) * 0x4)) |
| 68 | #define AT91_MATRIX_ULBT GENMASK(2, 0) |
| 69 | #define AT91_MATRIX_ULBT_INFINITE (0 << 0) |
| 70 | #define AT91_MATRIX_ULBT_SINGLE (1 << 0) |
| 71 | #define AT91_MATRIX_ULBT_FOUR (2 << 0) |
| 72 | #define AT91_MATRIX_ULBT_EIGHT (3 << 0) |
| 73 | #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) |
| 74 | |
| 75 | #define AT91_MATRIX_SCFG(o, x) ((o) + ((x) * 0x4)) |
| 76 | #define AT91_MATRIX_SLOT_CYCLE GENMASK(7, 0) |
| 77 | #define AT91_MATRIX_DEFMSTR_TYPE GENMASK(17, 16) |
| 78 | #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) |
| 79 | #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) |
| 80 | #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) |
| 81 | #define AT91_MATRIX_FIXED_DEFMSTR GENMASK(20, 18) |
| 82 | #define AT91_MATRIX_ARBT GENMASK(25, 24) |
| 83 | #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) |
| 84 | #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) |
| 85 | |
| 86 | #define AT91_MATRIX_ITCM_SIZE GENMASK(3, 0) |
| 87 | #define AT91_MATRIX_ITCM_0 (0 << 0) |
| 88 | #define AT91_MATRIX_ITCM_16 (5 << 0) |
| 89 | #define AT91_MATRIX_ITCM_32 (6 << 0) |
| 90 | #define AT91_MATRIX_ITCM_64 (7 << 0) |
| 91 | #define AT91_MATRIX_DTCM_SIZE GENMASK(7, 4) |
| 92 | #define AT91_MATRIX_DTCM_0 (0 << 4) |
| 93 | #define AT91_MATRIX_DTCM_16 (5 << 4) |
| 94 | #define AT91_MATRIX_DTCM_32 (6 << 4) |
| 95 | #define AT91_MATRIX_DTCM_64 (7 << 4) |
| 96 | |
| 97 | #define AT91_MATRIX_PRAS(o, x) ((o) + ((x) * 0x8)) |
| 98 | #define AT91_MATRIX_PRBS(o, x) ((o) + ((x) * 0x8) + 0x4) |
| 99 | #define AT91_MATRIX_MPR(x) GENMASK(((x) * 0x4) + 1, ((x) * 0x4)) |
| 100 | |
| 101 | #define AT91_MATRIX_RCB(x) BIT(x) |
| 102 | |
| 103 | #define AT91_MATRIX_CSA(cs, val) (val << (cs)) |
| 104 | #define AT91_MATRIX_DBPUC BIT(8) |
| 105 | #define AT91_MATRIX_DBPDC BIT(9) |
| 106 | #define AT91_MATRIX_VDDIOMSEL BIT(16) |
| 107 | #define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) |
| 108 | #define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) |
| 109 | #define AT91_MATRIX_EBI_IOSR BIT(17) |
| 110 | #define AT91_MATRIX_DDR_IOSR BIT(18) |
| 111 | #define AT91_MATRIX_NFD0_SELECT BIT(24) |
| 112 | #define AT91_MATRIX_DDR_MP_EN BIT(25) |
| 113 | #define AT91_MATRIX_EBI_NUM_CS 8 |
| 114 | |
| 115 | #define AT91_MATRIX_USBPUCR_PUON BIT(30) |
| 116 | |
| 117 | #endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */ |