blob: 27134c4fcb76eb5140ff4828066e73e11d671cd9 [file] [log] [blame]
Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Ilan Tayari1f0cf892018-05-30 10:59:50 -070063 MLX5_EVENT_TYPE_CODING_FPGA_QP_ERROR = 0x21
Saeed Mahameede2816822015-05-28 22:28:40 +030064};
65
66enum {
67 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
68 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
69 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
70 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
71};
72
73enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020074 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
75 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
76};
77
78enum {
Eli Cohend29b7962014-10-02 12:19:43 +030079 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
80 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
81 MLX5_CMD_OP_INIT_HCA = 0x102,
82 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
83 MLX5_CMD_OP_ENABLE_HCA = 0x104,
84 MLX5_CMD_OP_DISABLE_HCA = 0x105,
85 MLX5_CMD_OP_QUERY_PAGES = 0x107,
86 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
87 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030088 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
89 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020090 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030091 MLX5_CMD_OP_CREATE_MKEY = 0x200,
92 MLX5_CMD_OP_QUERY_MKEY = 0x201,
93 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
94 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
95 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
Ariel Levkovich24da0012018-04-05 18:53:27 +030096 MLX5_CMD_OP_ALLOC_MEMIC = 0x205,
97 MLX5_CMD_OP_DEALLOC_MEMIC = 0x206,
Eli Cohend29b7962014-10-02 12:19:43 +030098 MLX5_CMD_OP_CREATE_EQ = 0x301,
99 MLX5_CMD_OP_DESTROY_EQ = 0x302,
100 MLX5_CMD_OP_QUERY_EQ = 0x303,
101 MLX5_CMD_OP_GEN_EQE = 0x304,
102 MLX5_CMD_OP_CREATE_CQ = 0x400,
103 MLX5_CMD_OP_DESTROY_CQ = 0x401,
104 MLX5_CMD_OP_QUERY_CQ = 0x402,
105 MLX5_CMD_OP_MODIFY_CQ = 0x403,
106 MLX5_CMD_OP_CREATE_QP = 0x500,
107 MLX5_CMD_OP_DESTROY_QP = 0x501,
108 MLX5_CMD_OP_RST2INIT_QP = 0x502,
109 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
110 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
111 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
112 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
113 MLX5_CMD_OP_2ERR_QP = 0x507,
114 MLX5_CMD_OP_2RST_QP = 0x50a,
115 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300116 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300117 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
118 MLX5_CMD_OP_CREATE_PSV = 0x600,
119 MLX5_CMD_OP_DESTROY_PSV = 0x601,
120 MLX5_CMD_OP_CREATE_SRQ = 0x700,
121 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
122 MLX5_CMD_OP_QUERY_SRQ = 0x702,
123 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300124 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
125 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
126 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
127 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300128 MLX5_CMD_OP_CREATE_DCT = 0x710,
129 MLX5_CMD_OP_DESTROY_DCT = 0x711,
130 MLX5_CMD_OP_DRAIN_DCT = 0x712,
131 MLX5_CMD_OP_QUERY_DCT = 0x713,
132 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300133 MLX5_CMD_OP_CREATE_XRQ = 0x717,
134 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
135 MLX5_CMD_OP_QUERY_XRQ = 0x719,
136 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300137 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
138 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
139 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
140 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
141 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
142 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300143 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300144 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300145 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
146 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
147 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
148 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200149 MLX5_CMD_OP_QUERY_VNIC_ENV = 0x76f,
Eli Cohend29b7962014-10-02 12:19:43 +0300150 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
151 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
152 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
153 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200154 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300155 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300156 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
157 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
158 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
159 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
160 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
161 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300162 MLX5_CMD_OP_ALLOC_PD = 0x800,
163 MLX5_CMD_OP_DEALLOC_PD = 0x801,
164 MLX5_CMD_OP_ALLOC_UAR = 0x802,
165 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
166 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
167 MLX5_CMD_OP_ACCESS_REG = 0x805,
168 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300169 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300170 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
171 MLX5_CMD_OP_MAD_IFC = 0x50d,
172 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
173 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
174 MLX5_CMD_OP_NOP = 0x80d,
175 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
176 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300177 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
178 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
179 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
180 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
181 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
182 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
183 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
184 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
185 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
186 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
187 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
188 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200189 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
190 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300191 MLX5_CMD_OP_CREATE_LAG = 0x840,
192 MLX5_CMD_OP_MODIFY_LAG = 0x841,
193 MLX5_CMD_OP_QUERY_LAG = 0x842,
194 MLX5_CMD_OP_DESTROY_LAG = 0x843,
195 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
196 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_TIR = 0x900,
198 MLX5_CMD_OP_MODIFY_TIR = 0x901,
199 MLX5_CMD_OP_DESTROY_TIR = 0x902,
200 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300201 MLX5_CMD_OP_CREATE_SQ = 0x904,
202 MLX5_CMD_OP_MODIFY_SQ = 0x905,
203 MLX5_CMD_OP_DESTROY_SQ = 0x906,
204 MLX5_CMD_OP_QUERY_SQ = 0x907,
205 MLX5_CMD_OP_CREATE_RQ = 0x908,
206 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300207 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300208 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
209 MLX5_CMD_OP_QUERY_RQ = 0x90b,
210 MLX5_CMD_OP_CREATE_RMP = 0x90c,
211 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
212 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
213 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300214 MLX5_CMD_OP_CREATE_TIS = 0x912,
215 MLX5_CMD_OP_MODIFY_TIS = 0x913,
216 MLX5_CMD_OP_DESTROY_TIS = 0x914,
217 MLX5_CMD_OP_QUERY_TIS = 0x915,
218 MLX5_CMD_OP_CREATE_RQT = 0x916,
219 MLX5_CMD_OP_MODIFY_RQT = 0x917,
220 MLX5_CMD_OP_DESTROY_RQT = 0x918,
221 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200222 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300223 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
224 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
225 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
226 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
227 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
228 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
229 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
230 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200231 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000232 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
233 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
234 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300235 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300236 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
237 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200238 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
239 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300240 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
241 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
242 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
243 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
244 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300245 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300246};
247
248struct mlx5_ifc_flow_table_fields_supported_bits {
249 u8 outer_dmac[0x1];
250 u8 outer_smac[0x1];
251 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300252 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_first_prio[0x1];
254 u8 outer_first_cfi[0x1];
255 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300256 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_second_prio[0x1];
258 u8 outer_second_cfi[0x1];
259 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200260 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300261 u8 outer_sip[0x1];
262 u8 outer_dip[0x1];
263 u8 outer_frag[0x1];
264 u8 outer_ip_protocol[0x1];
265 u8 outer_ip_ecn[0x1];
266 u8 outer_ip_dscp[0x1];
267 u8 outer_udp_sport[0x1];
268 u8 outer_udp_dport[0x1];
269 u8 outer_tcp_sport[0x1];
270 u8 outer_tcp_dport[0x1];
271 u8 outer_tcp_flags[0x1];
272 u8 outer_gre_protocol[0x1];
273 u8 outer_gre_key[0x1];
274 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200275 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300276 u8 source_eswitch_port[0x1];
277
278 u8 inner_dmac[0x1];
279 u8 inner_smac[0x1];
280 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300281 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_first_prio[0x1];
283 u8 inner_first_cfi[0x1];
284 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_second_prio[0x1];
287 u8 inner_second_cfi[0x1];
288 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200289 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300290 u8 inner_sip[0x1];
291 u8 inner_dip[0x1];
292 u8 inner_frag[0x1];
293 u8 inner_ip_protocol[0x1];
294 u8 inner_ip_ecn[0x1];
295 u8 inner_ip_dscp[0x1];
296 u8 inner_udp_sport[0x1];
297 u8 inner_udp_dport[0x1];
298 u8 inner_tcp_sport[0x1];
299 u8 inner_tcp_dport[0x1];
300 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200301 u8 reserved_at_37[0x9];
Ariel Levkovich71c6e862018-05-13 14:33:34 +0300302
303 u8 reserved_at_40[0x5];
304 u8 outer_first_mpls_over_udp[0x4];
305 u8 outer_first_mpls_over_gre[0x4];
306 u8 inner_first_mpls[0x4];
307 u8 outer_first_mpls[0x4];
308 u8 reserved_at_55[0x2];
Boris Pismenny3346c482017-08-20 15:13:08 +0300309 u8 outer_esp_spi[0x1];
Ariel Levkovich71c6e862018-05-13 14:33:34 +0300310 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300311 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300313 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300314};
315
316struct mlx5_ifc_flow_table_prop_layout_bits {
317 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000318 u8 reserved_at_1[0x1];
319 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200320 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200321 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200322 u8 identified_miss_table_mode[0x1];
323 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300324 u8 encap[0x1];
325 u8 decap[0x1];
Or Gerlitz0c068972018-01-28 20:14:20 +0200326 u8 reserved_at_9[0x1];
327 u8 pop_vlan[0x1];
328 u8 push_vlan[0x1];
329 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +0300330
Matan Barakb4ff3a32016-02-09 14:57:42 +0200331 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200333 u8 log_max_modify_header_context[0x8];
334 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335 u8 max_ft_level[0x8];
336
Matan Barakb4ff3a32016-02-09 14:57:42 +0200337 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300338
Matan Barakb4ff3a32016-02-09 14:57:42 +0200339 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200340 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300341
Matan Barakb4ff3a32016-02-09 14:57:42 +0200342 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200343 u8 log_max_destination[0x8];
344
Raed Salem16f1c5b2017-07-30 11:02:51 +0300345 u8 log_max_flow_counter[0x8];
346 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300347 u8 log_max_flow[0x8];
348
Matan Barakb4ff3a32016-02-09 14:57:42 +0200349 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300350
351 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
352
353 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
354};
355
356struct mlx5_ifc_odp_per_transport_service_cap_bits {
357 u8 send[0x1];
358 u8 receive[0x1];
359 u8 write[0x1];
360 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200361 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300362 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200363 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300364};
365
366struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
367 u8 smac_47_16[0x20];
368
369 u8 smac_15_0[0x10];
370 u8 ethertype[0x10];
371
372 u8 dmac_47_16[0x20];
373
374 u8 dmac_15_0[0x10];
375 u8 first_prio[0x3];
376 u8 first_cfi[0x1];
377 u8 first_vid[0xc];
378
379 u8 ip_protocol[0x8];
380 u8 ip_dscp[0x6];
381 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300382 u8 cvlan_tag[0x1];
383 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300384 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300385 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300386 u8 tcp_flags[0x9];
387
388 u8 tcp_sport[0x10];
389 u8 tcp_dport[0x10];
390
Or Gerlitza8ade552017-06-07 17:49:56 +0300391 u8 reserved_at_c0[0x18];
392 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300393
394 u8 udp_sport[0x10];
395 u8 udp_dport[0x10];
396
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200397 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300398
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200399 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300400};
401
402struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300403 u8 reserved_at_0[0x8];
404 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300405
Shahar Klein3e99df82018-03-18 09:02:06 +0200406 u8 source_eswitch_owner_vhca_id[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300407 u8 source_port[0x10];
408
409 u8 outer_second_prio[0x3];
410 u8 outer_second_cfi[0x1];
411 u8 outer_second_vid[0xc];
412 u8 inner_second_prio[0x3];
413 u8 inner_second_cfi[0x1];
414 u8 inner_second_vid[0xc];
415
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300416 u8 outer_second_cvlan_tag[0x1];
417 u8 inner_second_cvlan_tag[0x1];
418 u8 outer_second_svlan_tag[0x1];
419 u8 inner_second_svlan_tag[0x1];
420 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300421 u8 gre_protocol[0x10];
422
423 u8 gre_key_h[0x18];
424 u8 gre_key_l[0x8];
425
426 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200427 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300428
Matan Barakb4ff3a32016-02-09 14:57:42 +0200429 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300430
Matan Barakb4ff3a32016-02-09 14:57:42 +0200431 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300432 u8 outer_ipv6_flow_label[0x14];
433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435 u8 inner_ipv6_flow_label[0x14];
436
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300437 u8 reserved_at_120[0x28];
438 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300439 u8 reserved_at_160[0x20];
440 u8 outer_esp_spi[0x20];
441 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442};
443
Ariel Levkovich71c6e862018-05-13 14:33:34 +0300444struct mlx5_ifc_fte_match_mpls_bits {
445 u8 mpls_label[0x14];
446 u8 mpls_exp[0x3];
447 u8 mpls_s_bos[0x1];
448 u8 mpls_ttl[0x8];
449};
450
451struct mlx5_ifc_fte_match_set_misc2_bits {
452 struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls;
453
454 struct mlx5_ifc_fte_match_mpls_bits inner_first_mpls;
455
456 struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls_over_gre;
457
458 struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls_over_udp;
459
460 u8 reserved_at_80[0x100];
461
462 u8 metadata_reg_a[0x20];
463
464 u8 reserved_at_1a0[0x60];
465};
466
Saeed Mahameede2816822015-05-28 22:28:40 +0300467struct mlx5_ifc_cmd_pas_bits {
468 u8 pa_h[0x20];
469
470 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200471 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300472};
473
474struct mlx5_ifc_uint64_bits {
475 u8 hi[0x20];
476
477 u8 lo[0x20];
478};
479
480enum {
481 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
482 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
483 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
484 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
485 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
486 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
487 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
488 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
489 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
490 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
491};
492
493struct mlx5_ifc_ads_bits {
494 u8 fl[0x1];
495 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200496 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300497 u8 pkey_index[0x10];
498
Matan Barakb4ff3a32016-02-09 14:57:42 +0200499 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300500 u8 grh[0x1];
501 u8 mlid[0x7];
502 u8 rlid[0x10];
503
504 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200505 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300506 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200507 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300508 u8 stat_rate[0x4];
509 u8 hop_limit[0x8];
510
Matan Barakb4ff3a32016-02-09 14:57:42 +0200511 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300512 u8 tclass[0x8];
513 u8 flow_label[0x14];
514
515 u8 rgid_rip[16][0x8];
516
Matan Barakb4ff3a32016-02-09 14:57:42 +0200517 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300518 u8 f_dscp[0x1];
519 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200520 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300521 u8 f_eth_prio[0x1];
522 u8 ecn[0x2];
523 u8 dscp[0x6];
524 u8 udp_sport[0x10];
525
526 u8 dei_cfi[0x1];
527 u8 eth_prio[0x3];
528 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200529 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530 u8 rmac_47_32[0x10];
531
532 u8 rmac_31_0[0x20];
533};
534
535struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200536 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300537 u8 nic_rx_multi_path_tirs_fts[0x1];
538 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
539 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300540
541 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
542
Matan Barakb4ff3a32016-02-09 14:57:42 +0200543 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300544
545 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
546
547 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
548
Matan Barakb4ff3a32016-02-09 14:57:42 +0200549 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300550
551 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
552
Matan Barakb4ff3a32016-02-09 14:57:42 +0200553 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300554};
555
Saeed Mahameed495716b2015-12-01 18:03:19 +0200556struct mlx5_ifc_flow_table_eswitch_cap_bits {
Chris Mib4563002018-04-24 11:21:46 +0900557 u8 reserved_at_0[0x1c];
558 u8 fdb_multi_path_to_table[0x1];
559 u8 reserved_at_1d[0x1e3];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200560
561 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
562
563 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
564
565 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
566
Matan Barakb4ff3a32016-02-09 14:57:42 +0200567 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200568};
569
Saeed Mahameedd6666752015-12-01 18:03:22 +0200570struct mlx5_ifc_e_switch_cap_bits {
571 u8 vport_svlan_strip[0x1];
572 u8 vport_cvlan_strip[0x1];
573 u8 vport_svlan_insert[0x1];
574 u8 vport_cvlan_insert_if_not_exist[0x1];
575 u8 vport_cvlan_insert_overwrite[0x1];
Roi Dayana6d04562017-12-05 10:38:58 +0200576 u8 reserved_at_5[0x18];
577 u8 merged_eswitch[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300578 u8 nic_vport_node_guid_modify[0x1];
579 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200580
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300581 u8 vxlan_encap_decap[0x1];
582 u8 nvgre_encap_decap[0x1];
583 u8 reserved_at_22[0x9];
584 u8 log_max_encap_headers[0x5];
585 u8 reserved_2b[0x6];
586 u8 max_encap_header_size[0xa];
587
588 u8 reserved_40[0x7c0];
589
Saeed Mahameedd6666752015-12-01 18:03:22 +0200590};
591
Saeed Mahameed74862162016-06-09 15:11:34 +0300592struct mlx5_ifc_qos_cap_bits {
593 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300594 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200595 u8 esw_bw_share[0x1];
596 u8 esw_rate_limit[0x1];
Bodong Wang05d3ac92018-03-19 15:10:29 +0200597 u8 reserved_at_4[0x1];
598 u8 packet_pacing_burst_bound[0x1];
599 u8 packet_pacing_typical_size[0x1];
600 u8 reserved_at_7[0x19];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300601
602 u8 reserved_at_20[0x20];
603
Saeed Mahameed74862162016-06-09 15:11:34 +0300604 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300605
Saeed Mahameed74862162016-06-09 15:11:34 +0300606 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300607
608 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300609 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300610
611 u8 esw_element_type[0x10];
612 u8 esw_tsar_type[0x10];
613
614 u8 reserved_at_c0[0x10];
615 u8 max_qos_para_vport[0x10];
616
617 u8 max_tsar_bw_share[0x20];
618
619 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300620};
621
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300622struct mlx5_ifc_debug_cap_bits {
623 u8 reserved_at_0[0x20];
624
625 u8 reserved_at_20[0x2];
626 u8 stall_detect[0x1];
627 u8 reserved_at_23[0x1d];
628
629 u8 reserved_at_40[0x7c0];
630};
631
Saeed Mahameede2816822015-05-28 22:28:40 +0300632struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
633 u8 csum_cap[0x1];
634 u8 vlan_cap[0x1];
635 u8 lro_cap[0x1];
636 u8 lro_psh_flag[0x1];
637 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200638 u8 reserved_at_5[0x2];
639 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200640 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200641 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300642 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200643 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300644 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300645 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300646 u8 reg_umr_sq[0x1];
647 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300648 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200650 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300651 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300652 u8 tunnel_stateless_vxlan[0x1];
653
Ilan Tayari547eede2017-04-18 16:04:28 +0300654 u8 swp[0x1];
655 u8 swp_csum[0x1];
656 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300657 u8 reserved_at_23[0x1b];
658 u8 max_geneve_opt_len[0x1];
659 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300660
Matan Barakb4ff3a32016-02-09 14:57:42 +0200661 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300662 u8 lro_min_mss_size[0x10];
663
Matan Barakb4ff3a32016-02-09 14:57:42 +0200664 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300665
666 u8 lro_timer_supported_periods[4][0x20];
667
Matan Barakb4ff3a32016-02-09 14:57:42 +0200668 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300669};
670
671struct mlx5_ifc_roce_cap_bits {
672 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200673 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300674
Matan Barakb4ff3a32016-02-09 14:57:42 +0200675 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300676
Matan Barakb4ff3a32016-02-09 14:57:42 +0200677 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300678 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680 u8 roce_version[0x8];
681
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300683 u8 r_roce_dest_udp_port[0x10];
684
685 u8 r_roce_max_src_udp_port[0x10];
686 u8 r_roce_min_src_udp_port[0x10];
687
Matan Barakb4ff3a32016-02-09 14:57:42 +0200688 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300689 u8 roce_address_table_size[0x10];
690
Matan Barakb4ff3a32016-02-09 14:57:42 +0200691 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300692};
693
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300694struct mlx5_ifc_device_mem_cap_bits {
695 u8 memic[0x1];
696 u8 reserved_at_1[0x1f];
697
698 u8 reserved_at_20[0xb];
699 u8 log_min_memic_alloc_size[0x5];
700 u8 reserved_at_30[0x8];
701 u8 log_max_memic_addr_alignment[0x8];
702
703 u8 memic_bar_start_addr[0x40];
704
705 u8 memic_bar_size[0x20];
706
707 u8 max_memic_size[0x20];
708
709 u8 reserved_at_c0[0x740];
710};
711
Saeed Mahameede2816822015-05-28 22:28:40 +0300712enum {
713 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
714 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
715 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
716 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
717 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
718 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
719 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
720 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
721 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
722};
723
724enum {
725 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
726 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
727 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
728 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
729 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
730 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
731 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
732 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
733 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
734};
735
736struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200737 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300738
Or Gerlitzbd108382017-05-28 15:24:17 +0300739 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200740 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300741 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300742
Matan Barakb4ff3a32016-02-09 14:57:42 +0200743 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300744
Matan Barakb4ff3a32016-02-09 14:57:42 +0200745 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300746
Matan Barakb4ff3a32016-02-09 14:57:42 +0200747 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200748 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300749
Matan Barakb4ff3a32016-02-09 14:57:42 +0200750 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200751 u8 atomic_size_qp[0x10];
752
Matan Barakb4ff3a32016-02-09 14:57:42 +0200753 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300754 u8 atomic_size_dc[0x10];
755
Matan Barakb4ff3a32016-02-09 14:57:42 +0200756 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300757};
758
759struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200760 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300761
762 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200763 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300764
Matan Barakb4ff3a32016-02-09 14:57:42 +0200765 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300766
767 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
768
769 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
770
771 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
772
Matan Barakb4ff3a32016-02-09 14:57:42 +0200773 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300774};
775
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200776struct mlx5_ifc_calc_op {
777 u8 reserved_at_0[0x10];
778 u8 reserved_at_10[0x9];
779 u8 op_swap_endianness[0x1];
780 u8 op_min[0x1];
781 u8 op_xor[0x1];
782 u8 op_or[0x1];
783 u8 op_and[0x1];
784 u8 op_max[0x1];
785 u8 op_add[0x1];
786};
787
788struct mlx5_ifc_vector_calc_cap_bits {
789 u8 calc_matrix[0x1];
790 u8 reserved_at_1[0x1f];
791 u8 reserved_at_20[0x8];
792 u8 max_vec_count[0x8];
793 u8 reserved_at_30[0xd];
794 u8 max_chunk_size[0x3];
795 struct mlx5_ifc_calc_op calc0;
796 struct mlx5_ifc_calc_op calc1;
797 struct mlx5_ifc_calc_op calc2;
798 struct mlx5_ifc_calc_op calc3;
799
800 u8 reserved_at_e0[0x720];
801};
802
Saeed Mahameede2816822015-05-28 22:28:40 +0300803enum {
804 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
805 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300806 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300807 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300808};
809
810enum {
811 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
812 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
813};
814
815enum {
816 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
817 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
818 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
819 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
820 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
821};
822
823enum {
824 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
825 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
826 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
827 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
828 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
829 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
830};
831
832enum {
833 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
834 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
835};
836
837enum {
838 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
839 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
840 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
841};
842
843enum {
844 MLX5_CAP_PORT_TYPE_IB = 0x0,
845 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300846};
847
Max Gurtovoy1410a902017-05-28 10:53:10 +0300848enum {
849 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
850 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
851 MLX5_CAP_UMR_FENCE_NONE = 0x2,
852};
853
Eli Cohenb7755162014-10-02 12:19:44 +0300854struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200855 u8 reserved_at_0[0x30];
856 u8 vhca_id[0x10];
857
858 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300859
860 u8 log_max_srq_sz[0x8];
861 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200862 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300863 u8 log_max_qp[0x5];
864
Matan Barakb4ff3a32016-02-09 14:57:42 +0200865 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300866 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200867 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300868
Matan Barakb4ff3a32016-02-09 14:57:42 +0200869 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300870 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200871 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300872 u8 log_max_cq[0x5];
873
874 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200875 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300876 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200877 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300878 u8 log_max_eq[0x4];
879
880 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200881 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300882 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200883 u8 force_teardown[0x1];
884 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300885 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200886 u8 umr_extended_translation_offset[0x1];
887 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300888 u8 log_max_klm_list_size[0x6];
889
Matan Barakb4ff3a32016-02-09 14:57:42 +0200890 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300891 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200892 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300893 u8 log_max_ra_res_dc[0x6];
894
Matan Barakb4ff3a32016-02-09 14:57:42 +0200895 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300896 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200897 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300898 u8 log_max_ra_res_qp[0x6];
899
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200900 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300901 u8 cc_query_allowed[0x1];
902 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200903 u8 start_pad[0x1];
904 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500905 u8 reserved_at_165[0xa];
906 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300907 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300908
Saeed Mahameede2816822015-05-28 22:28:40 +0300909 u8 out_of_seq_cnt[0x1];
910 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300911 u8 retransmission_q_counters[0x1];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300912 u8 debug[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300913 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300914 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300915 u8 max_qp_cnt[0xa];
916 u8 pkey_table_size[0x10];
917
Saeed Mahameede2816822015-05-28 22:28:40 +0300918 u8 vport_group_manager[0x1];
919 u8 vhca_group_manager[0x1];
920 u8 ib_virt[0x1];
921 u8 eth_virt[0x1];
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200922 u8 vnic_env_queue_counters[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300923 u8 ets[0x1];
924 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200925 u8 eswitch_flow_table[0x1];
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300926 u8 device_memory[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200927 u8 mcam_reg[0x1];
928 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300929 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200930 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300931 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300932 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200933 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300934 u8 disable_link_up[0x1];
935 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300936 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300937 u8 num_ports[0x8];
938
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300939 u8 reserved_at_1c0[0x1];
940 u8 pps[0x1];
941 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300942 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300943 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200944 u8 max_tc[0x4];
Ilan Tayari1865ea9a2018-05-30 10:59:49 -0700945 u8 temp_warn_event[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300946 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300947 u8 general_notification_event[0x1];
948 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200949 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200950 u8 rol_s[0x1];
951 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300952 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200953 u8 wol_s[0x1];
954 u8 wol_g[0x1];
955 u8 wol_a[0x1];
956 u8 wol_b[0x1];
957 u8 wol_m[0x1];
958 u8 wol_u[0x1];
959 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300960
961 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300962 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300963 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300964
Saeed Mahameede2816822015-05-28 22:28:40 +0300965 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300966 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300967 u8 reserved_at_202[0x1];
968 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200969 u8 ipoib_basic_offloads[0x1];
Majd Dibbinyc8d75a92018-03-22 15:34:04 +0200970 u8 reserved_at_205[0x1];
971 u8 repeated_block_disabled[0x1];
972 u8 umr_modify_entity_size_disabled[0x1];
973 u8 umr_modify_atomic_disabled[0x1];
974 u8 umr_indirect_mkey_disabled[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300975 u8 umr_fence[0x2];
976 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300977 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 cmdif_checksum[0x2];
979 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300980 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300981 u8 wq_signature[0x1];
982 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300984 u8 sho[0x1];
985 u8 tph[0x1];
986 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300987 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300988 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300989 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 roce[0x1];
991 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300992 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300993
994 u8 cq_oi[0x1];
995 u8 cq_resize[0x1];
996 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300998 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300999 u8 pg[0x1];
1000 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001002 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001003 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001004 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001006 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02001007 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001008 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +02001009 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +03001011 u8 qkv[0x1];
1012 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +02001013 u8 set_deth_sqpn[0x1];
1014 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001015 u8 xrc[0x1];
1016 u8 ud[0x1];
1017 u8 uc[0x1];
1018 u8 rc[0x1];
1019
Eli Cohena6d51b62017-01-03 23:55:23 +02001020 u8 uar_4k[0x1];
1021 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +03001022 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001024 u8 log_pg_sz[0x8];
1025
1026 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02001027 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001028 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001029 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001030 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +03001031
1032 u8 reserved_at_270[0xb];
1033 u8 lag_master[0x1];
1034 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +03001035
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001037 u8 max_wqe_sz_sq[0x10];
1038
Tariq Toukane1c9c622016-04-11 23:10:21 +03001039 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001040 u8 max_wqe_sz_rq[0x10];
1041
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001042 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001043 u8 max_wqe_sz_sq_dc[0x10];
1044
Tariq Toukane1c9c622016-04-11 23:10:21 +03001045 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +03001046 u8 max_qp_mcg[0x19];
1047
Tariq Toukane1c9c622016-04-11 23:10:21 +03001048 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001049 u8 log_max_mcg[0x8];
1050
Tariq Toukane1c9c622016-04-11 23:10:21 +03001051 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001052 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001053 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001054 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001055 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001056 u8 log_max_xrcd[0x5];
1057
Moshe Shemesh5c298142017-12-26 16:46:29 +02001058 u8 nic_receive_steering_discard[0x1];
Moshe Shemeshaaabd072018-01-14 00:56:25 +02001059 u8 receive_discard_vport_down[0x1];
1060 u8 transmit_discard_vport_down[0x1];
1061 u8 reserved_at_343[0x5];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001062 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001063 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001064
Eli Cohenb7755162014-10-02 12:19:44 +03001065
Tariq Toukane1c9c622016-04-11 23:10:21 +03001066 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001067 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001068 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001069 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001070 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001071 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001072 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001073 u8 log_max_tis[0x5];
1074
Saeed Mahameede2816822015-05-28 22:28:40 +03001075 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001076 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001077 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001078 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001079 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001080 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001081 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001082 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001083 u8 log_max_tis_per_sq[0x5];
1084
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001085 u8 ext_stride_num_range[0x1];
1086 u8 reserved_at_3a1[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001087 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001088 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001089 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001090 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001091 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001092 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001093 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001094
Or Gerlitz40817cd2017-06-25 12:38:45 +03001095 u8 hairpin[0x1];
1096 u8 reserved_at_3c1[0x2];
1097 u8 log_max_hairpin_queues[0x5];
1098 u8 reserved_at_3c8[0x3];
1099 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001100 u8 reserved_at_3d0[0x3];
1101 u8 log_max_hairpin_num_packets[0x5];
1102 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001103 u8 log_max_wq_sz[0x5];
1104
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001105 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001106 u8 disable_local_lb_uc[0x1];
1107 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001108 u8 log_min_hairpin_wq_data_sz[0x5];
1109 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001110 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001111 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001112 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001113 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001114 u8 log_max_current_uc_list[0x5];
1115
Tariq Toukane1c9c622016-04-11 23:10:21 +03001116 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001117
Tariq Toukane1c9c622016-04-11 23:10:21 +03001118 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001119 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001120 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001121 u8 log_uar_page_sz[0x10];
1122
Tariq Toukane1c9c622016-04-11 23:10:21 +03001123 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001124 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001125 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001126
Eli Cohena6d51b62017-01-03 23:55:23 +02001127 u8 reserved_at_500[0x20];
1128 u8 num_of_uars_per_page[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001129
Ariel Levkoviche818e252018-05-13 14:33:35 +03001130 u8 flex_parser_protocols[0x20];
1131 u8 reserved_at_560[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001132
Yonatan Cohenab741b22018-05-27 13:42:32 +03001133 u8 reserved_at_580[0x3c];
1134 u8 mini_cqe_resp_stride_index[0x1];
Guy Levi0ff8e792017-10-19 08:25:51 +03001135 u8 cqe_128_always[0x1];
1136 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001137 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001138
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001139 u8 cqe_compression_timeout[0x10];
1140 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001141
Saeed Mahameed74862162016-06-09 15:11:34 +03001142 u8 reserved_at_5e0[0x10];
1143 u8 tag_matching[0x1];
1144 u8 rndv_offload_rc[0x1];
1145 u8 rndv_offload_dc[0x1];
1146 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001147 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001148 u8 log_max_xrq[0x5];
1149
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001150 u8 affiliate_nic_vport_criteria[0x8];
1151 u8 native_port_num[0x8];
1152 u8 num_vhca_ports[0x8];
1153 u8 reserved_at_618[0x6];
1154 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001155 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001156};
1157
Saeed Mahameed81848732015-12-01 18:03:20 +02001158enum mlx5_flow_destination_type {
1159 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1160 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1161 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001162
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001163 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001164 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001165};
1166
1167struct mlx5_ifc_dest_format_struct_bits {
1168 u8 destination_type[0x8];
1169 u8 destination_id[0x18];
Shahar Kleinb17f7fc2018-03-22 12:32:12 +02001170 u8 destination_eswitch_owner_vhca_id_valid[0x1];
1171 u8 reserved_at_21[0xf];
1172 u8 destination_eswitch_owner_vhca_id[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001173};
1174
Amir Vadai9dc0b282016-05-13 12:55:39 +00001175struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001176 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001177
1178 u8 reserved_at_20[0x20];
1179};
1180
1181union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1182 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1183 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1184 u8 reserved_at_0[0x40];
1185};
1186
Saeed Mahameede2816822015-05-28 22:28:40 +03001187struct mlx5_ifc_fte_match_param_bits {
1188 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1189
1190 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1191
1192 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1193
Ariel Levkovich71c6e862018-05-13 14:33:34 +03001194 struct mlx5_ifc_fte_match_set_misc2_bits misc_parameters_2;
1195
1196 u8 reserved_at_800[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03001197};
1198
1199enum {
1200 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1201 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1202 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1203 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1204 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1205};
1206
1207struct mlx5_ifc_rx_hash_field_select_bits {
1208 u8 l3_prot_type[0x1];
1209 u8 l4_prot_type[0x1];
1210 u8 selected_fields[0x1e];
1211};
1212
1213enum {
1214 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1215 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1216};
1217
1218enum {
1219 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1220 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1221};
1222
1223struct mlx5_ifc_wq_bits {
1224 u8 wq_type[0x4];
1225 u8 wq_signature[0x1];
1226 u8 end_padding_mode[0x2];
1227 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001228 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001229
1230 u8 hds_skip_first_sge[0x1];
1231 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001232 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001233 u8 page_offset[0x5];
1234 u8 lwm[0x10];
1235
Matan Barakb4ff3a32016-02-09 14:57:42 +02001236 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001237 u8 pd[0x18];
1238
Matan Barakb4ff3a32016-02-09 14:57:42 +02001239 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001240 u8 uar_page[0x18];
1241
1242 u8 dbr_addr[0x40];
1243
1244 u8 hw_counter[0x20];
1245
1246 u8 sw_counter[0x20];
1247
Matan Barakb4ff3a32016-02-09 14:57:42 +02001248 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001249 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001250 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001251 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001252 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001253 u8 log_wq_sz[0x5];
1254
Or Gerlitz4d533e02018-01-04 12:26:21 +02001255 u8 reserved_at_120[0x3];
1256 u8 log_hairpin_num_packets[0x5];
1257 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001258 u8 log_hairpin_data_sz[0x5];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001259
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001260 u8 reserved_at_130[0x4];
1261 u8 log_wqe_num_of_strides[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001262 u8 two_byte_shift_en[0x1];
1263 u8 reserved_at_139[0x4];
1264 u8 log_wqe_stride_size[0x3];
1265
1266 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001267
1268 struct mlx5_ifc_cmd_pas_bits pas[0];
1269};
1270
1271struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001272 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001273 u8 rq_num[0x18];
1274};
1275
1276struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001277 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001278 u8 mac_addr_47_32[0x10];
1279
1280 u8 mac_addr_31_0[0x20];
1281};
1282
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001283struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001284 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001285 u8 vlan[0x0c];
1286
Matan Barakb4ff3a32016-02-09 14:57:42 +02001287 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001288};
1289
Saeed Mahameede2816822015-05-28 22:28:40 +03001290struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001291 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001292
1293 u8 min_time_between_cnps[0x20];
1294
Matan Barakb4ff3a32016-02-09 14:57:42 +02001295 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001296 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001297 u8 reserved_at_d8[0x4];
1298 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001299 u8 cnp_802p_prio[0x3];
1300
Matan Barakb4ff3a32016-02-09 14:57:42 +02001301 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001302};
1303
1304struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001305 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001306
Matan Barakb4ff3a32016-02-09 14:57:42 +02001307 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001308 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001309 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001310 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001311 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001312
Matan Barakb4ff3a32016-02-09 14:57:42 +02001313 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001314
1315 u8 rpg_time_reset[0x20];
1316
1317 u8 rpg_byte_reset[0x20];
1318
1319 u8 rpg_threshold[0x20];
1320
1321 u8 rpg_max_rate[0x20];
1322
1323 u8 rpg_ai_rate[0x20];
1324
1325 u8 rpg_hai_rate[0x20];
1326
1327 u8 rpg_gd[0x20];
1328
1329 u8 rpg_min_dec_fac[0x20];
1330
1331 u8 rpg_min_rate[0x20];
1332
Matan Barakb4ff3a32016-02-09 14:57:42 +02001333 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001334
1335 u8 rate_to_set_on_first_cnp[0x20];
1336
1337 u8 dce_tcp_g[0x20];
1338
1339 u8 dce_tcp_rtt[0x20];
1340
1341 u8 rate_reduce_monitor_period[0x20];
1342
Matan Barakb4ff3a32016-02-09 14:57:42 +02001343 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001344
1345 u8 initial_alpha_value[0x20];
1346
Matan Barakb4ff3a32016-02-09 14:57:42 +02001347 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001348};
1349
1350struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001351 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001352
1353 u8 rppp_max_rps[0x20];
1354
1355 u8 rpg_time_reset[0x20];
1356
1357 u8 rpg_byte_reset[0x20];
1358
1359 u8 rpg_threshold[0x20];
1360
1361 u8 rpg_max_rate[0x20];
1362
1363 u8 rpg_ai_rate[0x20];
1364
1365 u8 rpg_hai_rate[0x20];
1366
1367 u8 rpg_gd[0x20];
1368
1369 u8 rpg_min_dec_fac[0x20];
1370
1371 u8 rpg_min_rate[0x20];
1372
Matan Barakb4ff3a32016-02-09 14:57:42 +02001373 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001374};
1375
1376enum {
1377 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1378 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1379 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1380};
1381
1382struct mlx5_ifc_resize_field_select_bits {
1383 u8 resize_field_select[0x20];
1384};
1385
1386enum {
1387 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1388 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1389 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1390 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1391};
1392
1393struct mlx5_ifc_modify_field_select_bits {
1394 u8 modify_field_select[0x20];
1395};
1396
1397struct mlx5_ifc_field_select_r_roce_np_bits {
1398 u8 field_select_r_roce_np[0x20];
1399};
1400
1401struct mlx5_ifc_field_select_r_roce_rp_bits {
1402 u8 field_select_r_roce_rp[0x20];
1403};
1404
1405enum {
1406 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1407 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1408 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1409 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1410 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1411 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1412 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1413 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1414 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1415 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1416};
1417
1418struct mlx5_ifc_field_select_802_1qau_rp_bits {
1419 u8 field_select_8021qaurp[0x20];
1420};
1421
1422struct mlx5_ifc_phys_layer_cntrs_bits {
1423 u8 time_since_last_clear_high[0x20];
1424
1425 u8 time_since_last_clear_low[0x20];
1426
1427 u8 symbol_errors_high[0x20];
1428
1429 u8 symbol_errors_low[0x20];
1430
1431 u8 sync_headers_errors_high[0x20];
1432
1433 u8 sync_headers_errors_low[0x20];
1434
1435 u8 edpl_bip_errors_lane0_high[0x20];
1436
1437 u8 edpl_bip_errors_lane0_low[0x20];
1438
1439 u8 edpl_bip_errors_lane1_high[0x20];
1440
1441 u8 edpl_bip_errors_lane1_low[0x20];
1442
1443 u8 edpl_bip_errors_lane2_high[0x20];
1444
1445 u8 edpl_bip_errors_lane2_low[0x20];
1446
1447 u8 edpl_bip_errors_lane3_high[0x20];
1448
1449 u8 edpl_bip_errors_lane3_low[0x20];
1450
1451 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1452
1453 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1454
1455 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1456
1457 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1458
1459 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1460
1461 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1462
1463 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1464
1465 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1466
1467 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1468
1469 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1470
1471 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1472
1473 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1474
1475 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1476
1477 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1478
1479 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1480
1481 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1482
1483 u8 rs_fec_corrected_blocks_high[0x20];
1484
1485 u8 rs_fec_corrected_blocks_low[0x20];
1486
1487 u8 rs_fec_uncorrectable_blocks_high[0x20];
1488
1489 u8 rs_fec_uncorrectable_blocks_low[0x20];
1490
1491 u8 rs_fec_no_errors_blocks_high[0x20];
1492
1493 u8 rs_fec_no_errors_blocks_low[0x20];
1494
1495 u8 rs_fec_single_error_blocks_high[0x20];
1496
1497 u8 rs_fec_single_error_blocks_low[0x20];
1498
1499 u8 rs_fec_corrected_symbols_total_high[0x20];
1500
1501 u8 rs_fec_corrected_symbols_total_low[0x20];
1502
1503 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1504
1505 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1506
1507 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1508
1509 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1510
1511 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1512
1513 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1514
1515 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1516
1517 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1518
1519 u8 link_down_events[0x20];
1520
1521 u8 successful_recovery_events[0x20];
1522
Matan Barakb4ff3a32016-02-09 14:57:42 +02001523 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001524};
1525
Gal Pressmand8dc0502016-09-27 17:04:51 +03001526struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1527 u8 time_since_last_clear_high[0x20];
1528
1529 u8 time_since_last_clear_low[0x20];
1530
1531 u8 phy_received_bits_high[0x20];
1532
1533 u8 phy_received_bits_low[0x20];
1534
1535 u8 phy_symbol_errors_high[0x20];
1536
1537 u8 phy_symbol_errors_low[0x20];
1538
1539 u8 phy_corrected_bits_high[0x20];
1540
1541 u8 phy_corrected_bits_low[0x20];
1542
1543 u8 phy_corrected_bits_lane0_high[0x20];
1544
1545 u8 phy_corrected_bits_lane0_low[0x20];
1546
1547 u8 phy_corrected_bits_lane1_high[0x20];
1548
1549 u8 phy_corrected_bits_lane1_low[0x20];
1550
1551 u8 phy_corrected_bits_lane2_high[0x20];
1552
1553 u8 phy_corrected_bits_lane2_low[0x20];
1554
1555 u8 phy_corrected_bits_lane3_high[0x20];
1556
1557 u8 phy_corrected_bits_lane3_low[0x20];
1558
1559 u8 reserved_at_200[0x5c0];
1560};
1561
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001562struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1563 u8 symbol_error_counter[0x10];
1564
1565 u8 link_error_recovery_counter[0x8];
1566
1567 u8 link_downed_counter[0x8];
1568
1569 u8 port_rcv_errors[0x10];
1570
1571 u8 port_rcv_remote_physical_errors[0x10];
1572
1573 u8 port_rcv_switch_relay_errors[0x10];
1574
1575 u8 port_xmit_discards[0x10];
1576
1577 u8 port_xmit_constraint_errors[0x8];
1578
1579 u8 port_rcv_constraint_errors[0x8];
1580
1581 u8 reserved_at_70[0x8];
1582
1583 u8 link_overrun_errors[0x8];
1584
1585 u8 reserved_at_80[0x10];
1586
1587 u8 vl_15_dropped[0x10];
1588
Tim Wright133bea02017-05-01 17:30:08 +01001589 u8 reserved_at_a0[0x80];
1590
1591 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001592};
1593
Saeed Mahameede2816822015-05-28 22:28:40 +03001594struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1595 u8 transmit_queue_high[0x20];
1596
1597 u8 transmit_queue_low[0x20];
1598
Matan Barakb4ff3a32016-02-09 14:57:42 +02001599 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001600};
1601
1602struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1603 u8 rx_octets_high[0x20];
1604
1605 u8 rx_octets_low[0x20];
1606
Matan Barakb4ff3a32016-02-09 14:57:42 +02001607 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001608
1609 u8 rx_frames_high[0x20];
1610
1611 u8 rx_frames_low[0x20];
1612
1613 u8 tx_octets_high[0x20];
1614
1615 u8 tx_octets_low[0x20];
1616
Matan Barakb4ff3a32016-02-09 14:57:42 +02001617 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001618
1619 u8 tx_frames_high[0x20];
1620
1621 u8 tx_frames_low[0x20];
1622
1623 u8 rx_pause_high[0x20];
1624
1625 u8 rx_pause_low[0x20];
1626
1627 u8 rx_pause_duration_high[0x20];
1628
1629 u8 rx_pause_duration_low[0x20];
1630
1631 u8 tx_pause_high[0x20];
1632
1633 u8 tx_pause_low[0x20];
1634
1635 u8 tx_pause_duration_high[0x20];
1636
1637 u8 tx_pause_duration_low[0x20];
1638
1639 u8 rx_pause_transition_high[0x20];
1640
1641 u8 rx_pause_transition_low[0x20];
1642
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03001643 u8 reserved_at_3c0[0x40];
1644
1645 u8 device_stall_minor_watermark_cnt_high[0x20];
1646
1647 u8 device_stall_minor_watermark_cnt_low[0x20];
1648
1649 u8 device_stall_critical_watermark_cnt_high[0x20];
1650
1651 u8 device_stall_critical_watermark_cnt_low[0x20];
1652
1653 u8 reserved_at_480[0x340];
Saeed Mahameede2816822015-05-28 22:28:40 +03001654};
1655
1656struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1657 u8 port_transmit_wait_high[0x20];
1658
1659 u8 port_transmit_wait_low[0x20];
1660
Gal Pressman2dba0792017-06-18 14:56:45 +03001661 u8 reserved_at_40[0x100];
1662
1663 u8 rx_buffer_almost_full_high[0x20];
1664
1665 u8 rx_buffer_almost_full_low[0x20];
1666
1667 u8 rx_buffer_full_high[0x20];
1668
1669 u8 rx_buffer_full_low[0x20];
1670
1671 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001672};
1673
1674struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1675 u8 dot3stats_alignment_errors_high[0x20];
1676
1677 u8 dot3stats_alignment_errors_low[0x20];
1678
1679 u8 dot3stats_fcs_errors_high[0x20];
1680
1681 u8 dot3stats_fcs_errors_low[0x20];
1682
1683 u8 dot3stats_single_collision_frames_high[0x20];
1684
1685 u8 dot3stats_single_collision_frames_low[0x20];
1686
1687 u8 dot3stats_multiple_collision_frames_high[0x20];
1688
1689 u8 dot3stats_multiple_collision_frames_low[0x20];
1690
1691 u8 dot3stats_sqe_test_errors_high[0x20];
1692
1693 u8 dot3stats_sqe_test_errors_low[0x20];
1694
1695 u8 dot3stats_deferred_transmissions_high[0x20];
1696
1697 u8 dot3stats_deferred_transmissions_low[0x20];
1698
1699 u8 dot3stats_late_collisions_high[0x20];
1700
1701 u8 dot3stats_late_collisions_low[0x20];
1702
1703 u8 dot3stats_excessive_collisions_high[0x20];
1704
1705 u8 dot3stats_excessive_collisions_low[0x20];
1706
1707 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1708
1709 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1710
1711 u8 dot3stats_carrier_sense_errors_high[0x20];
1712
1713 u8 dot3stats_carrier_sense_errors_low[0x20];
1714
1715 u8 dot3stats_frame_too_longs_high[0x20];
1716
1717 u8 dot3stats_frame_too_longs_low[0x20];
1718
1719 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1720
1721 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1722
1723 u8 dot3stats_symbol_errors_high[0x20];
1724
1725 u8 dot3stats_symbol_errors_low[0x20];
1726
1727 u8 dot3control_in_unknown_opcodes_high[0x20];
1728
1729 u8 dot3control_in_unknown_opcodes_low[0x20];
1730
1731 u8 dot3in_pause_frames_high[0x20];
1732
1733 u8 dot3in_pause_frames_low[0x20];
1734
1735 u8 dot3out_pause_frames_high[0x20];
1736
1737 u8 dot3out_pause_frames_low[0x20];
1738
Matan Barakb4ff3a32016-02-09 14:57:42 +02001739 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001740};
1741
1742struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1743 u8 ether_stats_drop_events_high[0x20];
1744
1745 u8 ether_stats_drop_events_low[0x20];
1746
1747 u8 ether_stats_octets_high[0x20];
1748
1749 u8 ether_stats_octets_low[0x20];
1750
1751 u8 ether_stats_pkts_high[0x20];
1752
1753 u8 ether_stats_pkts_low[0x20];
1754
1755 u8 ether_stats_broadcast_pkts_high[0x20];
1756
1757 u8 ether_stats_broadcast_pkts_low[0x20];
1758
1759 u8 ether_stats_multicast_pkts_high[0x20];
1760
1761 u8 ether_stats_multicast_pkts_low[0x20];
1762
1763 u8 ether_stats_crc_align_errors_high[0x20];
1764
1765 u8 ether_stats_crc_align_errors_low[0x20];
1766
1767 u8 ether_stats_undersize_pkts_high[0x20];
1768
1769 u8 ether_stats_undersize_pkts_low[0x20];
1770
1771 u8 ether_stats_oversize_pkts_high[0x20];
1772
1773 u8 ether_stats_oversize_pkts_low[0x20];
1774
1775 u8 ether_stats_fragments_high[0x20];
1776
1777 u8 ether_stats_fragments_low[0x20];
1778
1779 u8 ether_stats_jabbers_high[0x20];
1780
1781 u8 ether_stats_jabbers_low[0x20];
1782
1783 u8 ether_stats_collisions_high[0x20];
1784
1785 u8 ether_stats_collisions_low[0x20];
1786
1787 u8 ether_stats_pkts64octets_high[0x20];
1788
1789 u8 ether_stats_pkts64octets_low[0x20];
1790
1791 u8 ether_stats_pkts65to127octets_high[0x20];
1792
1793 u8 ether_stats_pkts65to127octets_low[0x20];
1794
1795 u8 ether_stats_pkts128to255octets_high[0x20];
1796
1797 u8 ether_stats_pkts128to255octets_low[0x20];
1798
1799 u8 ether_stats_pkts256to511octets_high[0x20];
1800
1801 u8 ether_stats_pkts256to511octets_low[0x20];
1802
1803 u8 ether_stats_pkts512to1023octets_high[0x20];
1804
1805 u8 ether_stats_pkts512to1023octets_low[0x20];
1806
1807 u8 ether_stats_pkts1024to1518octets_high[0x20];
1808
1809 u8 ether_stats_pkts1024to1518octets_low[0x20];
1810
1811 u8 ether_stats_pkts1519to2047octets_high[0x20];
1812
1813 u8 ether_stats_pkts1519to2047octets_low[0x20];
1814
1815 u8 ether_stats_pkts2048to4095octets_high[0x20];
1816
1817 u8 ether_stats_pkts2048to4095octets_low[0x20];
1818
1819 u8 ether_stats_pkts4096to8191octets_high[0x20];
1820
1821 u8 ether_stats_pkts4096to8191octets_low[0x20];
1822
1823 u8 ether_stats_pkts8192to10239octets_high[0x20];
1824
1825 u8 ether_stats_pkts8192to10239octets_low[0x20];
1826
Matan Barakb4ff3a32016-02-09 14:57:42 +02001827 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001828};
1829
1830struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1831 u8 if_in_octets_high[0x20];
1832
1833 u8 if_in_octets_low[0x20];
1834
1835 u8 if_in_ucast_pkts_high[0x20];
1836
1837 u8 if_in_ucast_pkts_low[0x20];
1838
1839 u8 if_in_discards_high[0x20];
1840
1841 u8 if_in_discards_low[0x20];
1842
1843 u8 if_in_errors_high[0x20];
1844
1845 u8 if_in_errors_low[0x20];
1846
1847 u8 if_in_unknown_protos_high[0x20];
1848
1849 u8 if_in_unknown_protos_low[0x20];
1850
1851 u8 if_out_octets_high[0x20];
1852
1853 u8 if_out_octets_low[0x20];
1854
1855 u8 if_out_ucast_pkts_high[0x20];
1856
1857 u8 if_out_ucast_pkts_low[0x20];
1858
1859 u8 if_out_discards_high[0x20];
1860
1861 u8 if_out_discards_low[0x20];
1862
1863 u8 if_out_errors_high[0x20];
1864
1865 u8 if_out_errors_low[0x20];
1866
1867 u8 if_in_multicast_pkts_high[0x20];
1868
1869 u8 if_in_multicast_pkts_low[0x20];
1870
1871 u8 if_in_broadcast_pkts_high[0x20];
1872
1873 u8 if_in_broadcast_pkts_low[0x20];
1874
1875 u8 if_out_multicast_pkts_high[0x20];
1876
1877 u8 if_out_multicast_pkts_low[0x20];
1878
1879 u8 if_out_broadcast_pkts_high[0x20];
1880
1881 u8 if_out_broadcast_pkts_low[0x20];
1882
Matan Barakb4ff3a32016-02-09 14:57:42 +02001883 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001884};
1885
1886struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1887 u8 a_frames_transmitted_ok_high[0x20];
1888
1889 u8 a_frames_transmitted_ok_low[0x20];
1890
1891 u8 a_frames_received_ok_high[0x20];
1892
1893 u8 a_frames_received_ok_low[0x20];
1894
1895 u8 a_frame_check_sequence_errors_high[0x20];
1896
1897 u8 a_frame_check_sequence_errors_low[0x20];
1898
1899 u8 a_alignment_errors_high[0x20];
1900
1901 u8 a_alignment_errors_low[0x20];
1902
1903 u8 a_octets_transmitted_ok_high[0x20];
1904
1905 u8 a_octets_transmitted_ok_low[0x20];
1906
1907 u8 a_octets_received_ok_high[0x20];
1908
1909 u8 a_octets_received_ok_low[0x20];
1910
1911 u8 a_multicast_frames_xmitted_ok_high[0x20];
1912
1913 u8 a_multicast_frames_xmitted_ok_low[0x20];
1914
1915 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1916
1917 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1918
1919 u8 a_multicast_frames_received_ok_high[0x20];
1920
1921 u8 a_multicast_frames_received_ok_low[0x20];
1922
1923 u8 a_broadcast_frames_received_ok_high[0x20];
1924
1925 u8 a_broadcast_frames_received_ok_low[0x20];
1926
1927 u8 a_in_range_length_errors_high[0x20];
1928
1929 u8 a_in_range_length_errors_low[0x20];
1930
1931 u8 a_out_of_range_length_field_high[0x20];
1932
1933 u8 a_out_of_range_length_field_low[0x20];
1934
1935 u8 a_frame_too_long_errors_high[0x20];
1936
1937 u8 a_frame_too_long_errors_low[0x20];
1938
1939 u8 a_symbol_error_during_carrier_high[0x20];
1940
1941 u8 a_symbol_error_during_carrier_low[0x20];
1942
1943 u8 a_mac_control_frames_transmitted_high[0x20];
1944
1945 u8 a_mac_control_frames_transmitted_low[0x20];
1946
1947 u8 a_mac_control_frames_received_high[0x20];
1948
1949 u8 a_mac_control_frames_received_low[0x20];
1950
1951 u8 a_unsupported_opcodes_received_high[0x20];
1952
1953 u8 a_unsupported_opcodes_received_low[0x20];
1954
1955 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1956
1957 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1958
1959 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1960
1961 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1962
Matan Barakb4ff3a32016-02-09 14:57:42 +02001963 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001964};
1965
Gal Pressman8ed1a632016-11-17 13:46:01 +02001966struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1967 u8 life_time_counter_high[0x20];
1968
1969 u8 life_time_counter_low[0x20];
1970
1971 u8 rx_errors[0x20];
1972
1973 u8 tx_errors[0x20];
1974
1975 u8 l0_to_recovery_eieos[0x20];
1976
1977 u8 l0_to_recovery_ts[0x20];
1978
1979 u8 l0_to_recovery_framing[0x20];
1980
1981 u8 l0_to_recovery_retrain[0x20];
1982
1983 u8 crc_error_dllp[0x20];
1984
1985 u8 crc_error_tlp[0x20];
1986
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001987 u8 tx_overflow_buffer_pkt_high[0x20];
1988
1989 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001990
1991 u8 outbound_stalled_reads[0x20];
1992
1993 u8 outbound_stalled_writes[0x20];
1994
1995 u8 outbound_stalled_reads_events[0x20];
1996
1997 u8 outbound_stalled_writes_events[0x20];
1998
1999 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02002000};
2001
Saeed Mahameede2816822015-05-28 22:28:40 +03002002struct mlx5_ifc_cmd_inter_comp_event_bits {
2003 u8 command_completion_vector[0x20];
2004
Matan Barakb4ff3a32016-02-09 14:57:42 +02002005 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002006};
2007
2008struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002009 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002010 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002011 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002012 u8 vl[0x4];
2013
Matan Barakb4ff3a32016-02-09 14:57:42 +02002014 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002015};
2016
2017struct mlx5_ifc_db_bf_congestion_event_bits {
2018 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002019 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002020 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002021 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002022
Matan Barakb4ff3a32016-02-09 14:57:42 +02002023 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002024};
2025
2026struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002027 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002028
2029 u8 gpio_event_hi[0x20];
2030
2031 u8 gpio_event_lo[0x20];
2032
Matan Barakb4ff3a32016-02-09 14:57:42 +02002033 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002034};
2035
2036struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002037 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002038
2039 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002040 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002041
Matan Barakb4ff3a32016-02-09 14:57:42 +02002042 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002043};
2044
2045struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002046 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002047};
2048
2049enum {
2050 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
2051 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
2052};
2053
2054struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002055 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002056 u8 cqn[0x18];
2057
Matan Barakb4ff3a32016-02-09 14:57:42 +02002058 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002059
Matan Barakb4ff3a32016-02-09 14:57:42 +02002060 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002061 u8 syndrome[0x8];
2062
Matan Barakb4ff3a32016-02-09 14:57:42 +02002063 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002064};
2065
2066struct mlx5_ifc_rdma_page_fault_event_bits {
2067 u8 bytes_committed[0x20];
2068
2069 u8 r_key[0x20];
2070
Matan Barakb4ff3a32016-02-09 14:57:42 +02002071 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002072 u8 packet_len[0x10];
2073
2074 u8 rdma_op_len[0x20];
2075
2076 u8 rdma_va[0x40];
2077
Matan Barakb4ff3a32016-02-09 14:57:42 +02002078 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002079 u8 rdma[0x1];
2080 u8 write[0x1];
2081 u8 requestor[0x1];
2082 u8 qp_number[0x18];
2083};
2084
2085struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2086 u8 bytes_committed[0x20];
2087
Matan Barakb4ff3a32016-02-09 14:57:42 +02002088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002089 u8 wqe_index[0x10];
2090
Matan Barakb4ff3a32016-02-09 14:57:42 +02002091 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002092 u8 len[0x10];
2093
Matan Barakb4ff3a32016-02-09 14:57:42 +02002094 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002095
Matan Barakb4ff3a32016-02-09 14:57:42 +02002096 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002097 u8 rdma[0x1];
2098 u8 write_read[0x1];
2099 u8 requestor[0x1];
2100 u8 qpn[0x18];
2101};
2102
2103struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002104 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002105
2106 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002107 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002108
Matan Barakb4ff3a32016-02-09 14:57:42 +02002109 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002110 u8 qpn_rqn_sqn[0x18];
2111};
2112
2113struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002114 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002115
Matan Barakb4ff3a32016-02-09 14:57:42 +02002116 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002117 u8 dct_number[0x18];
2118};
2119
2120struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002121 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122
Matan Barakb4ff3a32016-02-09 14:57:42 +02002123 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002124 u8 cq_number[0x18];
2125};
2126
2127enum {
2128 MLX5_QPC_STATE_RST = 0x0,
2129 MLX5_QPC_STATE_INIT = 0x1,
2130 MLX5_QPC_STATE_RTR = 0x2,
2131 MLX5_QPC_STATE_RTS = 0x3,
2132 MLX5_QPC_STATE_SQER = 0x4,
2133 MLX5_QPC_STATE_ERR = 0x6,
2134 MLX5_QPC_STATE_SQD = 0x7,
2135 MLX5_QPC_STATE_SUSPENDED = 0x9,
2136};
2137
2138enum {
2139 MLX5_QPC_ST_RC = 0x0,
2140 MLX5_QPC_ST_UC = 0x1,
2141 MLX5_QPC_ST_UD = 0x2,
2142 MLX5_QPC_ST_XRC = 0x3,
2143 MLX5_QPC_ST_DCI = 0x5,
2144 MLX5_QPC_ST_QP0 = 0x7,
2145 MLX5_QPC_ST_QP1 = 0x8,
2146 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2147 MLX5_QPC_ST_REG_UMR = 0xc,
2148};
2149
2150enum {
2151 MLX5_QPC_PM_STATE_ARMED = 0x0,
2152 MLX5_QPC_PM_STATE_REARM = 0x1,
2153 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2154 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2155};
2156
2157enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002158 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2159};
2160
2161enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002162 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2163 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2164};
2165
2166enum {
2167 MLX5_QPC_MTU_256_BYTES = 0x1,
2168 MLX5_QPC_MTU_512_BYTES = 0x2,
2169 MLX5_QPC_MTU_1K_BYTES = 0x3,
2170 MLX5_QPC_MTU_2K_BYTES = 0x4,
2171 MLX5_QPC_MTU_4K_BYTES = 0x5,
2172 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2173};
2174
2175enum {
2176 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2177 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2178 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2179 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2180 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2181 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2182 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2183 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2184};
2185
2186enum {
2187 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2188 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2189 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2190};
2191
2192enum {
2193 MLX5_QPC_CS_RES_DISABLE = 0x0,
2194 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2195 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2196};
2197
2198struct mlx5_ifc_qpc_bits {
2199 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002200 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002202 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002203 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002204 u8 reserved_at_15[0x3];
2205 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002206 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002207 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002208
2209 u8 wq_signature[0x1];
2210 u8 block_lb_mc[0x1];
2211 u8 atomic_like_write_en[0x1];
2212 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002213 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002214 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002215 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002216 u8 pd[0x18];
2217
2218 u8 mtu[0x3];
2219 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221 u8 log_rq_size[0x4];
2222 u8 log_rq_stride[0x3];
2223 u8 no_sq[0x1];
2224 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002225 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002226 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002227 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002228
2229 u8 counter_set_id[0x8];
2230 u8 uar_page[0x18];
2231
Matan Barakb4ff3a32016-02-09 14:57:42 +02002232 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233 u8 user_index[0x18];
2234
Matan Barakb4ff3a32016-02-09 14:57:42 +02002235 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002236 u8 log_page_size[0x5];
2237 u8 remote_qpn[0x18];
2238
2239 struct mlx5_ifc_ads_bits primary_address_path;
2240
2241 struct mlx5_ifc_ads_bits secondary_address_path;
2242
2243 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002244 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002245 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002246 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002247 u8 retry_count[0x3];
2248 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002249 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002250 u8 fre[0x1];
2251 u8 cur_rnr_retry[0x3];
2252 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002253 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254
Matan Barakb4ff3a32016-02-09 14:57:42 +02002255 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002256
Matan Barakb4ff3a32016-02-09 14:57:42 +02002257 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002258 u8 next_send_psn[0x18];
2259
Matan Barakb4ff3a32016-02-09 14:57:42 +02002260 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261 u8 cqn_snd[0x18];
2262
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002263 u8 reserved_at_400[0x8];
2264 u8 deth_sqpn[0x18];
2265
2266 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002267
Matan Barakb4ff3a32016-02-09 14:57:42 +02002268 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002269 u8 last_acked_psn[0x18];
2270
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272 u8 ssn[0x18];
2273
Matan Barakb4ff3a32016-02-09 14:57:42 +02002274 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002275 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002276 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002277 u8 atomic_mode[0x4];
2278 u8 rre[0x1];
2279 u8 rwe[0x1];
2280 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002281 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002282 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002283 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002284 u8 cd_slave_receive[0x1];
2285 u8 cd_slave_send[0x1];
2286 u8 cd_master[0x1];
2287
Matan Barakb4ff3a32016-02-09 14:57:42 +02002288 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002289 u8 min_rnr_nak[0x5];
2290 u8 next_rcv_psn[0x18];
2291
Matan Barakb4ff3a32016-02-09 14:57:42 +02002292 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002293 u8 xrcd[0x18];
2294
Matan Barakb4ff3a32016-02-09 14:57:42 +02002295 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002296 u8 cqn_rcv[0x18];
2297
2298 u8 dbr_addr[0x40];
2299
2300 u8 q_key[0x20];
2301
Matan Barakb4ff3a32016-02-09 14:57:42 +02002302 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002303 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002304 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002305
Matan Barakb4ff3a32016-02-09 14:57:42 +02002306 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002307 u8 rmsn[0x18];
2308
2309 u8 hw_sq_wqebb_counter[0x10];
2310 u8 sw_sq_wqebb_counter[0x10];
2311
2312 u8 hw_rq_counter[0x20];
2313
2314 u8 sw_rq_counter[0x20];
2315
Matan Barakb4ff3a32016-02-09 14:57:42 +02002316 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002317
Matan Barakb4ff3a32016-02-09 14:57:42 +02002318 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002319 u8 cgs[0x1];
2320 u8 cs_req[0x8];
2321 u8 cs_res[0x8];
2322
2323 u8 dc_access_key[0x40];
2324
Matan Barakb4ff3a32016-02-09 14:57:42 +02002325 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002326};
2327
2328struct mlx5_ifc_roce_addr_layout_bits {
2329 u8 source_l3_address[16][0x8];
2330
Matan Barakb4ff3a32016-02-09 14:57:42 +02002331 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002332 u8 vlan_valid[0x1];
2333 u8 vlan_id[0xc];
2334 u8 source_mac_47_32[0x10];
2335
2336 u8 source_mac_31_0[0x20];
2337
Matan Barakb4ff3a32016-02-09 14:57:42 +02002338 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002339 u8 roce_l3_type[0x4];
2340 u8 roce_version[0x8];
2341
Matan Barakb4ff3a32016-02-09 14:57:42 +02002342 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002343};
2344
2345union mlx5_ifc_hca_cap_union_bits {
2346 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2347 struct mlx5_ifc_odp_cap_bits odp_cap;
2348 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2349 struct mlx5_ifc_roce_cap_bits roce_cap;
2350 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2351 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002352 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002353 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002354 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002355 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002356 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002357 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002358};
2359
2360enum {
2361 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2362 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2363 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002364 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002365 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2366 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002367 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Or Gerlitz0c068972018-01-28 20:14:20 +02002368 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
2369 MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
2370};
2371
2372struct mlx5_ifc_vlan_bits {
2373 u8 ethtype[0x10];
2374 u8 prio[0x3];
2375 u8 cfi[0x1];
2376 u8 vid[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002377};
2378
2379struct mlx5_ifc_flow_context_bits {
Or Gerlitz0c068972018-01-28 20:14:20 +02002380 struct mlx5_ifc_vlan_bits push_vlan;
Saeed Mahameede2816822015-05-28 22:28:40 +03002381
2382 u8 group_id[0x20];
2383
Matan Barakb4ff3a32016-02-09 14:57:42 +02002384 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002385 u8 flow_tag[0x18];
2386
Matan Barakb4ff3a32016-02-09 14:57:42 +02002387 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002388 u8 action[0x10];
2389
Matan Barakb4ff3a32016-02-09 14:57:42 +02002390 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002391 u8 destination_list_size[0x18];
2392
Amir Vadai9dc0b282016-05-13 12:55:39 +00002393 u8 reserved_at_a0[0x8];
2394 u8 flow_counter_list_size[0x18];
2395
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002396 u8 encap_id[0x20];
2397
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002398 u8 modify_header_id[0x20];
2399
2400 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002401
2402 struct mlx5_ifc_fte_match_param_bits match_value;
2403
Matan Barakb4ff3a32016-02-09 14:57:42 +02002404 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002405
Amir Vadai9dc0b282016-05-13 12:55:39 +00002406 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002407};
2408
2409enum {
2410 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2411 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2412};
2413
2414struct mlx5_ifc_xrc_srqc_bits {
2415 u8 state[0x4];
2416 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002417 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002418
2419 u8 wq_signature[0x1];
2420 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002421 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002422 u8 rlky[0x1];
2423 u8 basic_cyclic_rcv_wqe[0x1];
2424 u8 log_rq_stride[0x3];
2425 u8 xrcd[0x18];
2426
2427 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002428 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002429 u8 cqn[0x18];
2430
Matan Barakb4ff3a32016-02-09 14:57:42 +02002431 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002432
2433 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002434 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002435 u8 log_page_size[0x6];
2436 u8 user_index[0x18];
2437
Matan Barakb4ff3a32016-02-09 14:57:42 +02002438 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002439
Matan Barakb4ff3a32016-02-09 14:57:42 +02002440 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002441 u8 pd[0x18];
2442
2443 u8 lwm[0x10];
2444 u8 wqe_cnt[0x10];
2445
Matan Barakb4ff3a32016-02-09 14:57:42 +02002446 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447
2448 u8 db_record_addr_h[0x20];
2449
2450 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002451 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002452
Matan Barakb4ff3a32016-02-09 14:57:42 +02002453 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454};
2455
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02002456struct mlx5_ifc_vnic_diagnostic_statistics_bits {
2457 u8 counter_error_queues[0x20];
2458
2459 u8 total_error_queues[0x20];
2460
2461 u8 send_queue_priority_update_flow[0x20];
2462
2463 u8 reserved_at_60[0x20];
2464
2465 u8 nic_receive_steering_discard[0x40];
2466
2467 u8 receive_discard_vport_down[0x40];
2468
2469 u8 transmit_discard_vport_down[0x40];
2470
2471 u8 reserved_at_140[0xec0];
2472};
2473
Saeed Mahameede2816822015-05-28 22:28:40 +03002474struct mlx5_ifc_traffic_counter_bits {
2475 u8 packets[0x40];
2476
2477 u8 octets[0x40];
2478};
2479
2480struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002481 u8 strict_lag_tx_port_affinity[0x1];
2482 u8 reserved_at_1[0x3];
2483 u8 lag_tx_port_affinity[0x04];
2484
2485 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002486 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002487 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002488
Matan Barakb4ff3a32016-02-09 14:57:42 +02002489 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490
Matan Barakb4ff3a32016-02-09 14:57:42 +02002491 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002492 u8 transport_domain[0x18];
2493
Erez Shitrit500a3d02017-04-13 06:36:51 +03002494 u8 reserved_at_140[0x8];
2495 u8 underlay_qpn[0x18];
2496 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497};
2498
2499enum {
2500 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2501 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2502};
2503
2504enum {
2505 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2506 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2507};
2508
2509enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002510 MLX5_RX_HASH_FN_NONE = 0x0,
2511 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2512 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002513};
2514
2515enum {
2516 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2517 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2518};
2519
2520struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002521 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002522
2523 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002524 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002525
Matan Barakb4ff3a32016-02-09 14:57:42 +02002526 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002527
Matan Barakb4ff3a32016-02-09 14:57:42 +02002528 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002529 u8 lro_timeout_period_usecs[0x10];
2530 u8 lro_enable_mask[0x4];
2531 u8 lro_max_ip_payload_size[0x8];
2532
Matan Barakb4ff3a32016-02-09 14:57:42 +02002533 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536 u8 inline_rqn[0x18];
2537
2538 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002539 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002540 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002541 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002542 u8 indirect_table[0x18];
2543
2544 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002545 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002546 u8 self_lb_block[0x2];
2547 u8 transport_domain[0x18];
2548
2549 u8 rx_hash_toeplitz_key[10][0x20];
2550
2551 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2552
2553 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2554
Matan Barakb4ff3a32016-02-09 14:57:42 +02002555 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002556};
2557
2558enum {
2559 MLX5_SRQC_STATE_GOOD = 0x0,
2560 MLX5_SRQC_STATE_ERROR = 0x1,
2561};
2562
2563struct mlx5_ifc_srqc_bits {
2564 u8 state[0x4];
2565 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002566 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002567
2568 u8 wq_signature[0x1];
2569 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002570 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002571 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002572 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002573 u8 log_rq_stride[0x3];
2574 u8 xrcd[0x18];
2575
2576 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002577 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002578 u8 cqn[0x18];
2579
Matan Barakb4ff3a32016-02-09 14:57:42 +02002580 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002581
Matan Barakb4ff3a32016-02-09 14:57:42 +02002582 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002583 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002584 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002585
Matan Barakb4ff3a32016-02-09 14:57:42 +02002586 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002587
Matan Barakb4ff3a32016-02-09 14:57:42 +02002588 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002589 u8 pd[0x18];
2590
2591 u8 lwm[0x10];
2592 u8 wqe_cnt[0x10];
2593
Matan Barakb4ff3a32016-02-09 14:57:42 +02002594 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002595
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002596 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002597
Matan Barakb4ff3a32016-02-09 14:57:42 +02002598 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002599};
2600
2601enum {
2602 MLX5_SQC_STATE_RST = 0x0,
2603 MLX5_SQC_STATE_RDY = 0x1,
2604 MLX5_SQC_STATE_ERR = 0x3,
2605};
2606
2607struct mlx5_ifc_sqc_bits {
2608 u8 rlky[0x1];
2609 u8 cd_master[0x1];
2610 u8 fre[0x1];
2611 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002612 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002613 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002614 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002615 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002616 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002617 u8 hairpin[0x1];
2618 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002619
Matan Barakb4ff3a32016-02-09 14:57:42 +02002620 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002621 u8 user_index[0x18];
2622
Matan Barakb4ff3a32016-02-09 14:57:42 +02002623 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002624 u8 cqn[0x18];
2625
Or Gerlitz40817cd2017-06-25 12:38:45 +03002626 u8 reserved_at_60[0x8];
2627 u8 hairpin_peer_rq[0x18];
2628
2629 u8 reserved_at_80[0x10];
2630 u8 hairpin_peer_vhca[0x10];
2631
2632 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002633
Saeed Mahameed74862162016-06-09 15:11:34 +03002634 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002635 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002636 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002637
Matan Barakb4ff3a32016-02-09 14:57:42 +02002638 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002639
Matan Barakb4ff3a32016-02-09 14:57:42 +02002640 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002641 u8 tis_num_0[0x18];
2642
2643 struct mlx5_ifc_wq_bits wq;
2644};
2645
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002646enum {
2647 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2648 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2649 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2650 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2651};
2652
2653struct mlx5_ifc_scheduling_context_bits {
2654 u8 element_type[0x8];
2655 u8 reserved_at_8[0x18];
2656
2657 u8 element_attributes[0x20];
2658
2659 u8 parent_element_id[0x20];
2660
2661 u8 reserved_at_60[0x40];
2662
2663 u8 bw_share[0x20];
2664
2665 u8 max_average_bw[0x20];
2666
2667 u8 reserved_at_e0[0x120];
2668};
2669
Saeed Mahameede2816822015-05-28 22:28:40 +03002670struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002671 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002672
Matan Barakb4ff3a32016-02-09 14:57:42 +02002673 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002674 u8 rqt_max_size[0x10];
2675
Matan Barakb4ff3a32016-02-09 14:57:42 +02002676 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002677 u8 rqt_actual_size[0x10];
2678
Matan Barakb4ff3a32016-02-09 14:57:42 +02002679 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002680
2681 struct mlx5_ifc_rq_num_bits rq_num[0];
2682};
2683
2684enum {
2685 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2686 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2687};
2688
2689enum {
2690 MLX5_RQC_STATE_RST = 0x0,
2691 MLX5_RQC_STATE_RDY = 0x1,
2692 MLX5_RQC_STATE_ERR = 0x3,
2693};
2694
2695struct mlx5_ifc_rqc_bits {
2696 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002697 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002698 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002699 u8 vsd[0x1];
2700 u8 mem_rq_type[0x4];
2701 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002702 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002703 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002704 u8 hairpin[0x1];
2705 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002706
Matan Barakb4ff3a32016-02-09 14:57:42 +02002707 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002708 u8 user_index[0x18];
2709
Matan Barakb4ff3a32016-02-09 14:57:42 +02002710 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002711 u8 cqn[0x18];
2712
2713 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002714 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002715
Matan Barakb4ff3a32016-02-09 14:57:42 +02002716 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002717 u8 rmpn[0x18];
2718
Or Gerlitz40817cd2017-06-25 12:38:45 +03002719 u8 reserved_at_a0[0x8];
2720 u8 hairpin_peer_sq[0x18];
2721
2722 u8 reserved_at_c0[0x10];
2723 u8 hairpin_peer_vhca[0x10];
2724
2725 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002726
2727 struct mlx5_ifc_wq_bits wq;
2728};
2729
2730enum {
2731 MLX5_RMPC_STATE_RDY = 0x1,
2732 MLX5_RMPC_STATE_ERR = 0x3,
2733};
2734
2735struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002736 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002737 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002738 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002739
2740 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002741 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002742
Matan Barakb4ff3a32016-02-09 14:57:42 +02002743 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002744
2745 struct mlx5_ifc_wq_bits wq;
2746};
2747
Saeed Mahameede2816822015-05-28 22:28:40 +03002748struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002749 u8 reserved_at_0[0x5];
2750 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002751 u8 reserved_at_8[0x15];
2752 u8 disable_mc_local_lb[0x1];
2753 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002754 u8 roce_en[0x1];
2755
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002756 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002757 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002758 u8 event_on_mtu[0x1];
2759 u8 event_on_promisc_change[0x1];
2760 u8 event_on_vlan_change[0x1];
2761 u8 event_on_mc_address_change[0x1];
2762 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002763
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002764 u8 reserved_at_40[0xc];
2765
2766 u8 affiliation_criteria[0x4];
2767 u8 affiliated_vhca_id[0x10];
2768
2769 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002770
2771 u8 mtu[0x10];
2772
Achiad Shochat9efa7522015-12-23 18:47:20 +02002773 u8 system_image_guid[0x40];
2774 u8 port_guid[0x40];
2775 u8 node_guid[0x40];
2776
Matan Barakb4ff3a32016-02-09 14:57:42 +02002777 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002778 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002779 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002780
2781 u8 promisc_uc[0x1];
2782 u8 promisc_mc[0x1];
2783 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002784 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002785 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002786 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002787 u8 allowed_list_size[0xc];
2788
2789 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2790
Matan Barakb4ff3a32016-02-09 14:57:42 +02002791 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002792
2793 u8 current_uc_mac_address[0][0x40];
2794};
2795
2796enum {
2797 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2798 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2799 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002800 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002801 MLX5_MKC_ACCESS_MODE_MEMIC = 0x5,
Saeed Mahameede2816822015-05-28 22:28:40 +03002802};
2803
2804struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002805 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002806 u8 free[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002807 u8 reserved_at_2[0x1];
2808 u8 access_mode_4_2[0x3];
2809 u8 reserved_at_6[0x7];
2810 u8 relaxed_ordering_write[0x1];
2811 u8 reserved_at_e[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002812 u8 small_fence_on_rdma_read_response[0x1];
2813 u8 umr_en[0x1];
2814 u8 a[0x1];
2815 u8 rw[0x1];
2816 u8 rr[0x1];
2817 u8 lw[0x1];
2818 u8 lr[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002819 u8 access_mode_1_0[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002820 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002821
2822 u8 qpn[0x18];
2823 u8 mkey_7_0[0x8];
2824
Matan Barakb4ff3a32016-02-09 14:57:42 +02002825 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002826
2827 u8 length64[0x1];
2828 u8 bsf_en[0x1];
2829 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002830 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002831 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002832 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002833 u8 en_rinval[0x1];
2834 u8 pd[0x18];
2835
2836 u8 start_addr[0x40];
2837
2838 u8 len[0x40];
2839
2840 u8 bsf_octword_size[0x20];
2841
Matan Barakb4ff3a32016-02-09 14:57:42 +02002842 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002843
2844 u8 translations_octword_size[0x20];
2845
Matan Barakb4ff3a32016-02-09 14:57:42 +02002846 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002847 u8 log_page_size[0x5];
2848
Matan Barakb4ff3a32016-02-09 14:57:42 +02002849 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002850};
2851
2852struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002853 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002854 u8 pkey[0x10];
2855};
2856
2857struct mlx5_ifc_array128_auto_bits {
2858 u8 array128_auto[16][0x8];
2859};
2860
2861struct mlx5_ifc_hca_vport_context_bits {
2862 u8 field_select[0x20];
2863
Matan Barakb4ff3a32016-02-09 14:57:42 +02002864 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002865
2866 u8 sm_virt_aware[0x1];
2867 u8 has_smi[0x1];
2868 u8 has_raw[0x1];
2869 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002870 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002871 u8 port_physical_state[0x4];
2872 u8 vport_state_policy[0x4];
2873 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002874 u8 vport_state[0x4];
2875
Matan Barakb4ff3a32016-02-09 14:57:42 +02002876 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002877
2878 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002879
2880 u8 port_guid[0x40];
2881
2882 u8 node_guid[0x40];
2883
2884 u8 cap_mask1[0x20];
2885
2886 u8 cap_mask1_field_select[0x20];
2887
2888 u8 cap_mask2[0x20];
2889
2890 u8 cap_mask2_field_select[0x20];
2891
Matan Barakb4ff3a32016-02-09 14:57:42 +02002892 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002893
2894 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002895 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002896 u8 init_type_reply[0x4];
2897 u8 lmc[0x3];
2898 u8 subnet_timeout[0x5];
2899
2900 u8 sm_lid[0x10];
2901 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002902 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002903
2904 u8 qkey_violation_counter[0x10];
2905 u8 pkey_violation_counter[0x10];
2906
Matan Barakb4ff3a32016-02-09 14:57:42 +02002907 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002908};
2909
Saeed Mahameedd6666752015-12-01 18:03:22 +02002910struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002911 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002912 u8 vport_svlan_strip[0x1];
2913 u8 vport_cvlan_strip[0x1];
2914 u8 vport_svlan_insert[0x1];
2915 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002916 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002917
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002919
2920 u8 svlan_cfi[0x1];
2921 u8 svlan_pcp[0x3];
2922 u8 svlan_id[0xc];
2923 u8 cvlan_cfi[0x1];
2924 u8 cvlan_pcp[0x3];
2925 u8 cvlan_id[0xc];
2926
Matan Barakb4ff3a32016-02-09 14:57:42 +02002927 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002928};
2929
Saeed Mahameede2816822015-05-28 22:28:40 +03002930enum {
2931 MLX5_EQC_STATUS_OK = 0x0,
2932 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2933};
2934
2935enum {
2936 MLX5_EQC_ST_ARMED = 0x9,
2937 MLX5_EQC_ST_FIRED = 0xa,
2938};
2939
2940struct mlx5_ifc_eqc_bits {
2941 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002942 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002943 u8 ec[0x1];
2944 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002945 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002946 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002947 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002948
Matan Barakb4ff3a32016-02-09 14:57:42 +02002949 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002950
Matan Barakb4ff3a32016-02-09 14:57:42 +02002951 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002952 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002953 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002954
Matan Barakb4ff3a32016-02-09 14:57:42 +02002955 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002956 u8 log_eq_size[0x5];
2957 u8 uar_page[0x18];
2958
Matan Barakb4ff3a32016-02-09 14:57:42 +02002959 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002960
Matan Barakb4ff3a32016-02-09 14:57:42 +02002961 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002962 u8 intr[0x8];
2963
Matan Barakb4ff3a32016-02-09 14:57:42 +02002964 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002965 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002966 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002967
Matan Barakb4ff3a32016-02-09 14:57:42 +02002968 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002969
Matan Barakb4ff3a32016-02-09 14:57:42 +02002970 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002971 u8 consumer_counter[0x18];
2972
Matan Barakb4ff3a32016-02-09 14:57:42 +02002973 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002974 u8 producer_counter[0x18];
2975
Matan Barakb4ff3a32016-02-09 14:57:42 +02002976 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002977};
2978
2979enum {
2980 MLX5_DCTC_STATE_ACTIVE = 0x0,
2981 MLX5_DCTC_STATE_DRAINING = 0x1,
2982 MLX5_DCTC_STATE_DRAINED = 0x2,
2983};
2984
2985enum {
2986 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2987 MLX5_DCTC_CS_RES_NA = 0x1,
2988 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2989};
2990
2991enum {
2992 MLX5_DCTC_MTU_256_BYTES = 0x1,
2993 MLX5_DCTC_MTU_512_BYTES = 0x2,
2994 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2995 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2996 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2997};
2998
2999struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003000 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003001 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003002 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003003
Matan Barakb4ff3a32016-02-09 14:57:42 +02003004 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003005 u8 user_index[0x18];
3006
Matan Barakb4ff3a32016-02-09 14:57:42 +02003007 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003008 u8 cqn[0x18];
3009
3010 u8 counter_set_id[0x8];
3011 u8 atomic_mode[0x4];
3012 u8 rre[0x1];
3013 u8 rwe[0x1];
3014 u8 rae[0x1];
3015 u8 atomic_like_write_en[0x1];
3016 u8 latency_sensitive[0x1];
3017 u8 rlky[0x1];
3018 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003019 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03003020
Matan Barakb4ff3a32016-02-09 14:57:42 +02003021 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003022 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003023 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003024 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003025 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003026
Matan Barakb4ff3a32016-02-09 14:57:42 +02003027 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03003028 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003029
Matan Barakb4ff3a32016-02-09 14:57:42 +02003030 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003031 u8 pd[0x18];
3032
3033 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003034 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003035 u8 flow_label[0x14];
3036
3037 u8 dc_access_key[0x40];
3038
Matan Barakb4ff3a32016-02-09 14:57:42 +02003039 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03003040 u8 mtu[0x3];
3041 u8 port[0x8];
3042 u8 pkey_index[0x10];
3043
Matan Barakb4ff3a32016-02-09 14:57:42 +02003044 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003045 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003046 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003047 u8 hop_limit[0x8];
3048
3049 u8 dc_access_key_violation_count[0x20];
3050
Matan Barakb4ff3a32016-02-09 14:57:42 +02003051 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003052 u8 dei_cfi[0x1];
3053 u8 eth_prio[0x3];
3054 u8 ecn[0x2];
3055 u8 dscp[0x6];
3056
Matan Barakb4ff3a32016-02-09 14:57:42 +02003057 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003058};
3059
3060enum {
3061 MLX5_CQC_STATUS_OK = 0x0,
3062 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
3063 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
3064};
3065
3066enum {
3067 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
3068 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
3069};
3070
3071enum {
3072 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
3073 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
3074 MLX5_CQC_ST_FIRED = 0xa,
3075};
3076
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003077enum {
3078 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
3079 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03003080 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003081};
3082
Saeed Mahameede2816822015-05-28 22:28:40 +03003083struct mlx5_ifc_cqc_bits {
3084 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003085 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003086 u8 cqe_sz[0x3];
3087 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003088 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003089 u8 scqe_break_moderation_en[0x1];
3090 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003091 u8 cq_period_mode[0x2];
3092 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003093 u8 mini_cqe_res_format[0x2];
3094 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003095 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003096
Matan Barakb4ff3a32016-02-09 14:57:42 +02003097 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003098
Matan Barakb4ff3a32016-02-09 14:57:42 +02003099 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003100 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003101 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003102
Matan Barakb4ff3a32016-02-09 14:57:42 +02003103 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003104 u8 log_cq_size[0x5];
3105 u8 uar_page[0x18];
3106
Matan Barakb4ff3a32016-02-09 14:57:42 +02003107 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003108 u8 cq_period[0xc];
3109 u8 cq_max_count[0x10];
3110
Matan Barakb4ff3a32016-02-09 14:57:42 +02003111 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003112 u8 c_eqn[0x8];
3113
Matan Barakb4ff3a32016-02-09 14:57:42 +02003114 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003115 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003116 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003117
Matan Barakb4ff3a32016-02-09 14:57:42 +02003118 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003119
Matan Barakb4ff3a32016-02-09 14:57:42 +02003120 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003121 u8 last_notified_index[0x18];
3122
Matan Barakb4ff3a32016-02-09 14:57:42 +02003123 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003124 u8 last_solicit_index[0x18];
3125
Matan Barakb4ff3a32016-02-09 14:57:42 +02003126 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003127 u8 consumer_counter[0x18];
3128
Matan Barakb4ff3a32016-02-09 14:57:42 +02003129 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003130 u8 producer_counter[0x18];
3131
Matan Barakb4ff3a32016-02-09 14:57:42 +02003132 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003133
3134 u8 dbr_addr[0x40];
3135};
3136
3137union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3138 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3139 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3140 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003141 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003142};
3143
3144struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003145 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003146
Matan Barakb4ff3a32016-02-09 14:57:42 +02003147 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003148 u8 ieee_vendor_id[0x18];
3149
Matan Barakb4ff3a32016-02-09 14:57:42 +02003150 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003151 u8 vsd_vendor_id[0x10];
3152
3153 u8 vsd[208][0x8];
3154
3155 u8 vsd_contd_psid[16][0x8];
3156};
3157
Saeed Mahameed74862162016-06-09 15:11:34 +03003158enum {
3159 MLX5_XRQC_STATE_GOOD = 0x0,
3160 MLX5_XRQC_STATE_ERROR = 0x1,
3161};
3162
3163enum {
3164 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3165 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3166};
3167
3168enum {
3169 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3170};
3171
3172struct mlx5_ifc_tag_matching_topology_context_bits {
3173 u8 log_matching_list_sz[0x4];
3174 u8 reserved_at_4[0xc];
3175 u8 append_next_index[0x10];
3176
3177 u8 sw_phase_cnt[0x10];
3178 u8 hw_phase_cnt[0x10];
3179
3180 u8 reserved_at_40[0x40];
3181};
3182
3183struct mlx5_ifc_xrqc_bits {
3184 u8 state[0x4];
3185 u8 rlkey[0x1];
3186 u8 reserved_at_5[0xf];
3187 u8 topology[0x4];
3188 u8 reserved_at_18[0x4];
3189 u8 offload[0x4];
3190
3191 u8 reserved_at_20[0x8];
3192 u8 user_index[0x18];
3193
3194 u8 reserved_at_40[0x8];
3195 u8 cqn[0x18];
3196
3197 u8 reserved_at_60[0xa0];
3198
3199 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3200
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003201 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003202
3203 struct mlx5_ifc_wq_bits wq;
3204};
3205
Saeed Mahameede2816822015-05-28 22:28:40 +03003206union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3207 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3208 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003209 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003210};
3211
3212union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3213 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3214 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3215 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003216 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003217};
3218
3219union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3220 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3221 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3222 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3223 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3224 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3225 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3226 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003227 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003228 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003229 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003230 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003231};
3232
Gal Pressman8ed1a632016-11-17 13:46:01 +02003233union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3234 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3235 u8 reserved_at_0[0x7c0];
3236};
3237
Saeed Mahameede2816822015-05-28 22:28:40 +03003238union mlx5_ifc_event_auto_bits {
3239 struct mlx5_ifc_comp_event_bits comp_event;
3240 struct mlx5_ifc_dct_events_bits dct_events;
3241 struct mlx5_ifc_qp_events_bits qp_events;
3242 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3243 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3244 struct mlx5_ifc_cq_error_bits cq_error;
3245 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3246 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3247 struct mlx5_ifc_gpio_event_bits gpio_event;
3248 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3249 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3250 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003251 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003252};
3253
3254struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003255 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003256
3257 u8 assert_existptr[0x20];
3258
3259 u8 assert_callra[0x20];
3260
Matan Barakb4ff3a32016-02-09 14:57:42 +02003261 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003262
3263 u8 fw_version[0x20];
3264
3265 u8 hw_id[0x20];
3266
Matan Barakb4ff3a32016-02-09 14:57:42 +02003267 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003268
3269 u8 irisc_index[0x8];
3270 u8 synd[0x8];
3271 u8 ext_synd[0x10];
3272};
3273
3274struct mlx5_ifc_register_loopback_control_bits {
3275 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003277 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003278 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003279
Matan Barakb4ff3a32016-02-09 14:57:42 +02003280 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003281};
3282
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003283struct mlx5_ifc_vport_tc_element_bits {
3284 u8 traffic_class[0x4];
3285 u8 reserved_at_4[0xc];
3286 u8 vport_number[0x10];
3287};
3288
3289struct mlx5_ifc_vport_element_bits {
3290 u8 reserved_at_0[0x10];
3291 u8 vport_number[0x10];
3292};
3293
3294enum {
3295 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3296 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3297 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3298};
3299
3300struct mlx5_ifc_tsar_element_bits {
3301 u8 reserved_at_0[0x8];
3302 u8 tsar_type[0x8];
3303 u8 reserved_at_10[0x10];
3304};
3305
Majd Dibbiny8812c242017-02-09 14:20:12 +02003306enum {
3307 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3308 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3309};
3310
Saeed Mahameede2816822015-05-28 22:28:40 +03003311struct mlx5_ifc_teardown_hca_out_bits {
3312 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003313 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003314
3315 u8 syndrome[0x20];
3316
Majd Dibbiny8812c242017-02-09 14:20:12 +02003317 u8 reserved_at_40[0x3f];
3318
3319 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003320};
3321
3322enum {
3323 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003324 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003325};
3326
3327struct mlx5_ifc_teardown_hca_in_bits {
3328 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003329 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003330
Matan Barakb4ff3a32016-02-09 14:57:42 +02003331 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003332 u8 op_mod[0x10];
3333
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003335 u8 profile[0x10];
3336
Matan Barakb4ff3a32016-02-09 14:57:42 +02003337 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003338};
3339
3340struct mlx5_ifc_sqerr2rts_qp_out_bits {
3341 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003342 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003343
3344 u8 syndrome[0x20];
3345
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347};
3348
3349struct mlx5_ifc_sqerr2rts_qp_in_bits {
3350 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003351 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003352
Matan Barakb4ff3a32016-02-09 14:57:42 +02003353 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003354 u8 op_mod[0x10];
3355
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003357 u8 qpn[0x18];
3358
Matan Barakb4ff3a32016-02-09 14:57:42 +02003359 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003360
3361 u8 opt_param_mask[0x20];
3362
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003364
3365 struct mlx5_ifc_qpc_bits qpc;
3366
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368};
3369
3370struct mlx5_ifc_sqd2rts_qp_out_bits {
3371 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003372 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003373
3374 u8 syndrome[0x20];
3375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377};
3378
3379struct mlx5_ifc_sqd2rts_qp_in_bits {
3380 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382
Matan Barakb4ff3a32016-02-09 14:57:42 +02003383 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003384 u8 op_mod[0x10];
3385
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387 u8 qpn[0x18];
3388
Matan Barakb4ff3a32016-02-09 14:57:42 +02003389 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003390
3391 u8 opt_param_mask[0x20];
3392
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394
3395 struct mlx5_ifc_qpc_bits qpc;
3396
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398};
3399
3400struct mlx5_ifc_set_roce_address_out_bits {
3401 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403
3404 u8 syndrome[0x20];
3405
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407};
3408
3409struct mlx5_ifc_set_roce_address_in_bits {
3410 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414 u8 op_mod[0x10];
3415
3416 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003417 u8 reserved_at_50[0xc];
3418 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419
Matan Barakb4ff3a32016-02-09 14:57:42 +02003420 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003421
3422 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3423};
3424
3425struct mlx5_ifc_set_mad_demux_out_bits {
3426 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428
3429 u8 syndrome[0x20];
3430
Matan Barakb4ff3a32016-02-09 14:57:42 +02003431 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003432};
3433
3434enum {
3435 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3436 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3437};
3438
3439struct mlx5_ifc_set_mad_demux_in_bits {
3440 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003441 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003442
Matan Barakb4ff3a32016-02-09 14:57:42 +02003443 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003444 u8 op_mod[0x10];
3445
Matan Barakb4ff3a32016-02-09 14:57:42 +02003446 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003447
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003450 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003451};
3452
3453struct mlx5_ifc_set_l2_table_entry_out_bits {
3454 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003456
3457 u8 syndrome[0x20];
3458
Matan Barakb4ff3a32016-02-09 14:57:42 +02003459 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003460};
3461
3462struct mlx5_ifc_set_l2_table_entry_in_bits {
3463 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003464 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003465
Matan Barakb4ff3a32016-02-09 14:57:42 +02003466 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003467 u8 op_mod[0x10];
3468
Matan Barakb4ff3a32016-02-09 14:57:42 +02003469 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003470
Matan Barakb4ff3a32016-02-09 14:57:42 +02003471 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003472 u8 table_index[0x18];
3473
Matan Barakb4ff3a32016-02-09 14:57:42 +02003474 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003475
Matan Barakb4ff3a32016-02-09 14:57:42 +02003476 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003477 u8 vlan_valid[0x1];
3478 u8 vlan[0xc];
3479
3480 struct mlx5_ifc_mac_address_layout_bits mac_address;
3481
Matan Barakb4ff3a32016-02-09 14:57:42 +02003482 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003483};
3484
3485struct mlx5_ifc_set_issi_out_bits {
3486 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003487 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003488
3489 u8 syndrome[0x20];
3490
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492};
3493
3494struct mlx5_ifc_set_issi_in_bits {
3495 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003496 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003497
Matan Barakb4ff3a32016-02-09 14:57:42 +02003498 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003499 u8 op_mod[0x10];
3500
Matan Barakb4ff3a32016-02-09 14:57:42 +02003501 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003502 u8 current_issi[0x10];
3503
Matan Barakb4ff3a32016-02-09 14:57:42 +02003504 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003505};
3506
3507struct mlx5_ifc_set_hca_cap_out_bits {
3508 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003509 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003510
3511 u8 syndrome[0x20];
3512
Matan Barakb4ff3a32016-02-09 14:57:42 +02003513 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003514};
3515
3516struct mlx5_ifc_set_hca_cap_in_bits {
3517 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003518 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003519
Matan Barakb4ff3a32016-02-09 14:57:42 +02003520 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003521 u8 op_mod[0x10];
3522
Matan Barakb4ff3a32016-02-09 14:57:42 +02003523 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003524
Saeed Mahameede2816822015-05-28 22:28:40 +03003525 union mlx5_ifc_hca_cap_union_bits capability;
3526};
3527
Maor Gottlieb26a81452015-12-10 17:12:39 +02003528enum {
3529 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3530 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3531 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3532 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3533};
3534
Saeed Mahameede2816822015-05-28 22:28:40 +03003535struct mlx5_ifc_set_fte_out_bits {
3536 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003537 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003538
3539 u8 syndrome[0x20];
3540
Matan Barakb4ff3a32016-02-09 14:57:42 +02003541 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003542};
3543
3544struct mlx5_ifc_set_fte_in_bits {
3545 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003546 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003547
Matan Barakb4ff3a32016-02-09 14:57:42 +02003548 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003549 u8 op_mod[0x10];
3550
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003551 u8 other_vport[0x1];
3552 u8 reserved_at_41[0xf];
3553 u8 vport_number[0x10];
3554
3555 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003556
3557 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003558 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003559
Matan Barakb4ff3a32016-02-09 14:57:42 +02003560 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003561 u8 table_id[0x18];
3562
Matan Barakb4ff3a32016-02-09 14:57:42 +02003563 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003564 u8 modify_enable_mask[0x8];
3565
Matan Barakb4ff3a32016-02-09 14:57:42 +02003566 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003567
3568 u8 flow_index[0x20];
3569
Matan Barakb4ff3a32016-02-09 14:57:42 +02003570 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003571
3572 struct mlx5_ifc_flow_context_bits flow_context;
3573};
3574
3575struct mlx5_ifc_rts2rts_qp_out_bits {
3576 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003577 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003578
3579 u8 syndrome[0x20];
3580
Matan Barakb4ff3a32016-02-09 14:57:42 +02003581 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003582};
3583
3584struct mlx5_ifc_rts2rts_qp_in_bits {
3585 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587
Matan Barakb4ff3a32016-02-09 14:57:42 +02003588 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003589 u8 op_mod[0x10];
3590
Matan Barakb4ff3a32016-02-09 14:57:42 +02003591 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003592 u8 qpn[0x18];
3593
Matan Barakb4ff3a32016-02-09 14:57:42 +02003594 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003595
3596 u8 opt_param_mask[0x20];
3597
Matan Barakb4ff3a32016-02-09 14:57:42 +02003598 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003599
3600 struct mlx5_ifc_qpc_bits qpc;
3601
Matan Barakb4ff3a32016-02-09 14:57:42 +02003602 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603};
3604
3605struct mlx5_ifc_rtr2rts_qp_out_bits {
3606 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003607 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003608
3609 u8 syndrome[0x20];
3610
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612};
3613
3614struct mlx5_ifc_rtr2rts_qp_in_bits {
3615 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617
Matan Barakb4ff3a32016-02-09 14:57:42 +02003618 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003619 u8 op_mod[0x10];
3620
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622 u8 qpn[0x18];
3623
Matan Barakb4ff3a32016-02-09 14:57:42 +02003624 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003625
3626 u8 opt_param_mask[0x20];
3627
Matan Barakb4ff3a32016-02-09 14:57:42 +02003628 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003629
3630 struct mlx5_ifc_qpc_bits qpc;
3631
Matan Barakb4ff3a32016-02-09 14:57:42 +02003632 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003633};
3634
3635struct mlx5_ifc_rst2init_qp_out_bits {
3636 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003637 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003638
3639 u8 syndrome[0x20];
3640
Matan Barakb4ff3a32016-02-09 14:57:42 +02003641 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003642};
3643
3644struct mlx5_ifc_rst2init_qp_in_bits {
3645 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003646 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003647
Matan Barakb4ff3a32016-02-09 14:57:42 +02003648 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003649 u8 op_mod[0x10];
3650
Matan Barakb4ff3a32016-02-09 14:57:42 +02003651 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003652 u8 qpn[0x18];
3653
Matan Barakb4ff3a32016-02-09 14:57:42 +02003654 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003655
3656 u8 opt_param_mask[0x20];
3657
Matan Barakb4ff3a32016-02-09 14:57:42 +02003658 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003659
3660 struct mlx5_ifc_qpc_bits qpc;
3661
Matan Barakb4ff3a32016-02-09 14:57:42 +02003662 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003663};
3664
Saeed Mahameed74862162016-06-09 15:11:34 +03003665struct mlx5_ifc_query_xrq_out_bits {
3666 u8 status[0x8];
3667 u8 reserved_at_8[0x18];
3668
3669 u8 syndrome[0x20];
3670
3671 u8 reserved_at_40[0x40];
3672
3673 struct mlx5_ifc_xrqc_bits xrq_context;
3674};
3675
3676struct mlx5_ifc_query_xrq_in_bits {
3677 u8 opcode[0x10];
3678 u8 reserved_at_10[0x10];
3679
3680 u8 reserved_at_20[0x10];
3681 u8 op_mod[0x10];
3682
3683 u8 reserved_at_40[0x8];
3684 u8 xrqn[0x18];
3685
3686 u8 reserved_at_60[0x20];
3687};
3688
Saeed Mahameede2816822015-05-28 22:28:40 +03003689struct mlx5_ifc_query_xrc_srq_out_bits {
3690 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003691 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003692
3693 u8 syndrome[0x20];
3694
Matan Barakb4ff3a32016-02-09 14:57:42 +02003695 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003696
3697 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3698
Matan Barakb4ff3a32016-02-09 14:57:42 +02003699 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003700
3701 u8 pas[0][0x40];
3702};
3703
3704struct mlx5_ifc_query_xrc_srq_in_bits {
3705 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003706 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003707
Matan Barakb4ff3a32016-02-09 14:57:42 +02003708 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003709 u8 op_mod[0x10];
3710
Matan Barakb4ff3a32016-02-09 14:57:42 +02003711 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003712 u8 xrc_srqn[0x18];
3713
Matan Barakb4ff3a32016-02-09 14:57:42 +02003714 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003715};
3716
3717enum {
3718 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3719 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3720};
3721
3722struct mlx5_ifc_query_vport_state_out_bits {
3723 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003724 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003725
3726 u8 syndrome[0x20];
3727
Matan Barakb4ff3a32016-02-09 14:57:42 +02003728 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003729
Matan Barakb4ff3a32016-02-09 14:57:42 +02003730 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003731 u8 admin_state[0x4];
3732 u8 state[0x4];
3733};
3734
3735enum {
3736 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003737 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003738};
3739
3740struct mlx5_ifc_query_vport_state_in_bits {
3741 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003742 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003743
Matan Barakb4ff3a32016-02-09 14:57:42 +02003744 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003745 u8 op_mod[0x10];
3746
3747 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003748 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003749 u8 vport_number[0x10];
3750
Matan Barakb4ff3a32016-02-09 14:57:42 +02003751 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003752};
3753
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02003754struct mlx5_ifc_query_vnic_env_out_bits {
3755 u8 status[0x8];
3756 u8 reserved_at_8[0x18];
3757
3758 u8 syndrome[0x20];
3759
3760 u8 reserved_at_40[0x40];
3761
3762 struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env;
3763};
3764
3765enum {
3766 MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS = 0x0,
3767};
3768
3769struct mlx5_ifc_query_vnic_env_in_bits {
3770 u8 opcode[0x10];
3771 u8 reserved_at_10[0x10];
3772
3773 u8 reserved_at_20[0x10];
3774 u8 op_mod[0x10];
3775
3776 u8 other_vport[0x1];
3777 u8 reserved_at_41[0xf];
3778 u8 vport_number[0x10];
3779
3780 u8 reserved_at_60[0x20];
3781};
3782
Saeed Mahameede2816822015-05-28 22:28:40 +03003783struct mlx5_ifc_query_vport_counter_out_bits {
3784 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003785 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003786
3787 u8 syndrome[0x20];
3788
Matan Barakb4ff3a32016-02-09 14:57:42 +02003789 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003790
3791 struct mlx5_ifc_traffic_counter_bits received_errors;
3792
3793 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3794
3795 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3796
3797 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3798
3799 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3800
3801 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3802
3803 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3804
3805 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3806
3807 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3808
3809 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3810
3811 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3812
3813 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3814
Matan Barakb4ff3a32016-02-09 14:57:42 +02003815 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003816};
3817
3818enum {
3819 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3820};
3821
3822struct mlx5_ifc_query_vport_counter_in_bits {
3823 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003824 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003825
Matan Barakb4ff3a32016-02-09 14:57:42 +02003826 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003827 u8 op_mod[0x10];
3828
3829 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003830 u8 reserved_at_41[0xb];
3831 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003832 u8 vport_number[0x10];
3833
Matan Barakb4ff3a32016-02-09 14:57:42 +02003834 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003835
3836 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003837 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003838
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840};
3841
3842struct mlx5_ifc_query_tis_out_bits {
3843 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845
3846 u8 syndrome[0x20];
3847
Matan Barakb4ff3a32016-02-09 14:57:42 +02003848 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003849
3850 struct mlx5_ifc_tisc_bits tis_context;
3851};
3852
3853struct mlx5_ifc_query_tis_in_bits {
3854 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003855 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003856
Matan Barakb4ff3a32016-02-09 14:57:42 +02003857 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003858 u8 op_mod[0x10];
3859
Matan Barakb4ff3a32016-02-09 14:57:42 +02003860 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003861 u8 tisn[0x18];
3862
Matan Barakb4ff3a32016-02-09 14:57:42 +02003863 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003864};
3865
3866struct mlx5_ifc_query_tir_out_bits {
3867 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003868 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003869
3870 u8 syndrome[0x20];
3871
Matan Barakb4ff3a32016-02-09 14:57:42 +02003872 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003873
3874 struct mlx5_ifc_tirc_bits tir_context;
3875};
3876
3877struct mlx5_ifc_query_tir_in_bits {
3878 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003879 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003880
Matan Barakb4ff3a32016-02-09 14:57:42 +02003881 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003882 u8 op_mod[0x10];
3883
Matan Barakb4ff3a32016-02-09 14:57:42 +02003884 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003885 u8 tirn[0x18];
3886
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888};
3889
3890struct mlx5_ifc_query_srq_out_bits {
3891 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003892 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003893
3894 u8 syndrome[0x20];
3895
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897
3898 struct mlx5_ifc_srqc_bits srq_context_entry;
3899
Matan Barakb4ff3a32016-02-09 14:57:42 +02003900 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003901
3902 u8 pas[0][0x40];
3903};
3904
3905struct mlx5_ifc_query_srq_in_bits {
3906 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003907 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003908
Matan Barakb4ff3a32016-02-09 14:57:42 +02003909 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003910 u8 op_mod[0x10];
3911
Matan Barakb4ff3a32016-02-09 14:57:42 +02003912 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003913 u8 srqn[0x18];
3914
Matan Barakb4ff3a32016-02-09 14:57:42 +02003915 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003916};
3917
3918struct mlx5_ifc_query_sq_out_bits {
3919 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003920 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003921
3922 u8 syndrome[0x20];
3923
Matan Barakb4ff3a32016-02-09 14:57:42 +02003924 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003925
3926 struct mlx5_ifc_sqc_bits sq_context;
3927};
3928
3929struct mlx5_ifc_query_sq_in_bits {
3930 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003931 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003932
Matan Barakb4ff3a32016-02-09 14:57:42 +02003933 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003934 u8 op_mod[0x10];
3935
Matan Barakb4ff3a32016-02-09 14:57:42 +02003936 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003937 u8 sqn[0x18];
3938
Matan Barakb4ff3a32016-02-09 14:57:42 +02003939 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003940};
3941
3942struct mlx5_ifc_query_special_contexts_out_bits {
3943 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003944 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003945
3946 u8 syndrome[0x20];
3947
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003948 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003949
3950 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003951
3952 u8 null_mkey[0x20];
3953
3954 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003955};
3956
3957struct mlx5_ifc_query_special_contexts_in_bits {
3958 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003959 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003960
Matan Barakb4ff3a32016-02-09 14:57:42 +02003961 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003962 u8 op_mod[0x10];
3963
Matan Barakb4ff3a32016-02-09 14:57:42 +02003964 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003965};
3966
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003967struct mlx5_ifc_query_scheduling_element_out_bits {
3968 u8 opcode[0x10];
3969 u8 reserved_at_10[0x10];
3970
3971 u8 reserved_at_20[0x10];
3972 u8 op_mod[0x10];
3973
3974 u8 reserved_at_40[0xc0];
3975
3976 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3977
3978 u8 reserved_at_300[0x100];
3979};
3980
3981enum {
3982 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3983};
3984
3985struct mlx5_ifc_query_scheduling_element_in_bits {
3986 u8 opcode[0x10];
3987 u8 reserved_at_10[0x10];
3988
3989 u8 reserved_at_20[0x10];
3990 u8 op_mod[0x10];
3991
3992 u8 scheduling_hierarchy[0x8];
3993 u8 reserved_at_48[0x18];
3994
3995 u8 scheduling_element_id[0x20];
3996
3997 u8 reserved_at_80[0x180];
3998};
3999
Saeed Mahameede2816822015-05-28 22:28:40 +03004000struct mlx5_ifc_query_rqt_out_bits {
4001 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004002 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004003
4004 u8 syndrome[0x20];
4005
Matan Barakb4ff3a32016-02-09 14:57:42 +02004006 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004007
4008 struct mlx5_ifc_rqtc_bits rqt_context;
4009};
4010
4011struct mlx5_ifc_query_rqt_in_bits {
4012 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004013 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004014
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016 u8 op_mod[0x10];
4017
Matan Barakb4ff3a32016-02-09 14:57:42 +02004018 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004019 u8 rqtn[0x18];
4020
Matan Barakb4ff3a32016-02-09 14:57:42 +02004021 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004022};
4023
4024struct mlx5_ifc_query_rq_out_bits {
4025 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004026 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004027
4028 u8 syndrome[0x20];
4029
Matan Barakb4ff3a32016-02-09 14:57:42 +02004030 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004031
4032 struct mlx5_ifc_rqc_bits rq_context;
4033};
4034
4035struct mlx5_ifc_query_rq_in_bits {
4036 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004037 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004038
Matan Barakb4ff3a32016-02-09 14:57:42 +02004039 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004040 u8 op_mod[0x10];
4041
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043 u8 rqn[0x18];
4044
Matan Barakb4ff3a32016-02-09 14:57:42 +02004045 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004046};
4047
4048struct mlx5_ifc_query_roce_address_out_bits {
4049 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004050 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004051
4052 u8 syndrome[0x20];
4053
Matan Barakb4ff3a32016-02-09 14:57:42 +02004054 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004055
4056 struct mlx5_ifc_roce_addr_layout_bits roce_address;
4057};
4058
4059struct mlx5_ifc_query_roce_address_in_bits {
4060 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004061 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004062
Matan Barakb4ff3a32016-02-09 14:57:42 +02004063 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004064 u8 op_mod[0x10];
4065
4066 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02004067 u8 reserved_at_50[0xc];
4068 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004069
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071};
4072
4073struct mlx5_ifc_query_rmp_out_bits {
4074 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076
4077 u8 syndrome[0x20];
4078
Matan Barakb4ff3a32016-02-09 14:57:42 +02004079 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004080
4081 struct mlx5_ifc_rmpc_bits rmp_context;
4082};
4083
4084struct mlx5_ifc_query_rmp_in_bits {
4085 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004087
Matan Barakb4ff3a32016-02-09 14:57:42 +02004088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004089 u8 op_mod[0x10];
4090
Matan Barakb4ff3a32016-02-09 14:57:42 +02004091 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004092 u8 rmpn[0x18];
4093
Matan Barakb4ff3a32016-02-09 14:57:42 +02004094 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004095};
4096
4097struct mlx5_ifc_query_qp_out_bits {
4098 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100
4101 u8 syndrome[0x20];
4102
Matan Barakb4ff3a32016-02-09 14:57:42 +02004103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004104
4105 u8 opt_param_mask[0x20];
4106
Matan Barakb4ff3a32016-02-09 14:57:42 +02004107 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004108
4109 struct mlx5_ifc_qpc_bits qpc;
4110
Matan Barakb4ff3a32016-02-09 14:57:42 +02004111 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004112
4113 u8 pas[0][0x40];
4114};
4115
4116struct mlx5_ifc_query_qp_in_bits {
4117 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004118 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004119
Matan Barakb4ff3a32016-02-09 14:57:42 +02004120 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004121 u8 op_mod[0x10];
4122
Matan Barakb4ff3a32016-02-09 14:57:42 +02004123 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004124 u8 qpn[0x18];
4125
Matan Barakb4ff3a32016-02-09 14:57:42 +02004126 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004127};
4128
4129struct mlx5_ifc_query_q_counter_out_bits {
4130 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004131 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004132
4133 u8 syndrome[0x20];
4134
Matan Barakb4ff3a32016-02-09 14:57:42 +02004135 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004136
4137 u8 rx_write_requests[0x20];
4138
Matan Barakb4ff3a32016-02-09 14:57:42 +02004139 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004140
4141 u8 rx_read_requests[0x20];
4142
Matan Barakb4ff3a32016-02-09 14:57:42 +02004143 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004144
4145 u8 rx_atomic_requests[0x20];
4146
Matan Barakb4ff3a32016-02-09 14:57:42 +02004147 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004148
4149 u8 rx_dct_connect[0x20];
4150
Matan Barakb4ff3a32016-02-09 14:57:42 +02004151 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004152
4153 u8 out_of_buffer[0x20];
4154
Matan Barakb4ff3a32016-02-09 14:57:42 +02004155 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004156
4157 u8 out_of_sequence[0x20];
4158
Saeed Mahameed74862162016-06-09 15:11:34 +03004159 u8 reserved_at_1e0[0x20];
4160
4161 u8 duplicate_request[0x20];
4162
4163 u8 reserved_at_220[0x20];
4164
4165 u8 rnr_nak_retry_err[0x20];
4166
4167 u8 reserved_at_260[0x20];
4168
4169 u8 packet_seq_err[0x20];
4170
4171 u8 reserved_at_2a0[0x20];
4172
4173 u8 implied_nak_seq_err[0x20];
4174
4175 u8 reserved_at_2e0[0x20];
4176
4177 u8 local_ack_timeout_err[0x20];
4178
Parav Pandit58dcb602017-06-19 07:19:37 +03004179 u8 reserved_at_320[0xa0];
4180
4181 u8 resp_local_length_error[0x20];
4182
4183 u8 req_local_length_error[0x20];
4184
4185 u8 resp_local_qp_error[0x20];
4186
4187 u8 local_operation_error[0x20];
4188
4189 u8 resp_local_protection[0x20];
4190
4191 u8 req_local_protection[0x20];
4192
4193 u8 resp_cqe_error[0x20];
4194
4195 u8 req_cqe_error[0x20];
4196
4197 u8 req_mw_binding[0x20];
4198
4199 u8 req_bad_response[0x20];
4200
4201 u8 req_remote_invalid_request[0x20];
4202
4203 u8 resp_remote_invalid_request[0x20];
4204
4205 u8 req_remote_access_errors[0x20];
4206
4207 u8 resp_remote_access_errors[0x20];
4208
4209 u8 req_remote_operation_errors[0x20];
4210
4211 u8 req_transport_retries_exceeded[0x20];
4212
4213 u8 cq_overflow[0x20];
4214
4215 u8 resp_cqe_flush_error[0x20];
4216
4217 u8 req_cqe_flush_error[0x20];
4218
4219 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004220};
4221
4222struct mlx5_ifc_query_q_counter_in_bits {
4223 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004224 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004225
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004227 u8 op_mod[0x10];
4228
Matan Barakb4ff3a32016-02-09 14:57:42 +02004229 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004230
4231 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004232 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004233
Matan Barakb4ff3a32016-02-09 14:57:42 +02004234 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004235 u8 counter_set_id[0x8];
4236};
4237
4238struct mlx5_ifc_query_pages_out_bits {
4239 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004240 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004241
4242 u8 syndrome[0x20];
4243
Matan Barakb4ff3a32016-02-09 14:57:42 +02004244 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004245 u8 function_id[0x10];
4246
4247 u8 num_pages[0x20];
4248};
4249
4250enum {
4251 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4252 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4253 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4254};
4255
4256struct mlx5_ifc_query_pages_in_bits {
4257 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004258 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004259
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261 u8 op_mod[0x10];
4262
Matan Barakb4ff3a32016-02-09 14:57:42 +02004263 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004264 u8 function_id[0x10];
4265
Matan Barakb4ff3a32016-02-09 14:57:42 +02004266 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004267};
4268
4269struct mlx5_ifc_query_nic_vport_context_out_bits {
4270 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004271 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004272
4273 u8 syndrome[0x20];
4274
Matan Barakb4ff3a32016-02-09 14:57:42 +02004275 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004276
4277 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4278};
4279
4280struct mlx5_ifc_query_nic_vport_context_in_bits {
4281 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004282 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004283
Matan Barakb4ff3a32016-02-09 14:57:42 +02004284 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004285 u8 op_mod[0x10];
4286
4287 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004288 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004289 u8 vport_number[0x10];
4290
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004292 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004293 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004294};
4295
4296struct mlx5_ifc_query_mkey_out_bits {
4297 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004298 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004299
4300 u8 syndrome[0x20];
4301
Matan Barakb4ff3a32016-02-09 14:57:42 +02004302 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004303
4304 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4305
Matan Barakb4ff3a32016-02-09 14:57:42 +02004306 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004307
4308 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4309
4310 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4311};
4312
4313struct mlx5_ifc_query_mkey_in_bits {
4314 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004315 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004316
Matan Barakb4ff3a32016-02-09 14:57:42 +02004317 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004318 u8 op_mod[0x10];
4319
Matan Barakb4ff3a32016-02-09 14:57:42 +02004320 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004321 u8 mkey_index[0x18];
4322
4323 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004324 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004325};
4326
4327struct mlx5_ifc_query_mad_demux_out_bits {
4328 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004330
4331 u8 syndrome[0x20];
4332
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004334
4335 u8 mad_dumux_parameters_block[0x20];
4336};
4337
4338struct mlx5_ifc_query_mad_demux_in_bits {
4339 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004341
Matan Barakb4ff3a32016-02-09 14:57:42 +02004342 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004343 u8 op_mod[0x10];
4344
Matan Barakb4ff3a32016-02-09 14:57:42 +02004345 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004346};
4347
4348struct mlx5_ifc_query_l2_table_entry_out_bits {
4349 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004350 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004351
4352 u8 syndrome[0x20];
4353
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357 u8 vlan_valid[0x1];
4358 u8 vlan[0xc];
4359
4360 struct mlx5_ifc_mac_address_layout_bits mac_address;
4361
Matan Barakb4ff3a32016-02-09 14:57:42 +02004362 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004363};
4364
4365struct mlx5_ifc_query_l2_table_entry_in_bits {
4366 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004368
Matan Barakb4ff3a32016-02-09 14:57:42 +02004369 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004370 u8 op_mod[0x10];
4371
Matan Barakb4ff3a32016-02-09 14:57:42 +02004372 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004373
Matan Barakb4ff3a32016-02-09 14:57:42 +02004374 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004375 u8 table_index[0x18];
4376
Matan Barakb4ff3a32016-02-09 14:57:42 +02004377 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004378};
4379
4380struct mlx5_ifc_query_issi_out_bits {
4381 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004382 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004383
4384 u8 syndrome[0x20];
4385
Matan Barakb4ff3a32016-02-09 14:57:42 +02004386 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004387 u8 current_issi[0x10];
4388
Matan Barakb4ff3a32016-02-09 14:57:42 +02004389 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004390
Matan Barakb4ff3a32016-02-09 14:57:42 +02004391 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004392 u8 supported_issi_dw0[0x20];
4393};
4394
4395struct mlx5_ifc_query_issi_in_bits {
4396 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004397 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004398
Matan Barakb4ff3a32016-02-09 14:57:42 +02004399 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004400 u8 op_mod[0x10];
4401
Matan Barakb4ff3a32016-02-09 14:57:42 +02004402 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004403};
4404
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004405struct mlx5_ifc_set_driver_version_out_bits {
4406 u8 status[0x8];
4407 u8 reserved_0[0x18];
4408
4409 u8 syndrome[0x20];
4410 u8 reserved_1[0x40];
4411};
4412
4413struct mlx5_ifc_set_driver_version_in_bits {
4414 u8 opcode[0x10];
4415 u8 reserved_0[0x10];
4416
4417 u8 reserved_1[0x10];
4418 u8 op_mod[0x10];
4419
4420 u8 reserved_2[0x40];
4421 u8 driver_version[64][0x8];
4422};
4423
Saeed Mahameede2816822015-05-28 22:28:40 +03004424struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4425 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004426 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004427
4428 u8 syndrome[0x20];
4429
Matan Barakb4ff3a32016-02-09 14:57:42 +02004430 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004431
4432 struct mlx5_ifc_pkey_bits pkey[0];
4433};
4434
4435struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4436 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004437 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004438
Matan Barakb4ff3a32016-02-09 14:57:42 +02004439 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004440 u8 op_mod[0x10];
4441
4442 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004443 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004444 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004445 u8 vport_number[0x10];
4446
Matan Barakb4ff3a32016-02-09 14:57:42 +02004447 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004448 u8 pkey_index[0x10];
4449};
4450
Eli Coheneff901d2016-03-11 22:58:42 +02004451enum {
4452 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4453 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4454 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4455};
4456
Saeed Mahameede2816822015-05-28 22:28:40 +03004457struct mlx5_ifc_query_hca_vport_gid_out_bits {
4458 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004459 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004460
4461 u8 syndrome[0x20];
4462
Matan Barakb4ff3a32016-02-09 14:57:42 +02004463 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004464
4465 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004466 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004467
4468 struct mlx5_ifc_array128_auto_bits gid[0];
4469};
4470
4471struct mlx5_ifc_query_hca_vport_gid_in_bits {
4472 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004473 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004474
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004476 u8 op_mod[0x10];
4477
4478 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004480 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004481 u8 vport_number[0x10];
4482
Matan Barakb4ff3a32016-02-09 14:57:42 +02004483 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004484 u8 gid_index[0x10];
4485};
4486
4487struct mlx5_ifc_query_hca_vport_context_out_bits {
4488 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004489 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004490
4491 u8 syndrome[0x20];
4492
Matan Barakb4ff3a32016-02-09 14:57:42 +02004493 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004494
4495 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4496};
4497
4498struct mlx5_ifc_query_hca_vport_context_in_bits {
4499 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004500 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004501
Matan Barakb4ff3a32016-02-09 14:57:42 +02004502 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004503 u8 op_mod[0x10];
4504
4505 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004506 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004507 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004508 u8 vport_number[0x10];
4509
Matan Barakb4ff3a32016-02-09 14:57:42 +02004510 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004511};
4512
4513struct mlx5_ifc_query_hca_cap_out_bits {
4514 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004515 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004516
4517 u8 syndrome[0x20];
4518
Matan Barakb4ff3a32016-02-09 14:57:42 +02004519 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004520
4521 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004522};
4523
4524struct mlx5_ifc_query_hca_cap_in_bits {
4525 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004526 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004527
Matan Barakb4ff3a32016-02-09 14:57:42 +02004528 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004529 u8 op_mod[0x10];
4530
Matan Barakb4ff3a32016-02-09 14:57:42 +02004531 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004532};
4533
Saeed Mahameede2816822015-05-28 22:28:40 +03004534struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004535 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004536 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004537
4538 u8 syndrome[0x20];
4539
Matan Barakb4ff3a32016-02-09 14:57:42 +02004540 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004541
Matan Barakb4ff3a32016-02-09 14:57:42 +02004542 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004543 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004544 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004545 u8 log_size[0x8];
4546
Matan Barakb4ff3a32016-02-09 14:57:42 +02004547 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004548};
4549
Saeed Mahameede2816822015-05-28 22:28:40 +03004550struct mlx5_ifc_query_flow_table_in_bits {
4551 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004552 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004553
Matan Barakb4ff3a32016-02-09 14:57:42 +02004554 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004555 u8 op_mod[0x10];
4556
Matan Barakb4ff3a32016-02-09 14:57:42 +02004557 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004558
4559 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004560 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004561
Matan Barakb4ff3a32016-02-09 14:57:42 +02004562 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004563 u8 table_id[0x18];
4564
Matan Barakb4ff3a32016-02-09 14:57:42 +02004565 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004566};
4567
4568struct mlx5_ifc_query_fte_out_bits {
4569 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004570 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004571
4572 u8 syndrome[0x20];
4573
Matan Barakb4ff3a32016-02-09 14:57:42 +02004574 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004575
4576 struct mlx5_ifc_flow_context_bits flow_context;
4577};
4578
4579struct mlx5_ifc_query_fte_in_bits {
4580 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004581 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004582
Matan Barakb4ff3a32016-02-09 14:57:42 +02004583 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004584 u8 op_mod[0x10];
4585
Matan Barakb4ff3a32016-02-09 14:57:42 +02004586 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004587
4588 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004589 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004590
Matan Barakb4ff3a32016-02-09 14:57:42 +02004591 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004592 u8 table_id[0x18];
4593
Matan Barakb4ff3a32016-02-09 14:57:42 +02004594 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004595
4596 u8 flow_index[0x20];
4597
Matan Barakb4ff3a32016-02-09 14:57:42 +02004598 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004599};
4600
4601enum {
4602 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4603 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4604 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
Ariel Levkovich71c6e862018-05-13 14:33:34 +03004605 MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_2 = 0X3,
Saeed Mahameede2816822015-05-28 22:28:40 +03004606};
4607
4608struct mlx5_ifc_query_flow_group_out_bits {
4609 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004610 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004611
4612 u8 syndrome[0x20];
4613
Matan Barakb4ff3a32016-02-09 14:57:42 +02004614 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004615
4616 u8 start_flow_index[0x20];
4617
Matan Barakb4ff3a32016-02-09 14:57:42 +02004618 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004619
4620 u8 end_flow_index[0x20];
4621
Matan Barakb4ff3a32016-02-09 14:57:42 +02004622 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004623
Matan Barakb4ff3a32016-02-09 14:57:42 +02004624 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004625 u8 match_criteria_enable[0x8];
4626
4627 struct mlx5_ifc_fte_match_param_bits match_criteria;
4628
Matan Barakb4ff3a32016-02-09 14:57:42 +02004629 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004630};
4631
4632struct mlx5_ifc_query_flow_group_in_bits {
4633 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004634 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004635
Matan Barakb4ff3a32016-02-09 14:57:42 +02004636 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004637 u8 op_mod[0x10];
4638
Matan Barakb4ff3a32016-02-09 14:57:42 +02004639 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004640
4641 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004642 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004643
Matan Barakb4ff3a32016-02-09 14:57:42 +02004644 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004645 u8 table_id[0x18];
4646
4647 u8 group_id[0x20];
4648
Matan Barakb4ff3a32016-02-09 14:57:42 +02004649 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004650};
4651
Amir Vadai9dc0b282016-05-13 12:55:39 +00004652struct mlx5_ifc_query_flow_counter_out_bits {
4653 u8 status[0x8];
4654 u8 reserved_at_8[0x18];
4655
4656 u8 syndrome[0x20];
4657
4658 u8 reserved_at_40[0x40];
4659
4660 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4661};
4662
4663struct mlx5_ifc_query_flow_counter_in_bits {
4664 u8 opcode[0x10];
4665 u8 reserved_at_10[0x10];
4666
4667 u8 reserved_at_20[0x10];
4668 u8 op_mod[0x10];
4669
4670 u8 reserved_at_40[0x80];
4671
4672 u8 clear[0x1];
4673 u8 reserved_at_c1[0xf];
4674 u8 num_of_counters[0x10];
4675
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004676 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004677};
4678
Saeed Mahameedd6666752015-12-01 18:03:22 +02004679struct mlx5_ifc_query_esw_vport_context_out_bits {
4680 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004681 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004682
4683 u8 syndrome[0x20];
4684
Matan Barakb4ff3a32016-02-09 14:57:42 +02004685 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004686
4687 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4688};
4689
4690struct mlx5_ifc_query_esw_vport_context_in_bits {
4691 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004692 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004693
Matan Barakb4ff3a32016-02-09 14:57:42 +02004694 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004695 u8 op_mod[0x10];
4696
4697 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004698 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004699 u8 vport_number[0x10];
4700
Matan Barakb4ff3a32016-02-09 14:57:42 +02004701 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004702};
4703
4704struct mlx5_ifc_modify_esw_vport_context_out_bits {
4705 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004706 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004707
4708 u8 syndrome[0x20];
4709
Matan Barakb4ff3a32016-02-09 14:57:42 +02004710 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004711};
4712
4713struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004714 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004715 u8 vport_cvlan_insert[0x1];
4716 u8 vport_svlan_insert[0x1];
4717 u8 vport_cvlan_strip[0x1];
4718 u8 vport_svlan_strip[0x1];
4719};
4720
4721struct mlx5_ifc_modify_esw_vport_context_in_bits {
4722 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004723 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004724
Matan Barakb4ff3a32016-02-09 14:57:42 +02004725 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004726 u8 op_mod[0x10];
4727
4728 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004729 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004730 u8 vport_number[0x10];
4731
4732 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4733
4734 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4735};
4736
Saeed Mahameede2816822015-05-28 22:28:40 +03004737struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004738 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004739 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004740
4741 u8 syndrome[0x20];
4742
Matan Barakb4ff3a32016-02-09 14:57:42 +02004743 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004744
4745 struct mlx5_ifc_eqc_bits eq_context_entry;
4746
Matan Barakb4ff3a32016-02-09 14:57:42 +02004747 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004748
4749 u8 event_bitmask[0x40];
4750
Matan Barakb4ff3a32016-02-09 14:57:42 +02004751 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004752
4753 u8 pas[0][0x40];
4754};
4755
4756struct mlx5_ifc_query_eq_in_bits {
4757 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004758 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004759
Matan Barakb4ff3a32016-02-09 14:57:42 +02004760 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004761 u8 op_mod[0x10];
4762
Matan Barakb4ff3a32016-02-09 14:57:42 +02004763 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004764 u8 eq_number[0x8];
4765
Matan Barakb4ff3a32016-02-09 14:57:42 +02004766 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004767};
4768
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004769struct mlx5_ifc_encap_header_in_bits {
4770 u8 reserved_at_0[0x5];
4771 u8 header_type[0x3];
4772 u8 reserved_at_8[0xe];
4773 u8 encap_header_size[0xa];
4774
4775 u8 reserved_at_20[0x10];
4776 u8 encap_header[2][0x8];
4777
4778 u8 more_encap_header[0][0x8];
4779};
4780
4781struct mlx5_ifc_query_encap_header_out_bits {
4782 u8 status[0x8];
4783 u8 reserved_at_8[0x18];
4784
4785 u8 syndrome[0x20];
4786
4787 u8 reserved_at_40[0xa0];
4788
4789 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4790};
4791
4792struct mlx5_ifc_query_encap_header_in_bits {
4793 u8 opcode[0x10];
4794 u8 reserved_at_10[0x10];
4795
4796 u8 reserved_at_20[0x10];
4797 u8 op_mod[0x10];
4798
4799 u8 encap_id[0x20];
4800
4801 u8 reserved_at_60[0xa0];
4802};
4803
4804struct mlx5_ifc_alloc_encap_header_out_bits {
4805 u8 status[0x8];
4806 u8 reserved_at_8[0x18];
4807
4808 u8 syndrome[0x20];
4809
4810 u8 encap_id[0x20];
4811
4812 u8 reserved_at_60[0x20];
4813};
4814
4815struct mlx5_ifc_alloc_encap_header_in_bits {
4816 u8 opcode[0x10];
4817 u8 reserved_at_10[0x10];
4818
4819 u8 reserved_at_20[0x10];
4820 u8 op_mod[0x10];
4821
4822 u8 reserved_at_40[0xa0];
4823
4824 struct mlx5_ifc_encap_header_in_bits encap_header;
4825};
4826
4827struct mlx5_ifc_dealloc_encap_header_out_bits {
4828 u8 status[0x8];
4829 u8 reserved_at_8[0x18];
4830
4831 u8 syndrome[0x20];
4832
4833 u8 reserved_at_40[0x40];
4834};
4835
4836struct mlx5_ifc_dealloc_encap_header_in_bits {
4837 u8 opcode[0x10];
4838 u8 reserved_at_10[0x10];
4839
4840 u8 reserved_20[0x10];
4841 u8 op_mod[0x10];
4842
4843 u8 encap_id[0x20];
4844
4845 u8 reserved_60[0x20];
4846};
4847
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004848struct mlx5_ifc_set_action_in_bits {
4849 u8 action_type[0x4];
4850 u8 field[0xc];
4851 u8 reserved_at_10[0x3];
4852 u8 offset[0x5];
4853 u8 reserved_at_18[0x3];
4854 u8 length[0x5];
4855
4856 u8 data[0x20];
4857};
4858
4859struct mlx5_ifc_add_action_in_bits {
4860 u8 action_type[0x4];
4861 u8 field[0xc];
4862 u8 reserved_at_10[0x10];
4863
4864 u8 data[0x20];
4865};
4866
4867union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4868 struct mlx5_ifc_set_action_in_bits set_action_in;
4869 struct mlx5_ifc_add_action_in_bits add_action_in;
4870 u8 reserved_at_0[0x40];
4871};
4872
4873enum {
4874 MLX5_ACTION_TYPE_SET = 0x1,
4875 MLX5_ACTION_TYPE_ADD = 0x2,
4876};
4877
4878enum {
4879 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4880 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4881 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4882 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4883 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4884 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4885 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4886 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4887 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4888 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4889 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4890 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4891 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4892 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4893 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4894 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4895 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4896 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4897 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4898 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4899 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4900 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004901 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004902};
4903
4904struct mlx5_ifc_alloc_modify_header_context_out_bits {
4905 u8 status[0x8];
4906 u8 reserved_at_8[0x18];
4907
4908 u8 syndrome[0x20];
4909
4910 u8 modify_header_id[0x20];
4911
4912 u8 reserved_at_60[0x20];
4913};
4914
4915struct mlx5_ifc_alloc_modify_header_context_in_bits {
4916 u8 opcode[0x10];
4917 u8 reserved_at_10[0x10];
4918
4919 u8 reserved_at_20[0x10];
4920 u8 op_mod[0x10];
4921
4922 u8 reserved_at_40[0x20];
4923
4924 u8 table_type[0x8];
4925 u8 reserved_at_68[0x10];
4926 u8 num_of_actions[0x8];
4927
4928 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4929};
4930
4931struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4932 u8 status[0x8];
4933 u8 reserved_at_8[0x18];
4934
4935 u8 syndrome[0x20];
4936
4937 u8 reserved_at_40[0x40];
4938};
4939
4940struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4941 u8 opcode[0x10];
4942 u8 reserved_at_10[0x10];
4943
4944 u8 reserved_at_20[0x10];
4945 u8 op_mod[0x10];
4946
4947 u8 modify_header_id[0x20];
4948
4949 u8 reserved_at_60[0x20];
4950};
4951
Saeed Mahameede2816822015-05-28 22:28:40 +03004952struct mlx5_ifc_query_dct_out_bits {
4953 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955
4956 u8 syndrome[0x20];
4957
Matan Barakb4ff3a32016-02-09 14:57:42 +02004958 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004959
4960 struct mlx5_ifc_dctc_bits dct_context_entry;
4961
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963};
4964
4965struct mlx5_ifc_query_dct_in_bits {
4966 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968
Matan Barakb4ff3a32016-02-09 14:57:42 +02004969 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004970 u8 op_mod[0x10];
4971
Matan Barakb4ff3a32016-02-09 14:57:42 +02004972 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004973 u8 dctn[0x18];
4974
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976};
4977
4978struct mlx5_ifc_query_cq_out_bits {
4979 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004980 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004981
4982 u8 syndrome[0x20];
4983
Matan Barakb4ff3a32016-02-09 14:57:42 +02004984 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004985
4986 struct mlx5_ifc_cqc_bits cq_context;
4987
Matan Barakb4ff3a32016-02-09 14:57:42 +02004988 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004989
4990 u8 pas[0][0x40];
4991};
4992
4993struct mlx5_ifc_query_cq_in_bits {
4994 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004995 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004996
Matan Barakb4ff3a32016-02-09 14:57:42 +02004997 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004998 u8 op_mod[0x10];
4999
Matan Barakb4ff3a32016-02-09 14:57:42 +02005000 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005001 u8 cqn[0x18];
5002
Matan Barakb4ff3a32016-02-09 14:57:42 +02005003 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005004};
5005
5006struct mlx5_ifc_query_cong_status_out_bits {
5007 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005008 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009
5010 u8 syndrome[0x20];
5011
Matan Barakb4ff3a32016-02-09 14:57:42 +02005012 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005013
5014 u8 enable[0x1];
5015 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005016 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005017};
5018
5019struct mlx5_ifc_query_cong_status_in_bits {
5020 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022
Matan Barakb4ff3a32016-02-09 14:57:42 +02005023 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024 u8 op_mod[0x10];
5025
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027 u8 priority[0x4];
5028 u8 cong_protocol[0x4];
5029
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005031};
5032
5033struct mlx5_ifc_query_cong_statistics_out_bits {
5034 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005035 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005036
5037 u8 syndrome[0x20];
5038
Matan Barakb4ff3a32016-02-09 14:57:42 +02005039 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005040
Parav Pandite1f24a72017-04-16 07:29:29 +03005041 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042
5043 u8 sum_flows[0x20];
5044
Parav Pandite1f24a72017-04-16 07:29:29 +03005045 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005046
Parav Pandite1f24a72017-04-16 07:29:29 +03005047 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005048
Parav Pandite1f24a72017-04-16 07:29:29 +03005049 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005050
Parav Pandite1f24a72017-04-16 07:29:29 +03005051 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052
Matan Barakb4ff3a32016-02-09 14:57:42 +02005053 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03005054
5055 u8 time_stamp_high[0x20];
5056
5057 u8 time_stamp_low[0x20];
5058
5059 u8 accumulators_period[0x20];
5060
Parav Pandite1f24a72017-04-16 07:29:29 +03005061 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005062
Parav Pandite1f24a72017-04-16 07:29:29 +03005063 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005064
Parav Pandite1f24a72017-04-16 07:29:29 +03005065 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005066
Parav Pandite1f24a72017-04-16 07:29:29 +03005067 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068
Matan Barakb4ff3a32016-02-09 14:57:42 +02005069 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03005070};
5071
5072struct mlx5_ifc_query_cong_statistics_in_bits {
5073 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005074 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005075
Matan Barakb4ff3a32016-02-09 14:57:42 +02005076 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005077 u8 op_mod[0x10];
5078
5079 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005080 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03005081
Matan Barakb4ff3a32016-02-09 14:57:42 +02005082 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005083};
5084
5085struct mlx5_ifc_query_cong_params_out_bits {
5086 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005087 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005088
5089 u8 syndrome[0x20];
5090
Matan Barakb4ff3a32016-02-09 14:57:42 +02005091 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005092
5093 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5094};
5095
5096struct mlx5_ifc_query_cong_params_in_bits {
5097 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005098 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005099
Matan Barakb4ff3a32016-02-09 14:57:42 +02005100 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005101 u8 op_mod[0x10];
5102
Matan Barakb4ff3a32016-02-09 14:57:42 +02005103 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005104 u8 cong_protocol[0x4];
5105
Matan Barakb4ff3a32016-02-09 14:57:42 +02005106 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005107};
5108
5109struct mlx5_ifc_query_adapter_out_bits {
5110 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005111 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005112
5113 u8 syndrome[0x20];
5114
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116
5117 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5118};
5119
5120struct mlx5_ifc_query_adapter_in_bits {
5121 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005123
Matan Barakb4ff3a32016-02-09 14:57:42 +02005124 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005125 u8 op_mod[0x10];
5126
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128};
5129
5130struct mlx5_ifc_qp_2rst_out_bits {
5131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133
5134 u8 syndrome[0x20];
5135
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137};
5138
5139struct mlx5_ifc_qp_2rst_in_bits {
5140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144 u8 op_mod[0x10];
5145
Matan Barakb4ff3a32016-02-09 14:57:42 +02005146 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005147 u8 qpn[0x18];
5148
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150};
5151
5152struct mlx5_ifc_qp_2err_out_bits {
5153 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005154 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005155
5156 u8 syndrome[0x20];
5157
Matan Barakb4ff3a32016-02-09 14:57:42 +02005158 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005159};
5160
5161struct mlx5_ifc_qp_2err_in_bits {
5162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005164
Matan Barakb4ff3a32016-02-09 14:57:42 +02005165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005166 u8 op_mod[0x10];
5167
Matan Barakb4ff3a32016-02-09 14:57:42 +02005168 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005169 u8 qpn[0x18];
5170
Matan Barakb4ff3a32016-02-09 14:57:42 +02005171 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005172};
5173
5174struct mlx5_ifc_page_fault_resume_out_bits {
5175 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005176 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005177
5178 u8 syndrome[0x20];
5179
Matan Barakb4ff3a32016-02-09 14:57:42 +02005180 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005181};
5182
5183struct mlx5_ifc_page_fault_resume_in_bits {
5184 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005185 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005186
Matan Barakb4ff3a32016-02-09 14:57:42 +02005187 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005188 u8 op_mod[0x10];
5189
5190 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005191 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005192 u8 page_fault_type[0x3];
5193 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005194
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005195 u8 reserved_at_60[0x8];
5196 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005197};
5198
5199struct mlx5_ifc_nop_out_bits {
5200 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005201 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005202
5203 u8 syndrome[0x20];
5204
Matan Barakb4ff3a32016-02-09 14:57:42 +02005205 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005206};
5207
5208struct mlx5_ifc_nop_in_bits {
5209 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005211
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005213 u8 op_mod[0x10];
5214
Matan Barakb4ff3a32016-02-09 14:57:42 +02005215 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005216};
5217
5218struct mlx5_ifc_modify_vport_state_out_bits {
5219 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005220 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005221
5222 u8 syndrome[0x20];
5223
Matan Barakb4ff3a32016-02-09 14:57:42 +02005224 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005225};
5226
5227struct mlx5_ifc_modify_vport_state_in_bits {
5228 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005229 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005230
Matan Barakb4ff3a32016-02-09 14:57:42 +02005231 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005232 u8 op_mod[0x10];
5233
5234 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005235 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005236 u8 vport_number[0x10];
5237
Matan Barakb4ff3a32016-02-09 14:57:42 +02005238 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005239 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005240 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005241};
5242
5243struct mlx5_ifc_modify_tis_out_bits {
5244 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005245 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005246
5247 u8 syndrome[0x20];
5248
Matan Barakb4ff3a32016-02-09 14:57:42 +02005249 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005250};
5251
majd@mellanox.com75850d02016-01-14 19:13:06 +02005252struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005253 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005254
Aviv Heller84df61e2016-05-10 13:47:50 +03005255 u8 reserved_at_20[0x1d];
5256 u8 lag_tx_port_affinity[0x1];
5257 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005258 u8 prio[0x1];
5259};
5260
Saeed Mahameede2816822015-05-28 22:28:40 +03005261struct mlx5_ifc_modify_tis_in_bits {
5262 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005263 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005264
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266 u8 op_mod[0x10];
5267
Matan Barakb4ff3a32016-02-09 14:57:42 +02005268 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005269 u8 tisn[0x18];
5270
Matan Barakb4ff3a32016-02-09 14:57:42 +02005271 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005272
majd@mellanox.com75850d02016-01-14 19:13:06 +02005273 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005274
Matan Barakb4ff3a32016-02-09 14:57:42 +02005275 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005276
5277 struct mlx5_ifc_tisc_bits ctx;
5278};
5279
Achiad Shochatd9eea402015-08-04 14:05:42 +03005280struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005281 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005282
Matan Barakb4ff3a32016-02-09 14:57:42 +02005283 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005284 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005285 u8 reserved_at_3c[0x1];
5286 u8 hash[0x1];
5287 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005288 u8 lro[0x1];
5289};
5290
Saeed Mahameede2816822015-05-28 22:28:40 +03005291struct mlx5_ifc_modify_tir_out_bits {
5292 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005293 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005294
5295 u8 syndrome[0x20];
5296
Matan Barakb4ff3a32016-02-09 14:57:42 +02005297 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005298};
5299
5300struct mlx5_ifc_modify_tir_in_bits {
5301 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005302 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005303
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005305 u8 op_mod[0x10];
5306
Matan Barakb4ff3a32016-02-09 14:57:42 +02005307 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005308 u8 tirn[0x18];
5309
Matan Barakb4ff3a32016-02-09 14:57:42 +02005310 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005311
Achiad Shochatd9eea402015-08-04 14:05:42 +03005312 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005313
Matan Barakb4ff3a32016-02-09 14:57:42 +02005314 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005315
5316 struct mlx5_ifc_tirc_bits ctx;
5317};
5318
5319struct mlx5_ifc_modify_sq_out_bits {
5320 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005321 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005322
5323 u8 syndrome[0x20];
5324
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005326};
5327
5328struct mlx5_ifc_modify_sq_in_bits {
5329 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331
Matan Barakb4ff3a32016-02-09 14:57:42 +02005332 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005333 u8 op_mod[0x10];
5334
5335 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005336 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005337 u8 sqn[0x18];
5338
Matan Barakb4ff3a32016-02-09 14:57:42 +02005339 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005340
5341 u8 modify_bitmask[0x40];
5342
Matan Barakb4ff3a32016-02-09 14:57:42 +02005343 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005344
5345 struct mlx5_ifc_sqc_bits ctx;
5346};
5347
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005348struct mlx5_ifc_modify_scheduling_element_out_bits {
5349 u8 status[0x8];
5350 u8 reserved_at_8[0x18];
5351
5352 u8 syndrome[0x20];
5353
5354 u8 reserved_at_40[0x1c0];
5355};
5356
5357enum {
5358 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5359 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5360};
5361
5362struct mlx5_ifc_modify_scheduling_element_in_bits {
5363 u8 opcode[0x10];
5364 u8 reserved_at_10[0x10];
5365
5366 u8 reserved_at_20[0x10];
5367 u8 op_mod[0x10];
5368
5369 u8 scheduling_hierarchy[0x8];
5370 u8 reserved_at_48[0x18];
5371
5372 u8 scheduling_element_id[0x20];
5373
5374 u8 reserved_at_80[0x20];
5375
5376 u8 modify_bitmask[0x20];
5377
5378 u8 reserved_at_c0[0x40];
5379
5380 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5381
5382 u8 reserved_at_300[0x100];
5383};
5384
Saeed Mahameede2816822015-05-28 22:28:40 +03005385struct mlx5_ifc_modify_rqt_out_bits {
5386 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005387 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005388
5389 u8 syndrome[0x20];
5390
Matan Barakb4ff3a32016-02-09 14:57:42 +02005391 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005392};
5393
Achiad Shochat5c503682015-08-04 14:05:43 +03005394struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005395 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005396
Matan Barakb4ff3a32016-02-09 14:57:42 +02005397 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005398 u8 rqn_list[0x1];
5399};
5400
Saeed Mahameede2816822015-05-28 22:28:40 +03005401struct mlx5_ifc_modify_rqt_in_bits {
5402 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005403 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005404
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406 u8 op_mod[0x10];
5407
Matan Barakb4ff3a32016-02-09 14:57:42 +02005408 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005409 u8 rqtn[0x18];
5410
Matan Barakb4ff3a32016-02-09 14:57:42 +02005411 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005412
Achiad Shochat5c503682015-08-04 14:05:43 +03005413 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005414
Matan Barakb4ff3a32016-02-09 14:57:42 +02005415 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005416
5417 struct mlx5_ifc_rqtc_bits ctx;
5418};
5419
5420struct mlx5_ifc_modify_rq_out_bits {
5421 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005422 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005423
5424 u8 syndrome[0x20];
5425
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427};
5428
Alex Vesker83b502a2016-08-04 17:32:02 +03005429enum {
5430 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005431 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005432 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005433};
5434
Saeed Mahameede2816822015-05-28 22:28:40 +03005435struct mlx5_ifc_modify_rq_in_bits {
5436 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005437 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005438
Matan Barakb4ff3a32016-02-09 14:57:42 +02005439 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005440 u8 op_mod[0x10];
5441
5442 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005443 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005444 u8 rqn[0x18];
5445
Matan Barakb4ff3a32016-02-09 14:57:42 +02005446 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005447
5448 u8 modify_bitmask[0x40];
5449
Matan Barakb4ff3a32016-02-09 14:57:42 +02005450 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005451
5452 struct mlx5_ifc_rqc_bits ctx;
5453};
5454
5455struct mlx5_ifc_modify_rmp_out_bits {
5456 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005457 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005458
5459 u8 syndrome[0x20];
5460
Matan Barakb4ff3a32016-02-09 14:57:42 +02005461 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005462};
5463
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005464struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005466
Matan Barakb4ff3a32016-02-09 14:57:42 +02005467 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005468 u8 lwm[0x1];
5469};
5470
Saeed Mahameede2816822015-05-28 22:28:40 +03005471struct mlx5_ifc_modify_rmp_in_bits {
5472 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005473 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005474
Matan Barakb4ff3a32016-02-09 14:57:42 +02005475 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005476 u8 op_mod[0x10];
5477
5478 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005479 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005480 u8 rmpn[0x18];
5481
Matan Barakb4ff3a32016-02-09 14:57:42 +02005482 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005483
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005484 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005485
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487
5488 struct mlx5_ifc_rmpc_bits ctx;
5489};
5490
5491struct mlx5_ifc_modify_nic_vport_context_out_bits {
5492 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494
5495 u8 syndrome[0x20];
5496
Matan Barakb4ff3a32016-02-09 14:57:42 +02005497 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005498};
5499
5500struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005501 u8 reserved_at_0[0x12];
5502 u8 affiliation[0x1];
5503 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005504 u8 disable_uc_local_lb[0x1];
5505 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005506 u8 node_guid[0x1];
5507 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005508 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005509 u8 mtu[0x1];
5510 u8 change_event[0x1];
5511 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512 u8 permanent_address[0x1];
5513 u8 addresses_list[0x1];
5514 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005515 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005516};
5517
5518struct mlx5_ifc_modify_nic_vport_context_in_bits {
5519 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005520 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005521
Matan Barakb4ff3a32016-02-09 14:57:42 +02005522 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005523 u8 op_mod[0x10];
5524
5525 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005526 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005527 u8 vport_number[0x10];
5528
5529 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5530
Matan Barakb4ff3a32016-02-09 14:57:42 +02005531 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005532
5533 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5534};
5535
5536struct mlx5_ifc_modify_hca_vport_context_out_bits {
5537 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539
5540 u8 syndrome[0x20];
5541
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543};
5544
5545struct mlx5_ifc_modify_hca_vport_context_in_bits {
5546 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005547 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005548
Matan Barakb4ff3a32016-02-09 14:57:42 +02005549 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005550 u8 op_mod[0x10];
5551
5552 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005554 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555 u8 vport_number[0x10];
5556
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558
5559 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5560};
5561
5562struct mlx5_ifc_modify_cq_out_bits {
5563 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005564 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005565
5566 u8 syndrome[0x20];
5567
Matan Barakb4ff3a32016-02-09 14:57:42 +02005568 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005569};
5570
5571enum {
5572 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5573 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5574};
5575
5576struct mlx5_ifc_modify_cq_in_bits {
5577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005579
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581 u8 op_mod[0x10];
5582
Matan Barakb4ff3a32016-02-09 14:57:42 +02005583 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005584 u8 cqn[0x18];
5585
5586 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5587
5588 struct mlx5_ifc_cqc_bits cq_context;
5589
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591
5592 u8 pas[0][0x40];
5593};
5594
5595struct mlx5_ifc_modify_cong_status_out_bits {
5596 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005597 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005598
5599 u8 syndrome[0x20];
5600
Matan Barakb4ff3a32016-02-09 14:57:42 +02005601 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005602};
5603
5604struct mlx5_ifc_modify_cong_status_in_bits {
5605 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005606 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005607
Matan Barakb4ff3a32016-02-09 14:57:42 +02005608 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005609 u8 op_mod[0x10];
5610
Matan Barakb4ff3a32016-02-09 14:57:42 +02005611 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005612 u8 priority[0x4];
5613 u8 cong_protocol[0x4];
5614
5615 u8 enable[0x1];
5616 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005617 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005618};
5619
5620struct mlx5_ifc_modify_cong_params_out_bits {
5621 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005622 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005623
5624 u8 syndrome[0x20];
5625
Matan Barakb4ff3a32016-02-09 14:57:42 +02005626 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005627};
5628
5629struct mlx5_ifc_modify_cong_params_in_bits {
5630 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005631 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005632
Matan Barakb4ff3a32016-02-09 14:57:42 +02005633 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005634 u8 op_mod[0x10];
5635
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637 u8 cong_protocol[0x4];
5638
5639 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5640
Matan Barakb4ff3a32016-02-09 14:57:42 +02005641 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005642
5643 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5644};
5645
5646struct mlx5_ifc_manage_pages_out_bits {
5647 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005648 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005649
5650 u8 syndrome[0x20];
5651
5652 u8 output_num_entries[0x20];
5653
Matan Barakb4ff3a32016-02-09 14:57:42 +02005654 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005655
5656 u8 pas[0][0x40];
5657};
5658
5659enum {
5660 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5661 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5662 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5663};
5664
5665struct mlx5_ifc_manage_pages_in_bits {
5666 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668
Matan Barakb4ff3a32016-02-09 14:57:42 +02005669 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005670 u8 op_mod[0x10];
5671
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673 u8 function_id[0x10];
5674
5675 u8 input_num_entries[0x20];
5676
5677 u8 pas[0][0x40];
5678};
5679
5680struct mlx5_ifc_mad_ifc_out_bits {
5681 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683
5684 u8 syndrome[0x20];
5685
Matan Barakb4ff3a32016-02-09 14:57:42 +02005686 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005687
5688 u8 response_mad_packet[256][0x8];
5689};
5690
5691struct mlx5_ifc_mad_ifc_in_bits {
5692 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005693 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005694
Matan Barakb4ff3a32016-02-09 14:57:42 +02005695 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005696 u8 op_mod[0x10];
5697
5698 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700 u8 port[0x8];
5701
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703
5704 u8 mad[256][0x8];
5705};
5706
5707struct mlx5_ifc_init_hca_out_bits {
5708 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005709 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005710
5711 u8 syndrome[0x20];
5712
Matan Barakb4ff3a32016-02-09 14:57:42 +02005713 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005714};
5715
5716struct mlx5_ifc_init_hca_in_bits {
5717 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005718 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005719
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721 u8 op_mod[0x10];
5722
Matan Barakb4ff3a32016-02-09 14:57:42 +02005723 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005724 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005725};
5726
5727struct mlx5_ifc_init2rtr_qp_out_bits {
5728 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005729 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005730
5731 u8 syndrome[0x20];
5732
Matan Barakb4ff3a32016-02-09 14:57:42 +02005733 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005734};
5735
5736struct mlx5_ifc_init2rtr_qp_in_bits {
5737 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741 u8 op_mod[0x10];
5742
Matan Barakb4ff3a32016-02-09 14:57:42 +02005743 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005744 u8 qpn[0x18];
5745
Matan Barakb4ff3a32016-02-09 14:57:42 +02005746 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005747
5748 u8 opt_param_mask[0x20];
5749
Matan Barakb4ff3a32016-02-09 14:57:42 +02005750 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005751
5752 struct mlx5_ifc_qpc_bits qpc;
5753
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755};
5756
5757struct mlx5_ifc_init2init_qp_out_bits {
5758 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005759 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005760
5761 u8 syndrome[0x20];
5762
Matan Barakb4ff3a32016-02-09 14:57:42 +02005763 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005764};
5765
5766struct mlx5_ifc_init2init_qp_in_bits {
5767 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005768 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005769
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771 u8 op_mod[0x10];
5772
Matan Barakb4ff3a32016-02-09 14:57:42 +02005773 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005774 u8 qpn[0x18];
5775
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777
5778 u8 opt_param_mask[0x20];
5779
Matan Barakb4ff3a32016-02-09 14:57:42 +02005780 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005781
5782 struct mlx5_ifc_qpc_bits qpc;
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785};
5786
5787struct mlx5_ifc_get_dropped_packet_log_out_bits {
5788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005790
5791 u8 syndrome[0x20];
5792
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794
5795 u8 packet_headers_log[128][0x8];
5796
5797 u8 packet_syndrome[64][0x8];
5798};
5799
5800struct mlx5_ifc_get_dropped_packet_log_in_bits {
5801 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005802 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005803
Matan Barakb4ff3a32016-02-09 14:57:42 +02005804 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005805 u8 op_mod[0x10];
5806
Matan Barakb4ff3a32016-02-09 14:57:42 +02005807 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005808};
5809
5810struct mlx5_ifc_gen_eqe_in_bits {
5811 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005812 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005813
Matan Barakb4ff3a32016-02-09 14:57:42 +02005814 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005815 u8 op_mod[0x10];
5816
Matan Barakb4ff3a32016-02-09 14:57:42 +02005817 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005818 u8 eq_number[0x8];
5819
Matan Barakb4ff3a32016-02-09 14:57:42 +02005820 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005821
5822 u8 eqe[64][0x8];
5823};
5824
5825struct mlx5_ifc_gen_eq_out_bits {
5826 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005827 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005828
5829 u8 syndrome[0x20];
5830
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832};
5833
5834struct mlx5_ifc_enable_hca_out_bits {
5835 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005836 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005837
5838 u8 syndrome[0x20];
5839
Matan Barakb4ff3a32016-02-09 14:57:42 +02005840 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005841};
5842
5843struct mlx5_ifc_enable_hca_in_bits {
5844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005846
Matan Barakb4ff3a32016-02-09 14:57:42 +02005847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005848 u8 op_mod[0x10];
5849
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851 u8 function_id[0x10];
5852
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854};
5855
5856struct mlx5_ifc_drain_dct_out_bits {
5857 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005858 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005859
5860 u8 syndrome[0x20];
5861
Matan Barakb4ff3a32016-02-09 14:57:42 +02005862 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005863};
5864
5865struct mlx5_ifc_drain_dct_in_bits {
5866 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005867 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005868
Matan Barakb4ff3a32016-02-09 14:57:42 +02005869 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005870 u8 op_mod[0x10];
5871
Matan Barakb4ff3a32016-02-09 14:57:42 +02005872 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005873 u8 dctn[0x18];
5874
Matan Barakb4ff3a32016-02-09 14:57:42 +02005875 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005876};
5877
5878struct mlx5_ifc_disable_hca_out_bits {
5879 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005880 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005881
5882 u8 syndrome[0x20];
5883
Matan Barakb4ff3a32016-02-09 14:57:42 +02005884 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005885};
5886
5887struct mlx5_ifc_disable_hca_in_bits {
5888 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005889 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005890
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892 u8 op_mod[0x10];
5893
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895 u8 function_id[0x10];
5896
Matan Barakb4ff3a32016-02-09 14:57:42 +02005897 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005898};
5899
5900struct mlx5_ifc_detach_from_mcg_out_bits {
5901 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005902 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005903
5904 u8 syndrome[0x20];
5905
Matan Barakb4ff3a32016-02-09 14:57:42 +02005906 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005907};
5908
5909struct mlx5_ifc_detach_from_mcg_in_bits {
5910 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005911 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005912
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914 u8 op_mod[0x10];
5915
Matan Barakb4ff3a32016-02-09 14:57:42 +02005916 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005917 u8 qpn[0x18];
5918
Matan Barakb4ff3a32016-02-09 14:57:42 +02005919 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005920
5921 u8 multicast_gid[16][0x8];
5922};
5923
Saeed Mahameed74862162016-06-09 15:11:34 +03005924struct mlx5_ifc_destroy_xrq_out_bits {
5925 u8 status[0x8];
5926 u8 reserved_at_8[0x18];
5927
5928 u8 syndrome[0x20];
5929
5930 u8 reserved_at_40[0x40];
5931};
5932
5933struct mlx5_ifc_destroy_xrq_in_bits {
5934 u8 opcode[0x10];
5935 u8 reserved_at_10[0x10];
5936
5937 u8 reserved_at_20[0x10];
5938 u8 op_mod[0x10];
5939
5940 u8 reserved_at_40[0x8];
5941 u8 xrqn[0x18];
5942
5943 u8 reserved_at_60[0x20];
5944};
5945
Saeed Mahameede2816822015-05-28 22:28:40 +03005946struct mlx5_ifc_destroy_xrc_srq_out_bits {
5947 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005948 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005949
5950 u8 syndrome[0x20];
5951
Matan Barakb4ff3a32016-02-09 14:57:42 +02005952 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005953};
5954
5955struct mlx5_ifc_destroy_xrc_srq_in_bits {
5956 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958
Matan Barakb4ff3a32016-02-09 14:57:42 +02005959 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005960 u8 op_mod[0x10];
5961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963 u8 xrc_srqn[0x18];
5964
Matan Barakb4ff3a32016-02-09 14:57:42 +02005965 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966};
5967
5968struct mlx5_ifc_destroy_tis_out_bits {
5969 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971
5972 u8 syndrome[0x20];
5973
Matan Barakb4ff3a32016-02-09 14:57:42 +02005974 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005975};
5976
5977struct mlx5_ifc_destroy_tis_in_bits {
5978 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980
Matan Barakb4ff3a32016-02-09 14:57:42 +02005981 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005982 u8 op_mod[0x10];
5983
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985 u8 tisn[0x18];
5986
Matan Barakb4ff3a32016-02-09 14:57:42 +02005987 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005988};
5989
5990struct mlx5_ifc_destroy_tir_out_bits {
5991 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993
5994 u8 syndrome[0x20];
5995
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997};
5998
5999struct mlx5_ifc_destroy_tir_in_bits {
6000 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002
Matan Barakb4ff3a32016-02-09 14:57:42 +02006003 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006004 u8 op_mod[0x10];
6005
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007 u8 tirn[0x18];
6008
Matan Barakb4ff3a32016-02-09 14:57:42 +02006009 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006010};
6011
6012struct mlx5_ifc_destroy_srq_out_bits {
6013 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006014 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006015
6016 u8 syndrome[0x20];
6017
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019};
6020
6021struct mlx5_ifc_destroy_srq_in_bits {
6022 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024
Matan Barakb4ff3a32016-02-09 14:57:42 +02006025 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006026 u8 op_mod[0x10];
6027
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029 u8 srqn[0x18];
6030
Matan Barakb4ff3a32016-02-09 14:57:42 +02006031 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006032};
6033
6034struct mlx5_ifc_destroy_sq_out_bits {
6035 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006036 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006037
6038 u8 syndrome[0x20];
6039
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041};
6042
6043struct mlx5_ifc_destroy_sq_in_bits {
6044 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046
Matan Barakb4ff3a32016-02-09 14:57:42 +02006047 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006048 u8 op_mod[0x10];
6049
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051 u8 sqn[0x18];
6052
Matan Barakb4ff3a32016-02-09 14:57:42 +02006053 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006054};
6055
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006056struct mlx5_ifc_destroy_scheduling_element_out_bits {
6057 u8 status[0x8];
6058 u8 reserved_at_8[0x18];
6059
6060 u8 syndrome[0x20];
6061
6062 u8 reserved_at_40[0x1c0];
6063};
6064
6065struct mlx5_ifc_destroy_scheduling_element_in_bits {
6066 u8 opcode[0x10];
6067 u8 reserved_at_10[0x10];
6068
6069 u8 reserved_at_20[0x10];
6070 u8 op_mod[0x10];
6071
6072 u8 scheduling_hierarchy[0x8];
6073 u8 reserved_at_48[0x18];
6074
6075 u8 scheduling_element_id[0x20];
6076
6077 u8 reserved_at_80[0x180];
6078};
6079
Saeed Mahameede2816822015-05-28 22:28:40 +03006080struct mlx5_ifc_destroy_rqt_out_bits {
6081 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083
6084 u8 syndrome[0x20];
6085
Matan Barakb4ff3a32016-02-09 14:57:42 +02006086 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006087};
6088
6089struct mlx5_ifc_destroy_rqt_in_bits {
6090 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006091 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006092
Matan Barakb4ff3a32016-02-09 14:57:42 +02006093 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094 u8 op_mod[0x10];
6095
Matan Barakb4ff3a32016-02-09 14:57:42 +02006096 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097 u8 rqtn[0x18];
6098
Matan Barakb4ff3a32016-02-09 14:57:42 +02006099 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006100};
6101
6102struct mlx5_ifc_destroy_rq_out_bits {
6103 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006104 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006105
6106 u8 syndrome[0x20];
6107
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109};
6110
6111struct mlx5_ifc_destroy_rq_in_bits {
6112 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006113 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006114
Matan Barakb4ff3a32016-02-09 14:57:42 +02006115 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006116 u8 op_mod[0x10];
6117
Matan Barakb4ff3a32016-02-09 14:57:42 +02006118 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006119 u8 rqn[0x18];
6120
Matan Barakb4ff3a32016-02-09 14:57:42 +02006121 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122};
6123
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006124struct mlx5_ifc_set_delay_drop_params_in_bits {
6125 u8 opcode[0x10];
6126 u8 reserved_at_10[0x10];
6127
6128 u8 reserved_at_20[0x10];
6129 u8 op_mod[0x10];
6130
6131 u8 reserved_at_40[0x20];
6132
6133 u8 reserved_at_60[0x10];
6134 u8 delay_drop_timeout[0x10];
6135};
6136
6137struct mlx5_ifc_set_delay_drop_params_out_bits {
6138 u8 status[0x8];
6139 u8 reserved_at_8[0x18];
6140
6141 u8 syndrome[0x20];
6142
6143 u8 reserved_at_40[0x40];
6144};
6145
Saeed Mahameede2816822015-05-28 22:28:40 +03006146struct mlx5_ifc_destroy_rmp_out_bits {
6147 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006148 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006149
6150 u8 syndrome[0x20];
6151
Matan Barakb4ff3a32016-02-09 14:57:42 +02006152 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006153};
6154
6155struct mlx5_ifc_destroy_rmp_in_bits {
6156 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158
Matan Barakb4ff3a32016-02-09 14:57:42 +02006159 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006160 u8 op_mod[0x10];
6161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163 u8 rmpn[0x18];
6164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166};
6167
6168struct mlx5_ifc_destroy_qp_out_bits {
6169 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006170 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171
6172 u8 syndrome[0x20];
6173
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175};
6176
6177struct mlx5_ifc_destroy_qp_in_bits {
6178 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006179 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006180
Matan Barakb4ff3a32016-02-09 14:57:42 +02006181 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006182 u8 op_mod[0x10];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185 u8 qpn[0x18];
6186
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188};
6189
6190struct mlx5_ifc_destroy_psv_out_bits {
6191 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006192 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006193
6194 u8 syndrome[0x20];
6195
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197};
6198
6199struct mlx5_ifc_destroy_psv_in_bits {
6200 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204 u8 op_mod[0x10];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207 u8 psvn[0x18];
6208
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210};
6211
6212struct mlx5_ifc_destroy_mkey_out_bits {
6213 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006214 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006215
6216 u8 syndrome[0x20];
6217
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219};
6220
6221struct mlx5_ifc_destroy_mkey_in_bits {
6222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006224
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226 u8 op_mod[0x10];
6227
Matan Barakb4ff3a32016-02-09 14:57:42 +02006228 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229 u8 mkey_index[0x18];
6230
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232};
6233
6234struct mlx5_ifc_destroy_flow_table_out_bits {
6235 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006236 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006237
6238 u8 syndrome[0x20];
6239
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241};
6242
6243struct mlx5_ifc_destroy_flow_table_in_bits {
6244 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006245 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006246
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248 u8 op_mod[0x10];
6249
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006250 u8 other_vport[0x1];
6251 u8 reserved_at_41[0xf];
6252 u8 vport_number[0x10];
6253
6254 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006255
6256 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258
Matan Barakb4ff3a32016-02-09 14:57:42 +02006259 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006260 u8 table_id[0x18];
6261
Matan Barakb4ff3a32016-02-09 14:57:42 +02006262 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006263};
6264
6265struct mlx5_ifc_destroy_flow_group_out_bits {
6266 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006267 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006268
6269 u8 syndrome[0x20];
6270
Matan Barakb4ff3a32016-02-09 14:57:42 +02006271 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006272};
6273
6274struct mlx5_ifc_destroy_flow_group_in_bits {
6275 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006276 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006277
Matan Barakb4ff3a32016-02-09 14:57:42 +02006278 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006279 u8 op_mod[0x10];
6280
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006281 u8 other_vport[0x1];
6282 u8 reserved_at_41[0xf];
6283 u8 vport_number[0x10];
6284
6285 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006286
6287 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006288 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006289
Matan Barakb4ff3a32016-02-09 14:57:42 +02006290 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006291 u8 table_id[0x18];
6292
6293 u8 group_id[0x20];
6294
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296};
6297
6298struct mlx5_ifc_destroy_eq_out_bits {
6299 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301
6302 u8 syndrome[0x20];
6303
Matan Barakb4ff3a32016-02-09 14:57:42 +02006304 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006305};
6306
6307struct mlx5_ifc_destroy_eq_in_bits {
6308 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006309 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006310
Matan Barakb4ff3a32016-02-09 14:57:42 +02006311 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006312 u8 op_mod[0x10];
6313
Matan Barakb4ff3a32016-02-09 14:57:42 +02006314 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006315 u8 eq_number[0x8];
6316
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318};
6319
6320struct mlx5_ifc_destroy_dct_out_bits {
6321 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323
6324 u8 syndrome[0x20];
6325
Matan Barakb4ff3a32016-02-09 14:57:42 +02006326 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006327};
6328
6329struct mlx5_ifc_destroy_dct_in_bits {
6330 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332
Matan Barakb4ff3a32016-02-09 14:57:42 +02006333 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006334 u8 op_mod[0x10];
6335
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337 u8 dctn[0x18];
6338
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340};
6341
6342struct mlx5_ifc_destroy_cq_out_bits {
6343 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006344 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006345
6346 u8 syndrome[0x20];
6347
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349};
6350
6351struct mlx5_ifc_destroy_cq_in_bits {
6352 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354
Matan Barakb4ff3a32016-02-09 14:57:42 +02006355 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006356 u8 op_mod[0x10];
6357
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359 u8 cqn[0x18];
6360
Matan Barakb4ff3a32016-02-09 14:57:42 +02006361 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006362};
6363
6364struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6365 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367
6368 u8 syndrome[0x20];
6369
Matan Barakb4ff3a32016-02-09 14:57:42 +02006370 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006371};
6372
6373struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6374 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006375 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006376
Matan Barakb4ff3a32016-02-09 14:57:42 +02006377 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006378 u8 op_mod[0x10];
6379
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383 u8 vxlan_udp_port[0x10];
6384};
6385
6386struct mlx5_ifc_delete_l2_table_entry_out_bits {
6387 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006388 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006389
6390 u8 syndrome[0x20];
6391
Matan Barakb4ff3a32016-02-09 14:57:42 +02006392 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006393};
6394
6395struct mlx5_ifc_delete_l2_table_entry_in_bits {
6396 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006397 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006398
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400 u8 op_mod[0x10];
6401
Matan Barakb4ff3a32016-02-09 14:57:42 +02006402 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006403
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405 u8 table_index[0x18];
6406
Matan Barakb4ff3a32016-02-09 14:57:42 +02006407 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006408};
6409
6410struct mlx5_ifc_delete_fte_out_bits {
6411 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006412 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006413
6414 u8 syndrome[0x20];
6415
Matan Barakb4ff3a32016-02-09 14:57:42 +02006416 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006417};
6418
6419struct mlx5_ifc_delete_fte_in_bits {
6420 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006421 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006422
Matan Barakb4ff3a32016-02-09 14:57:42 +02006423 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006424 u8 op_mod[0x10];
6425
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006426 u8 other_vport[0x1];
6427 u8 reserved_at_41[0xf];
6428 u8 vport_number[0x10];
6429
6430 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006431
6432 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434
Matan Barakb4ff3a32016-02-09 14:57:42 +02006435 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006436 u8 table_id[0x18];
6437
Matan Barakb4ff3a32016-02-09 14:57:42 +02006438 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006439
6440 u8 flow_index[0x20];
6441
Matan Barakb4ff3a32016-02-09 14:57:42 +02006442 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006443};
6444
6445struct mlx5_ifc_dealloc_xrcd_out_bits {
6446 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006447 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006448
6449 u8 syndrome[0x20];
6450
Matan Barakb4ff3a32016-02-09 14:57:42 +02006451 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006452};
6453
6454struct mlx5_ifc_dealloc_xrcd_in_bits {
6455 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006456 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006457
Matan Barakb4ff3a32016-02-09 14:57:42 +02006458 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006459 u8 op_mod[0x10];
6460
Matan Barakb4ff3a32016-02-09 14:57:42 +02006461 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006462 u8 xrcd[0x18];
6463
Matan Barakb4ff3a32016-02-09 14:57:42 +02006464 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006465};
6466
6467struct mlx5_ifc_dealloc_uar_out_bits {
6468 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470
6471 u8 syndrome[0x20];
6472
Matan Barakb4ff3a32016-02-09 14:57:42 +02006473 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006474};
6475
6476struct mlx5_ifc_dealloc_uar_in_bits {
6477 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479
Matan Barakb4ff3a32016-02-09 14:57:42 +02006480 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006481 u8 op_mod[0x10];
6482
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484 u8 uar[0x18];
6485
Matan Barakb4ff3a32016-02-09 14:57:42 +02006486 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006487};
6488
6489struct mlx5_ifc_dealloc_transport_domain_out_bits {
6490 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006491 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006492
6493 u8 syndrome[0x20];
6494
Matan Barakb4ff3a32016-02-09 14:57:42 +02006495 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006496};
6497
6498struct mlx5_ifc_dealloc_transport_domain_in_bits {
6499 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006500 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503 u8 op_mod[0x10];
6504
Matan Barakb4ff3a32016-02-09 14:57:42 +02006505 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006506 u8 transport_domain[0x18];
6507
Matan Barakb4ff3a32016-02-09 14:57:42 +02006508 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006509};
6510
6511struct mlx5_ifc_dealloc_q_counter_out_bits {
6512 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514
6515 u8 syndrome[0x20];
6516
Matan Barakb4ff3a32016-02-09 14:57:42 +02006517 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006518};
6519
6520struct mlx5_ifc_dealloc_q_counter_in_bits {
6521 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006522 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006523
Matan Barakb4ff3a32016-02-09 14:57:42 +02006524 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006525 u8 op_mod[0x10];
6526
Matan Barakb4ff3a32016-02-09 14:57:42 +02006527 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006528 u8 counter_set_id[0x8];
6529
Matan Barakb4ff3a32016-02-09 14:57:42 +02006530 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006531};
6532
6533struct mlx5_ifc_dealloc_pd_out_bits {
6534 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006535 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006536
6537 u8 syndrome[0x20];
6538
Matan Barakb4ff3a32016-02-09 14:57:42 +02006539 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006540};
6541
6542struct mlx5_ifc_dealloc_pd_in_bits {
6543 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006544 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006545
Matan Barakb4ff3a32016-02-09 14:57:42 +02006546 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006547 u8 op_mod[0x10];
6548
Matan Barakb4ff3a32016-02-09 14:57:42 +02006549 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006550 u8 pd[0x18];
6551
Matan Barakb4ff3a32016-02-09 14:57:42 +02006552 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006553};
6554
Amir Vadai9dc0b282016-05-13 12:55:39 +00006555struct mlx5_ifc_dealloc_flow_counter_out_bits {
6556 u8 status[0x8];
6557 u8 reserved_at_8[0x18];
6558
6559 u8 syndrome[0x20];
6560
6561 u8 reserved_at_40[0x40];
6562};
6563
6564struct mlx5_ifc_dealloc_flow_counter_in_bits {
6565 u8 opcode[0x10];
6566 u8 reserved_at_10[0x10];
6567
6568 u8 reserved_at_20[0x10];
6569 u8 op_mod[0x10];
6570
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006571 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006572
6573 u8 reserved_at_60[0x20];
6574};
6575
Saeed Mahameed74862162016-06-09 15:11:34 +03006576struct mlx5_ifc_create_xrq_out_bits {
6577 u8 status[0x8];
6578 u8 reserved_at_8[0x18];
6579
6580 u8 syndrome[0x20];
6581
6582 u8 reserved_at_40[0x8];
6583 u8 xrqn[0x18];
6584
6585 u8 reserved_at_60[0x20];
6586};
6587
6588struct mlx5_ifc_create_xrq_in_bits {
6589 u8 opcode[0x10];
6590 u8 reserved_at_10[0x10];
6591
6592 u8 reserved_at_20[0x10];
6593 u8 op_mod[0x10];
6594
6595 u8 reserved_at_40[0x40];
6596
6597 struct mlx5_ifc_xrqc_bits xrq_context;
6598};
6599
Saeed Mahameede2816822015-05-28 22:28:40 +03006600struct mlx5_ifc_create_xrc_srq_out_bits {
6601 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006602 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006603
6604 u8 syndrome[0x20];
6605
Matan Barakb4ff3a32016-02-09 14:57:42 +02006606 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006607 u8 xrc_srqn[0x18];
6608
Matan Barakb4ff3a32016-02-09 14:57:42 +02006609 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006610};
6611
6612struct mlx5_ifc_create_xrc_srq_in_bits {
6613 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006614 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006615
Matan Barakb4ff3a32016-02-09 14:57:42 +02006616 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006617 u8 op_mod[0x10];
6618
Matan Barakb4ff3a32016-02-09 14:57:42 +02006619 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006620
6621 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6622
Matan Barakb4ff3a32016-02-09 14:57:42 +02006623 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006624
6625 u8 pas[0][0x40];
6626};
6627
6628struct mlx5_ifc_create_tis_out_bits {
6629 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006630 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006631
6632 u8 syndrome[0x20];
6633
Matan Barakb4ff3a32016-02-09 14:57:42 +02006634 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006635 u8 tisn[0x18];
6636
Matan Barakb4ff3a32016-02-09 14:57:42 +02006637 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006638};
6639
6640struct mlx5_ifc_create_tis_in_bits {
6641 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006642 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006643
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645 u8 op_mod[0x10];
6646
Matan Barakb4ff3a32016-02-09 14:57:42 +02006647 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006648
6649 struct mlx5_ifc_tisc_bits ctx;
6650};
6651
6652struct mlx5_ifc_create_tir_out_bits {
6653 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655
6656 u8 syndrome[0x20];
6657
Matan Barakb4ff3a32016-02-09 14:57:42 +02006658 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006659 u8 tirn[0x18];
6660
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662};
6663
6664struct mlx5_ifc_create_tir_in_bits {
6665 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006666 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006667
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669 u8 op_mod[0x10];
6670
Matan Barakb4ff3a32016-02-09 14:57:42 +02006671 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006672
6673 struct mlx5_ifc_tirc_bits ctx;
6674};
6675
6676struct mlx5_ifc_create_srq_out_bits {
6677 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679
6680 u8 syndrome[0x20];
6681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683 u8 srqn[0x18];
6684
Matan Barakb4ff3a32016-02-09 14:57:42 +02006685 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006686};
6687
6688struct mlx5_ifc_create_srq_in_bits {
6689 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006690 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006691
Matan Barakb4ff3a32016-02-09 14:57:42 +02006692 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006693 u8 op_mod[0x10];
6694
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696
6697 struct mlx5_ifc_srqc_bits srq_context_entry;
6698
Matan Barakb4ff3a32016-02-09 14:57:42 +02006699 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006700
6701 u8 pas[0][0x40];
6702};
6703
6704struct mlx5_ifc_create_sq_out_bits {
6705 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006706 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006707
6708 u8 syndrome[0x20];
6709
Matan Barakb4ff3a32016-02-09 14:57:42 +02006710 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006711 u8 sqn[0x18];
6712
Matan Barakb4ff3a32016-02-09 14:57:42 +02006713 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006714};
6715
6716struct mlx5_ifc_create_sq_in_bits {
6717 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006718 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006719
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721 u8 op_mod[0x10];
6722
Matan Barakb4ff3a32016-02-09 14:57:42 +02006723 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006724
6725 struct mlx5_ifc_sqc_bits ctx;
6726};
6727
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006728struct mlx5_ifc_create_scheduling_element_out_bits {
6729 u8 status[0x8];
6730 u8 reserved_at_8[0x18];
6731
6732 u8 syndrome[0x20];
6733
6734 u8 reserved_at_40[0x40];
6735
6736 u8 scheduling_element_id[0x20];
6737
6738 u8 reserved_at_a0[0x160];
6739};
6740
6741struct mlx5_ifc_create_scheduling_element_in_bits {
6742 u8 opcode[0x10];
6743 u8 reserved_at_10[0x10];
6744
6745 u8 reserved_at_20[0x10];
6746 u8 op_mod[0x10];
6747
6748 u8 scheduling_hierarchy[0x8];
6749 u8 reserved_at_48[0x18];
6750
6751 u8 reserved_at_60[0xa0];
6752
6753 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6754
6755 u8 reserved_at_300[0x100];
6756};
6757
Saeed Mahameede2816822015-05-28 22:28:40 +03006758struct mlx5_ifc_create_rqt_out_bits {
6759 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006760 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006761
6762 u8 syndrome[0x20];
6763
Matan Barakb4ff3a32016-02-09 14:57:42 +02006764 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006765 u8 rqtn[0x18];
6766
Matan Barakb4ff3a32016-02-09 14:57:42 +02006767 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006768};
6769
6770struct mlx5_ifc_create_rqt_in_bits {
6771 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006772 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006773
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775 u8 op_mod[0x10];
6776
Matan Barakb4ff3a32016-02-09 14:57:42 +02006777 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778
6779 struct mlx5_ifc_rqtc_bits rqt_context;
6780};
6781
6782struct mlx5_ifc_create_rq_out_bits {
6783 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785
6786 u8 syndrome[0x20];
6787
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789 u8 rqn[0x18];
6790
Matan Barakb4ff3a32016-02-09 14:57:42 +02006791 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006792};
6793
6794struct mlx5_ifc_create_rq_in_bits {
6795 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797
Matan Barakb4ff3a32016-02-09 14:57:42 +02006798 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006799 u8 op_mod[0x10];
6800
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802
6803 struct mlx5_ifc_rqc_bits ctx;
6804};
6805
6806struct mlx5_ifc_create_rmp_out_bits {
6807 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006808 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006809
6810 u8 syndrome[0x20];
6811
Matan Barakb4ff3a32016-02-09 14:57:42 +02006812 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006813 u8 rmpn[0x18];
6814
Matan Barakb4ff3a32016-02-09 14:57:42 +02006815 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006816};
6817
6818struct mlx5_ifc_create_rmp_in_bits {
6819 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006820 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821
Matan Barakb4ff3a32016-02-09 14:57:42 +02006822 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006823 u8 op_mod[0x10];
6824
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826
6827 struct mlx5_ifc_rmpc_bits ctx;
6828};
6829
6830struct mlx5_ifc_create_qp_out_bits {
6831 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006832 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006833
6834 u8 syndrome[0x20];
6835
Matan Barakb4ff3a32016-02-09 14:57:42 +02006836 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006837 u8 qpn[0x18];
6838
Matan Barakb4ff3a32016-02-09 14:57:42 +02006839 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006840};
6841
6842struct mlx5_ifc_create_qp_in_bits {
6843 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006844 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006845
Matan Barakb4ff3a32016-02-09 14:57:42 +02006846 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006847 u8 op_mod[0x10];
6848
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850
6851 u8 opt_param_mask[0x20];
6852
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854
6855 struct mlx5_ifc_qpc_bits qpc;
6856
Matan Barakb4ff3a32016-02-09 14:57:42 +02006857 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006858
6859 u8 pas[0][0x40];
6860};
6861
6862struct mlx5_ifc_create_psv_out_bits {
6863 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006864 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006865
6866 u8 syndrome[0x20];
6867
Matan Barakb4ff3a32016-02-09 14:57:42 +02006868 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006869
Matan Barakb4ff3a32016-02-09 14:57:42 +02006870 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006871 u8 psv0_index[0x18];
6872
Matan Barakb4ff3a32016-02-09 14:57:42 +02006873 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006874 u8 psv1_index[0x18];
6875
Matan Barakb4ff3a32016-02-09 14:57:42 +02006876 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006877 u8 psv2_index[0x18];
6878
Matan Barakb4ff3a32016-02-09 14:57:42 +02006879 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006880 u8 psv3_index[0x18];
6881};
6882
6883struct mlx5_ifc_create_psv_in_bits {
6884 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006885 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006886
Matan Barakb4ff3a32016-02-09 14:57:42 +02006887 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006888 u8 op_mod[0x10];
6889
6890 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006891 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006892 u8 pd[0x18];
6893
Matan Barakb4ff3a32016-02-09 14:57:42 +02006894 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006895};
6896
6897struct mlx5_ifc_create_mkey_out_bits {
6898 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006899 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006900
6901 u8 syndrome[0x20];
6902
Matan Barakb4ff3a32016-02-09 14:57:42 +02006903 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006904 u8 mkey_index[0x18];
6905
Matan Barakb4ff3a32016-02-09 14:57:42 +02006906 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006907};
6908
6909struct mlx5_ifc_create_mkey_in_bits {
6910 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006911 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006912
Matan Barakb4ff3a32016-02-09 14:57:42 +02006913 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006914 u8 op_mod[0x10];
6915
Matan Barakb4ff3a32016-02-09 14:57:42 +02006916 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006917
6918 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006919 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006920
6921 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6922
Matan Barakb4ff3a32016-02-09 14:57:42 +02006923 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006924
6925 u8 translations_octword_actual_size[0x20];
6926
Matan Barakb4ff3a32016-02-09 14:57:42 +02006927 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006928
6929 u8 klm_pas_mtt[0][0x20];
6930};
6931
6932struct mlx5_ifc_create_flow_table_out_bits {
6933 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006934 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006935
6936 u8 syndrome[0x20];
6937
Matan Barakb4ff3a32016-02-09 14:57:42 +02006938 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006939 u8 table_id[0x18];
6940
Matan Barakb4ff3a32016-02-09 14:57:42 +02006941 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006942};
6943
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006944struct mlx5_ifc_flow_table_context_bits {
6945 u8 encap_en[0x1];
6946 u8 decap_en[0x1];
6947 u8 reserved_at_2[0x2];
6948 u8 table_miss_action[0x4];
6949 u8 level[0x8];
6950 u8 reserved_at_10[0x8];
6951 u8 log_size[0x8];
6952
6953 u8 reserved_at_20[0x8];
6954 u8 table_miss_id[0x18];
6955
6956 u8 reserved_at_40[0x8];
6957 u8 lag_master_next_table_id[0x18];
6958
6959 u8 reserved_at_60[0xe0];
6960};
6961
Saeed Mahameede2816822015-05-28 22:28:40 +03006962struct mlx5_ifc_create_flow_table_in_bits {
6963 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006964 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006965
Matan Barakb4ff3a32016-02-09 14:57:42 +02006966 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006967 u8 op_mod[0x10];
6968
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006969 u8 other_vport[0x1];
6970 u8 reserved_at_41[0xf];
6971 u8 vport_number[0x10];
6972
6973 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006974
6975 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006976 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006977
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006980 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006981};
6982
6983struct mlx5_ifc_create_flow_group_out_bits {
6984 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006985 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006986
6987 u8 syndrome[0x20];
6988
Matan Barakb4ff3a32016-02-09 14:57:42 +02006989 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006990 u8 group_id[0x18];
6991
Matan Barakb4ff3a32016-02-09 14:57:42 +02006992 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006993};
6994
6995enum {
Ariel Levkovich71c6e862018-05-13 14:33:34 +03006996 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6997 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6998 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6999 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_2 = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03007000};
7001
7002struct mlx5_ifc_create_flow_group_in_bits {
7003 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007004 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007005
Matan Barakb4ff3a32016-02-09 14:57:42 +02007006 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007007 u8 op_mod[0x10];
7008
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007009 u8 other_vport[0x1];
7010 u8 reserved_at_41[0xf];
7011 u8 vport_number[0x10];
7012
7013 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007014
7015 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007016 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007017
Matan Barakb4ff3a32016-02-09 14:57:42 +02007018 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007019 u8 table_id[0x18];
7020
Shahar Klein3e99df82018-03-18 09:02:06 +02007021 u8 source_eswitch_owner_vhca_id_valid[0x1];
7022
7023 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007024
7025 u8 start_flow_index[0x20];
7026
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028
7029 u8 end_flow_index[0x20];
7030
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034 u8 match_criteria_enable[0x8];
7035
7036 struct mlx5_ifc_fte_match_param_bits match_criteria;
7037
Matan Barakb4ff3a32016-02-09 14:57:42 +02007038 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03007039};
7040
7041struct mlx5_ifc_create_eq_out_bits {
7042 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007043 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007044
7045 u8 syndrome[0x20];
7046
Matan Barakb4ff3a32016-02-09 14:57:42 +02007047 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007048 u8 eq_number[0x8];
7049
Matan Barakb4ff3a32016-02-09 14:57:42 +02007050 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007051};
7052
7053struct mlx5_ifc_create_eq_in_bits {
7054 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007055 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007056
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058 u8 op_mod[0x10];
7059
Matan Barakb4ff3a32016-02-09 14:57:42 +02007060 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007061
7062 struct mlx5_ifc_eqc_bits eq_context_entry;
7063
Matan Barakb4ff3a32016-02-09 14:57:42 +02007064 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007065
7066 u8 event_bitmask[0x40];
7067
Matan Barakb4ff3a32016-02-09 14:57:42 +02007068 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03007069
7070 u8 pas[0][0x40];
7071};
7072
7073struct mlx5_ifc_create_dct_out_bits {
7074 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076
7077 u8 syndrome[0x20];
7078
Matan Barakb4ff3a32016-02-09 14:57:42 +02007079 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007080 u8 dctn[0x18];
7081
Matan Barakb4ff3a32016-02-09 14:57:42 +02007082 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007083};
7084
7085struct mlx5_ifc_create_dct_in_bits {
7086 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007087 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007088
Matan Barakb4ff3a32016-02-09 14:57:42 +02007089 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007090 u8 op_mod[0x10];
7091
Matan Barakb4ff3a32016-02-09 14:57:42 +02007092 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007093
7094 struct mlx5_ifc_dctc_bits dct_context_entry;
7095
Matan Barakb4ff3a32016-02-09 14:57:42 +02007096 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007097};
7098
7099struct mlx5_ifc_create_cq_out_bits {
7100 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007101 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007102
7103 u8 syndrome[0x20];
7104
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106 u8 cqn[0x18];
7107
Matan Barakb4ff3a32016-02-09 14:57:42 +02007108 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007109};
7110
7111struct mlx5_ifc_create_cq_in_bits {
7112 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007113 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007114
Matan Barakb4ff3a32016-02-09 14:57:42 +02007115 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007116 u8 op_mod[0x10];
7117
Matan Barakb4ff3a32016-02-09 14:57:42 +02007118 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007119
7120 struct mlx5_ifc_cqc_bits cq_context;
7121
Matan Barakb4ff3a32016-02-09 14:57:42 +02007122 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007123
7124 u8 pas[0][0x40];
7125};
7126
7127struct mlx5_ifc_config_int_moderation_out_bits {
7128 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007129 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007130
7131 u8 syndrome[0x20];
7132
Matan Barakb4ff3a32016-02-09 14:57:42 +02007133 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007134 u8 min_delay[0xc];
7135 u8 int_vector[0x10];
7136
Matan Barakb4ff3a32016-02-09 14:57:42 +02007137 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007138};
7139
7140enum {
7141 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7142 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7143};
7144
7145struct mlx5_ifc_config_int_moderation_in_bits {
7146 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007147 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007148
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150 u8 op_mod[0x10];
7151
Matan Barakb4ff3a32016-02-09 14:57:42 +02007152 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007153 u8 min_delay[0xc];
7154 u8 int_vector[0x10];
7155
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157};
7158
7159struct mlx5_ifc_attach_to_mcg_out_bits {
7160 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007161 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007162
7163 u8 syndrome[0x20];
7164
Matan Barakb4ff3a32016-02-09 14:57:42 +02007165 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007166};
7167
7168struct mlx5_ifc_attach_to_mcg_in_bits {
7169 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007170 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007171
Matan Barakb4ff3a32016-02-09 14:57:42 +02007172 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007173 u8 op_mod[0x10];
7174
Matan Barakb4ff3a32016-02-09 14:57:42 +02007175 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007176 u8 qpn[0x18];
7177
Matan Barakb4ff3a32016-02-09 14:57:42 +02007178 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007179
7180 u8 multicast_gid[16][0x8];
7181};
7182
Saeed Mahameed74862162016-06-09 15:11:34 +03007183struct mlx5_ifc_arm_xrq_out_bits {
7184 u8 status[0x8];
7185 u8 reserved_at_8[0x18];
7186
7187 u8 syndrome[0x20];
7188
7189 u8 reserved_at_40[0x40];
7190};
7191
7192struct mlx5_ifc_arm_xrq_in_bits {
7193 u8 opcode[0x10];
7194 u8 reserved_at_10[0x10];
7195
7196 u8 reserved_at_20[0x10];
7197 u8 op_mod[0x10];
7198
7199 u8 reserved_at_40[0x8];
7200 u8 xrqn[0x18];
7201
7202 u8 reserved_at_60[0x10];
7203 u8 lwm[0x10];
7204};
7205
Saeed Mahameede2816822015-05-28 22:28:40 +03007206struct mlx5_ifc_arm_xrc_srq_out_bits {
7207 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007208 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007209
7210 u8 syndrome[0x20];
7211
Matan Barakb4ff3a32016-02-09 14:57:42 +02007212 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007213};
7214
7215enum {
7216 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7217};
7218
7219struct mlx5_ifc_arm_xrc_srq_in_bits {
7220 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007221 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007222
Matan Barakb4ff3a32016-02-09 14:57:42 +02007223 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007224 u8 op_mod[0x10];
7225
Matan Barakb4ff3a32016-02-09 14:57:42 +02007226 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007227 u8 xrc_srqn[0x18];
7228
Matan Barakb4ff3a32016-02-09 14:57:42 +02007229 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007230 u8 lwm[0x10];
7231};
7232
7233struct mlx5_ifc_arm_rq_out_bits {
7234 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236
7237 u8 syndrome[0x20];
7238
Matan Barakb4ff3a32016-02-09 14:57:42 +02007239 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007240};
7241
7242enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007243 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7244 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007245};
7246
7247struct mlx5_ifc_arm_rq_in_bits {
7248 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250
Matan Barakb4ff3a32016-02-09 14:57:42 +02007251 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007252 u8 op_mod[0x10];
7253
Matan Barakb4ff3a32016-02-09 14:57:42 +02007254 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007255 u8 srq_number[0x18];
7256
Matan Barakb4ff3a32016-02-09 14:57:42 +02007257 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007258 u8 lwm[0x10];
7259};
7260
7261struct mlx5_ifc_arm_dct_out_bits {
7262 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007263 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007264
7265 u8 syndrome[0x20];
7266
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268};
7269
7270struct mlx5_ifc_arm_dct_in_bits {
7271 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007272 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007273
Matan Barakb4ff3a32016-02-09 14:57:42 +02007274 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007275 u8 op_mod[0x10];
7276
Matan Barakb4ff3a32016-02-09 14:57:42 +02007277 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007278 u8 dct_number[0x18];
7279
Matan Barakb4ff3a32016-02-09 14:57:42 +02007280 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007281};
7282
7283struct mlx5_ifc_alloc_xrcd_out_bits {
7284 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007285 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007286
7287 u8 syndrome[0x20];
7288
Matan Barakb4ff3a32016-02-09 14:57:42 +02007289 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007290 u8 xrcd[0x18];
7291
Matan Barakb4ff3a32016-02-09 14:57:42 +02007292 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007293};
7294
7295struct mlx5_ifc_alloc_xrcd_in_bits {
7296 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007297 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007298
Matan Barakb4ff3a32016-02-09 14:57:42 +02007299 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007300 u8 op_mod[0x10];
7301
Matan Barakb4ff3a32016-02-09 14:57:42 +02007302 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007303};
7304
7305struct mlx5_ifc_alloc_uar_out_bits {
7306 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007307 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007308
7309 u8 syndrome[0x20];
7310
Matan Barakb4ff3a32016-02-09 14:57:42 +02007311 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007312 u8 uar[0x18];
7313
Matan Barakb4ff3a32016-02-09 14:57:42 +02007314 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007315};
7316
7317struct mlx5_ifc_alloc_uar_in_bits {
7318 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007319 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007320
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322 u8 op_mod[0x10];
7323
Matan Barakb4ff3a32016-02-09 14:57:42 +02007324 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007325};
7326
7327struct mlx5_ifc_alloc_transport_domain_out_bits {
7328 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007329 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007330
7331 u8 syndrome[0x20];
7332
Matan Barakb4ff3a32016-02-09 14:57:42 +02007333 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007334 u8 transport_domain[0x18];
7335
Matan Barakb4ff3a32016-02-09 14:57:42 +02007336 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007337};
7338
7339struct mlx5_ifc_alloc_transport_domain_in_bits {
7340 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007341 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007342
Matan Barakb4ff3a32016-02-09 14:57:42 +02007343 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007344 u8 op_mod[0x10];
7345
Matan Barakb4ff3a32016-02-09 14:57:42 +02007346 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007347};
7348
7349struct mlx5_ifc_alloc_q_counter_out_bits {
7350 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007351 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007352
7353 u8 syndrome[0x20];
7354
Matan Barakb4ff3a32016-02-09 14:57:42 +02007355 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007356 u8 counter_set_id[0x8];
7357
Matan Barakb4ff3a32016-02-09 14:57:42 +02007358 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007359};
7360
7361struct mlx5_ifc_alloc_q_counter_in_bits {
7362 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007363 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007364
Matan Barakb4ff3a32016-02-09 14:57:42 +02007365 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007366 u8 op_mod[0x10];
7367
Matan Barakb4ff3a32016-02-09 14:57:42 +02007368 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007369};
7370
7371struct mlx5_ifc_alloc_pd_out_bits {
7372 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007373 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007374
7375 u8 syndrome[0x20];
7376
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378 u8 pd[0x18];
7379
Matan Barakb4ff3a32016-02-09 14:57:42 +02007380 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007381};
7382
7383struct mlx5_ifc_alloc_pd_in_bits {
7384 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386
Matan Barakb4ff3a32016-02-09 14:57:42 +02007387 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007388 u8 op_mod[0x10];
7389
Matan Barakb4ff3a32016-02-09 14:57:42 +02007390 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007391};
7392
Amir Vadai9dc0b282016-05-13 12:55:39 +00007393struct mlx5_ifc_alloc_flow_counter_out_bits {
7394 u8 status[0x8];
7395 u8 reserved_at_8[0x18];
7396
7397 u8 syndrome[0x20];
7398
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007399 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007400
7401 u8 reserved_at_60[0x20];
7402};
7403
7404struct mlx5_ifc_alloc_flow_counter_in_bits {
7405 u8 opcode[0x10];
7406 u8 reserved_at_10[0x10];
7407
7408 u8 reserved_at_20[0x10];
7409 u8 op_mod[0x10];
7410
7411 u8 reserved_at_40[0x40];
7412};
7413
Saeed Mahameede2816822015-05-28 22:28:40 +03007414struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7415 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007416 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007417
7418 u8 syndrome[0x20];
7419
Matan Barakb4ff3a32016-02-09 14:57:42 +02007420 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007421};
7422
7423struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7424 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007425 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007426
Matan Barakb4ff3a32016-02-09 14:57:42 +02007427 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007428 u8 op_mod[0x10];
7429
Matan Barakb4ff3a32016-02-09 14:57:42 +02007430 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007431
Matan Barakb4ff3a32016-02-09 14:57:42 +02007432 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007433 u8 vxlan_udp_port[0x10];
7434};
7435
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007436struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007437 u8 status[0x8];
7438 u8 reserved_at_8[0x18];
7439
7440 u8 syndrome[0x20];
7441
7442 u8 reserved_at_40[0x40];
7443};
7444
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007445struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007446 u8 opcode[0x10];
7447 u8 reserved_at_10[0x10];
7448
7449 u8 reserved_at_20[0x10];
7450 u8 op_mod[0x10];
7451
7452 u8 reserved_at_40[0x10];
7453 u8 rate_limit_index[0x10];
7454
7455 u8 reserved_at_60[0x20];
7456
7457 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007458
Bodong Wang05d3ac92018-03-19 15:10:29 +02007459 u8 burst_upper_bound[0x20];
7460
7461 u8 reserved_at_c0[0x10];
7462 u8 typical_packet_size[0x10];
7463
7464 u8 reserved_at_e0[0x120];
Saeed Mahameed74862162016-06-09 15:11:34 +03007465};
7466
Saeed Mahameede2816822015-05-28 22:28:40 +03007467struct mlx5_ifc_access_register_out_bits {
7468 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470
7471 u8 syndrome[0x20];
7472
Matan Barakb4ff3a32016-02-09 14:57:42 +02007473 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007474
7475 u8 register_data[0][0x20];
7476};
7477
7478enum {
7479 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7480 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7481};
7482
7483struct mlx5_ifc_access_register_in_bits {
7484 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007485 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007486
Matan Barakb4ff3a32016-02-09 14:57:42 +02007487 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007488 u8 op_mod[0x10];
7489
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491 u8 register_id[0x10];
7492
7493 u8 argument[0x20];
7494
7495 u8 register_data[0][0x20];
7496};
7497
7498struct mlx5_ifc_sltp_reg_bits {
7499 u8 status[0x4];
7500 u8 version[0x4];
7501 u8 local_port[0x8];
7502 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007503 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007504 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508
Matan Barakb4ff3a32016-02-09 14:57:42 +02007509 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007510 u8 polarity[0x1];
7511 u8 ob_tap0[0x8];
7512 u8 ob_tap1[0x8];
7513 u8 ob_tap2[0x8];
7514
Matan Barakb4ff3a32016-02-09 14:57:42 +02007515 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007516 u8 ob_preemp_mode[0x4];
7517 u8 ob_reg[0x8];
7518 u8 ob_bias[0x8];
7519
Matan Barakb4ff3a32016-02-09 14:57:42 +02007520 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007521};
7522
7523struct mlx5_ifc_slrg_reg_bits {
7524 u8 status[0x4];
7525 u8 version[0x4];
7526 u8 local_port[0x8];
7527 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531
7532 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007533 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007534 u8 grade_lane_speed[0x4];
7535
7536 u8 grade_version[0x8];
7537 u8 grade[0x18];
7538
Matan Barakb4ff3a32016-02-09 14:57:42 +02007539 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007540 u8 height_grade_type[0x4];
7541 u8 height_grade[0x18];
7542
7543 u8 height_dz[0x10];
7544 u8 height_dv[0x10];
7545
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547 u8 height_sigma[0x10];
7548
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550
Matan Barakb4ff3a32016-02-09 14:57:42 +02007551 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007552 u8 phase_grade_type[0x4];
7553 u8 phase_grade[0x18];
7554
Matan Barakb4ff3a32016-02-09 14:57:42 +02007555 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007556 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007557 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558 u8 phase_eo_neg[0x8];
7559
7560 u8 ffe_set_tested[0x10];
7561 u8 test_errors_per_lane[0x10];
7562};
7563
7564struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007565 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007566 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007567 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007568
Matan Barakb4ff3a32016-02-09 14:57:42 +02007569 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007570 u8 vl_hw_cap[0x4];
7571
Matan Barakb4ff3a32016-02-09 14:57:42 +02007572 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007573 u8 vl_admin[0x4];
7574
Matan Barakb4ff3a32016-02-09 14:57:42 +02007575 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007576 u8 vl_operational[0x4];
7577};
7578
7579struct mlx5_ifc_pude_reg_bits {
7580 u8 swid[0x8];
7581 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007582 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007583 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007584 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007585 u8 oper_status[0x4];
7586
Matan Barakb4ff3a32016-02-09 14:57:42 +02007587 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007588};
7589
7590struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007591 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007592 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007593 u8 an_disable_cap[0x1];
7594 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007595 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007596 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007597 u8 proto_mask[0x3];
7598
Saeed Mahameed74862162016-06-09 15:11:34 +03007599 u8 an_status[0x4];
7600 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007601
7602 u8 eth_proto_capability[0x20];
7603
7604 u8 ib_link_width_capability[0x10];
7605 u8 ib_proto_capability[0x10];
7606
Matan Barakb4ff3a32016-02-09 14:57:42 +02007607 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007608
7609 u8 eth_proto_admin[0x20];
7610
7611 u8 ib_link_width_admin[0x10];
7612 u8 ib_proto_admin[0x10];
7613
Matan Barakb4ff3a32016-02-09 14:57:42 +02007614 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007615
7616 u8 eth_proto_oper[0x20];
7617
7618 u8 ib_link_width_oper[0x10];
7619 u8 ib_proto_oper[0x10];
7620
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007621 u8 reserved_at_160[0x1c];
7622 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007623
7624 u8 eth_proto_lp_advertise[0x20];
7625
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627};
7628
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007629struct mlx5_ifc_mlcr_reg_bits {
7630 u8 reserved_at_0[0x8];
7631 u8 local_port[0x8];
7632 u8 reserved_at_10[0x20];
7633
7634 u8 beacon_duration[0x10];
7635 u8 reserved_at_40[0x10];
7636
7637 u8 beacon_remain[0x10];
7638};
7639
Saeed Mahameede2816822015-05-28 22:28:40 +03007640struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642
7643 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007644 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007645 u8 repetitions_mode[0x4];
7646 u8 num_of_repetitions[0x8];
7647
7648 u8 grade_version[0x8];
7649 u8 height_grade_type[0x4];
7650 u8 phase_grade_type[0x4];
7651 u8 height_grade_weight[0x8];
7652 u8 phase_grade_weight[0x8];
7653
7654 u8 gisim_measure_bits[0x10];
7655 u8 adaptive_tap_measure_bits[0x10];
7656
7657 u8 ber_bath_high_error_threshold[0x10];
7658 u8 ber_bath_mid_error_threshold[0x10];
7659
7660 u8 ber_bath_low_error_threshold[0x10];
7661 u8 one_ratio_high_threshold[0x10];
7662
7663 u8 one_ratio_high_mid_threshold[0x10];
7664 u8 one_ratio_low_mid_threshold[0x10];
7665
7666 u8 one_ratio_low_threshold[0x10];
7667 u8 ndeo_error_threshold[0x10];
7668
7669 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007670 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007671 u8 mix90_phase_for_voltage_bath[0x8];
7672
7673 u8 mixer_offset_start[0x10];
7674 u8 mixer_offset_end[0x10];
7675
Matan Barakb4ff3a32016-02-09 14:57:42 +02007676 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007677 u8 ber_test_time[0xb];
7678};
7679
7680struct mlx5_ifc_pspa_reg_bits {
7681 u8 swid[0x8];
7682 u8 local_port[0x8];
7683 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007684 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007685
Matan Barakb4ff3a32016-02-09 14:57:42 +02007686 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007687};
7688
7689struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007690 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007691 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007694 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007695 u8 mode[0x2];
7696
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698
Matan Barakb4ff3a32016-02-09 14:57:42 +02007699 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007700 u8 min_threshold[0x10];
7701
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703 u8 max_threshold[0x10];
7704
Matan Barakb4ff3a32016-02-09 14:57:42 +02007705 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007706 u8 mark_probability_denominator[0x10];
7707
Matan Barakb4ff3a32016-02-09 14:57:42 +02007708 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007709};
7710
7711struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007712 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007713 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007714 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007715
Matan Barakb4ff3a32016-02-09 14:57:42 +02007716 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007717
Matan Barakb4ff3a32016-02-09 14:57:42 +02007718 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007719 u8 wrps_admin[0x4];
7720
Matan Barakb4ff3a32016-02-09 14:57:42 +02007721 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007722 u8 wrps_status[0x4];
7723
Matan Barakb4ff3a32016-02-09 14:57:42 +02007724 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007725 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007726 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007727 u8 down_threshold[0x8];
7728
Matan Barakb4ff3a32016-02-09 14:57:42 +02007729 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007730
Matan Barakb4ff3a32016-02-09 14:57:42 +02007731 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007732 u8 srps_admin[0x4];
7733
Matan Barakb4ff3a32016-02-09 14:57:42 +02007734 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007735 u8 srps_status[0x4];
7736
Matan Barakb4ff3a32016-02-09 14:57:42 +02007737 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007738};
7739
7740struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007741 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007742 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007743 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007744
Matan Barakb4ff3a32016-02-09 14:57:42 +02007745 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007746 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007747 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007748 u8 lb_en[0x8];
7749};
7750
7751struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007752 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007753 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007754 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007755
Matan Barakb4ff3a32016-02-09 14:57:42 +02007756 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007757
7758 u8 port_profile_mode[0x8];
7759 u8 static_port_profile[0x8];
7760 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762
7763 u8 retransmission_active[0x8];
7764 u8 fec_mode_active[0x18];
7765
Matan Barakb4ff3a32016-02-09 14:57:42 +02007766 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007767};
7768
7769struct mlx5_ifc_ppcnt_reg_bits {
7770 u8 swid[0x8];
7771 u8 local_port[0x8];
7772 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774 u8 grp[0x6];
7775
7776 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007777 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007778 u8 prio_tc[0x3];
7779
7780 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7781};
7782
Gal Pressman8ed1a632016-11-17 13:46:01 +02007783struct mlx5_ifc_mpcnt_reg_bits {
7784 u8 reserved_at_0[0x8];
7785 u8 pcie_index[0x8];
7786 u8 reserved_at_10[0xa];
7787 u8 grp[0x6];
7788
7789 u8 clr[0x1];
7790 u8 reserved_at_21[0x1f];
7791
7792 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7793};
7794
Saeed Mahameede2816822015-05-28 22:28:40 +03007795struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007796 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007797 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007798 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007799 u8 local_port[0x8];
7800 u8 mac_47_32[0x10];
7801
7802 u8 mac_31_0[0x20];
7803
Matan Barakb4ff3a32016-02-09 14:57:42 +02007804 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007805};
7806
7807struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811
7812 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007813 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007814
7815 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817
7818 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007819 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007820};
7821
7822struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007823 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007824 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007825 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007826
Matan Barakb4ff3a32016-02-09 14:57:42 +02007827 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007828 u8 attenuation_5g[0x8];
7829
Matan Barakb4ff3a32016-02-09 14:57:42 +02007830 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007831 u8 attenuation_7g[0x8];
7832
Matan Barakb4ff3a32016-02-09 14:57:42 +02007833 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007834 u8 attenuation_12g[0x8];
7835};
7836
7837struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007838 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007839 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841 u8 module_status[0x4];
7842
Matan Barakb4ff3a32016-02-09 14:57:42 +02007843 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007844};
7845
7846struct mlx5_ifc_pmpc_reg_bits {
7847 u8 module_state_updated[32][0x8];
7848};
7849
7850struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007851 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007852 u8 mlpn_status[0x4];
7853 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007854 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007855
7856 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007857 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007858};
7859
7860struct mlx5_ifc_pmlp_reg_bits {
7861 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007862 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007863 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865 u8 width[0x8];
7866
7867 u8 lane0_module_mapping[0x20];
7868
7869 u8 lane1_module_mapping[0x20];
7870
7871 u8 lane2_module_mapping[0x20];
7872
7873 u8 lane3_module_mapping[0x20];
7874
Matan Barakb4ff3a32016-02-09 14:57:42 +02007875 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007876};
7877
7878struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007879 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007880 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007881 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007882 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007883 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007884 u8 oper_status[0x4];
7885
7886 u8 ase[0x1];
7887 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007888 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007889 u8 e[0x2];
7890
Matan Barakb4ff3a32016-02-09 14:57:42 +02007891 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007892};
7893
7894struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007895 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007896 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007897 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007898 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007899 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007900
Matan Barakb4ff3a32016-02-09 14:57:42 +02007901 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007902 u8 lane_speed[0x10];
7903
Matan Barakb4ff3a32016-02-09 14:57:42 +02007904 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905 u8 lpbf[0x1];
7906 u8 fec_mode_policy[0x8];
7907
7908 u8 retransmission_capability[0x8];
7909 u8 fec_mode_capability[0x18];
7910
7911 u8 retransmission_support_admin[0x8];
7912 u8 fec_mode_support_admin[0x18];
7913
7914 u8 retransmission_request_admin[0x8];
7915 u8 fec_mode_request_admin[0x18];
7916
Matan Barakb4ff3a32016-02-09 14:57:42 +02007917 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007918};
7919
7920struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007921 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007922 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924 u8 ib_port[0x8];
7925
Matan Barakb4ff3a32016-02-09 14:57:42 +02007926 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007927};
7928
7929struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007930 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007931 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007932 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007933 u8 lbf_mode[0x3];
7934
Matan Barakb4ff3a32016-02-09 14:57:42 +02007935 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007936};
7937
7938struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007939 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007940 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007941 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007942
7943 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007944 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007945 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007946 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007947};
7948
7949struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007950 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007951 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007952 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007953
Matan Barakb4ff3a32016-02-09 14:57:42 +02007954 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007955
7956 u8 port_filter[8][0x20];
7957
7958 u8 port_filter_update_en[8][0x20];
7959};
7960
7961struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007962 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007963 u8 local_port[0x8];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007964 u8 reserved_at_10[0xb];
7965 u8 ppan_mask_n[0x1];
7966 u8 minor_stall_mask[0x1];
7967 u8 critical_stall_mask[0x1];
7968 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007969
7970 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007971 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007972 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007973 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007974 u8 prio_mask_rx[0x8];
7975
7976 u8 pptx[0x1];
7977 u8 aptx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007978 u8 pptx_mask_n[0x1];
7979 u8 reserved_at_43[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007980 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007981 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007982
7983 u8 pprx[0x1];
7984 u8 aprx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007985 u8 pprx_mask_n[0x1];
7986 u8 reserved_at_63[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007987 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007988 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007989
Inbar Karmy2afa6092017-11-20 18:06:20 +02007990 u8 device_stall_minor_watermark[0x10];
7991 u8 device_stall_critical_watermark[0x10];
7992
7993 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007994};
7995
7996struct mlx5_ifc_pelc_reg_bits {
7997 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007998 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007999 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008000 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008001
8002 u8 op_admin[0x8];
8003 u8 op_capability[0x8];
8004 u8 op_request[0x8];
8005 u8 op_active[0x8];
8006
8007 u8 admin[0x40];
8008
8009 u8 capability[0x40];
8010
8011 u8 request[0x40];
8012
8013 u8 active[0x40];
8014
Matan Barakb4ff3a32016-02-09 14:57:42 +02008015 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03008016};
8017
8018struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008019 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008020 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008021 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008022
Matan Barakb4ff3a32016-02-09 14:57:42 +02008023 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008024 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008025 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008026
Matan Barakb4ff3a32016-02-09 14:57:42 +02008027 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008028 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008029 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008030 u8 error_type[0x8];
8031};
8032
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008033struct mlx5_ifc_pcam_enhanced_features_bits {
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03008034 u8 reserved_at_0[0x76];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008035
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03008036 u8 pfcc_mask[0x1];
8037 u8 reserved_at_77[0x4];
Gal Pressman2dba0792017-06-18 14:56:45 +03008038 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02008039 u8 ptys_connector_type[0x1];
8040 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008041 u8 ppcnt_discard_group[0x1];
8042 u8 ppcnt_statistical_group[0x1];
8043};
8044
Huy Nguyendf5f1362018-02-28 14:16:47 -06008045struct mlx5_ifc_pcam_regs_5000_to_507f_bits {
8046 u8 port_access_reg_cap_mask_127_to_96[0x20];
8047 u8 port_access_reg_cap_mask_95_to_64[0x20];
8048 u8 port_access_reg_cap_mask_63_to_32[0x20];
8049
8050 u8 port_access_reg_cap_mask_31_to_13[0x13];
8051 u8 pbmc[0x1];
8052 u8 pptb[0x1];
8053 u8 port_access_reg_cap_mask_10_to_0[0xb];
8054};
8055
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008056struct mlx5_ifc_pcam_reg_bits {
8057 u8 reserved_at_0[0x8];
8058 u8 feature_group[0x8];
8059 u8 reserved_at_10[0x8];
8060 u8 access_reg_group[0x8];
8061
8062 u8 reserved_at_20[0x20];
8063
8064 union {
Huy Nguyendf5f1362018-02-28 14:16:47 -06008065 struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008066 u8 reserved_at_0[0x80];
8067 } port_access_reg_cap_mask;
8068
8069 u8 reserved_at_c0[0x80];
8070
8071 union {
8072 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
8073 u8 reserved_at_0[0x80];
8074 } feature_cap_mask;
8075
8076 u8 reserved_at_1c0[0xc0];
8077};
8078
8079struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03008080 u8 reserved_at_0[0x7b];
8081 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03008082 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008083 u8 mtpps_enh_out_per_adj[0x1];
8084 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008085 u8 pcie_performance_group[0x1];
8086};
8087
Or Gerlitz0ab87742017-06-11 15:25:38 +03008088struct mlx5_ifc_mcam_access_reg_bits {
8089 u8 reserved_at_0[0x1c];
8090 u8 mcda[0x1];
8091 u8 mcc[0x1];
8092 u8 mcqi[0x1];
8093 u8 reserved_at_1f[0x1];
8094
8095 u8 regs_95_to_64[0x20];
8096 u8 regs_63_to_32[0x20];
8097 u8 regs_31_to_0[0x20];
8098};
8099
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008100struct mlx5_ifc_mcam_reg_bits {
8101 u8 reserved_at_0[0x8];
8102 u8 feature_group[0x8];
8103 u8 reserved_at_10[0x8];
8104 u8 access_reg_group[0x8];
8105
8106 u8 reserved_at_20[0x20];
8107
8108 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03008109 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008110 u8 reserved_at_0[0x80];
8111 } mng_access_reg_cap_mask;
8112
8113 u8 reserved_at_c0[0x80];
8114
8115 union {
8116 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
8117 u8 reserved_at_0[0x80];
8118 } mng_feature_cap_mask;
8119
8120 u8 reserved_at_1c0[0x80];
8121};
8122
Huy Nguyenc02762e2017-07-18 16:03:17 -05008123struct mlx5_ifc_qcam_access_reg_cap_mask {
8124 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
8125 u8 qpdpm[0x1];
8126 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
8127 u8 qdpm[0x1];
8128 u8 qpts[0x1];
8129 u8 qcap[0x1];
8130 u8 qcam_access_reg_cap_mask_0[0x1];
8131};
8132
8133struct mlx5_ifc_qcam_qos_feature_cap_mask {
8134 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
8135 u8 qpts_trust_both[0x1];
8136};
8137
8138struct mlx5_ifc_qcam_reg_bits {
8139 u8 reserved_at_0[0x8];
8140 u8 feature_group[0x8];
8141 u8 reserved_at_10[0x8];
8142 u8 access_reg_group[0x8];
8143 u8 reserved_at_20[0x20];
8144
8145 union {
8146 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8147 u8 reserved_at_0[0x80];
8148 } qos_access_reg_cap_mask;
8149
8150 u8 reserved_at_c0[0x80];
8151
8152 union {
8153 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8154 u8 reserved_at_0[0x80];
8155 } qos_feature_cap_mask;
8156
8157 u8 reserved_at_1c0[0x80];
8158};
8159
Saeed Mahameede2816822015-05-28 22:28:40 +03008160struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008161 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008162 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008164
8165 u8 port_capability_mask[4][0x20];
8166};
8167
8168struct mlx5_ifc_paos_reg_bits {
8169 u8 swid[0x8];
8170 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008171 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008172 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008173 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008174 u8 oper_status[0x4];
8175
8176 u8 ase[0x1];
8177 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008178 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008179 u8 e[0x2];
8180
Matan Barakb4ff3a32016-02-09 14:57:42 +02008181 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008182};
8183
8184struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008185 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008186 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008187 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008188 u8 opamp_group_type[0x4];
8189
8190 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008191 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008192 u8 num_of_indices[0xc];
8193
8194 u8 index_data[18][0x10];
8195};
8196
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008197struct mlx5_ifc_pcmr_reg_bits {
8198 u8 reserved_at_0[0x8];
8199 u8 local_port[0x8];
8200 u8 reserved_at_10[0x2e];
8201 u8 fcs_cap[0x1];
8202 u8 reserved_at_3f[0x1f];
8203 u8 fcs_chk[0x1];
8204 u8 reserved_at_5f[0x1];
8205};
8206
Saeed Mahameede2816822015-05-28 22:28:40 +03008207struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008208 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008209 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008210 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008211 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008212 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008213 u8 module[0x8];
8214};
8215
8216struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008217 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008218 u8 lossy[0x1];
8219 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008220 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008221 u8 size[0xc];
8222
8223 u8 xoff_threshold[0x10];
8224 u8 xon_threshold[0x10];
8225};
8226
8227struct mlx5_ifc_set_node_in_bits {
8228 u8 node_description[64][0x8];
8229};
8230
8231struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008232 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008233 u8 power_settings_level[0x8];
8234
Matan Barakb4ff3a32016-02-09 14:57:42 +02008235 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008236};
8237
8238struct mlx5_ifc_register_host_endianness_bits {
8239 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008240 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008241
Matan Barakb4ff3a32016-02-09 14:57:42 +02008242 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008243};
8244
8245struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008246 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008247
8248 u8 mkey[0x20];
8249
8250 u8 addressh_63_32[0x20];
8251
8252 u8 addressl_31_0[0x20];
8253};
8254
8255struct mlx5_ifc_ud_adrs_vector_bits {
8256 u8 dc_key[0x40];
8257
8258 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008259 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008260 u8 destination_qp_dct[0x18];
8261
8262 u8 static_rate[0x4];
8263 u8 sl_eth_prio[0x4];
8264 u8 fl[0x1];
8265 u8 mlid[0x7];
8266 u8 rlid_udp_sport[0x10];
8267
Matan Barakb4ff3a32016-02-09 14:57:42 +02008268 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008269
8270 u8 rmac_47_16[0x20];
8271
8272 u8 rmac_15_0[0x10];
8273 u8 tclass[0x8];
8274 u8 hop_limit[0x8];
8275
Matan Barakb4ff3a32016-02-09 14:57:42 +02008276 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008277 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008278 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008279 u8 src_addr_index[0x8];
8280 u8 flow_label[0x14];
8281
8282 u8 rgid_rip[16][0x8];
8283};
8284
8285struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008286 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008287 u8 function_id[0x10];
8288
8289 u8 num_pages[0x20];
8290
Matan Barakb4ff3a32016-02-09 14:57:42 +02008291 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008292};
8293
8294struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008295 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008296 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008297 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008298 u8 event_sub_type[0x8];
8299
Matan Barakb4ff3a32016-02-09 14:57:42 +02008300 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008301
8302 union mlx5_ifc_event_auto_bits event_data;
8303
Matan Barakb4ff3a32016-02-09 14:57:42 +02008304 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008305 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008306 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008307 u8 owner[0x1];
8308};
8309
8310enum {
8311 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8312};
8313
8314struct mlx5_ifc_cmd_queue_entry_bits {
8315 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008316 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008317
8318 u8 input_length[0x20];
8319
8320 u8 input_mailbox_pointer_63_32[0x20];
8321
8322 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008323 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008324
8325 u8 command_input_inline_data[16][0x8];
8326
8327 u8 command_output_inline_data[16][0x8];
8328
8329 u8 output_mailbox_pointer_63_32[0x20];
8330
8331 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008332 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008333
8334 u8 output_length[0x20];
8335
8336 u8 token[0x8];
8337 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008338 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008339 u8 status[0x7];
8340 u8 ownership[0x1];
8341};
8342
8343struct mlx5_ifc_cmd_out_bits {
8344 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008345 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008346
8347 u8 syndrome[0x20];
8348
8349 u8 command_output[0x20];
8350};
8351
8352struct mlx5_ifc_cmd_in_bits {
8353 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008354 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008355
Matan Barakb4ff3a32016-02-09 14:57:42 +02008356 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008357 u8 op_mod[0x10];
8358
8359 u8 command[0][0x20];
8360};
8361
8362struct mlx5_ifc_cmd_if_box_bits {
8363 u8 mailbox_data[512][0x8];
8364
Matan Barakb4ff3a32016-02-09 14:57:42 +02008365 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008366
8367 u8 next_pointer_63_32[0x20];
8368
8369 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008370 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008371
8372 u8 block_number[0x20];
8373
Matan Barakb4ff3a32016-02-09 14:57:42 +02008374 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008375 u8 token[0x8];
8376 u8 ctrl_signature[0x8];
8377 u8 signature[0x8];
8378};
8379
8380struct mlx5_ifc_mtt_bits {
8381 u8 ptag_63_32[0x20];
8382
8383 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008384 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008385 u8 wr_en[0x1];
8386 u8 rd_en[0x1];
8387};
8388
Tariq Toukan928cfe82016-02-22 18:17:29 +02008389struct mlx5_ifc_query_wol_rol_out_bits {
8390 u8 status[0x8];
8391 u8 reserved_at_8[0x18];
8392
8393 u8 syndrome[0x20];
8394
8395 u8 reserved_at_40[0x10];
8396 u8 rol_mode[0x8];
8397 u8 wol_mode[0x8];
8398
8399 u8 reserved_at_60[0x20];
8400};
8401
8402struct mlx5_ifc_query_wol_rol_in_bits {
8403 u8 opcode[0x10];
8404 u8 reserved_at_10[0x10];
8405
8406 u8 reserved_at_20[0x10];
8407 u8 op_mod[0x10];
8408
8409 u8 reserved_at_40[0x40];
8410};
8411
8412struct mlx5_ifc_set_wol_rol_out_bits {
8413 u8 status[0x8];
8414 u8 reserved_at_8[0x18];
8415
8416 u8 syndrome[0x20];
8417
8418 u8 reserved_at_40[0x40];
8419};
8420
8421struct mlx5_ifc_set_wol_rol_in_bits {
8422 u8 opcode[0x10];
8423 u8 reserved_at_10[0x10];
8424
8425 u8 reserved_at_20[0x10];
8426 u8 op_mod[0x10];
8427
8428 u8 rol_mode_valid[0x1];
8429 u8 wol_mode_valid[0x1];
8430 u8 reserved_at_42[0xe];
8431 u8 rol_mode[0x8];
8432 u8 wol_mode[0x8];
8433
8434 u8 reserved_at_60[0x20];
8435};
8436
Saeed Mahameede2816822015-05-28 22:28:40 +03008437enum {
8438 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8439 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8440 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8441};
8442
8443enum {
8444 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8445 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8446 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8447};
8448
8449enum {
8450 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8451 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8452 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8453 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8454 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8455 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8456 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8457 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8458 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8459 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8460 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8461};
8462
8463struct mlx5_ifc_initial_seg_bits {
8464 u8 fw_rev_minor[0x10];
8465 u8 fw_rev_major[0x10];
8466
8467 u8 cmd_interface_rev[0x10];
8468 u8 fw_rev_subminor[0x10];
8469
Matan Barakb4ff3a32016-02-09 14:57:42 +02008470 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008471
8472 u8 cmdq_phy_addr_63_32[0x20];
8473
8474 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008475 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008476 u8 nic_interface[0x2];
8477 u8 log_cmdq_size[0x4];
8478 u8 log_cmdq_stride[0x4];
8479
8480 u8 command_doorbell_vector[0x20];
8481
Matan Barakb4ff3a32016-02-09 14:57:42 +02008482 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008483
8484 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008485 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008486 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008487 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008488
8489 struct mlx5_ifc_health_buffer_bits health_buffer;
8490
8491 u8 no_dram_nic_offset[0x20];
8492
Matan Barakb4ff3a32016-02-09 14:57:42 +02008493 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008494
Matan Barakb4ff3a32016-02-09 14:57:42 +02008495 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008496 u8 clear_int[0x1];
8497
8498 u8 health_syndrome[0x8];
8499 u8 health_counter[0x18];
8500
Matan Barakb4ff3a32016-02-09 14:57:42 +02008501 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008502};
8503
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008504struct mlx5_ifc_mtpps_reg_bits {
8505 u8 reserved_at_0[0xc];
8506 u8 cap_number_of_pps_pins[0x4];
8507 u8 reserved_at_10[0x4];
8508 u8 cap_max_num_of_pps_in_pins[0x4];
8509 u8 reserved_at_18[0x4];
8510 u8 cap_max_num_of_pps_out_pins[0x4];
8511
8512 u8 reserved_at_20[0x24];
8513 u8 cap_pin_3_mode[0x4];
8514 u8 reserved_at_48[0x4];
8515 u8 cap_pin_2_mode[0x4];
8516 u8 reserved_at_50[0x4];
8517 u8 cap_pin_1_mode[0x4];
8518 u8 reserved_at_58[0x4];
8519 u8 cap_pin_0_mode[0x4];
8520
8521 u8 reserved_at_60[0x4];
8522 u8 cap_pin_7_mode[0x4];
8523 u8 reserved_at_68[0x4];
8524 u8 cap_pin_6_mode[0x4];
8525 u8 reserved_at_70[0x4];
8526 u8 cap_pin_5_mode[0x4];
8527 u8 reserved_at_78[0x4];
8528 u8 cap_pin_4_mode[0x4];
8529
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008530 u8 field_select[0x20];
8531 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008532
8533 u8 enable[0x1];
8534 u8 reserved_at_101[0xb];
8535 u8 pattern[0x4];
8536 u8 reserved_at_110[0x4];
8537 u8 pin_mode[0x4];
8538 u8 pin[0x8];
8539
8540 u8 reserved_at_120[0x20];
8541
8542 u8 time_stamp[0x40];
8543
8544 u8 out_pulse_duration[0x10];
8545 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008546 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008547
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008548 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008549};
8550
8551struct mlx5_ifc_mtppse_reg_bits {
8552 u8 reserved_at_0[0x18];
8553 u8 pin[0x8];
8554 u8 event_arm[0x1];
8555 u8 reserved_at_21[0x1b];
8556 u8 event_generation_mode[0x4];
8557 u8 reserved_at_40[0x40];
8558};
8559
Or Gerlitz47176282017-04-18 13:35:39 +03008560struct mlx5_ifc_mcqi_cap_bits {
8561 u8 supported_info_bitmask[0x20];
8562
8563 u8 component_size[0x20];
8564
8565 u8 max_component_size[0x20];
8566
8567 u8 log_mcda_word_size[0x4];
8568 u8 reserved_at_64[0xc];
8569 u8 mcda_max_write_size[0x10];
8570
8571 u8 rd_en[0x1];
8572 u8 reserved_at_81[0x1];
8573 u8 match_chip_id[0x1];
8574 u8 match_psid[0x1];
8575 u8 check_user_timestamp[0x1];
8576 u8 match_base_guid_mac[0x1];
8577 u8 reserved_at_86[0x1a];
8578};
8579
8580struct mlx5_ifc_mcqi_reg_bits {
8581 u8 read_pending_component[0x1];
8582 u8 reserved_at_1[0xf];
8583 u8 component_index[0x10];
8584
8585 u8 reserved_at_20[0x20];
8586
8587 u8 reserved_at_40[0x1b];
8588 u8 info_type[0x5];
8589
8590 u8 info_size[0x20];
8591
8592 u8 offset[0x20];
8593
8594 u8 reserved_at_a0[0x10];
8595 u8 data_size[0x10];
8596
8597 u8 data[0][0x20];
8598};
8599
8600struct mlx5_ifc_mcc_reg_bits {
8601 u8 reserved_at_0[0x4];
8602 u8 time_elapsed_since_last_cmd[0xc];
8603 u8 reserved_at_10[0x8];
8604 u8 instruction[0x8];
8605
8606 u8 reserved_at_20[0x10];
8607 u8 component_index[0x10];
8608
8609 u8 reserved_at_40[0x8];
8610 u8 update_handle[0x18];
8611
8612 u8 handle_owner_type[0x4];
8613 u8 handle_owner_host_id[0x4];
8614 u8 reserved_at_68[0x1];
8615 u8 control_progress[0x7];
8616 u8 error_code[0x8];
8617 u8 reserved_at_78[0x4];
8618 u8 control_state[0x4];
8619
8620 u8 component_size[0x20];
8621
8622 u8 reserved_at_a0[0x60];
8623};
8624
8625struct mlx5_ifc_mcda_reg_bits {
8626 u8 reserved_at_0[0x8];
8627 u8 update_handle[0x18];
8628
8629 u8 offset[0x20];
8630
8631 u8 reserved_at_40[0x10];
8632 u8 size[0x10];
8633
8634 u8 reserved_at_60[0x20];
8635
8636 u8 data[0][0x20];
8637};
8638
Saeed Mahameede2816822015-05-28 22:28:40 +03008639union mlx5_ifc_ports_control_registers_document_bits {
8640 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8641 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8642 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8643 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8644 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8645 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8646 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8647 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8648 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8649 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8650 struct mlx5_ifc_paos_reg_bits paos_reg;
8651 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8652 struct mlx5_ifc_peir_reg_bits peir_reg;
8653 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8654 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008655 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008656 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8657 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8658 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8659 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8660 struct mlx5_ifc_plib_reg_bits plib_reg;
8661 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8662 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8663 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8664 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8665 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8666 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8667 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8668 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8669 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8670 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008671 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008672 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8673 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8674 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8675 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8676 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8677 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8678 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008679 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008680 struct mlx5_ifc_pude_reg_bits pude_reg;
8681 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8682 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8683 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008684 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8685 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008686 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008687 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8688 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008689 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8690 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8691 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008692 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008693};
8694
8695union mlx5_ifc_debug_enhancements_document_bits {
8696 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008697 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008698};
8699
8700union mlx5_ifc_uplink_pci_interface_document_bits {
8701 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008702 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008703};
8704
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008705struct mlx5_ifc_set_flow_table_root_out_bits {
8706 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008707 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008708
8709 u8 syndrome[0x20];
8710
Matan Barakb4ff3a32016-02-09 14:57:42 +02008711 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008712};
8713
8714struct mlx5_ifc_set_flow_table_root_in_bits {
8715 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008716 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008717
Matan Barakb4ff3a32016-02-09 14:57:42 +02008718 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008719 u8 op_mod[0x10];
8720
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008721 u8 other_vport[0x1];
8722 u8 reserved_at_41[0xf];
8723 u8 vport_number[0x10];
8724
8725 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008726
8727 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008728 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008729
Matan Barakb4ff3a32016-02-09 14:57:42 +02008730 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008731 u8 table_id[0x18];
8732
Erez Shitrit500a3d02017-04-13 06:36:51 +03008733 u8 reserved_at_c0[0x8];
8734 u8 underlay_qpn[0x18];
8735 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008736};
8737
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008738enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008739 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8740 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008741};
8742
8743struct mlx5_ifc_modify_flow_table_out_bits {
8744 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008745 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008746
8747 u8 syndrome[0x20];
8748
Matan Barakb4ff3a32016-02-09 14:57:42 +02008749 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008750};
8751
8752struct mlx5_ifc_modify_flow_table_in_bits {
8753 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008754 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008755
Matan Barakb4ff3a32016-02-09 14:57:42 +02008756 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008757 u8 op_mod[0x10];
8758
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008759 u8 other_vport[0x1];
8760 u8 reserved_at_41[0xf];
8761 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008762
Matan Barakb4ff3a32016-02-09 14:57:42 +02008763 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008764 u8 modify_field_select[0x10];
8765
8766 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008767 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008768
Matan Barakb4ff3a32016-02-09 14:57:42 +02008769 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008770 u8 table_id[0x18];
8771
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008772 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008773};
8774
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008775struct mlx5_ifc_ets_tcn_config_reg_bits {
8776 u8 g[0x1];
8777 u8 b[0x1];
8778 u8 r[0x1];
8779 u8 reserved_at_3[0x9];
8780 u8 group[0x4];
8781 u8 reserved_at_10[0x9];
8782 u8 bw_allocation[0x7];
8783
8784 u8 reserved_at_20[0xc];
8785 u8 max_bw_units[0x4];
8786 u8 reserved_at_30[0x8];
8787 u8 max_bw_value[0x8];
8788};
8789
8790struct mlx5_ifc_ets_global_config_reg_bits {
8791 u8 reserved_at_0[0x2];
8792 u8 r[0x1];
8793 u8 reserved_at_3[0x1d];
8794
8795 u8 reserved_at_20[0xc];
8796 u8 max_bw_units[0x4];
8797 u8 reserved_at_30[0x8];
8798 u8 max_bw_value[0x8];
8799};
8800
8801struct mlx5_ifc_qetc_reg_bits {
8802 u8 reserved_at_0[0x8];
8803 u8 port_number[0x8];
8804 u8 reserved_at_10[0x30];
8805
8806 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8807 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8808};
8809
Huy Nguyen415a64a2017-07-18 16:08:46 -05008810struct mlx5_ifc_qpdpm_dscp_reg_bits {
8811 u8 e[0x1];
8812 u8 reserved_at_01[0x0b];
8813 u8 prio[0x04];
8814};
8815
8816struct mlx5_ifc_qpdpm_reg_bits {
8817 u8 reserved_at_0[0x8];
8818 u8 local_port[0x8];
8819 u8 reserved_at_10[0x10];
8820 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8821};
8822
8823struct mlx5_ifc_qpts_reg_bits {
8824 u8 reserved_at_0[0x8];
8825 u8 local_port[0x8];
8826 u8 reserved_at_10[0x2d];
8827 u8 trust_state[0x3];
8828};
8829
Huy Nguyen50b4a3c2018-03-02 15:47:01 -06008830struct mlx5_ifc_pptb_reg_bits {
8831 u8 reserved_at_0[0x2];
8832 u8 mm[0x2];
8833 u8 reserved_at_4[0x4];
8834 u8 local_port[0x8];
8835 u8 reserved_at_10[0x6];
8836 u8 cm[0x1];
8837 u8 um[0x1];
8838 u8 pm[0x8];
8839
8840 u8 prio_x_buff[0x20];
8841
8842 u8 pm_msb[0x8];
8843 u8 reserved_at_48[0x10];
8844 u8 ctrl_buff[0x4];
8845 u8 untagged_buff[0x4];
8846};
8847
8848struct mlx5_ifc_pbmc_reg_bits {
8849 u8 reserved_at_0[0x8];
8850 u8 local_port[0x8];
8851 u8 reserved_at_10[0x10];
8852
8853 u8 xoff_timer_value[0x10];
8854 u8 xoff_refresh[0x10];
8855
8856 u8 reserved_at_40[0x9];
8857 u8 fullness_threshold[0x7];
8858 u8 port_buffer_size[0x10];
8859
8860 struct mlx5_ifc_bufferx_reg_bits buffer[10];
8861
8862 u8 reserved_at_2e0[0x40];
8863};
8864
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008865struct mlx5_ifc_qtct_reg_bits {
8866 u8 reserved_at_0[0x8];
8867 u8 port_number[0x8];
8868 u8 reserved_at_10[0xd];
8869 u8 prio[0x3];
8870
8871 u8 reserved_at_20[0x1d];
8872 u8 tclass[0x3];
8873};
8874
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008875struct mlx5_ifc_mcia_reg_bits {
8876 u8 l[0x1];
8877 u8 reserved_at_1[0x7];
8878 u8 module[0x8];
8879 u8 reserved_at_10[0x8];
8880 u8 status[0x8];
8881
8882 u8 i2c_device_address[0x8];
8883 u8 page_number[0x8];
8884 u8 device_address[0x10];
8885
8886 u8 reserved_at_40[0x10];
8887 u8 size[0x10];
8888
8889 u8 reserved_at_60[0x20];
8890
8891 u8 dword_0[0x20];
8892 u8 dword_1[0x20];
8893 u8 dword_2[0x20];
8894 u8 dword_3[0x20];
8895 u8 dword_4[0x20];
8896 u8 dword_5[0x20];
8897 u8 dword_6[0x20];
8898 u8 dword_7[0x20];
8899 u8 dword_8[0x20];
8900 u8 dword_9[0x20];
8901 u8 dword_10[0x20];
8902 u8 dword_11[0x20];
8903};
8904
Saeed Mahameed74862162016-06-09 15:11:34 +03008905struct mlx5_ifc_dcbx_param_bits {
8906 u8 dcbx_cee_cap[0x1];
8907 u8 dcbx_ieee_cap[0x1];
8908 u8 dcbx_standby_cap[0x1];
8909 u8 reserved_at_0[0x5];
8910 u8 port_number[0x8];
8911 u8 reserved_at_10[0xa];
8912 u8 max_application_table_size[6];
8913 u8 reserved_at_20[0x15];
8914 u8 version_oper[0x3];
8915 u8 reserved_at_38[5];
8916 u8 version_admin[0x3];
8917 u8 willing_admin[0x1];
8918 u8 reserved_at_41[0x3];
8919 u8 pfc_cap_oper[0x4];
8920 u8 reserved_at_48[0x4];
8921 u8 pfc_cap_admin[0x4];
8922 u8 reserved_at_50[0x4];
8923 u8 num_of_tc_oper[0x4];
8924 u8 reserved_at_58[0x4];
8925 u8 num_of_tc_admin[0x4];
8926 u8 remote_willing[0x1];
8927 u8 reserved_at_61[3];
8928 u8 remote_pfc_cap[4];
8929 u8 reserved_at_68[0x14];
8930 u8 remote_num_of_tc[0x4];
8931 u8 reserved_at_80[0x18];
8932 u8 error[0x8];
8933 u8 reserved_at_a0[0x160];
8934};
Aviv Heller84df61e2016-05-10 13:47:50 +03008935
8936struct mlx5_ifc_lagc_bits {
8937 u8 reserved_at_0[0x1d];
8938 u8 lag_state[0x3];
8939
8940 u8 reserved_at_20[0x14];
8941 u8 tx_remap_affinity_2[0x4];
8942 u8 reserved_at_38[0x4];
8943 u8 tx_remap_affinity_1[0x4];
8944};
8945
8946struct mlx5_ifc_create_lag_out_bits {
8947 u8 status[0x8];
8948 u8 reserved_at_8[0x18];
8949
8950 u8 syndrome[0x20];
8951
8952 u8 reserved_at_40[0x40];
8953};
8954
8955struct mlx5_ifc_create_lag_in_bits {
8956 u8 opcode[0x10];
8957 u8 reserved_at_10[0x10];
8958
8959 u8 reserved_at_20[0x10];
8960 u8 op_mod[0x10];
8961
8962 struct mlx5_ifc_lagc_bits ctx;
8963};
8964
8965struct mlx5_ifc_modify_lag_out_bits {
8966 u8 status[0x8];
8967 u8 reserved_at_8[0x18];
8968
8969 u8 syndrome[0x20];
8970
8971 u8 reserved_at_40[0x40];
8972};
8973
8974struct mlx5_ifc_modify_lag_in_bits {
8975 u8 opcode[0x10];
8976 u8 reserved_at_10[0x10];
8977
8978 u8 reserved_at_20[0x10];
8979 u8 op_mod[0x10];
8980
8981 u8 reserved_at_40[0x20];
8982 u8 field_select[0x20];
8983
8984 struct mlx5_ifc_lagc_bits ctx;
8985};
8986
8987struct mlx5_ifc_query_lag_out_bits {
8988 u8 status[0x8];
8989 u8 reserved_at_8[0x18];
8990
8991 u8 syndrome[0x20];
8992
8993 u8 reserved_at_40[0x40];
8994
8995 struct mlx5_ifc_lagc_bits ctx;
8996};
8997
8998struct mlx5_ifc_query_lag_in_bits {
8999 u8 opcode[0x10];
9000 u8 reserved_at_10[0x10];
9001
9002 u8 reserved_at_20[0x10];
9003 u8 op_mod[0x10];
9004
9005 u8 reserved_at_40[0x40];
9006};
9007
9008struct mlx5_ifc_destroy_lag_out_bits {
9009 u8 status[0x8];
9010 u8 reserved_at_8[0x18];
9011
9012 u8 syndrome[0x20];
9013
9014 u8 reserved_at_40[0x40];
9015};
9016
9017struct mlx5_ifc_destroy_lag_in_bits {
9018 u8 opcode[0x10];
9019 u8 reserved_at_10[0x10];
9020
9021 u8 reserved_at_20[0x10];
9022 u8 op_mod[0x10];
9023
9024 u8 reserved_at_40[0x40];
9025};
9026
9027struct mlx5_ifc_create_vport_lag_out_bits {
9028 u8 status[0x8];
9029 u8 reserved_at_8[0x18];
9030
9031 u8 syndrome[0x20];
9032
9033 u8 reserved_at_40[0x40];
9034};
9035
9036struct mlx5_ifc_create_vport_lag_in_bits {
9037 u8 opcode[0x10];
9038 u8 reserved_at_10[0x10];
9039
9040 u8 reserved_at_20[0x10];
9041 u8 op_mod[0x10];
9042
9043 u8 reserved_at_40[0x40];
9044};
9045
9046struct mlx5_ifc_destroy_vport_lag_out_bits {
9047 u8 status[0x8];
9048 u8 reserved_at_8[0x18];
9049
9050 u8 syndrome[0x20];
9051
9052 u8 reserved_at_40[0x40];
9053};
9054
9055struct mlx5_ifc_destroy_vport_lag_in_bits {
9056 u8 opcode[0x10];
9057 u8 reserved_at_10[0x10];
9058
9059 u8 reserved_at_20[0x10];
9060 u8 op_mod[0x10];
9061
9062 u8 reserved_at_40[0x40];
9063};
9064
Ariel Levkovich24da0012018-04-05 18:53:27 +03009065struct mlx5_ifc_alloc_memic_in_bits {
9066 u8 opcode[0x10];
9067 u8 reserved_at_10[0x10];
9068
9069 u8 reserved_at_20[0x10];
9070 u8 op_mod[0x10];
9071
9072 u8 reserved_at_30[0x20];
9073
9074 u8 reserved_at_40[0x18];
9075 u8 log_memic_addr_alignment[0x8];
9076
9077 u8 range_start_addr[0x40];
9078
9079 u8 range_size[0x20];
9080
9081 u8 memic_size[0x20];
9082};
9083
9084struct mlx5_ifc_alloc_memic_out_bits {
9085 u8 status[0x8];
9086 u8 reserved_at_8[0x18];
9087
9088 u8 syndrome[0x20];
9089
9090 u8 memic_start_addr[0x40];
9091};
9092
9093struct mlx5_ifc_dealloc_memic_in_bits {
9094 u8 opcode[0x10];
9095 u8 reserved_at_10[0x10];
9096
9097 u8 reserved_at_20[0x10];
9098 u8 op_mod[0x10];
9099
9100 u8 reserved_at_40[0x40];
9101
9102 u8 memic_start_addr[0x40];
9103
9104 u8 memic_size[0x20];
9105
9106 u8 reserved_at_e0[0x20];
9107};
9108
9109struct mlx5_ifc_dealloc_memic_out_bits {
9110 u8 status[0x8];
9111 u8 reserved_at_8[0x18];
9112
9113 u8 syndrome[0x20];
9114
9115 u8 reserved_at_40[0x40];
9116};
9117
Eli Cohend29b7962014-10-02 12:19:43 +03009118#endif /* MLX5_IFC_H */