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gerrit-public.fairphone.software / kernel / msm-4.19 / 21ea52aadd6296480baad3b04fef87230517b54c / . / arch / arm / boot / dts / at91sam9x5.dtsi
blob: 3855843fc038d2a76bc97dee7f7f6454507c1745 [file] [log] [blame]
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]1/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 tcb0 = &tcb0;
29 tcb1 = &tcb1;
30 };
31 cpus {
32 cpu@0 {
33 compatible = "arm,arm926ejs";
34 };
35 };
36
37 memory@20000000 {
38 reg = <0x20000000 0x10000000>;
39 };
40
41 ahb {
42 compatible = "simple-bus";
43 #address-cells = <1>;
44 #size-cells = <1>;
45 ranges;
46
47 apb {
48 compatible = "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
52
53 aic: interrupt-controller@fffff000 {
54 #interrupt-cells = <2>;
55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller;
57 interrupt-parent;
58 reg = <0xfffff000 0x200>;
59 };
60
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +0800[diff] [blame]61 pmc: pmc@fffffc00 {
62 compatible = "atmel,at91rm9200-pmc";
63 reg = <0xfffffc00 0x100>;
64 };
65
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]66 pit: timer@fffffe30 {
67 compatible = "atmel,at91sam9260-pit";
68 reg = <0xfffffe30 0xf>;
69 interrupts = <1 4>;
70 };
71
72 tcb0: timer@f8008000 {
73 compatible = "atmel,at91sam9x5-tcb";
74 reg = <0xf8008000 0x100>;
75 interrupts = <17 4>;
76 };
77
78 tcb1: timer@f800c000 {
79 compatible = "atmel,at91sam9x5-tcb";
80 reg = <0xf800c000 0x100>;
81 interrupts = <17 4>;
82 };
83
84 dma0: dma-controller@ffffec00 {
85 compatible = "atmel,at91sam9g45-dma";
86 reg = <0xffffec00 0x200>;
87 interrupts = <20 4>;
88 };
89
90 dma1: dma-controller@ffffee00 {
91 compatible = "atmel,at91sam9g45-dma";
92 reg = <0xffffee00 0x200>;
93 interrupts = <21 4>;
94 };
95
96 pioA: gpio@fffff400 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200[diff] [blame]97 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]98 reg = <0xfffff400 0x100>;
99 interrupts = <2 4>;
100 #gpio-cells = <2>;
101 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]102 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]103 };
104
105 pioB: gpio@fffff600 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200[diff] [blame]106 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]107 reg = <0xfffff600 0x100>;
108 interrupts = <2 4>;
109 #gpio-cells = <2>;
110 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]111 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]112 };
113
114 pioC: gpio@fffff800 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200[diff] [blame]115 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]116 reg = <0xfffff800 0x100>;
117 interrupts = <3 4>;
118 #gpio-cells = <2>;
119 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]120 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]121 };
122
123 pioD: gpio@fffffa00 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200[diff] [blame]124 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]125 reg = <0xfffffa00 0x100>;
126 interrupts = <3 4>;
127 #gpio-cells = <2>;
128 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]129 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]130 };
131
132 dbgu: serial@fffff200 {
133 compatible = "atmel,at91sam9260-usart";
134 reg = <0xfffff200 0x200>;
135 interrupts = <1 4>;
136 status = "disabled";
137 };
138
139 usart0: serial@f801c000 {
140 compatible = "atmel,at91sam9260-usart";
141 reg = <0xf801c000 0x200>;
142 interrupts = <5 4>;
143 atmel,use-dma-rx;
144 atmel,use-dma-tx;
145 status = "disabled";
146 };
147
148 usart1: serial@f8020000 {
149 compatible = "atmel,at91sam9260-usart";
150 reg = <0xf8020000 0x200>;
151 interrupts = <6 4>;
152 atmel,use-dma-rx;
153 atmel,use-dma-tx;
154 status = "disabled";
155 };
156
157 usart2: serial@f8024000 {
158 compatible = "atmel,at91sam9260-usart";
159 reg = <0xf8024000 0x200>;
160 interrupts = <7 4>;
161 atmel,use-dma-rx;
162 atmel,use-dma-tx;
163 status = "disabled";
164 };
165
166 macb0: ethernet@f802c000 {
167 compatible = "cdns,at32ap7000-macb", "cdns,macb";
168 reg = <0xf802c000 0x100>;
169 interrupts = <24 4>;
170 status = "disabled";
171 };
172
173 macb1: ethernet@f8030000 {
174 compatible = "cdns,at32ap7000-macb", "cdns,macb";
175 reg = <0xf8030000 0x100>;
176 interrupts = <27 4>;
177 status = "disabled";
178 };
179 };
Jean-Christophe PLAGNIOL-VILLARD86a89f42012-02-21 21:38:18 +0800[diff] [blame]180
181 nand0: nand@40000000 {
182 compatible = "atmel,at91rm9200-nand";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 reg = <0x40000000 0x10000000
186 >;
187 atmel,nand-addr-offset = <21>;
188 atmel,nand-cmd-offset = <22>;
189 gpios = <&pioC 8 0
190 &pioC 14 0
191 0
192 >;
193 status = "disabled";
194 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]195 };
Jean-Christophe PLAGNIOL-VILLARD10f71c22012-02-23 22:50:32 +0800[diff] [blame]196
197 i2c@0 {
198 compatible = "i2c-gpio";
199 gpios = <&pioA 30 0 /* sda */
200 &pioA 31 0 /* scl */
201 >;
202 i2c-gpio,sda-open-drain;
203 i2c-gpio,scl-open-drain;
204 i2c-gpio,delay-us = <2>; /* ~100 kHz */
205 #address-cells = <1>;
206 #size-cells = <0>;
207 status = "disabled";
208 };
209
210 i2c@1 {
211 compatible = "i2c-gpio";
212 gpios = <&pioC 0 0 /* sda */
213 &pioC 1 0 /* scl */
214 >;
215 i2c-gpio,sda-open-drain;
216 i2c-gpio,scl-open-drain;
217 i2c-gpio,delay-us = <2>; /* ~100 kHz */
218 #address-cells = <1>;
219 #size-cells = <0>;
220 status = "disabled";
221 };
222
223 i2c@2 {
224 compatible = "i2c-gpio";
225 gpios = <&pioB 4 0 /* sda */
226 &pioB 5 0 /* scl */
227 >;
228 i2c-gpio,sda-open-drain;
229 i2c-gpio,scl-open-drain;
230 i2c-gpio,delay-us = <2>; /* ~100 kHz */
231 #address-cells = <1>;
232 #size-cells = <0>;
233 status = "disabled";
234 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]235};