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Stephen Boyd650e3f02011-11-08 10:33:03 -08001/*
Russell Kinga09e64f2008-08-05 16:14:15 +01002 *
3 * Copyright (C) 2007 Google, Inc.
Stephen Boyda3d3ef92011-11-08 10:33:04 -08004 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
Russell Kinga09e64f2008-08-05 16:14:15 +01005 * Author: Brian Swetland <swetland@google.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <mach/hardware.h>
19#include <mach/msm_iomap.h>
20
Nicolas Pitre639da5e2011-08-31 22:55:46 -040021 .macro addruart, rp, rv, tmp
Stephen Boyd650e3f02011-11-08 10:33:03 -080022#ifdef MSM_DEBUG_UART_PHYS
Jeremy Kerr0ea12932010-07-06 18:30:06 +080023 ldr \rp, =MSM_DEBUG_UART_PHYS
24 ldr \rv, =MSM_DEBUG_UART_BASE
Stephen Boyd650e3f02011-11-08 10:33:03 -080025#endif
Russell Kinga09e64f2008-08-05 16:14:15 +010026 .endm
27
Stephen Boyda3d3ef92011-11-08 10:33:04 -080028 .macro senduart, rd, rx
29#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
30 @ Write the 1 character to UARTDM_TF
31 str \rd, [\rx, #0x70]
32#else
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070033 teq \rx, #0
34 strne \rd, [\rx, #0x0C]
Stephen Boyda3d3ef92011-11-08 10:33:04 -080035#endif
Russell Kinga09e64f2008-08-05 16:14:15 +010036 .endm
37
Stephen Boyda3d3ef92011-11-08 10:33:04 -080038 .macro waituart, rd, rx
39#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
40 @ check for TX_EMT in UARTDM_SR
41 ldr \rd, [\rx, #0x08]
42 tst \rd, #0x08
43 bne 1002f
44 @ wait for TXREADY in UARTDM_ISR
451001: ldr \rd, [\rx, #0x14]
46 tst \rd, #0x80
47 beq 1001b
481002:
49 @ Clear TX_READY by writing to the UARTDM_CR register
50 mov \rd, #0x300
51 str \rd, [\rx, #0x10]
52 @ Write 0x1 to NCF register
53 mov \rd, #0x1
54 str \rd, [\rx, #0x40]
55 @ UARTDM reg. Read to induce delay
56 ldr \rd, [\rx, #0x08]
57#else
Russell Kinga09e64f2008-08-05 16:14:15 +010058 @ wait for TX_READY
Pavel Machek6339f662009-11-02 11:48:29 +0100591001: ldr \rd, [\rx, #0x08]
Russell Kinga09e64f2008-08-05 16:14:15 +010060 tst \rd, #0x04
Pavel Machek6339f662009-11-02 11:48:29 +010061 beq 1001b
Stephen Boyda3d3ef92011-11-08 10:33:04 -080062#endif
Russell Kinga09e64f2008-08-05 16:14:15 +010063 .endm
Russell Kinga09e64f2008-08-05 16:14:15 +010064
Stephen Boyda3d3ef92011-11-08 10:33:04 -080065 .macro busyuart, rd, rx
Russell Kinga09e64f2008-08-05 16:14:15 +010066 .endm