Simon Que | 70ba4cc | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 1 | /* |
| 2 | * OMAP hardware spinlock driver |
| 3 | * |
| 4 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com |
| 5 | * |
| 6 | * Contact: Simon Que <sque@ti.com> |
| 7 | * Hari Kanigeri <h-kanigeri2@ti.com> |
| 8 | * Ohad Ben-Cohen <ohad@wizery.com> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License |
| 12 | * version 2 as published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, but |
| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 17 | * General Public License for more details. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/device.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/io.h> |
| 25 | #include <linux/bitops.h> |
| 26 | #include <linux/pm_runtime.h> |
| 27 | #include <linux/slab.h> |
| 28 | #include <linux/spinlock.h> |
| 29 | #include <linux/hwspinlock.h> |
| 30 | #include <linux/platform_device.h> |
| 31 | |
| 32 | #include "hwspinlock_internal.h" |
| 33 | |
| 34 | /* Spinlock register offsets */ |
| 35 | #define SYSSTATUS_OFFSET 0x0014 |
| 36 | #define LOCK_BASE_OFFSET 0x0800 |
| 37 | |
| 38 | #define SPINLOCK_NUMLOCKS_BIT_OFFSET (24) |
| 39 | |
| 40 | /* Possible values of SPINLOCK_LOCK_REG */ |
| 41 | #define SPINLOCK_NOTTAKEN (0) /* free */ |
| 42 | #define SPINLOCK_TAKEN (1) /* locked */ |
| 43 | |
| 44 | #define to_omap_hwspinlock(lock) \ |
| 45 | container_of(lock, struct omap_hwspinlock, lock) |
| 46 | |
| 47 | struct omap_hwspinlock { |
| 48 | struct hwspinlock lock; |
| 49 | void __iomem *addr; |
| 50 | }; |
| 51 | |
| 52 | struct omap_hwspinlock_state { |
| 53 | int num_locks; /* Total number of locks in system */ |
| 54 | void __iomem *io_base; /* Mapped base address */ |
| 55 | }; |
| 56 | |
| 57 | static int omap_hwspinlock_trylock(struct hwspinlock *lock) |
| 58 | { |
| 59 | struct omap_hwspinlock *omap_lock = to_omap_hwspinlock(lock); |
| 60 | |
| 61 | /* attempt to acquire the lock by reading its value */ |
| 62 | return (SPINLOCK_NOTTAKEN == readl(omap_lock->addr)); |
| 63 | } |
| 64 | |
| 65 | static void omap_hwspinlock_unlock(struct hwspinlock *lock) |
| 66 | { |
| 67 | struct omap_hwspinlock *omap_lock = to_omap_hwspinlock(lock); |
| 68 | |
| 69 | /* release the lock by writing 0 to it */ |
| 70 | writel(SPINLOCK_NOTTAKEN, omap_lock->addr); |
| 71 | } |
| 72 | |
| 73 | /* |
| 74 | * relax the OMAP interconnect while spinning on it. |
| 75 | * |
| 76 | * The specs recommended that the retry delay time will be |
| 77 | * just over half of the time that a requester would be |
| 78 | * expected to hold the lock. |
| 79 | * |
| 80 | * The number below is taken from an hardware specs example, |
| 81 | * obviously it is somewhat arbitrary. |
| 82 | */ |
| 83 | static void omap_hwspinlock_relax(struct hwspinlock *lock) |
| 84 | { |
| 85 | ndelay(50); |
| 86 | } |
| 87 | |
| 88 | static const struct hwspinlock_ops omap_hwspinlock_ops = { |
| 89 | .trylock = omap_hwspinlock_trylock, |
| 90 | .unlock = omap_hwspinlock_unlock, |
| 91 | .relax = omap_hwspinlock_relax, |
| 92 | }; |
| 93 | |
| 94 | static int __devinit omap_hwspinlock_probe(struct platform_device *pdev) |
| 95 | { |
| 96 | struct omap_hwspinlock *omap_lock; |
| 97 | struct omap_hwspinlock_state *state; |
| 98 | struct hwspinlock *lock; |
| 99 | struct resource *res; |
| 100 | void __iomem *io_base; |
| 101 | int i, ret; |
| 102 | |
| 103 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 104 | if (!res) |
| 105 | return -ENODEV; |
| 106 | |
| 107 | state = kzalloc(sizeof(*state), GFP_KERNEL); |
| 108 | if (!state) |
| 109 | return -ENOMEM; |
| 110 | |
| 111 | io_base = ioremap(res->start, resource_size(res)); |
| 112 | if (!io_base) { |
| 113 | ret = -ENOMEM; |
| 114 | goto free_state; |
| 115 | } |
| 116 | |
| 117 | /* Determine number of locks */ |
| 118 | i = readl(io_base + SYSSTATUS_OFFSET); |
| 119 | i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET; |
| 120 | |
| 121 | /* one of the four lsb's must be set, and nothing else */ |
| 122 | if (hweight_long(i & 0xf) != 1 || i > 8) { |
| 123 | ret = -EINVAL; |
| 124 | goto iounmap_base; |
| 125 | } |
| 126 | |
| 127 | state->num_locks = i * 32; |
| 128 | state->io_base = io_base; |
| 129 | |
| 130 | platform_set_drvdata(pdev, state); |
| 131 | |
| 132 | /* |
| 133 | * runtime PM will make sure the clock of this module is |
| 134 | * enabled iff at least one lock is requested |
| 135 | */ |
| 136 | pm_runtime_enable(&pdev->dev); |
| 137 | |
| 138 | for (i = 0; i < state->num_locks; i++) { |
| 139 | omap_lock = kzalloc(sizeof(*omap_lock), GFP_KERNEL); |
| 140 | if (!omap_lock) { |
| 141 | ret = -ENOMEM; |
| 142 | goto free_locks; |
| 143 | } |
| 144 | |
| 145 | omap_lock->lock.dev = &pdev->dev; |
Simon Que | 70ba4cc | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 146 | omap_lock->lock.id = i; |
| 147 | omap_lock->lock.ops = &omap_hwspinlock_ops; |
| 148 | omap_lock->addr = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i; |
| 149 | |
| 150 | ret = hwspin_lock_register(&omap_lock->lock); |
| 151 | if (ret) { |
| 152 | kfree(omap_lock); |
| 153 | goto free_locks; |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | return 0; |
| 158 | |
| 159 | free_locks: |
| 160 | while (--i >= 0) { |
| 161 | lock = hwspin_lock_unregister(i); |
| 162 | /* this should't happen, but let's give our best effort */ |
| 163 | if (!lock) { |
| 164 | dev_err(&pdev->dev, "%s: cleanups failed\n", __func__); |
| 165 | continue; |
| 166 | } |
| 167 | omap_lock = to_omap_hwspinlock(lock); |
| 168 | kfree(omap_lock); |
| 169 | } |
| 170 | pm_runtime_disable(&pdev->dev); |
| 171 | iounmap_base: |
| 172 | iounmap(io_base); |
| 173 | free_state: |
| 174 | kfree(state); |
| 175 | return ret; |
| 176 | } |
| 177 | |
| 178 | static int omap_hwspinlock_remove(struct platform_device *pdev) |
| 179 | { |
| 180 | struct omap_hwspinlock_state *state = platform_get_drvdata(pdev); |
| 181 | struct hwspinlock *lock; |
| 182 | struct omap_hwspinlock *omap_lock; |
| 183 | int i; |
| 184 | |
| 185 | for (i = 0; i < state->num_locks; i++) { |
| 186 | lock = hwspin_lock_unregister(i); |
| 187 | /* this shouldn't happen at this point. if it does, at least |
| 188 | * don't continue with the remove */ |
| 189 | if (!lock) { |
| 190 | dev_err(&pdev->dev, "%s: failed on %d\n", __func__, i); |
| 191 | return -EBUSY; |
| 192 | } |
| 193 | |
| 194 | omap_lock = to_omap_hwspinlock(lock); |
| 195 | kfree(omap_lock); |
| 196 | } |
| 197 | |
| 198 | pm_runtime_disable(&pdev->dev); |
| 199 | iounmap(state->io_base); |
| 200 | kfree(state); |
| 201 | |
| 202 | return 0; |
| 203 | } |
| 204 | |
| 205 | static struct platform_driver omap_hwspinlock_driver = { |
| 206 | .probe = omap_hwspinlock_probe, |
| 207 | .remove = omap_hwspinlock_remove, |
| 208 | .driver = { |
| 209 | .name = "omap_hwspinlock", |
Ohad Ben-Cohen | e467b64 | 2011-09-05 16:42:36 +0300 | [diff] [blame^] | 210 | .owner = THIS_MODULE, |
Simon Que | 70ba4cc | 2011-02-17 09:52:03 -0800 | [diff] [blame] | 211 | }, |
| 212 | }; |
| 213 | |
| 214 | static int __init omap_hwspinlock_init(void) |
| 215 | { |
| 216 | return platform_driver_register(&omap_hwspinlock_driver); |
| 217 | } |
| 218 | /* board init code might need to reserve hwspinlocks for predefined purposes */ |
| 219 | postcore_initcall(omap_hwspinlock_init); |
| 220 | |
| 221 | static void __exit omap_hwspinlock_exit(void) |
| 222 | { |
| 223 | platform_driver_unregister(&omap_hwspinlock_driver); |
| 224 | } |
| 225 | module_exit(omap_hwspinlock_exit); |
| 226 | |
| 227 | MODULE_LICENSE("GPL v2"); |
| 228 | MODULE_DESCRIPTION("Hardware spinlock driver for OMAP"); |
| 229 | MODULE_AUTHOR("Simon Que <sque@ti.com>"); |
| 230 | MODULE_AUTHOR("Hari Kanigeri <h-kanigeri2@ti.com>"); |
| 231 | MODULE_AUTHOR("Ohad Ben-Cohen <ohad@wizery.com>"); |