| Hans de Goede | 47cf4b3 | 2014-12-17 18:18:13 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Allwinner A31s SoCs pinctrl driver. |
| 3 | * |
| 4 | * Copyright (C) 2014 Hans de Goede <hdegoede@redhat.com> |
| 5 | * |
| 6 | * Based on pinctrl-sun6i-a31.c, which is: |
| 7 | * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com> |
| 8 | * |
| 9 | * This file is licensed under the terms of the GNU General Public |
| 10 | * License version 2. This program is licensed "as is" without any |
| 11 | * warranty of any kind, whether express or implied. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/platform_device.h> |
| 16 | #include <linux/of.h> |
| 17 | #include <linux/of_device.h> |
| 18 | #include <linux/pinctrl/pinctrl.h> |
| 19 | |
| 20 | #include "pinctrl-sunxi.h" |
| 21 | |
| 22 | static const struct sunxi_desc_pin sun6i_a31s_pins[] = { |
| 23 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0), |
| 24 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 25 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 26 | SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */ |
| 27 | SUNXI_FUNCTION(0x4, "uart1"), /* DTR */ |
| 28 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PA_EINT0 */ |
| 29 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1), |
| 30 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 31 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 32 | SUNXI_FUNCTION(0x2, "gmac"), /* TXD1 */ |
| 33 | SUNXI_FUNCTION(0x4, "uart1"), /* DSR */ |
| 34 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PA_EINT1 */ |
| 35 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2), |
| 36 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 37 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 38 | SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */ |
| 39 | SUNXI_FUNCTION(0x4, "uart1"), /* DCD */ |
| 40 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PA_EINT2 */ |
| 41 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3), |
| 42 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 43 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 44 | SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */ |
| 45 | SUNXI_FUNCTION(0x4, "uart1"), /* RING */ |
| 46 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PA_EINT3 */ |
| 47 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4), |
| 48 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 49 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 50 | SUNXI_FUNCTION(0x2, "gmac"), /* TXD4 */ |
| 51 | SUNXI_FUNCTION(0x4, "uart1"), /* TX */ |
| 52 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PA_EINT4 */ |
| 53 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5), |
| 54 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 55 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 56 | SUNXI_FUNCTION(0x2, "gmac"), /* TXD5 */ |
| 57 | SUNXI_FUNCTION(0x4, "uart1"), /* RX */ |
| 58 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PA_EINT5 */ |
| 59 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6), |
| 60 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 61 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 62 | SUNXI_FUNCTION(0x2, "gmac"), /* TXD6 */ |
| 63 | SUNXI_FUNCTION(0x4, "uart1"), /* RTS */ |
| 64 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PA_EINT6 */ |
| 65 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7), |
| 66 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 67 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 68 | SUNXI_FUNCTION(0x2, "gmac"), /* TXD7 */ |
| 69 | SUNXI_FUNCTION(0x4, "uart1"), /* CTS */ |
| 70 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PA_EINT7 */ |
| 71 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8), |
| 72 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 73 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 74 | SUNXI_FUNCTION(0x2, "gmac"), /* TXCLK */ |
| 75 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PA_EINT8 */ |
| 76 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9), |
| 77 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 78 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 79 | SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */ |
| 80 | SUNXI_FUNCTION(0x4, "mmc3"), /* CMD */ |
| 81 | SUNXI_FUNCTION(0x5, "mmc2"), /* CMD */ |
| 82 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PA_EINT9 */ |
| 83 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10), |
| 84 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 85 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 86 | SUNXI_FUNCTION(0x2, "gmac"), /* GTXCLK */ |
| 87 | SUNXI_FUNCTION(0x4, "mmc3"), /* CLK */ |
| 88 | SUNXI_FUNCTION(0x5, "mmc2"), /* CLK */ |
| 89 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PA_EINT10 */ |
| 90 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11), |
| 91 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 92 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 93 | SUNXI_FUNCTION(0x2, "gmac"), /* RXD0 */ |
| 94 | SUNXI_FUNCTION(0x4, "mmc3"), /* D0 */ |
| 95 | SUNXI_FUNCTION(0x5, "mmc2"), /* D0 */ |
| 96 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PA_EINT11 */ |
| 97 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12), |
| 98 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 99 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 100 | SUNXI_FUNCTION(0x2, "gmac"), /* RXD1 */ |
| 101 | SUNXI_FUNCTION(0x4, "mmc3"), /* D1 */ |
| 102 | SUNXI_FUNCTION(0x5, "mmc2"), /* D1 */ |
| 103 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PA_EINT12 */ |
| 104 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13), |
| 105 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 106 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 107 | SUNXI_FUNCTION(0x2, "gmac"), /* RXD2 */ |
| 108 | SUNXI_FUNCTION(0x4, "mmc3"), /* D2 */ |
| 109 | SUNXI_FUNCTION(0x5, "mmc2"), /* D2 */ |
| 110 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), /* PA_EINT13 */ |
| 111 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14), |
| 112 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 113 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 114 | SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */ |
| 115 | SUNXI_FUNCTION(0x4, "mmc3"), /* D3 */ |
| 116 | SUNXI_FUNCTION(0x5, "mmc2"), /* D3 */ |
| 117 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)), /* PA_EINT14 */ |
| 118 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15), |
| 119 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 120 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 121 | SUNXI_FUNCTION(0x2, "gmac"), /* RXD4 */ |
| 122 | SUNXI_FUNCTION(0x4, "clk_out_a"), |
| 123 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PA_EINT15 */ |
| 124 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16), |
| 125 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 126 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 127 | SUNXI_FUNCTION(0x2, "gmac"), /* RXD5 */ |
| 128 | SUNXI_FUNCTION(0x4, "dmic"), /* CLK */ |
| 129 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PA_EINT16 */ |
| 130 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17), |
| 131 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 132 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 133 | SUNXI_FUNCTION(0x2, "gmac"), /* RXD6 */ |
| 134 | SUNXI_FUNCTION(0x4, "dmic"), /* DIN */ |
| 135 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), /* PA_EINT17 */ |
| 136 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18), |
| 137 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 138 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 139 | SUNXI_FUNCTION(0x2, "gmac"), /* RXD7 */ |
| 140 | SUNXI_FUNCTION(0x4, "clk_out_b"), |
| 141 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), /* PA_EINT18 */ |
| 142 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19), |
| 143 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 144 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 145 | SUNXI_FUNCTION(0x2, "gmac"), /* RXDV */ |
| 146 | SUNXI_FUNCTION(0x4, "pwm3"), /* Positive */ |
| 147 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)), /* PA_EINT19 */ |
| 148 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20), |
| 149 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 150 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 151 | SUNXI_FUNCTION(0x2, "gmac"), /* RXCLK */ |
| 152 | SUNXI_FUNCTION(0x4, "pwm3"), /* Negative */ |
| 153 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)), /* PA_EINT20 */ |
| 154 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21), |
| 155 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 156 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 157 | SUNXI_FUNCTION(0x2, "gmac"), /* TXERR */ |
| 158 | SUNXI_FUNCTION(0x4, "spi3"), /* CS0 */ |
| 159 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 21)), /* PA_EINT21 */ |
| 160 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 22), |
| 161 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 162 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 163 | SUNXI_FUNCTION(0x2, "gmac"), /* RXERR */ |
| 164 | SUNXI_FUNCTION(0x4, "spi3"), /* CLK */ |
| 165 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 22)), /* PA_EINT22 */ |
| 166 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 23), |
| 167 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 168 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 169 | SUNXI_FUNCTION(0x2, "gmac"), /* COL */ |
| 170 | SUNXI_FUNCTION(0x4, "spi3"), /* MOSI */ |
| 171 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 23)), /* PA_EINT23 */ |
| 172 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 24), |
| 173 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 174 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 175 | SUNXI_FUNCTION(0x2, "gmac"), /* CRS */ |
| 176 | SUNXI_FUNCTION(0x4, "spi3"), /* MISO */ |
| 177 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 24)), /* PA_EINT24 */ |
| 178 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 25), |
| 179 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 180 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 181 | SUNXI_FUNCTION(0x2, "gmac"), /* CLKIN */ |
| 182 | SUNXI_FUNCTION(0x4, "spi3"), /* CS1 */ |
| 183 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 25)), /* PA_EINT25 */ |
| 184 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 26), |
| 185 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 186 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 187 | SUNXI_FUNCTION(0x2, "gmac"), /* MDC */ |
| 188 | SUNXI_FUNCTION(0x4, "clk_out_c"), |
| 189 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 26)), /* PA_EINT26 */ |
| 190 | SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27), |
| 191 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 192 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 193 | SUNXI_FUNCTION(0x2, "gmac"), /* MDIO */ |
| 194 | SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 27)), /* PA_EINT27 */ |
| 195 | /* Hole */ |
| 196 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), |
| 197 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 198 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 199 | SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */ |
| 200 | SUNXI_FUNCTION(0x3, "uart3"), /* CTS */ |
| 201 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PB_EINT0 */ |
| 202 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), |
| 203 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 204 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 205 | SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */ |
| 206 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PB_EINT1 */ |
| 207 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), |
| 208 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 209 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 210 | SUNXI_FUNCTION(0x2, "i2s0"), /* LRCK */ |
| 211 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PB_EINT2 */ |
| 212 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), |
| 213 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 214 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 215 | SUNXI_FUNCTION(0x2, "i2s0"), /* DO0 */ |
| 216 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PB_EINT3 */ |
| 217 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), |
| 218 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 219 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 220 | SUNXI_FUNCTION(0x2, "i2s0"), /* DO1 */ |
| 221 | SUNXI_FUNCTION(0x3, "uart3"), /* RTS */ |
| 222 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PB_EINT4 */ |
| 223 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), |
| 224 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 225 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 226 | SUNXI_FUNCTION(0x2, "i2s0"), /* DO2 */ |
| 227 | SUNXI_FUNCTION(0x3, "uart3"), /* TX */ |
| 228 | SUNXI_FUNCTION(0x4, "i2c3"), /* SCK */ |
| 229 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* PB_EINT5 */ |
| 230 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), |
| 231 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 232 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 233 | SUNXI_FUNCTION(0x2, "i2s0"), /* DO3 */ |
| 234 | SUNXI_FUNCTION(0x3, "uart3"), /* RX */ |
| 235 | SUNXI_FUNCTION(0x4, "i2c3"), /* SDA */ |
| 236 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* PB_EINT6 */ |
| 237 | SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), |
| 238 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 239 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 240 | SUNXI_FUNCTION(0x3, "i2s0"), /* DI */ |
| 241 | SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* PB_EINT7 */ |
| 242 | /* Hole */ |
| 243 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), |
| 244 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 245 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 246 | SUNXI_FUNCTION(0x2, "nand0"), /* WE */ |
| 247 | SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ |
| 248 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), |
| 249 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 250 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 251 | SUNXI_FUNCTION(0x2, "nand0"), /* ALE */ |
| 252 | SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ |
| 253 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), |
| 254 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 255 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 256 | SUNXI_FUNCTION(0x2, "nand0"), /* CLE */ |
| 257 | SUNXI_FUNCTION(0x3, "spi0")), /* CLK */ |
| 258 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), |
| 259 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 260 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 261 | SUNXI_FUNCTION(0x2, "nand0")), /* CE1 */ |
| 262 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), |
| 263 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 264 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 265 | SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */ |
| 266 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), |
| 267 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 268 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 269 | SUNXI_FUNCTION(0x2, "nand0")), /* RE */ |
| 270 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), |
| 271 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 272 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 273 | SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */ |
| 274 | SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */ |
| 275 | SUNXI_FUNCTION(0x4, "mmc3")), /* CMD */ |
| 276 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), |
| 277 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 278 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 279 | SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */ |
| 280 | SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */ |
| 281 | SUNXI_FUNCTION(0x4, "mmc3")), /* CLK */ |
| 282 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), |
| 283 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 284 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 285 | SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */ |
| 286 | SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */ |
| 287 | SUNXI_FUNCTION(0x4, "mmc3")), /* D0 */ |
| 288 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), |
| 289 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 290 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 291 | SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */ |
| 292 | SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */ |
| 293 | SUNXI_FUNCTION(0x4, "mmc3")), /* D1 */ |
| 294 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), |
| 295 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 296 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 297 | SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */ |
| 298 | SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */ |
| 299 | SUNXI_FUNCTION(0x4, "mmc3")), /* D2 */ |
| 300 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), |
| 301 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 302 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 303 | SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */ |
| 304 | SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */ |
| 305 | SUNXI_FUNCTION(0x4, "mmc3")), /* D3 */ |
| 306 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), |
| 307 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 308 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 309 | SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */ |
| 310 | SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */ |
| 311 | SUNXI_FUNCTION(0x4, "mmc3")), /* D4 */ |
| 312 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), |
| 313 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 314 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 315 | SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */ |
| 316 | SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */ |
| 317 | SUNXI_FUNCTION(0x4, "mmc3")), /* D5 */ |
| 318 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), |
| 319 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 320 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 321 | SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */ |
| 322 | SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */ |
| 323 | SUNXI_FUNCTION(0x4, "mmc3")), /* D6 */ |
| 324 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), |
| 325 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 326 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 327 | SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */ |
| 328 | SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */ |
| 329 | SUNXI_FUNCTION(0x4, "mmc3")), /* D7 */ |
| 330 | /* Hole in pin numbering ! */ |
| 331 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24), |
| 332 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 333 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 334 | SUNXI_FUNCTION(0x2, "nand0"), /* DQS */ |
| 335 | SUNXI_FUNCTION(0x3, "mmc2"), /* RST */ |
| 336 | SUNXI_FUNCTION(0x4, "mmc3")), /* RST */ |
| 337 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 25), |
| 338 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 339 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 340 | SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */ |
| 341 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 26), |
| 342 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 343 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 344 | SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */ |
| 345 | SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 27), |
| 346 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 347 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 348 | SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */ |
| 349 | /* Hole */ |
| 350 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), |
| 351 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 352 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 353 | SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */ |
| 354 | SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */ |
| 355 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), |
| 356 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 357 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 358 | SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */ |
| 359 | SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */ |
| 360 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), |
| 361 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 362 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 363 | SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ |
| 364 | SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */ |
| 365 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), |
| 366 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 367 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 368 | SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ |
| 369 | SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */ |
| 370 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), |
| 371 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 372 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 373 | SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ |
| 374 | SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */ |
| 375 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), |
| 376 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 377 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 378 | SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ |
| 379 | SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */ |
| 380 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), |
| 381 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 382 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 383 | SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ |
| 384 | SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */ |
| 385 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), |
| 386 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 387 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 388 | SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ |
| 389 | SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */ |
| 390 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), |
| 391 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 392 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 393 | SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */ |
| 394 | SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */ |
| 395 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), |
| 396 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 397 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 398 | SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */ |
| 399 | SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */ |
| 400 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), |
| 401 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 402 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 403 | SUNXI_FUNCTION(0x2, "lcd0")), /* D10 */ |
| 404 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), |
| 405 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 406 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 407 | SUNXI_FUNCTION(0x2, "lcd0")), /* D11 */ |
| 408 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), |
| 409 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 410 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 411 | SUNXI_FUNCTION(0x2, "lcd0")), /* D12 */ |
| 412 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), |
| 413 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 414 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 415 | SUNXI_FUNCTION(0x2, "lcd0")), /* D13 */ |
| 416 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), |
| 417 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 418 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 419 | SUNXI_FUNCTION(0x2, "lcd0")), /* D14 */ |
| 420 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), |
| 421 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 422 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 423 | SUNXI_FUNCTION(0x2, "lcd0")), /* D15 */ |
| 424 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), |
| 425 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 426 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 427 | SUNXI_FUNCTION(0x2, "lcd0")), /* D16 */ |
| 428 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), |
| 429 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 430 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 431 | SUNXI_FUNCTION(0x2, "lcd0")), /* D17 */ |
| 432 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), |
| 433 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 434 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 435 | SUNXI_FUNCTION(0x2, "lcd0")), /* D18 */ |
| 436 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), |
| 437 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 438 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 439 | SUNXI_FUNCTION(0x2, "lcd0")), /* D19 */ |
| 440 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), |
| 441 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 442 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 443 | SUNXI_FUNCTION(0x2, "lcd0")), /* D20 */ |
| 444 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), |
| 445 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 446 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 447 | SUNXI_FUNCTION(0x2, "lcd0")), /* D21 */ |
| 448 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), |
| 449 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 450 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 451 | SUNXI_FUNCTION(0x2, "lcd0")), /* D22 */ |
| 452 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), |
| 453 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 454 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 455 | SUNXI_FUNCTION(0x2, "lcd0")), /* D23 */ |
| 456 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), |
| 457 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 458 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 459 | SUNXI_FUNCTION(0x2, "lcd0")), /* CLK */ |
| 460 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25), |
| 461 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 462 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 463 | SUNXI_FUNCTION(0x2, "lcd0")), /* DE */ |
| 464 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26), |
| 465 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 466 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 467 | SUNXI_FUNCTION(0x2, "lcd0")), /* HSYNC */ |
| 468 | SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27), |
| 469 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 470 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 471 | SUNXI_FUNCTION(0x2, "lcd0")), /* VSYNC */ |
| 472 | /* Hole */ |
| 473 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), |
| 474 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 475 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 476 | SUNXI_FUNCTION(0x2, "csi"), /* PCLK */ |
| 477 | SUNXI_FUNCTION(0x3, "ts"), /* CLK */ |
| 478 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), /* PE_EINT0 */ |
| 479 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), |
| 480 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 481 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 482 | SUNXI_FUNCTION(0x2, "csi"), /* MCLK */ |
| 483 | SUNXI_FUNCTION(0x3, "ts"), /* ERR */ |
| 484 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PE_EINT1 */ |
| 485 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), |
| 486 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 487 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 488 | SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */ |
| 489 | SUNXI_FUNCTION(0x3, "ts"), /* SYNC */ |
| 490 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), /* PE_EINT2 */ |
| 491 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), |
| 492 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 493 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 494 | SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */ |
| 495 | SUNXI_FUNCTION(0x3, "ts"), /* DVLD */ |
| 496 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), /* PE_EINT3 */ |
| 497 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), |
| 498 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 499 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 500 | SUNXI_FUNCTION(0x2, "csi"), /* D0 */ |
| 501 | SUNXI_FUNCTION(0x3, "uart5"), /* TX */ |
| 502 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* PE_EINT4 */ |
| 503 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), |
| 504 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 505 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 506 | SUNXI_FUNCTION(0x2, "csi"), /* D1 */ |
| 507 | SUNXI_FUNCTION(0x3, "uart5"), /* RX */ |
| 508 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), /* PE_EINT5 */ |
| 509 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), |
| 510 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 511 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 512 | SUNXI_FUNCTION(0x2, "csi"), /* D2 */ |
| 513 | SUNXI_FUNCTION(0x3, "uart5"), /* RTS */ |
| 514 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), /* PE_EINT6 */ |
| 515 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), |
| 516 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 517 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 518 | SUNXI_FUNCTION(0x2, "csi"), /* D3 */ |
| 519 | SUNXI_FUNCTION(0x3, "uart5"), /* CTS */ |
| 520 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), /* PE_EINT7 */ |
| 521 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), |
| 522 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 523 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 524 | SUNXI_FUNCTION(0x2, "csi"), /* D4 */ |
| 525 | SUNXI_FUNCTION(0x3, "ts"), /* D0 */ |
| 526 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), /* PE_EINT8 */ |
| 527 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), |
| 528 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 529 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 530 | SUNXI_FUNCTION(0x2, "csi"), /* D5 */ |
| 531 | SUNXI_FUNCTION(0x3, "ts"), /* D1 */ |
| 532 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), /* PE_EINT9 */ |
| 533 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), |
| 534 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 535 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 536 | SUNXI_FUNCTION(0x2, "csi"), /* D6 */ |
| 537 | SUNXI_FUNCTION(0x3, "ts"), /* D2 */ |
| 538 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* PE_EINT10 */ |
| 539 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), |
| 540 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 541 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 542 | SUNXI_FUNCTION(0x2, "csi"), /* D7 */ |
| 543 | SUNXI_FUNCTION(0x3, "ts"), /* D3 */ |
| 544 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PE_EINT11 */ |
| 545 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), |
| 546 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 547 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 548 | SUNXI_FUNCTION(0x2, "csi"), /* D8 */ |
| 549 | SUNXI_FUNCTION(0x3, "ts"), /* D4 */ |
| 550 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), /* PE_EINT12 */ |
| 551 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), |
| 552 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 553 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 554 | SUNXI_FUNCTION(0x2, "csi"), /* D9 */ |
| 555 | SUNXI_FUNCTION(0x3, "ts"), /* D5 */ |
| 556 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), /* PE_EINT13 */ |
| 557 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), |
| 558 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 559 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 560 | SUNXI_FUNCTION(0x2, "csi"), /* D10 */ |
| 561 | SUNXI_FUNCTION(0x3, "ts"), /* D6 */ |
| 562 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)), /* PE_EINT14 */ |
| 563 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), |
| 564 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 565 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 566 | SUNXI_FUNCTION(0x2, "csi"), /* D11 */ |
| 567 | SUNXI_FUNCTION(0x3, "ts"), /* D7 */ |
| 568 | SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)), /* PE_EINT15 */ |
| 569 | /* Hole */ |
| 570 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), |
| 571 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 572 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 573 | SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ |
| 574 | SUNXI_FUNCTION(0x4, "jtag")), /* MS1 */ |
| 575 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), |
| 576 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 577 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 578 | SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ |
| 579 | SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */ |
| 580 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), |
| 581 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 582 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 583 | SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ |
| 584 | SUNXI_FUNCTION(0x4, "uart0")), /* TX */ |
| 585 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), |
| 586 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 587 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 588 | SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ |
| 589 | SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */ |
| 590 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), |
| 591 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 592 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 593 | SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ |
| 594 | SUNXI_FUNCTION(0x4, "uart0")), /* RX */ |
| 595 | SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), |
| 596 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 597 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 598 | SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ |
| 599 | SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */ |
| 600 | /* Hole */ |
| 601 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), |
| 602 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 603 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 604 | SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ |
| 605 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)), /* PG_EINT0 */ |
| 606 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), |
| 607 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 608 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 609 | SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ |
| 610 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)), /* PG_EINT1 */ |
| 611 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), |
| 612 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 613 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 614 | SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */ |
| 615 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)), /* PG_EINT2 */ |
| 616 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), |
| 617 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 618 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 619 | SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */ |
| 620 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)), /* PG_EINT3 */ |
| 621 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), |
| 622 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 623 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 624 | SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */ |
| 625 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)), /* PG_EINT4 */ |
| 626 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), |
| 627 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 628 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 629 | SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */ |
| 630 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)), /* PG_EINT5 */ |
| 631 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), |
| 632 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 633 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 634 | SUNXI_FUNCTION(0x2, "uart2"), /* TX */ |
| 635 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)), /* PG_EINT6 */ |
| 636 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), |
| 637 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 638 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 639 | SUNXI_FUNCTION(0x2, "uart2"), /* RX */ |
| 640 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)), /* PG_EINT7 */ |
| 641 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), |
| 642 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 643 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 644 | SUNXI_FUNCTION(0x2, "uart2"), /* RTS */ |
| 645 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)), /* PG_EINT8 */ |
| 646 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), |
| 647 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 648 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 649 | SUNXI_FUNCTION(0x2, "uart2"), /* CTS */ |
| 650 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)), /* PG_EINT9 */ |
| 651 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), |
| 652 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 653 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 654 | SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */ |
| 655 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)), /* PG_EINT10 */ |
| 656 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), |
| 657 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 658 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 659 | SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */ |
| 660 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 11)), /* PG_EINT11 */ |
| 661 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), |
| 662 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 663 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 664 | SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */ |
| 665 | SUNXI_FUNCTION(0x3, "i2s1"), /* MCLK */ |
| 666 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 12)), /* PG_EINT12 */ |
| 667 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), |
| 668 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 669 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 670 | SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */ |
| 671 | SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */ |
| 672 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 13)), /* PG_EINT13 */ |
| 673 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14), |
| 674 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 675 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 676 | SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ |
| 677 | SUNXI_FUNCTION(0x3, "i2s1"), /* LRCK */ |
| 678 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 14)), /* PG_EINT14 */ |
| 679 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15), |
| 680 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 681 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 682 | SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ |
| 683 | SUNXI_FUNCTION(0x3, "i2s1"), /* DIN */ |
| 684 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 15)), /* PG_EINT15 */ |
| 685 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16), |
| 686 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 687 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 688 | SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ |
| 689 | SUNXI_FUNCTION(0x3, "i2s1"), /* DOUT */ |
| 690 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 16)), /* PG_EINT16 */ |
| 691 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17), |
| 692 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 693 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 694 | SUNXI_FUNCTION(0x2, "uart4"), /* TX */ |
| 695 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 17)), /* PG_EINT17 */ |
| 696 | SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18), |
| 697 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 698 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 699 | SUNXI_FUNCTION(0x2, "uart4"), /* RX */ |
| 700 | SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 18)), /* PG_EINT18 */ |
| 701 | /* Hole, note H starts at pin 9 */ |
| 702 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), |
| 703 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 704 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 705 | SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */ |
| 706 | SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */ |
| 707 | SUNXI_FUNCTION(0x4, "pwm1")), /* Positive */ |
| 708 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10), |
| 709 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 710 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 711 | SUNXI_FUNCTION(0x2, "spi2"), /* CLK */ |
| 712 | SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */ |
| 713 | SUNXI_FUNCTION(0x4, "pwm1")), /* Negative */ |
| 714 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11), |
| 715 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 716 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 717 | SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */ |
| 718 | SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */ |
| 719 | SUNXI_FUNCTION(0x4, "pwm2")), /* Positive */ |
| 720 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12), |
| 721 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 722 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 723 | SUNXI_FUNCTION(0x2, "spi2"), /* MISO */ |
| 724 | SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */ |
| 725 | SUNXI_FUNCTION(0x4, "pwm2")), /* Negative */ |
| 726 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13), |
| 727 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 728 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 729 | SUNXI_FUNCTION(0x2, "pwm0")), |
| 730 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14), |
| 731 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 732 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 733 | SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */ |
| 734 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15), |
| 735 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 736 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 737 | SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */ |
| 738 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16), |
| 739 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 740 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 741 | SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */ |
| 742 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17), |
| 743 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 744 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 745 | SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */ |
| 746 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18), |
| 747 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 748 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 749 | SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */ |
| 750 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19), |
| 751 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 752 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 753 | SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */ |
| 754 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20), |
| 755 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 756 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 757 | SUNXI_FUNCTION(0x2, "uart0")), /* TX */ |
| 758 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21), |
| 759 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 760 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 761 | SUNXI_FUNCTION(0x2, "uart0")), /* RX */ |
| 762 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22), |
| 763 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 764 | SUNXI_FUNCTION(0x1, "gpio_out")), |
| 765 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23), |
| 766 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 767 | SUNXI_FUNCTION(0x1, "gpio_out")), |
| 768 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24), |
| 769 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 770 | SUNXI_FUNCTION(0x1, "gpio_out")), |
| 771 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25), |
| 772 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 773 | SUNXI_FUNCTION(0x1, "gpio_out")), |
| 774 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26), |
| 775 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 776 | SUNXI_FUNCTION(0x1, "gpio_out")), |
| 777 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27), |
| 778 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 779 | SUNXI_FUNCTION(0x1, "gpio_out")), |
| 780 | SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 28), |
| 781 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 782 | SUNXI_FUNCTION(0x1, "gpio_out")), |
| 783 | }; |
| 784 | |
| 785 | static const struct sunxi_pinctrl_desc sun6i_a31s_pinctrl_data = { |
| 786 | .pins = sun6i_a31s_pins, |
| 787 | .npins = ARRAY_SIZE(sun6i_a31s_pins), |
| 788 | .irq_banks = 4, |
| 789 | }; |
| 790 | |
| 791 | static int sun6i_a31s_pinctrl_probe(struct platform_device *pdev) |
| 792 | { |
| 793 | return sunxi_pinctrl_init(pdev, |
| 794 | &sun6i_a31s_pinctrl_data); |
| 795 | } |
| 796 | |
| Fabian Frederick | baa9946e | 2015-03-16 20:59:09 +0100 | [diff] [blame] | 797 | static const struct of_device_id sun6i_a31s_pinctrl_match[] = { |
| Hans de Goede | 47cf4b3 | 2014-12-17 18:18:13 +0100 | [diff] [blame] | 798 | { .compatible = "allwinner,sun6i-a31s-pinctrl", }, |
| 799 | {} |
| 800 | }; |
| 801 | MODULE_DEVICE_TABLE(of, sun6i_a31s_pinctrl_match); |
| 802 | |
| 803 | static struct platform_driver sun6i_a31s_pinctrl_driver = { |
| 804 | .probe = sun6i_a31s_pinctrl_probe, |
| 805 | .driver = { |
| 806 | .name = "sun6i-a31s-pinctrl", |
| 807 | .owner = THIS_MODULE, |
| 808 | .of_match_table = sun6i_a31s_pinctrl_match, |
| 809 | }, |
| 810 | }; |
| 811 | module_platform_driver(sun6i_a31s_pinctrl_driver); |
| 812 | |
| 813 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); |
| 814 | MODULE_DESCRIPTION("Allwinner A31s pinctrl driver"); |
| 815 | MODULE_LICENSE("GPL"); |