Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 1 | /* |
| 2 | * core.c - ChipIdea USB IP core family device controller |
| 3 | * |
| 4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. |
| 5 | * |
| 6 | * Author: David Lopo |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | /* |
| 14 | * Description: ChipIdea USB IP core family device controller |
| 15 | * |
| 16 | * This driver is composed of several blocks: |
| 17 | * - HW: hardware interface |
| 18 | * - DBG: debug facilities (optional) |
| 19 | * - UTIL: utilities |
| 20 | * - ISR: interrupts handling |
| 21 | * - ENDPT: endpoint operations (Gadget API) |
| 22 | * - GADGET: gadget operations (Gadget API) |
| 23 | * - BUS: bus glue code, bus abstraction layer |
| 24 | * |
| 25 | * Compile Options |
Peter Chen | 58ce849 | 2014-05-23 08:12:47 +0800 | [diff] [blame] | 26 | * - CONFIG_USB_CHIPIDEA_DEBUG: enable debug facilities |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 27 | * - STALL_IN: non-empty bulk-in pipes cannot be halted |
| 28 | * if defined mass storage compliance succeeds but with warnings |
| 29 | * => case 4: Hi > Dn |
| 30 | * => case 5: Hi > Di |
| 31 | * => case 8: Hi <> Do |
| 32 | * if undefined usbtest 13 fails |
| 33 | * - TRACE: enable function tracing (depends on DEBUG) |
| 34 | * |
| 35 | * Main Features |
| 36 | * - Chapter 9 & Mass Storage Compliance with Gadget File Storage |
| 37 | * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined) |
| 38 | * - Normal & LPM support |
| 39 | * |
| 40 | * USBTEST Report |
| 41 | * - OK: 0-12, 13 (STALL_IN defined) & 14 |
| 42 | * - Not Supported: 15 & 16 (ISO) |
| 43 | * |
| 44 | * TODO List |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 45 | * - Suspend & Remote Wakeup |
| 46 | */ |
| 47 | #include <linux/delay.h> |
| 48 | #include <linux/device.h> |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 49 | #include <linux/dma-mapping.h> |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 50 | #include <linux/phy/phy.h> |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 51 | #include <linux/platform_device.h> |
| 52 | #include <linux/module.h> |
Richard Zhao | fe6e125 | 2012-07-07 22:56:42 +0800 | [diff] [blame] | 53 | #include <linux/idr.h> |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 54 | #include <linux/interrupt.h> |
| 55 | #include <linux/io.h> |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 56 | #include <linux/kernel.h> |
| 57 | #include <linux/slab.h> |
| 58 | #include <linux/pm_runtime.h> |
| 59 | #include <linux/usb/ch9.h> |
| 60 | #include <linux/usb/gadget.h> |
| 61 | #include <linux/usb/otg.h> |
| 62 | #include <linux/usb/chipidea.h> |
Michael Grzeschik | 40dcd0e | 2013-06-13 17:59:56 +0300 | [diff] [blame] | 63 | #include <linux/usb/of.h> |
Michael Grzeschik | 4f6743d | 2014-02-19 13:41:43 +0800 | [diff] [blame] | 64 | #include <linux/of.h> |
Michael Grzeschik | 40dcd0e | 2013-06-13 17:59:56 +0300 | [diff] [blame] | 65 | #include <linux/phy.h> |
Peter Chen | 1542d9c | 2013-08-14 12:44:03 +0300 | [diff] [blame] | 66 | #include <linux/regulator/consumer.h> |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 67 | |
| 68 | #include "ci.h" |
| 69 | #include "udc.h" |
| 70 | #include "bits.h" |
Alexander Shishkin | eb70e5a | 2012-05-11 17:25:54 +0300 | [diff] [blame] | 71 | #include "host.h" |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 72 | #include "debug.h" |
Peter Chen | c10b4f0 | 2013-08-14 12:44:06 +0300 | [diff] [blame] | 73 | #include "otg.h" |
Li Jun | 4dcf720 | 2014-04-23 15:56:50 +0800 | [diff] [blame] | 74 | #include "otg_fsm.h" |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 75 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 76 | /* Controller register map */ |
Marc Kleine-Budde | 987e7bc | 2014-01-06 10:10:39 +0800 | [diff] [blame] | 77 | static const u8 ci_regs_nolpm[] = { |
| 78 | [CAP_CAPLENGTH] = 0x00U, |
| 79 | [CAP_HCCPARAMS] = 0x08U, |
| 80 | [CAP_DCCPARAMS] = 0x24U, |
| 81 | [CAP_TESTMODE] = 0x38U, |
| 82 | [OP_USBCMD] = 0x00U, |
| 83 | [OP_USBSTS] = 0x04U, |
| 84 | [OP_USBINTR] = 0x08U, |
| 85 | [OP_DEVICEADDR] = 0x14U, |
| 86 | [OP_ENDPTLISTADDR] = 0x18U, |
| 87 | [OP_PORTSC] = 0x44U, |
| 88 | [OP_DEVLC] = 0x84U, |
| 89 | [OP_OTGSC] = 0x64U, |
| 90 | [OP_USBMODE] = 0x68U, |
| 91 | [OP_ENDPTSETUPSTAT] = 0x6CU, |
| 92 | [OP_ENDPTPRIME] = 0x70U, |
| 93 | [OP_ENDPTFLUSH] = 0x74U, |
| 94 | [OP_ENDPTSTAT] = 0x78U, |
| 95 | [OP_ENDPTCOMPLETE] = 0x7CU, |
| 96 | [OP_ENDPTCTRL] = 0x80U, |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 97 | }; |
| 98 | |
Marc Kleine-Budde | 987e7bc | 2014-01-06 10:10:39 +0800 | [diff] [blame] | 99 | static const u8 ci_regs_lpm[] = { |
| 100 | [CAP_CAPLENGTH] = 0x00U, |
| 101 | [CAP_HCCPARAMS] = 0x08U, |
| 102 | [CAP_DCCPARAMS] = 0x24U, |
| 103 | [CAP_TESTMODE] = 0xFCU, |
| 104 | [OP_USBCMD] = 0x00U, |
| 105 | [OP_USBSTS] = 0x04U, |
| 106 | [OP_USBINTR] = 0x08U, |
| 107 | [OP_DEVICEADDR] = 0x14U, |
| 108 | [OP_ENDPTLISTADDR] = 0x18U, |
| 109 | [OP_PORTSC] = 0x44U, |
| 110 | [OP_DEVLC] = 0x84U, |
| 111 | [OP_OTGSC] = 0xC4U, |
| 112 | [OP_USBMODE] = 0xC8U, |
| 113 | [OP_ENDPTSETUPSTAT] = 0xD8U, |
| 114 | [OP_ENDPTPRIME] = 0xDCU, |
| 115 | [OP_ENDPTFLUSH] = 0xE0U, |
| 116 | [OP_ENDPTSTAT] = 0xE4U, |
| 117 | [OP_ENDPTCOMPLETE] = 0xE8U, |
| 118 | [OP_ENDPTCTRL] = 0xECU, |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 119 | }; |
| 120 | |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 121 | static int hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm) |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 122 | { |
| 123 | int i; |
| 124 | |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 125 | for (i = 0; i < OP_ENDPTCTRL; i++) |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 126 | ci->hw_bank.regmap[i] = |
| 127 | (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) + |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 128 | (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]); |
| 129 | |
| 130 | for (; i <= OP_LAST; i++) |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 131 | ci->hw_bank.regmap[i] = ci->hw_bank.op + |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 132 | 4 * (i - OP_ENDPTCTRL) + |
| 133 | (is_lpm |
| 134 | ? ci_regs_lpm[OP_ENDPTCTRL] |
| 135 | : ci_regs_nolpm[OP_ENDPTCTRL]); |
| 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
Peter Chen | cb271f3 | 2015-02-11 12:44:55 +0800 | [diff] [blame^] | 140 | static enum ci_revision ci_get_revision(struct ci_hdrc *ci) |
| 141 | { |
| 142 | int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION); |
| 143 | enum ci_revision rev = CI_REVISION_UNKNOWN; |
| 144 | |
| 145 | if (ver == 0x2) { |
| 146 | rev = hw_read_id_reg(ci, ID_ID, REVISION) |
| 147 | >> __ffs(REVISION); |
| 148 | rev += CI_REVISION_20; |
| 149 | } else if (ver == 0x0) { |
| 150 | rev = CI_REVISION_1X; |
| 151 | } |
| 152 | |
| 153 | return rev; |
| 154 | } |
| 155 | |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 156 | /** |
Li Jun | 36304b0 | 2014-04-23 15:56:39 +0800 | [diff] [blame] | 157 | * hw_read_intr_enable: returns interrupt enable register |
| 158 | * |
Peter Chen | 1935388 | 2014-09-22 08:14:17 +0800 | [diff] [blame] | 159 | * @ci: the controller |
| 160 | * |
Li Jun | 36304b0 | 2014-04-23 15:56:39 +0800 | [diff] [blame] | 161 | * This function returns register data |
| 162 | */ |
| 163 | u32 hw_read_intr_enable(struct ci_hdrc *ci) |
| 164 | { |
| 165 | return hw_read(ci, OP_USBINTR, ~0); |
| 166 | } |
| 167 | |
| 168 | /** |
| 169 | * hw_read_intr_status: returns interrupt status register |
| 170 | * |
Peter Chen | 1935388 | 2014-09-22 08:14:17 +0800 | [diff] [blame] | 171 | * @ci: the controller |
| 172 | * |
Li Jun | 36304b0 | 2014-04-23 15:56:39 +0800 | [diff] [blame] | 173 | * This function returns register data |
| 174 | */ |
| 175 | u32 hw_read_intr_status(struct ci_hdrc *ci) |
| 176 | { |
| 177 | return hw_read(ci, OP_USBSTS, ~0); |
| 178 | } |
| 179 | |
| 180 | /** |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 181 | * hw_port_test_set: writes port test mode (execute without interruption) |
| 182 | * @mode: new value |
| 183 | * |
| 184 | * This function returns an error code |
| 185 | */ |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 186 | int hw_port_test_set(struct ci_hdrc *ci, u8 mode) |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 187 | { |
| 188 | const u8 TEST_MODE_MAX = 7; |
| 189 | |
| 190 | if (mode > TEST_MODE_MAX) |
| 191 | return -EINVAL; |
| 192 | |
Felipe Balbi | 727b4dd | 2013-03-30 12:53:55 +0200 | [diff] [blame] | 193 | hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << __ffs(PORTSC_PTC)); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 194 | return 0; |
| 195 | } |
| 196 | |
| 197 | /** |
| 198 | * hw_port_test_get: reads port test mode value |
| 199 | * |
Peter Chen | 1935388 | 2014-09-22 08:14:17 +0800 | [diff] [blame] | 200 | * @ci: the controller |
| 201 | * |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 202 | * This function returns port test mode value |
| 203 | */ |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 204 | u8 hw_port_test_get(struct ci_hdrc *ci) |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 205 | { |
Felipe Balbi | 727b4dd | 2013-03-30 12:53:55 +0200 | [diff] [blame] | 206 | return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 207 | } |
| 208 | |
Peter Chen | b82613c | 2014-11-26 13:44:28 +0800 | [diff] [blame] | 209 | static void hw_wait_phy_stable(void) |
| 210 | { |
| 211 | /* |
| 212 | * The phy needs some delay to output the stable status from low |
| 213 | * power mode. And for OTGSC, the status inputs are debounced |
| 214 | * using a 1 ms time constant, so, delay 2ms for controller to get |
| 215 | * the stable status, like vbus and id when the phy leaves low power. |
| 216 | */ |
| 217 | usleep_range(2000, 2500); |
| 218 | } |
| 219 | |
Peter Chen | 864cf94 | 2013-09-24 12:47:55 +0800 | [diff] [blame] | 220 | /* The PHY enters/leaves low power mode */ |
| 221 | static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable) |
| 222 | { |
| 223 | enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC; |
| 224 | bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm))); |
| 225 | |
Peter Chen | 6d037db | 2014-11-26 13:44:27 +0800 | [diff] [blame] | 226 | if (enable && !lpm) |
Peter Chen | 864cf94 | 2013-09-24 12:47:55 +0800 | [diff] [blame] | 227 | hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm), |
| 228 | PORTSC_PHCD(ci->hw_bank.lpm)); |
Peter Chen | 6d037db | 2014-11-26 13:44:27 +0800 | [diff] [blame] | 229 | else if (!enable && lpm) |
Peter Chen | 864cf94 | 2013-09-24 12:47:55 +0800 | [diff] [blame] | 230 | hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm), |
| 231 | 0); |
Peter Chen | 864cf94 | 2013-09-24 12:47:55 +0800 | [diff] [blame] | 232 | } |
| 233 | |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 234 | static int hw_device_init(struct ci_hdrc *ci, void __iomem *base) |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 235 | { |
| 236 | u32 reg; |
| 237 | |
| 238 | /* bank is a module variable */ |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 239 | ci->hw_bank.abs = base; |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 240 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 241 | ci->hw_bank.cap = ci->hw_bank.abs; |
Richard Zhao | 77c4400 | 2012-06-29 17:48:53 +0800 | [diff] [blame] | 242 | ci->hw_bank.cap += ci->platdata->capoffset; |
Svetoslav Neykov | 938d323 | 2013-03-30 12:54:03 +0200 | [diff] [blame] | 243 | ci->hw_bank.op = ci->hw_bank.cap + (ioread32(ci->hw_bank.cap) & 0xff); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 244 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 245 | hw_alloc_regmap(ci, false); |
| 246 | reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >> |
Felipe Balbi | 727b4dd | 2013-03-30 12:53:55 +0200 | [diff] [blame] | 247 | __ffs(HCCPARAMS_LEN); |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 248 | ci->hw_bank.lpm = reg; |
Chris Ruehl | aeb2c12 | 2013-12-06 16:35:12 +0800 | [diff] [blame] | 249 | if (reg) |
| 250 | hw_alloc_regmap(ci, !!reg); |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 251 | ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs; |
| 252 | ci->hw_bank.size += OP_LAST; |
| 253 | ci->hw_bank.size /= sizeof(u32); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 254 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 255 | reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >> |
Felipe Balbi | 727b4dd | 2013-03-30 12:53:55 +0200 | [diff] [blame] | 256 | __ffs(DCCPARAMS_DEN); |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 257 | ci->hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */ |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 258 | |
Richard Zhao | 09c94e6 | 2012-05-15 21:58:18 +0800 | [diff] [blame] | 259 | if (ci->hw_ep_max > ENDPT_MAX) |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 260 | return -ENODEV; |
| 261 | |
Peter Chen | 864cf94 | 2013-09-24 12:47:55 +0800 | [diff] [blame] | 262 | ci_hdrc_enter_lpm(ci, false); |
| 263 | |
Peter Chen | c344b51 | 2013-08-14 12:44:09 +0300 | [diff] [blame] | 264 | /* Disable all interrupts bits */ |
| 265 | hw_write(ci, OP_USBINTR, 0xffffffff, 0); |
| 266 | |
| 267 | /* Clear all interrupts status bits*/ |
| 268 | hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff); |
| 269 | |
Peter Chen | cb271f3 | 2015-02-11 12:44:55 +0800 | [diff] [blame^] | 270 | ci->rev = ci_get_revision(ci); |
| 271 | |
| 272 | dev_dbg(ci->dev, |
| 273 | "ChipIdea HDRC found, revision: %d, lpm: %d; cap: %p op: %p\n", |
| 274 | ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 275 | |
| 276 | /* setup lock mode ? */ |
| 277 | |
| 278 | /* ENDPTSETUPSTAT is '0' by default */ |
| 279 | |
| 280 | /* HCSPARAMS.bf.ppc SHOULD BE zero for device */ |
| 281 | |
| 282 | return 0; |
| 283 | } |
| 284 | |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 285 | static void hw_phymode_configure(struct ci_hdrc *ci) |
Michael Grzeschik | 40dcd0e | 2013-06-13 17:59:56 +0300 | [diff] [blame] | 286 | { |
Chris Ruehl | 3b5d3e6 | 2014-01-10 13:51:29 +0800 | [diff] [blame] | 287 | u32 portsc, lpm, sts = 0; |
Michael Grzeschik | 40dcd0e | 2013-06-13 17:59:56 +0300 | [diff] [blame] | 288 | |
| 289 | switch (ci->platdata->phy_mode) { |
| 290 | case USBPHY_INTERFACE_MODE_UTMI: |
| 291 | portsc = PORTSC_PTS(PTS_UTMI); |
| 292 | lpm = DEVLC_PTS(PTS_UTMI); |
| 293 | break; |
| 294 | case USBPHY_INTERFACE_MODE_UTMIW: |
| 295 | portsc = PORTSC_PTS(PTS_UTMI) | PORTSC_PTW; |
| 296 | lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW; |
| 297 | break; |
| 298 | case USBPHY_INTERFACE_MODE_ULPI: |
| 299 | portsc = PORTSC_PTS(PTS_ULPI); |
| 300 | lpm = DEVLC_PTS(PTS_ULPI); |
| 301 | break; |
| 302 | case USBPHY_INTERFACE_MODE_SERIAL: |
| 303 | portsc = PORTSC_PTS(PTS_SERIAL); |
| 304 | lpm = DEVLC_PTS(PTS_SERIAL); |
| 305 | sts = 1; |
| 306 | break; |
| 307 | case USBPHY_INTERFACE_MODE_HSIC: |
| 308 | portsc = PORTSC_PTS(PTS_HSIC); |
| 309 | lpm = DEVLC_PTS(PTS_HSIC); |
| 310 | break; |
| 311 | default: |
| 312 | return; |
| 313 | } |
| 314 | |
| 315 | if (ci->hw_bank.lpm) { |
| 316 | hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm); |
Chris Ruehl | 3b5d3e6 | 2014-01-10 13:51:29 +0800 | [diff] [blame] | 317 | if (sts) |
| 318 | hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS); |
Michael Grzeschik | 40dcd0e | 2013-06-13 17:59:56 +0300 | [diff] [blame] | 319 | } else { |
| 320 | hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc); |
Chris Ruehl | 3b5d3e6 | 2014-01-10 13:51:29 +0800 | [diff] [blame] | 321 | if (sts) |
| 322 | hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS); |
Michael Grzeschik | 40dcd0e | 2013-06-13 17:59:56 +0300 | [diff] [blame] | 323 | } |
| 324 | } |
| 325 | |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 326 | /** |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 327 | * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy |
| 328 | * interfaces |
| 329 | * @ci: the controller |
| 330 | * |
| 331 | * This function returns an error code if the phy failed to init |
| 332 | */ |
| 333 | static int _ci_usb_phy_init(struct ci_hdrc *ci) |
| 334 | { |
| 335 | int ret; |
| 336 | |
| 337 | if (ci->phy) { |
| 338 | ret = phy_init(ci->phy); |
| 339 | if (ret) |
| 340 | return ret; |
| 341 | |
| 342 | ret = phy_power_on(ci->phy); |
| 343 | if (ret) { |
| 344 | phy_exit(ci->phy); |
| 345 | return ret; |
| 346 | } |
| 347 | } else { |
| 348 | ret = usb_phy_init(ci->usb_phy); |
| 349 | } |
| 350 | |
| 351 | return ret; |
| 352 | } |
| 353 | |
| 354 | /** |
| 355 | * _ci_usb_phy_exit: deinitialize phy taking in account both phy and usb_phy |
| 356 | * interfaces |
| 357 | * @ci: the controller |
| 358 | */ |
| 359 | static void ci_usb_phy_exit(struct ci_hdrc *ci) |
| 360 | { |
| 361 | if (ci->phy) { |
| 362 | phy_power_off(ci->phy); |
| 363 | phy_exit(ci->phy); |
| 364 | } else { |
| 365 | usb_phy_shutdown(ci->usb_phy); |
| 366 | } |
| 367 | } |
| 368 | |
| 369 | /** |
Peter Chen | d03cccf | 2014-04-23 15:56:37 +0800 | [diff] [blame] | 370 | * ci_usb_phy_init: initialize phy according to different phy type |
| 371 | * @ci: the controller |
Peter Chen | 1935388 | 2014-09-22 08:14:17 +0800 | [diff] [blame] | 372 | * |
Peter Chen | d03cccf | 2014-04-23 15:56:37 +0800 | [diff] [blame] | 373 | * This function returns an error code if usb_phy_init has failed |
| 374 | */ |
| 375 | static int ci_usb_phy_init(struct ci_hdrc *ci) |
| 376 | { |
| 377 | int ret; |
| 378 | |
| 379 | switch (ci->platdata->phy_mode) { |
| 380 | case USBPHY_INTERFACE_MODE_UTMI: |
| 381 | case USBPHY_INTERFACE_MODE_UTMIW: |
| 382 | case USBPHY_INTERFACE_MODE_HSIC: |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 383 | ret = _ci_usb_phy_init(ci); |
Peter Chen | b82613c | 2014-11-26 13:44:28 +0800 | [diff] [blame] | 384 | if (!ret) |
| 385 | hw_wait_phy_stable(); |
| 386 | else |
Peter Chen | d03cccf | 2014-04-23 15:56:37 +0800 | [diff] [blame] | 387 | return ret; |
| 388 | hw_phymode_configure(ci); |
| 389 | break; |
| 390 | case USBPHY_INTERFACE_MODE_ULPI: |
| 391 | case USBPHY_INTERFACE_MODE_SERIAL: |
| 392 | hw_phymode_configure(ci); |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 393 | ret = _ci_usb_phy_init(ci); |
Peter Chen | d03cccf | 2014-04-23 15:56:37 +0800 | [diff] [blame] | 394 | if (ret) |
| 395 | return ret; |
| 396 | break; |
| 397 | default: |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 398 | ret = _ci_usb_phy_init(ci); |
Peter Chen | b82613c | 2014-11-26 13:44:28 +0800 | [diff] [blame] | 399 | if (!ret) |
| 400 | hw_wait_phy_stable(); |
Peter Chen | d03cccf | 2014-04-23 15:56:37 +0800 | [diff] [blame] | 401 | } |
| 402 | |
| 403 | return ret; |
| 404 | } |
| 405 | |
| 406 | /** |
Peter Chen | cdd278f | 2014-11-26 13:44:32 +0800 | [diff] [blame] | 407 | * hw_controller_reset: do controller reset |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 408 | * @ci: the controller |
| 409 | * |
| 410 | * This function returns an error code |
| 411 | */ |
Peter Chen | cdd278f | 2014-11-26 13:44:32 +0800 | [diff] [blame] | 412 | static int hw_controller_reset(struct ci_hdrc *ci) |
| 413 | { |
| 414 | int count = 0; |
| 415 | |
| 416 | hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST); |
| 417 | while (hw_read(ci, OP_USBCMD, USBCMD_RST)) { |
| 418 | udelay(10); |
| 419 | if (count++ > 1000) |
| 420 | return -ETIMEDOUT; |
| 421 | } |
| 422 | |
| 423 | return 0; |
| 424 | } |
| 425 | |
| 426 | /** |
| 427 | * hw_device_reset: resets chip (execute without interruption) |
| 428 | * @ci: the controller |
| 429 | * |
| 430 | * This function returns an error code |
| 431 | */ |
Peter Chen | 5b15730 | 2014-11-26 13:44:33 +0800 | [diff] [blame] | 432 | int hw_device_reset(struct ci_hdrc *ci) |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 433 | { |
Peter Chen | cdd278f | 2014-11-26 13:44:32 +0800 | [diff] [blame] | 434 | int ret; |
| 435 | |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 436 | /* should flush & stop before reset */ |
| 437 | hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); |
| 438 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); |
| 439 | |
Peter Chen | cdd278f | 2014-11-26 13:44:32 +0800 | [diff] [blame] | 440 | ret = hw_controller_reset(ci); |
| 441 | if (ret) { |
| 442 | dev_err(ci->dev, "error resetting controller, ret=%d\n", ret); |
| 443 | return ret; |
| 444 | } |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 445 | |
Richard Zhao | 77c4400 | 2012-06-29 17:48:53 +0800 | [diff] [blame] | 446 | if (ci->platdata->notify_event) |
| 447 | ci->platdata->notify_event(ci, |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 448 | CI_HDRC_CONTROLLER_RESET_EVENT); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 449 | |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 450 | if (ci->platdata->flags & CI_HDRC_DISABLE_STREAMING) |
Alexander Shishkin | 758fc98 | 2012-05-11 17:25:53 +0300 | [diff] [blame] | 451 | hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 452 | |
Michael Grzeschik | 4f6743d | 2014-02-19 13:41:43 +0800 | [diff] [blame] | 453 | if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) { |
| 454 | if (ci->hw_bank.lpm) |
| 455 | hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC); |
| 456 | else |
| 457 | hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC); |
| 458 | } |
| 459 | |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 460 | /* USBMODE should be configured step by step */ |
| 461 | hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE); |
Peter Chen | 5b15730 | 2014-11-26 13:44:33 +0800 | [diff] [blame] | 462 | hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DC); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 463 | /* HW >= 2.3 */ |
| 464 | hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM); |
| 465 | |
Peter Chen | 5b15730 | 2014-11-26 13:44:33 +0800 | [diff] [blame] | 466 | if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) { |
| 467 | pr_err("cannot enter in %s device mode", ci_role(ci)->name); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 468 | pr_err("lpm = %i", ci->hw_bank.lpm); |
| 469 | return -ENODEV; |
| 470 | } |
| 471 | |
| 472 | return 0; |
| 473 | } |
| 474 | |
Peter Chen | 22fa844 | 2013-08-14 12:44:12 +0300 | [diff] [blame] | 475 | /** |
| 476 | * hw_wait_reg: wait the register value |
| 477 | * |
| 478 | * Sometimes, it needs to wait register value before going on. |
| 479 | * Eg, when switch to device mode, the vbus value should be lower |
| 480 | * than OTGSC_BSV before connects to host. |
| 481 | * |
| 482 | * @ci: the controller |
| 483 | * @reg: register index |
| 484 | * @mask: mast bit |
| 485 | * @value: the bit value to wait |
| 486 | * @timeout_ms: timeout in millisecond |
| 487 | * |
| 488 | * This function returns an error code if timeout |
| 489 | */ |
| 490 | int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask, |
| 491 | u32 value, unsigned int timeout_ms) |
| 492 | { |
| 493 | unsigned long elapse = jiffies + msecs_to_jiffies(timeout_ms); |
| 494 | |
| 495 | while (hw_read(ci, reg, mask) != value) { |
| 496 | if (time_after(jiffies, elapse)) { |
| 497 | dev_err(ci->dev, "timeout waiting for %08x in %d\n", |
| 498 | mask, reg); |
| 499 | return -ETIMEDOUT; |
| 500 | } |
| 501 | msleep(20); |
| 502 | } |
| 503 | |
| 504 | return 0; |
| 505 | } |
| 506 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 507 | static irqreturn_t ci_irq(int irq, void *data) |
| 508 | { |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 509 | struct ci_hdrc *ci = data; |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 510 | irqreturn_t ret = IRQ_NONE; |
Richard Zhao | b183c19 | 2012-09-12 14:58:11 +0300 | [diff] [blame] | 511 | u32 otgsc = 0; |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 512 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 513 | if (ci->in_lpm) { |
| 514 | disable_irq_nosync(irq); |
| 515 | ci->wakeup_int = true; |
| 516 | pm_runtime_get(ci->dev); |
| 517 | return IRQ_HANDLED; |
| 518 | } |
| 519 | |
Li Jun | 4dcf720 | 2014-04-23 15:56:50 +0800 | [diff] [blame] | 520 | if (ci->is_otg) { |
Li Jun | 0c33bf7 | 2014-04-23 15:56:38 +0800 | [diff] [blame] | 521 | otgsc = hw_read_otgsc(ci, ~0); |
Li Jun | 4dcf720 | 2014-04-23 15:56:50 +0800 | [diff] [blame] | 522 | if (ci_otg_is_fsm_mode(ci)) { |
| 523 | ret = ci_otg_fsm_irq(ci); |
| 524 | if (ret == IRQ_HANDLED) |
| 525 | return ret; |
| 526 | } |
| 527 | } |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 528 | |
Peter Chen | a107f8c | 2013-08-14 12:44:11 +0300 | [diff] [blame] | 529 | /* |
| 530 | * Handle id change interrupt, it indicates device/host function |
| 531 | * switch. |
| 532 | */ |
| 533 | if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) { |
| 534 | ci->id_event = true; |
Li Jun | 0c33bf7 | 2014-04-23 15:56:38 +0800 | [diff] [blame] | 535 | /* Clear ID change irq status */ |
| 536 | hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS); |
Peter Chen | be6b0c1 | 2014-05-23 08:12:49 +0800 | [diff] [blame] | 537 | ci_otg_queue_work(ci); |
Peter Chen | a107f8c | 2013-08-14 12:44:11 +0300 | [diff] [blame] | 538 | return IRQ_HANDLED; |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 539 | } |
| 540 | |
Peter Chen | a107f8c | 2013-08-14 12:44:11 +0300 | [diff] [blame] | 541 | /* |
| 542 | * Handle vbus change interrupt, it indicates device connection |
| 543 | * and disconnection events. |
| 544 | */ |
| 545 | if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) { |
| 546 | ci->b_sess_valid_event = true; |
Li Jun | 0c33bf7 | 2014-04-23 15:56:38 +0800 | [diff] [blame] | 547 | /* Clear BSV irq */ |
| 548 | hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS); |
Peter Chen | be6b0c1 | 2014-05-23 08:12:49 +0800 | [diff] [blame] | 549 | ci_otg_queue_work(ci); |
Peter Chen | a107f8c | 2013-08-14 12:44:11 +0300 | [diff] [blame] | 550 | return IRQ_HANDLED; |
| 551 | } |
| 552 | |
| 553 | /* Handle device/host interrupt */ |
| 554 | if (ci->role != CI_ROLE_END) |
| 555 | ret = ci_role(ci)->irq(ci); |
| 556 | |
Richard Zhao | b183c19 | 2012-09-12 14:58:11 +0300 | [diff] [blame] | 557 | return ret; |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 558 | } |
| 559 | |
Peter Chen | 1542d9c | 2013-08-14 12:44:03 +0300 | [diff] [blame] | 560 | static int ci_get_platdata(struct device *dev, |
| 561 | struct ci_hdrc_platform_data *platdata) |
| 562 | { |
Peter Chen | c22600c | 2013-09-17 12:37:22 +0800 | [diff] [blame] | 563 | if (!platdata->phy_mode) |
| 564 | platdata->phy_mode = of_usb_get_phy_mode(dev->of_node); |
| 565 | |
| 566 | if (!platdata->dr_mode) |
| 567 | platdata->dr_mode = of_usb_get_dr_mode(dev->of_node); |
| 568 | |
| 569 | if (platdata->dr_mode == USB_DR_MODE_UNKNOWN) |
| 570 | platdata->dr_mode = USB_DR_MODE_OTG; |
| 571 | |
Peter Chen | c2ec3a7 | 2013-10-30 09:19:29 +0800 | [diff] [blame] | 572 | if (platdata->dr_mode != USB_DR_MODE_PERIPHERAL) { |
| 573 | /* Get the vbus regulator */ |
| 574 | platdata->reg_vbus = devm_regulator_get(dev, "vbus"); |
| 575 | if (PTR_ERR(platdata->reg_vbus) == -EPROBE_DEFER) { |
| 576 | return -EPROBE_DEFER; |
| 577 | } else if (PTR_ERR(platdata->reg_vbus) == -ENODEV) { |
Mickael Maison | 6629467 | 2014-11-26 13:44:38 +0800 | [diff] [blame] | 578 | /* no vbus regulator is needed */ |
Peter Chen | c2ec3a7 | 2013-10-30 09:19:29 +0800 | [diff] [blame] | 579 | platdata->reg_vbus = NULL; |
| 580 | } else if (IS_ERR(platdata->reg_vbus)) { |
| 581 | dev_err(dev, "Getting regulator error: %ld\n", |
| 582 | PTR_ERR(platdata->reg_vbus)); |
| 583 | return PTR_ERR(platdata->reg_vbus); |
| 584 | } |
Peter Chen | f6a9ff0 | 2014-08-19 09:51:56 +0800 | [diff] [blame] | 585 | /* Get TPL support */ |
| 586 | if (!platdata->tpl_support) |
| 587 | platdata->tpl_support = |
| 588 | of_usb_host_tpl_support(dev->of_node); |
Peter Chen | c2ec3a7 | 2013-10-30 09:19:29 +0800 | [diff] [blame] | 589 | } |
| 590 | |
Michael Grzeschik | 4f6743d | 2014-02-19 13:41:43 +0800 | [diff] [blame] | 591 | if (of_usb_get_maximum_speed(dev->of_node) == USB_SPEED_FULL) |
| 592 | platdata->flags |= CI_HDRC_FORCE_FULLSPEED; |
| 593 | |
Peter Chen | 1542d9c | 2013-08-14 12:44:03 +0300 | [diff] [blame] | 594 | return 0; |
| 595 | } |
| 596 | |
Richard Zhao | fe6e125 | 2012-07-07 22:56:42 +0800 | [diff] [blame] | 597 | static DEFINE_IDA(ci_ida); |
| 598 | |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 599 | struct platform_device *ci_hdrc_add_device(struct device *dev, |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 600 | struct resource *res, int nres, |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 601 | struct ci_hdrc_platform_data *platdata) |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 602 | { |
| 603 | struct platform_device *pdev; |
Richard Zhao | fe6e125 | 2012-07-07 22:56:42 +0800 | [diff] [blame] | 604 | int id, ret; |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 605 | |
Peter Chen | 1542d9c | 2013-08-14 12:44:03 +0300 | [diff] [blame] | 606 | ret = ci_get_platdata(dev, platdata); |
| 607 | if (ret) |
| 608 | return ERR_PTR(ret); |
| 609 | |
Richard Zhao | fe6e125 | 2012-07-07 22:56:42 +0800 | [diff] [blame] | 610 | id = ida_simple_get(&ci_ida, 0, 0, GFP_KERNEL); |
| 611 | if (id < 0) |
| 612 | return ERR_PTR(id); |
| 613 | |
| 614 | pdev = platform_device_alloc("ci_hdrc", id); |
| 615 | if (!pdev) { |
| 616 | ret = -ENOMEM; |
| 617 | goto put_id; |
| 618 | } |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 619 | |
| 620 | pdev->dev.parent = dev; |
| 621 | pdev->dev.dma_mask = dev->dma_mask; |
| 622 | pdev->dev.dma_parms = dev->dma_parms; |
| 623 | dma_set_coherent_mask(&pdev->dev, dev->coherent_dma_mask); |
| 624 | |
| 625 | ret = platform_device_add_resources(pdev, res, nres); |
| 626 | if (ret) |
| 627 | goto err; |
| 628 | |
| 629 | ret = platform_device_add_data(pdev, platdata, sizeof(*platdata)); |
| 630 | if (ret) |
| 631 | goto err; |
| 632 | |
| 633 | ret = platform_device_add(pdev); |
| 634 | if (ret) |
| 635 | goto err; |
| 636 | |
| 637 | return pdev; |
| 638 | |
| 639 | err: |
| 640 | platform_device_put(pdev); |
Richard Zhao | fe6e125 | 2012-07-07 22:56:42 +0800 | [diff] [blame] | 641 | put_id: |
| 642 | ida_simple_remove(&ci_ida, id); |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 643 | return ERR_PTR(ret); |
| 644 | } |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 645 | EXPORT_SYMBOL_GPL(ci_hdrc_add_device); |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 646 | |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 647 | void ci_hdrc_remove_device(struct platform_device *pdev) |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 648 | { |
Lothar Waßmann | 98c3553 | 2012-11-22 10:11:25 +0100 | [diff] [blame] | 649 | int id = pdev->id; |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 650 | platform_device_unregister(pdev); |
Lothar Waßmann | 98c3553 | 2012-11-22 10:11:25 +0100 | [diff] [blame] | 651 | ida_simple_remove(&ci_ida, id); |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 652 | } |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 653 | EXPORT_SYMBOL_GPL(ci_hdrc_remove_device); |
Richard Zhao | cbc6dc2 | 2012-07-07 22:56:41 +0800 | [diff] [blame] | 654 | |
Peter Chen | 3f124d2 | 2013-08-14 12:44:07 +0300 | [diff] [blame] | 655 | static inline void ci_role_destroy(struct ci_hdrc *ci) |
| 656 | { |
| 657 | ci_hdrc_gadget_destroy(ci); |
| 658 | ci_hdrc_host_destroy(ci); |
Peter Chen | cbec6bd | 2013-08-14 12:44:10 +0300 | [diff] [blame] | 659 | if (ci->is_otg) |
| 660 | ci_hdrc_otg_destroy(ci); |
Peter Chen | 3f124d2 | 2013-08-14 12:44:07 +0300 | [diff] [blame] | 661 | } |
| 662 | |
Peter Chen | 577b232 | 2013-08-14 12:44:08 +0300 | [diff] [blame] | 663 | static void ci_get_otg_capable(struct ci_hdrc *ci) |
| 664 | { |
| 665 | if (ci->platdata->flags & CI_HDRC_DUAL_ROLE_NOT_OTG) |
| 666 | ci->is_otg = false; |
| 667 | else |
| 668 | ci->is_otg = (hw_read(ci, CAP_DCCPARAMS, |
| 669 | DCCPARAMS_DC | DCCPARAMS_HC) |
| 670 | == (DCCPARAMS_DC | DCCPARAMS_HC)); |
Peter Chen | 2e37cfd | 2015-02-11 12:44:51 +0800 | [diff] [blame] | 671 | if (ci->is_otg) { |
Peter Chen | 577b232 | 2013-08-14 12:44:08 +0300 | [diff] [blame] | 672 | dev_dbg(ci->dev, "It is OTG capable controller\n"); |
Peter Chen | 2e37cfd | 2015-02-11 12:44:51 +0800 | [diff] [blame] | 673 | /* Disable and clear all OTG irq */ |
| 674 | hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS, |
| 675 | OTGSC_INT_STATUS_BITS); |
| 676 | } |
Peter Chen | 577b232 | 2013-08-14 12:44:08 +0300 | [diff] [blame] | 677 | } |
| 678 | |
Bill Pemberton | 41ac7b3 | 2012-11-19 13:21:48 -0500 | [diff] [blame] | 679 | static int ci_hdrc_probe(struct platform_device *pdev) |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 680 | { |
| 681 | struct device *dev = &pdev->dev; |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 682 | struct ci_hdrc *ci; |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 683 | struct resource *res; |
| 684 | void __iomem *base; |
| 685 | int ret; |
Sascha Hauer | 691962d | 2013-06-13 17:59:57 +0300 | [diff] [blame] | 686 | enum usb_dr_mode dr_mode; |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 687 | |
Jingoo Han | fad5674 | 2014-02-19 13:41:42 +0800 | [diff] [blame] | 688 | if (!dev_get_platdata(dev)) { |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 689 | dev_err(dev, "platform data missing\n"); |
| 690 | return -ENODEV; |
| 691 | } |
| 692 | |
| 693 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Felipe Balbi | 1929081 | 2013-03-30 02:46:27 +0200 | [diff] [blame] | 694 | base = devm_ioremap_resource(dev, res); |
| 695 | if (IS_ERR(base)) |
| 696 | return PTR_ERR(base); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 697 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 698 | ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL); |
Fabio Estevam | d0f9924 | 2014-11-26 13:44:23 +0800 | [diff] [blame] | 699 | if (!ci) |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 700 | return -ENOMEM; |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 701 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 702 | ci->dev = dev; |
Jingoo Han | fad5674 | 2014-02-19 13:41:42 +0800 | [diff] [blame] | 703 | ci->platdata = dev_get_platdata(dev); |
Peter Chen | ed8f831 | 2014-01-10 13:51:27 +0800 | [diff] [blame] | 704 | ci->imx28_write_fix = !!(ci->platdata->flags & |
| 705 | CI_HDRC_IMX28_WRITE_FIX); |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 706 | ci->supports_runtime_pm = !!(ci->platdata->flags & |
| 707 | CI_HDRC_SUPPORTS_RUNTIME_PM); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 708 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 709 | ret = hw_device_init(ci, base); |
| 710 | if (ret < 0) { |
| 711 | dev_err(dev, "can't initialize hardware\n"); |
| 712 | return -ENODEV; |
| 713 | } |
| 714 | |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 715 | if (ci->platdata->phy) { |
| 716 | ci->phy = ci->platdata->phy; |
| 717 | } else if (ci->platdata->usb_phy) { |
Antoine Tenart | ef44cb4 | 2014-10-30 18:41:16 +0100 | [diff] [blame] | 718 | ci->usb_phy = ci->platdata->usb_phy; |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 719 | } else { |
Antoine Tenart | 21a5b57 | 2014-11-26 13:44:35 +0800 | [diff] [blame] | 720 | ci->phy = devm_phy_get(dev->parent, "usb-phy"); |
| 721 | ci->usb_phy = devm_usb_get_phy(dev->parent, USB_PHY_TYPE_USB2); |
Peter Chen | c859aa65 | 2014-02-19 13:41:40 +0800 | [diff] [blame] | 722 | |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 723 | /* if both generic PHY and USB PHY layers aren't enabled */ |
| 724 | if (PTR_ERR(ci->phy) == -ENOSYS && |
| 725 | PTR_ERR(ci->usb_phy) == -ENXIO) |
| 726 | return -ENXIO; |
Peter Chen | c859aa65 | 2014-02-19 13:41:40 +0800 | [diff] [blame] | 727 | |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 728 | if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy)) |
| 729 | return -EPROBE_DEFER; |
| 730 | |
| 731 | if (IS_ERR(ci->phy)) |
| 732 | ci->phy = NULL; |
| 733 | else if (IS_ERR(ci->usb_phy)) |
| 734 | ci->usb_phy = NULL; |
Peter Chen | c859aa65 | 2014-02-19 13:41:40 +0800 | [diff] [blame] | 735 | } |
| 736 | |
Peter Chen | d03cccf | 2014-04-23 15:56:37 +0800 | [diff] [blame] | 737 | ret = ci_usb_phy_init(ci); |
Peter Chen | 74475ed | 2013-09-24 12:47:53 +0800 | [diff] [blame] | 738 | if (ret) { |
| 739 | dev_err(dev, "unable to init phy: %d\n", ret); |
| 740 | return ret; |
| 741 | } |
| 742 | |
Alexander Shishkin | eb70e5a | 2012-05-11 17:25:54 +0300 | [diff] [blame] | 743 | ci->hw_bank.phys = res->start; |
| 744 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 745 | ci->irq = platform_get_irq(pdev, 0); |
| 746 | if (ci->irq < 0) { |
| 747 | dev_err(dev, "missing IRQ\n"); |
Fabio Estevam | 42d1821 | 2014-02-19 13:41:44 +0800 | [diff] [blame] | 748 | ret = ci->irq; |
Peter Chen | c859aa65 | 2014-02-19 13:41:40 +0800 | [diff] [blame] | 749 | goto deinit_phy; |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 750 | } |
| 751 | |
Peter Chen | 577b232 | 2013-08-14 12:44:08 +0300 | [diff] [blame] | 752 | ci_get_otg_capable(ci); |
| 753 | |
Sascha Hauer | 691962d | 2013-06-13 17:59:57 +0300 | [diff] [blame] | 754 | dr_mode = ci->platdata->dr_mode; |
| 755 | /* initialize role(s) before the interrupt is requested */ |
| 756 | if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) { |
| 757 | ret = ci_hdrc_host_init(ci); |
| 758 | if (ret) |
| 759 | dev_info(dev, "doesn't support host\n"); |
| 760 | } |
| 761 | |
| 762 | if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) { |
| 763 | ret = ci_hdrc_gadget_init(ci); |
| 764 | if (ret) |
| 765 | dev_info(dev, "doesn't support gadget\n"); |
| 766 | } |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 767 | |
| 768 | if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) { |
| 769 | dev_err(dev, "no supported roles\n"); |
Peter Chen | 74475ed | 2013-09-24 12:47:53 +0800 | [diff] [blame] | 770 | ret = -ENODEV; |
Peter Chen | c859aa65 | 2014-02-19 13:41:40 +0800 | [diff] [blame] | 771 | goto deinit_phy; |
Peter Chen | cbec6bd | 2013-08-14 12:44:10 +0300 | [diff] [blame] | 772 | } |
| 773 | |
Peter Chen | 27c62c2 | 2014-09-22 08:14:16 +0800 | [diff] [blame] | 774 | if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) { |
Peter Chen | cbec6bd | 2013-08-14 12:44:10 +0300 | [diff] [blame] | 775 | ret = ci_hdrc_otg_init(ci); |
| 776 | if (ret) { |
| 777 | dev_err(dev, "init otg fails, ret = %d\n", ret); |
| 778 | goto stop; |
| 779 | } |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 780 | } |
| 781 | |
| 782 | if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) { |
Peter Chen | 577b232 | 2013-08-14 12:44:08 +0300 | [diff] [blame] | 783 | if (ci->is_otg) { |
Peter Chen | 577b232 | 2013-08-14 12:44:08 +0300 | [diff] [blame] | 784 | ci->role = ci_otg_role(ci); |
Li Jun | 0c33bf7 | 2014-04-23 15:56:38 +0800 | [diff] [blame] | 785 | /* Enable ID change irq */ |
| 786 | hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE); |
Peter Chen | 577b232 | 2013-08-14 12:44:08 +0300 | [diff] [blame] | 787 | } else { |
| 788 | /* |
| 789 | * If the controller is not OTG capable, but support |
| 790 | * role switch, the defalt role is gadget, and the |
| 791 | * user can switch it through debugfs. |
| 792 | */ |
| 793 | ci->role = CI_ROLE_GADGET; |
| 794 | } |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 795 | } else { |
| 796 | ci->role = ci->roles[CI_ROLE_HOST] |
| 797 | ? CI_ROLE_HOST |
| 798 | : CI_ROLE_GADGET; |
| 799 | } |
| 800 | |
Peter Chen | 5a1e145 | 2013-12-05 15:20:50 +0800 | [diff] [blame] | 801 | /* only update vbus status for peripheral */ |
| 802 | if (ci->role == CI_ROLE_GADGET) |
| 803 | ci_handle_vbus_change(ci); |
| 804 | |
Li Jun | 4dcf720 | 2014-04-23 15:56:50 +0800 | [diff] [blame] | 805 | if (!ci_otg_is_fsm_mode(ci)) { |
| 806 | ret = ci_role_start(ci, ci->role); |
| 807 | if (ret) { |
| 808 | dev_err(dev, "can't start %s role\n", |
| 809 | ci_role(ci)->name); |
| 810 | goto stop; |
| 811 | } |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 812 | } |
| 813 | |
Peter Chen | 24c498d | 2014-12-24 11:33:17 +0800 | [diff] [blame] | 814 | platform_set_drvdata(pdev, ci); |
Peter Chen | 4c503dd | 2014-11-26 13:44:22 +0800 | [diff] [blame] | 815 | ret = devm_request_irq(dev, ci->irq, ci_irq, IRQF_SHARED, |
| 816 | ci->platdata->name, ci); |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 817 | if (ret) |
| 818 | goto stop; |
| 819 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 820 | if (ci->supports_runtime_pm) { |
| 821 | pm_runtime_set_active(&pdev->dev); |
| 822 | pm_runtime_enable(&pdev->dev); |
| 823 | pm_runtime_set_autosuspend_delay(&pdev->dev, 2000); |
| 824 | pm_runtime_mark_last_busy(ci->dev); |
| 825 | pm_runtime_use_autosuspend(&pdev->dev); |
| 826 | } |
| 827 | |
Li Jun | 4dcf720 | 2014-04-23 15:56:50 +0800 | [diff] [blame] | 828 | if (ci_otg_is_fsm_mode(ci)) |
| 829 | ci_hdrc_otg_fsm_start(ci); |
| 830 | |
Peter Chen | f8efa76 | 2015-02-11 12:44:48 +0800 | [diff] [blame] | 831 | device_set_wakeup_capable(&pdev->dev, true); |
| 832 | |
Alexander Shishkin | adf0f73 | 2013-03-30 12:53:53 +0200 | [diff] [blame] | 833 | ret = dbg_create_files(ci); |
| 834 | if (!ret) |
| 835 | return 0; |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 836 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 837 | stop: |
Peter Chen | 3f124d2 | 2013-08-14 12:44:07 +0300 | [diff] [blame] | 838 | ci_role_destroy(ci); |
Peter Chen | c859aa65 | 2014-02-19 13:41:40 +0800 | [diff] [blame] | 839 | deinit_phy: |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 840 | ci_usb_phy_exit(ci); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 841 | |
| 842 | return ret; |
| 843 | } |
| 844 | |
Bill Pemberton | fb4e98a | 2012-11-19 13:26:20 -0500 | [diff] [blame] | 845 | static int ci_hdrc_remove(struct platform_device *pdev) |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 846 | { |
Alexander Shishkin | 8e22978 | 2013-06-24 14:46:36 +0300 | [diff] [blame] | 847 | struct ci_hdrc *ci = platform_get_drvdata(pdev); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 848 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 849 | if (ci->supports_runtime_pm) { |
| 850 | pm_runtime_get_sync(&pdev->dev); |
| 851 | pm_runtime_disable(&pdev->dev); |
| 852 | pm_runtime_put_noidle(&pdev->dev); |
| 853 | } |
| 854 | |
Alexander Shishkin | adf0f73 | 2013-03-30 12:53:53 +0200 | [diff] [blame] | 855 | dbg_remove_files(ci); |
Peter Chen | 3f124d2 | 2013-08-14 12:44:07 +0300 | [diff] [blame] | 856 | ci_role_destroy(ci); |
Peter Chen | 864cf94 | 2013-09-24 12:47:55 +0800 | [diff] [blame] | 857 | ci_hdrc_enter_lpm(ci, true); |
Antoine Tenart | 1e5e2d3 | 2014-10-30 18:41:19 +0100 | [diff] [blame] | 858 | ci_usb_phy_exit(ci); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 859 | |
| 860 | return 0; |
| 861 | } |
| 862 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 863 | #ifdef CONFIG_PM |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 864 | static void ci_controller_suspend(struct ci_hdrc *ci) |
| 865 | { |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 866 | disable_irq(ci->irq); |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 867 | ci_hdrc_enter_lpm(ci, true); |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 868 | usb_phy_set_suspend(ci->usb_phy, 1); |
| 869 | ci->in_lpm = true; |
| 870 | enable_irq(ci->irq); |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 871 | } |
| 872 | |
| 873 | static int ci_controller_resume(struct device *dev) |
| 874 | { |
| 875 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 876 | |
| 877 | dev_dbg(dev, "at %s\n", __func__); |
| 878 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 879 | if (!ci->in_lpm) { |
| 880 | WARN_ON(1); |
| 881 | return 0; |
| 882 | } |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 883 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 884 | ci_hdrc_enter_lpm(ci, false); |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 885 | if (ci->usb_phy) { |
| 886 | usb_phy_set_suspend(ci->usb_phy, 0); |
| 887 | usb_phy_set_wakeup(ci->usb_phy, false); |
| 888 | hw_wait_phy_stable(); |
| 889 | } |
| 890 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 891 | ci->in_lpm = false; |
| 892 | if (ci->wakeup_int) { |
| 893 | ci->wakeup_int = false; |
| 894 | pm_runtime_mark_last_busy(ci->dev); |
| 895 | pm_runtime_put_autosuspend(ci->dev); |
| 896 | enable_irq(ci->irq); |
| 897 | } |
| 898 | |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 899 | return 0; |
| 900 | } |
| 901 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 902 | #ifdef CONFIG_PM_SLEEP |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 903 | static int ci_suspend(struct device *dev) |
| 904 | { |
| 905 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 906 | |
| 907 | if (ci->wq) |
| 908 | flush_workqueue(ci->wq); |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 909 | /* |
| 910 | * Controller needs to be active during suspend, otherwise the core |
| 911 | * may run resume when the parent is at suspend if other driver's |
| 912 | * suspend fails, it occurs before parent's suspend has not started, |
| 913 | * but the core suspend has finished. |
| 914 | */ |
| 915 | if (ci->in_lpm) |
| 916 | pm_runtime_resume(dev); |
| 917 | |
| 918 | if (ci->in_lpm) { |
| 919 | WARN_ON(1); |
| 920 | return 0; |
| 921 | } |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 922 | |
Peter Chen | f8efa76 | 2015-02-11 12:44:48 +0800 | [diff] [blame] | 923 | if (device_may_wakeup(dev)) { |
| 924 | usb_phy_set_wakeup(ci->usb_phy, true); |
| 925 | enable_irq_wake(ci->irq); |
| 926 | } |
| 927 | |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 928 | ci_controller_suspend(ci); |
| 929 | |
| 930 | return 0; |
| 931 | } |
| 932 | |
| 933 | static int ci_resume(struct device *dev) |
| 934 | { |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 935 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 936 | int ret; |
| 937 | |
Peter Chen | f8efa76 | 2015-02-11 12:44:48 +0800 | [diff] [blame] | 938 | if (device_may_wakeup(dev)) |
| 939 | disable_irq_wake(ci->irq); |
| 940 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 941 | ret = ci_controller_resume(dev); |
| 942 | if (ret) |
| 943 | return ret; |
| 944 | |
| 945 | if (ci->supports_runtime_pm) { |
| 946 | pm_runtime_disable(dev); |
| 947 | pm_runtime_set_active(dev); |
| 948 | pm_runtime_enable(dev); |
| 949 | } |
| 950 | |
| 951 | return ret; |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 952 | } |
| 953 | #endif /* CONFIG_PM_SLEEP */ |
| 954 | |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 955 | static int ci_runtime_suspend(struct device *dev) |
| 956 | { |
| 957 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 958 | |
| 959 | dev_dbg(dev, "at %s\n", __func__); |
| 960 | |
| 961 | if (ci->in_lpm) { |
| 962 | WARN_ON(1); |
| 963 | return 0; |
| 964 | } |
| 965 | |
| 966 | usb_phy_set_wakeup(ci->usb_phy, true); |
| 967 | ci_controller_suspend(ci); |
| 968 | |
| 969 | return 0; |
| 970 | } |
| 971 | |
| 972 | static int ci_runtime_resume(struct device *dev) |
| 973 | { |
| 974 | return ci_controller_resume(dev); |
| 975 | } |
| 976 | |
| 977 | #endif /* CONFIG_PM */ |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 978 | static const struct dev_pm_ops ci_pm_ops = { |
| 979 | SET_SYSTEM_SLEEP_PM_OPS(ci_suspend, ci_resume) |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 980 | SET_RUNTIME_PM_OPS(ci_runtime_suspend, ci_runtime_resume, NULL) |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 981 | }; |
Peter Chen | 1f874ed | 2015-02-11 12:44:45 +0800 | [diff] [blame] | 982 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 983 | static struct platform_driver ci_hdrc_driver = { |
| 984 | .probe = ci_hdrc_probe, |
Bill Pemberton | 7690417 | 2012-11-19 13:21:08 -0500 | [diff] [blame] | 985 | .remove = ci_hdrc_remove, |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 986 | .driver = { |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 987 | .name = "ci_hdrc", |
Peter Chen | 8076932 | 2014-11-26 13:44:29 +0800 | [diff] [blame] | 988 | .pm = &ci_pm_ops, |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 989 | }, |
| 990 | }; |
| 991 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 992 | module_platform_driver(ci_hdrc_driver); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 993 | |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 994 | MODULE_ALIAS("platform:ci_hdrc"); |
Alexander Shishkin | e443b33 | 2012-05-11 17:25:46 +0300 | [diff] [blame] | 995 | MODULE_LICENSE("GPL v2"); |
| 996 | MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>"); |
Alexander Shishkin | 5f36e23 | 2012-05-11 17:25:47 +0300 | [diff] [blame] | 997 | MODULE_DESCRIPTION("ChipIdea HDRC Driver"); |