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Linus Torvalds1da177e2005-04-16 15:20:36 -07001
2/*
Jeff Garzikaf36d7f2005-08-28 20:18:39 -04003 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
4 * Copyright 2003-2004 Jeff Garzik
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 *
22 * libata documentation is available via 'make {ps|pdf}docs',
23 * as Documentation/DocBook/libata.*
24 *
25 * Hardware documentation available from http://www.t13.org/
26 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 */
28
29#ifndef __LINUX_ATA_H__
30#define __LINUX_ATA_H__
31
Matthew Wilcox0c659b82009-04-02 10:37:25 -040032#include <linux/kernel.h>
33#include <linux/string.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <linux/types.h>
Bartlomiej Zolnierkiewicz93734a22008-10-10 22:39:31 +020035#include <asm/byteorder.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37/* defines only for the constants which don't work well as enums */
38#define ATA_DMA_BOUNDARY 0xffffUL
39#define ATA_DMA_MASK 0xffffffffULL
40
41enum {
42 /* various global constants */
43 ATA_MAX_DEVICES = 2, /* per bus/port */
44 ATA_MAX_PRD = 256, /* we could make these 256/256 */
45 ATA_SECT_SIZE = 512,
Albert Lee18d6e9d2007-04-02 11:34:15 +080046 ATA_MAX_SECTORS_128 = 128,
Jeff Garzik8b881b02006-06-11 09:59:27 -040047 ATA_MAX_SECTORS = 256,
48 ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */
Tony Battersbyf8d8e572007-10-30 11:44:35 -040049 ATA_MAX_SECTORS_TAPE = 65535,
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
51 ATA_ID_WORDS = 256,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020052 ATA_ID_CONFIG = 0,
53 ATA_ID_CYLS = 1,
54 ATA_ID_HEADS = 3,
55 ATA_ID_SECTORS = 6,
Tejun Heoa0cf7332007-01-02 20:18:49 +090056 ATA_ID_SERNO = 10,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020057 ATA_ID_BUF_SIZE = 21,
Tejun Heoa0cf7332007-01-02 20:18:49 +090058 ATA_ID_FW_REV = 23,
59 ATA_ID_PROD = 27,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020060 ATA_ID_MAX_MULTSECT = 47,
61 ATA_ID_DWORD_IO = 48,
62 ATA_ID_CAPABILITY = 49,
Alan Cox11e29e22005-10-21 18:46:32 -040063 ATA_ID_OLD_PIO_MODES = 51,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020064 ATA_ID_OLD_DMA_MODES = 52,
Alan Cox11e29e22005-10-21 18:46:32 -040065 ATA_ID_FIELD_VALID = 53,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020066 ATA_ID_CUR_CYLS = 54,
67 ATA_ID_CUR_HEADS = 55,
68 ATA_ID_CUR_SECTORS = 56,
69 ATA_ID_MULTSECT = 59,
70 ATA_ID_LBA_CAPACITY = 60,
71 ATA_ID_SWDMA_MODES = 62,
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 ATA_ID_MWDMA_MODES = 63,
Alan Cox11e29e22005-10-21 18:46:32 -040073 ATA_ID_PIO_MODES = 64,
74 ATA_ID_EIDE_DMA_MIN = 65,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020075 ATA_ID_EIDE_DMA_TIME = 66,
Alan Cox11e29e22005-10-21 18:46:32 -040076 ATA_ID_EIDE_PIO = 67,
77 ATA_ID_EIDE_PIO_IORDY = 68,
Martin K. Petersene78db4d2009-11-26 22:46:03 -050078 ATA_ID_ADDITIONAL_SUPP = 69,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020079 ATA_ID_QUEUE_DEPTH = 75,
Shane Huang583661a2012-09-07 22:38:20 +080080 ATA_ID_SATA_CAPABILITY = 76,
81 ATA_ID_SATA_CAPABILITY_2 = 77,
82 ATA_ID_FEATURE_SUPP = 78,
Alan Cox11e29e22005-10-21 18:46:32 -040083 ATA_ID_MAJOR_VER = 80,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020084 ATA_ID_COMMAND_SET_1 = 82,
85 ATA_ID_COMMAND_SET_2 = 83,
86 ATA_ID_CFSSE = 84,
87 ATA_ID_CFS_ENABLE_1 = 85,
88 ATA_ID_CFS_ENABLE_2 = 86,
89 ATA_ID_CSF_DEFAULT = 87,
90 ATA_ID_UDMA_MODES = 88,
91 ATA_ID_HW_CONFIG = 93,
92 ATA_ID_SPG = 98,
93 ATA_ID_LBA_CAPACITY_2 = 100,
Christoph Hellwig18f0f972009-11-17 10:00:47 -050094 ATA_ID_SECTOR_SIZE = 106,
Hannes Reinecke6b3b9d72011-03-07 08:56:44 +010095 ATA_ID_WWN = 108,
Grant Grundler295124d2010-08-17 10:56:53 -070096 ATA_ID_LOGICAL_SECTOR_SIZE = 117, /* and 118 */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020097 ATA_ID_LAST_LUN = 126,
98 ATA_ID_DLF = 128,
99 ATA_ID_CSFO = 129,
100 ATA_ID_CFA_POWER = 160,
Sergei Shtylyovd42ad152009-03-05 17:20:55 +0100101 ATA_ID_CFA_KEY_MGMT = 162,
102 ATA_ID_CFA_MODES = 163,
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400103 ATA_ID_DATA_SET_MGMT = 169,
Jens Axboe8bff7c62008-09-24 13:05:10 +0200104 ATA_ID_ROT_SPEED = 217,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105 ATA_ID_PIO4 = (1 << 1),
106
Tejun Heoa0cf7332007-01-02 20:18:49 +0900107 ATA_ID_SERNO_LEN = 20,
108 ATA_ID_FW_REV_LEN = 8,
109 ATA_ID_PROD_LEN = 40,
Hannes Reinecke6b3b9d72011-03-07 08:56:44 +0100110 ATA_ID_WWN_LEN = 8,
Tejun Heoa0cf7332007-01-02 20:18:49 +0900111
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112 ATA_PCI_CTL_OFS = 2,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200113
114 ATA_PIO0 = (1 << 0),
115 ATA_PIO1 = ATA_PIO0 | (1 << 1),
116 ATA_PIO2 = ATA_PIO1 | (1 << 2),
117 ATA_PIO3 = ATA_PIO2 | (1 << 3),
118 ATA_PIO4 = ATA_PIO3 | (1 << 4),
119 ATA_PIO5 = ATA_PIO4 | (1 << 5),
120 ATA_PIO6 = ATA_PIO5 | (1 << 6),
121
Erik Inge Bolsø22ddbd12009-03-14 21:37:48 +0100122 ATA_PIO4_ONLY = (1 << 4),
123
Bartlomiej Zolnierkiewicz91a6d4e2007-08-27 19:35:22 +0200124 ATA_SWDMA0 = (1 << 0),
125 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
126 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
127
128 ATA_SWDMA2_ONLY = (1 << 2),
129
130 ATA_MWDMA0 = (1 << 0),
131 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
132 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
Erik Inge Bolsø22ddbd12009-03-14 21:37:48 +0100133 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
134 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
Bartlomiej Zolnierkiewicz91a6d4e2007-08-27 19:35:22 +0200135
136 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
137 ATA_MWDMA2_ONLY = (1 << 2),
138
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 ATA_UDMA0 = (1 << 0),
140 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
141 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
142 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
143 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
144 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
145 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
146 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
147 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
148
Erik Inge Bolsø22ddbd12009-03-14 21:37:48 +0100149 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
150
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
152
153 /* DMA-related */
154 ATA_PRD_SZ = 8,
155 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
156 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
157
158 ATA_DMA_TABLE_OFS = 4,
159 ATA_DMA_STATUS = 2,
160 ATA_DMA_CMD = 0,
161 ATA_DMA_WR = (1 << 3),
162 ATA_DMA_START = (1 << 0),
163 ATA_DMA_INTR = (1 << 2),
164 ATA_DMA_ERR = (1 << 1),
165 ATA_DMA_ACTIVE = (1 << 0),
166
167 /* bits in ATA command block registers */
168 ATA_HOB = (1 << 7), /* LBA48 selector */
169 ATA_NIEN = (1 << 1), /* disable-irq flag */
170 ATA_LBA = (1 << 6), /* LBA28 selector */
171 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
172 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
173 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
174 ATA_BUSY = (1 << 7), /* BSY status bit */
175 ATA_DRDY = (1 << 6), /* device ready */
176 ATA_DF = (1 << 5), /* device fault */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200177 ATA_DSC = (1 << 4), /* drive seek complete */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 ATA_DRQ = (1 << 3), /* data request i/o */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200179 ATA_CORR = (1 << 2), /* corrected data error */
180 ATA_IDX = (1 << 1), /* index */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 ATA_ERR = (1 << 0), /* have an error */
182 ATA_SRST = (1 << 2), /* software reset */
Tejun Heo9be1e972006-05-15 20:58:17 +0900183 ATA_ICRC = (1 << 7), /* interface CRC error */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200184 ATA_BBK = ATA_ICRC, /* pre-EIDE: block marked bad */
Tejun Heo9be1e972006-05-15 20:58:17 +0900185 ATA_UNC = (1 << 6), /* uncorrectable media error */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200186 ATA_MC = (1 << 5), /* media changed */
Tejun Heo9be1e972006-05-15 20:58:17 +0900187 ATA_IDNF = (1 << 4), /* ID not found */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200188 ATA_MCR = (1 << 3), /* media change requested */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 ATA_ABORTED = (1 << 2), /* command aborted */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200190 ATA_TRK0NF = (1 << 1), /* track 0 not found */
191 ATA_AMNF = (1 << 0), /* address mark not found */
192 ATAPI_LFS = 0xF0, /* last failed sense */
193 ATAPI_EOM = ATA_TRK0NF, /* end of media */
194 ATAPI_ILI = ATA_AMNF, /* illegal length indication */
195 ATAPI_IO = (1 << 1),
196 ATAPI_COD = (1 << 0),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197
198 /* ATA command block registers */
199 ATA_REG_DATA = 0x00,
200 ATA_REG_ERR = 0x01,
201 ATA_REG_NSECT = 0x02,
202 ATA_REG_LBAL = 0x03,
203 ATA_REG_LBAM = 0x04,
204 ATA_REG_LBAH = 0x05,
205 ATA_REG_DEVICE = 0x06,
206 ATA_REG_STATUS = 0x07,
207
208 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
209 ATA_REG_CMD = ATA_REG_STATUS,
210 ATA_REG_BYTEL = ATA_REG_LBAM,
211 ATA_REG_BYTEH = ATA_REG_LBAH,
212 ATA_REG_DEVSEL = ATA_REG_DEVICE,
213 ATA_REG_IRQ = ATA_REG_NSECT,
214
215 /* ATA device commands */
Jeff Garzikab2181c2007-05-28 08:30:36 -0400216 ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
Douglas Gilbert972dcaf2005-08-11 03:35:53 -0400218 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
219 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220 ATA_CMD_EDD = 0x90, /* execute device diagnostic */
Robert Hancock65211482009-07-14 20:43:39 -0600221 ATA_CMD_DOWNLOAD_MICRO = 0x92,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600222 ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
Robert Hancock65211482009-07-14 20:43:39 -0600223 ATA_CMD_NOP = 0x00,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224 ATA_CMD_FLUSH = 0xE7,
225 ATA_CMD_FLUSH_EXT = 0xEA,
226 ATA_CMD_ID_ATA = 0xEC,
227 ATA_CMD_ID_ATAPI = 0xA1,
Robert Hancock65211482009-07-14 20:43:39 -0600228 ATA_CMD_SERVICE = 0xA2,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229 ATA_CMD_READ = 0xC8,
230 ATA_CMD_READ_EXT = 0x25,
Robert Hancock65211482009-07-14 20:43:39 -0600231 ATA_CMD_READ_QUEUED = 0x26,
232 ATA_CMD_READ_STREAM_EXT = 0x2B,
233 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234 ATA_CMD_WRITE = 0xCA,
235 ATA_CMD_WRITE_EXT = 0x35,
Robert Hancock65211482009-07-14 20:43:39 -0600236 ATA_CMD_WRITE_QUEUED = 0x36,
237 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
238 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
Tejun Heo9a3dccc2006-01-06 09:56:18 +0100239 ATA_CMD_WRITE_FUA_EXT = 0x3D,
Robert Hancock65211482009-07-14 20:43:39 -0600240 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
Tejun Heo88e49032006-05-15 21:03:38 +0900241 ATA_CMD_FPDMA_READ = 0x60,
242 ATA_CMD_FPDMA_WRITE = 0x61,
Marc Carinoed369112013-08-24 23:22:50 -0700243 ATA_CMD_FPDMA_SEND = 0x64,
244 ATA_CMD_FPDMA_RECV = 0x65,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 ATA_CMD_PIO_READ = 0x20,
246 ATA_CMD_PIO_READ_EXT = 0x24,
247 ATA_CMD_PIO_WRITE = 0x30,
248 ATA_CMD_PIO_WRITE_EXT = 0x34,
Albert Lee8cbd6df2005-10-12 15:06:27 +0800249 ATA_CMD_READ_MULTI = 0xC4,
250 ATA_CMD_READ_MULTI_EXT = 0x29,
251 ATA_CMD_WRITE_MULTI = 0xC5,
252 ATA_CMD_WRITE_MULTI_EXT = 0x39,
Tejun Heo9a3dccc2006-01-06 09:56:18 +0100253 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254 ATA_CMD_SET_FEATURES = 0xEF,
Albert Lee2c3d2a42007-06-07 16:01:17 +0800255 ATA_CMD_SET_MULTI = 0xC6,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256 ATA_CMD_PACKET = 0xA0,
257 ATA_CMD_VERIFY = 0x40,
258 ATA_CMD_VERIFY_EXT = 0x42,
Robert Hancock65211482009-07-14 20:43:39 -0600259 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
Jeff Garzik2dcb4072007-10-19 06:42:56 -0400260 ATA_CMD_STANDBYNOW1 = 0xE0,
261 ATA_CMD_IDLEIMMEDIATE = 0xE1,
Tejun Heo054a5fb2007-10-25 18:30:36 +0900262 ATA_CMD_SLEEP = 0xE6,
Albert Lee8bf62ece2005-05-12 15:29:42 -0400263 ATA_CMD_INIT_DEV_PARAMS = 0x91,
Alan Coxb6782722006-03-21 15:52:49 +0000264 ATA_CMD_READ_NATIVE_MAX = 0xF8,
265 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
Alan Cox1e999732007-04-11 00:23:13 +0100266 ATA_CMD_SET_MAX = 0xF9,
267 ATA_CMD_SET_MAX_EXT = 0x37,
Robert Hancock65211482009-07-14 20:43:39 -0600268 ATA_CMD_READ_LOG_EXT = 0x2F,
269 ATA_CMD_WRITE_LOG_EXT = 0x3F,
270 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
271 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600272 ATA_CMD_TRUSTED_NONDATA = 0x5B,
Robert Hancock65211482009-07-14 20:43:39 -0600273 ATA_CMD_TRUSTED_RCV = 0x5C,
274 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
275 ATA_CMD_TRUSTED_SND = 0x5E,
276 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
Tejun Heo814600e2007-07-01 19:05:58 +0900277 ATA_CMD_PMP_READ = 0xE4,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600278 ATA_CMD_PMP_READ_DMA = 0xE9,
Tejun Heo814600e2007-07-01 19:05:58 +0900279 ATA_CMD_PMP_WRITE = 0xE8,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600280 ATA_CMD_PMP_WRITE_DMA = 0xEB,
Tejun Heoce2e0ab2007-12-15 15:04:59 +0900281 ATA_CMD_CONF_OVERLAY = 0xB1,
Robert Hancock65211482009-07-14 20:43:39 -0600282 ATA_CMD_SEC_SET_PASS = 0xF1,
283 ATA_CMD_SEC_UNLOCK = 0xF2,
284 ATA_CMD_SEC_ERASE_PREP = 0xF3,
285 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
Tejun Heoce2e0ab2007-12-15 15:04:59 +0900286 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
Robert Hancock65211482009-07-14 20:43:39 -0600287 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
288 ATA_CMD_CONFIG_STREAM = 0x51,
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200289 ATA_CMD_SMART = 0xB0,
290 ATA_CMD_MEDIA_LOCK = 0xDE,
291 ATA_CMD_MEDIA_UNLOCK = 0xDF,
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400292 ATA_CMD_DSM = 0x06,
Robert Hancock65211482009-07-14 20:43:39 -0600293 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
294 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
295 ATA_CMD_CFA_WRITE_NE = 0x38,
296 ATA_CMD_CFA_TRANS_SECT = 0x87,
297 ATA_CMD_CFA_ERASE = 0xC0,
298 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600299 ATA_CMD_REQ_SENSE_DATA = 0x0B,
300 ATA_CMD_SANITIZE_DEVICE = 0xB4,
301
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200302 /* marked obsolete in the ATA/ATAPI-7 spec */
303 ATA_CMD_RESTORE = 0x10,
Tejun Heo88e49032006-05-15 21:03:38 +0900304
Marc Carinoed369112013-08-24 23:22:50 -0700305 /* Subcmds for ATA_CMD_FPDMA_SEND */
306 ATA_SUBCMD_FPDMA_SEND_DSM = 0x00,
307 ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
308
Tejun Heo88e49032006-05-15 21:03:38 +0900309 /* READ_LOG_EXT pages */
310 ATA_LOG_SATA_NCQ = 0x10,
Marc Carinoed369112013-08-24 23:22:50 -0700311 ATA_LOG_NCQ_SEND_RECV = 0x13,
Shane Huang65fe1f02012-09-07 22:40:01 +0800312 ATA_LOG_SATA_ID_DEV_DATA = 0x30,
313 ATA_LOG_SATA_SETTINGS = 0x08,
Shane Huang803739d2012-12-17 23:18:59 +0800314 ATA_LOG_DEVSLP_OFFSET = 0x30,
315 ATA_LOG_DEVSLP_SIZE = 0x08,
316 ATA_LOG_DEVSLP_MDAT = 0x00,
Shane Huang65fe1f02012-09-07 22:40:01 +0800317 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
Shane Huang803739d2012-12-17 23:18:59 +0800318 ATA_LOG_DEVSLP_DETO = 0x01,
319 ATA_LOG_DEVSLP_VALID = 0x07,
Shane Huang65fe1f02012-09-07 22:40:01 +0800320 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321
Marc Carinoed369112013-08-24 23:22:50 -0700322 /* NCQ send and receive log */
323 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00,
324 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0),
325 ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04,
326 ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0),
327 ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08,
328 ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C,
329 ATA_LOG_NCQ_SEND_RECV_SIZE = 0x10,
330
Mark Lord5a5dbd12007-03-16 10:22:26 -0400331 /* READ/WRITE LONG (obsolete) */
332 ATA_CMD_READ_LONG = 0x22,
333 ATA_CMD_READ_LONG_ONCE = 0x23,
334 ATA_CMD_WRITE_LONG = 0x32,
335 ATA_CMD_WRITE_LONG_ONCE = 0x33,
336
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 /* SETFEATURES stuff */
338 SETFEATURES_XFER = 0x03,
339 XFER_UDMA_7 = 0x47,
340 XFER_UDMA_6 = 0x46,
341 XFER_UDMA_5 = 0x45,
342 XFER_UDMA_4 = 0x44,
343 XFER_UDMA_3 = 0x43,
344 XFER_UDMA_2 = 0x42,
345 XFER_UDMA_1 = 0x41,
346 XFER_UDMA_0 = 0x40,
Alan Coxb352e572006-08-10 18:52:12 +0100347 XFER_MW_DMA_4 = 0x24, /* CFA only */
348 XFER_MW_DMA_3 = 0x23, /* CFA only */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349 XFER_MW_DMA_2 = 0x22,
350 XFER_MW_DMA_1 = 0x21,
351 XFER_MW_DMA_0 = 0x20,
Alan Coxb4b52db2005-09-26 12:48:41 +0100352 XFER_SW_DMA_2 = 0x12,
353 XFER_SW_DMA_1 = 0x11,
354 XFER_SW_DMA_0 = 0x10,
Alan Coxb352e572006-08-10 18:52:12 +0100355 XFER_PIO_6 = 0x0E, /* CFA only */
356 XFER_PIO_5 = 0x0D, /* CFA only */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357 XFER_PIO_4 = 0x0C,
358 XFER_PIO_3 = 0x0B,
359 XFER_PIO_2 = 0x0A,
360 XFER_PIO_1 = 0x09,
361 XFER_PIO_0 = 0x08,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362 XFER_PIO_SLOW = 0x00,
363
zhao, forrest3057ac32006-06-12 12:01:34 +0800364 SETFEATURES_WC_ON = 0x02, /* Enable write cache */
365 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
366
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200367 /* Enable/Disable Automatic Acoustic Management */
368 SETFEATURES_AAM_ON = 0x42,
369 SETFEATURES_AAM_OFF = 0xC2,
370
Mark Lord169439c2007-04-17 18:26:07 -0400371 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
372
Kristen Carlson Accardi9f45cbd2007-08-15 03:57:11 -0400373 SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
374 SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
375
376 /* SETFEATURE Sector counts for SATA features */
Tejun Heofa5b5612009-09-16 04:17:02 +0900377 SATA_FPDMA_OFFSET = 0x01, /* FPDMA non-zero buffer offsets */
Tejun Heof1bce7f2009-09-16 04:16:04 +0900378 SATA_FPDMA_AA = 0x02, /* FPDMA Setup FIS Auto-Activate */
379 SATA_DIPM = 0x03, /* Device Initiated Power Management */
Tejun Heofa5b5612009-09-16 04:17:02 +0900380 SATA_FPDMA_IN_ORDER = 0x04, /* FPDMA in-order data delivery */
Tejun Heof1bce7f2009-09-16 04:16:04 +0900381 SATA_AN = 0x05, /* Asynchronous Notification */
Tejun Heofa5b5612009-09-16 04:17:02 +0900382 SATA_SSP = 0x06, /* Software Settings Preservation */
Shane Huang65fe1f02012-09-07 22:40:01 +0800383 SATA_DEVSLP = 0x09, /* Device Sleep */
Kristen Carlson Accardi9f45cbd2007-08-15 03:57:11 -0400384
Tejun Heoce2e0ab2007-12-15 15:04:59 +0900385 /* feature values for SET_MAX */
386 ATA_SET_MAX_ADDR = 0x00,
387 ATA_SET_MAX_PASSWD = 0x01,
388 ATA_SET_MAX_LOCK = 0x02,
389 ATA_SET_MAX_UNLOCK = 0x03,
390 ATA_SET_MAX_FREEZE_LOCK = 0x04,
391
392 /* feature values for DEVICE CONFIGURATION OVERLAY */
393 ATA_DCO_RESTORE = 0xC0,
394 ATA_DCO_FREEZE_LOCK = 0xC1,
395 ATA_DCO_IDENTIFY = 0xC2,
396 ATA_DCO_SET = 0xC3,
397
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200398 /* feature values for SMART */
399 ATA_SMART_ENABLE = 0xD8,
400 ATA_SMART_READ_VALUES = 0xD0,
401 ATA_SMART_READ_THRESHOLDS = 0xD1,
402
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400403 /* feature values for Data Set Management */
404 ATA_DSM_TRIM = 0x01,
405
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200406 /* password used in LBA Mid / LBA High for executing SMART commands */
407 ATA_SMART_LBAM_PASS = 0x4F,
408 ATA_SMART_LBAH_PASS = 0xC2,
409
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410 /* ATAPI stuff */
411 ATAPI_PKT_DMA = (1 << 0),
412 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
413 0=to device, 1=to host */
414 ATAPI_CDB_LEN = 16,
415
Tejun Heo814600e2007-07-01 19:05:58 +0900416 /* PMP stuff */
417 SATA_PMP_MAX_PORTS = 15,
418 SATA_PMP_CTRL_PORT = 15,
419
420 SATA_PMP_GSCR_DWORDS = 128,
421 SATA_PMP_GSCR_PROD_ID = 0,
422 SATA_PMP_GSCR_REV = 1,
423 SATA_PMP_GSCR_PORT_INFO = 2,
424 SATA_PMP_GSCR_ERROR = 32,
425 SATA_PMP_GSCR_ERROR_EN = 33,
426 SATA_PMP_GSCR_FEAT = 64,
427 SATA_PMP_GSCR_FEAT_EN = 96,
428
429 SATA_PMP_PSCR_STATUS = 0,
430 SATA_PMP_PSCR_ERROR = 1,
431 SATA_PMP_PSCR_CONTROL = 2,
432
433 SATA_PMP_FEAT_BIST = (1 << 0),
434 SATA_PMP_FEAT_PMREQ = (1 << 1),
435 SATA_PMP_FEAT_DYNSSC = (1 << 2),
436 SATA_PMP_FEAT_NOTIFY = (1 << 3),
437
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 /* cable types */
439 ATA_CBL_NONE = 0,
440 ATA_CBL_PATA40 = 1,
441 ATA_CBL_PATA80 = 2,
Tejun Heoc88f90c2007-11-27 19:43:48 +0900442 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
443 ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */
444 ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */
445 ATA_CBL_SATA = 6,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446
447 /* SATA Status and Control Registers */
448 SCR_STATUS = 0,
449 SCR_ERROR = 1,
450 SCR_CONTROL = 2,
451 SCR_ACTIVE = 3,
452 SCR_NOTIFICATION = 4,
453
Tejun Heo9be1e972006-05-15 20:58:17 +0900454 /* SError bits */
455 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
456 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
457 SERR_DATA = (1 << 8), /* unrecovered data error */
458 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
459 SERR_PROTOCOL = (1 << 10), /* protocol violation */
460 SERR_INTERNAL = (1 << 11), /* host internal error */
461 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
Robert Hancock1333e192007-10-02 11:22:02 -0400462 SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
463 SERR_COMM_WAKE = (1 << 18), /* Comm wake */
464 SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
465 SERR_DISPARITY = (1 << 20), /* Disparity */
466 SERR_CRC = (1 << 21), /* CRC error */
467 SERR_HANDSHAKE = (1 << 22), /* Handshake error */
468 SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
469 SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
470 SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
Tejun Heo9be1e972006-05-15 20:58:17 +0900471 SERR_DEV_XCHG = (1 << 26), /* device exchanged */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472};
473
474enum ata_tf_protocols {
475 /* ATA taskfile protocols */
476 ATA_PROT_UNKNOWN, /* unknown/invalid */
477 ATA_PROT_NODATA, /* no data */
Albert Lee1dce5892007-06-07 15:49:22 +0800478 ATA_PROT_PIO, /* PIO data xfer */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479 ATA_PROT_DMA, /* DMA */
Tejun Heo88e49032006-05-15 21:03:38 +0900480 ATA_PROT_NCQ, /* NCQ */
Tejun Heo0dc36882007-12-18 16:34:43 -0500481 ATAPI_PROT_NODATA, /* packet command, no data */
482 ATAPI_PROT_PIO, /* packet command, PIO data xfer*/
483 ATAPI_PROT_DMA, /* packet command with special DMA sauce */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484};
485
486enum ata_ioctls {
487 ATA_IOC_GET_IO32 = 0x309,
488 ATA_IOC_SET_IO32 = 0x324,
489};
490
491/* core structures */
492
Tejun Heof60d7012010-05-10 21:41:41 +0200493struct ata_bmdma_prd {
Al Viro4ca4e432007-12-30 09:32:22 +0000494 __le32 addr;
495 __le32 flags_len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700496};
497
Tejun Heo405e66b2007-11-27 19:28:53 +0900498/*
499 * id tests
500 */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200501#define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
502#define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
503#define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
Shane Huang583661a2012-09-07 22:38:20 +0800504#define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200505#define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
506#define ata_id_removeable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
Tejun Heo854c73a2007-09-23 13:14:11 +0900507#define ata_id_has_atapi_AN(id) \
Shane Huang583661a2012-09-07 22:38:20 +0800508 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
509 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
510 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
Shaohua Li388539f2009-07-27 09:24:35 +0800511#define ata_id_has_fpdma_aa(id) \
Shane Huang583661a2012-09-07 22:38:20 +0800512 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
513 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
514 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200515#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
516#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517#define ata_id_u32(id,n) \
518 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
519#define ata_id_u64(id,n) \
520 ( ((u64) (id)[(n) + 3] << 48) | \
521 ((u64) (id)[(n) + 2] << 32) | \
522 ((u64) (id)[(n) + 1] << 16) | \
523 ((u64) (id)[(n) + 0]) )
524
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200525#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
Shane Huang583661a2012-09-07 22:38:20 +0800526#define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
Shane Huang65fe1f02012-09-07 22:40:01 +0800527#define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
Albert Lee312f7da2005-09-27 17:38:03 +0800528
Kristen Carlson Accardica773292007-10-25 00:58:59 -0400529static inline bool ata_id_has_hipm(const u16 *id)
530{
Shane Huang583661a2012-09-07 22:38:20 +0800531 u16 val = id[ATA_ID_SATA_CAPABILITY];
Kristen Carlson Accardica773292007-10-25 00:58:59 -0400532
533 if (val == 0 || val == 0xffff)
534 return false;
535
536 return val & (1 << 9);
537}
538
539static inline bool ata_id_has_dipm(const u16 *id)
540{
Shane Huang583661a2012-09-07 22:38:20 +0800541 u16 val = id[ATA_ID_FEATURE_SUPP];
Kristen Carlson Accardica773292007-10-25 00:58:59 -0400542
543 if (val == 0 || val == 0xffff)
544 return false;
545
546 return val & (1 << 3);
547}
548
Alan Coxae8d4ee2007-11-04 22:05:49 -0500549
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100550static inline bool ata_id_has_fua(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100551{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200552 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100553 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200554 return id[ATA_ID_CFSSE] & (1 << 6);
Alan Coxc7293872007-08-22 23:31:43 +0100555}
556
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100557static inline bool ata_id_has_flush(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100558{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200559 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100560 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200561 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
Alan Coxc7293872007-08-22 23:31:43 +0100562}
563
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100564static inline bool ata_id_flush_enabled(const u16 *id)
Bartlomiej Zolnierkiewicz4b58f172008-10-10 22:39:30 +0200565{
566 if (ata_id_has_flush(id) == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100567 return false;
Bartlomiej Zolnierkiewicz4b58f172008-10-10 22:39:30 +0200568 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100569 return false;
Bartlomiej Zolnierkiewicz4b58f172008-10-10 22:39:30 +0200570 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
571}
572
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100573static inline bool ata_id_has_flush_ext(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100574{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200575 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100576 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200577 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
Alan Coxc7293872007-08-22 23:31:43 +0100578}
579
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100580static inline bool ata_id_flush_ext_enabled(const u16 *id)
Bartlomiej Zolnierkiewiczff2779b2008-10-10 22:39:31 +0200581{
582 if (ata_id_has_flush_ext(id) == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100583 return false;
Bartlomiej Zolnierkiewiczff2779b2008-10-10 22:39:31 +0200584 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100585 return false;
Bartlomiej Zolnierkiewiczff2779b2008-10-10 22:39:31 +0200586 /*
587 * some Maxtor disks have bit 13 defined incorrectly
588 * so check bit 10 too
589 */
590 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
591}
592
Grant Grundler295124d2010-08-17 10:56:53 -0700593static inline u32 ata_id_logical_sector_size(const u16 *id)
Christoph Hellwig18f0f972009-11-17 10:00:47 -0500594{
Grant Grundler295124d2010-08-17 10:56:53 -0700595 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
596 * IDENTIFY DEVICE data, word 117-118.
597 * 0xd000 ignores bit 13 (logical:physical > 1)
598 */
599 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
600 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
601 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
602 return ATA_SECT_SIZE;
Christoph Hellwig18f0f972009-11-17 10:00:47 -0500603}
604
Grant Grundler295124d2010-08-17 10:56:53 -0700605static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
Christoph Hellwig18f0f972009-11-17 10:00:47 -0500606{
Grant Grundler295124d2010-08-17 10:56:53 -0700607 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
608 * IDENTIFY DEVICE data, word 106.
609 * 0xe000 ignores bit 12 (logical sector > 512 bytes)
610 */
611 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
612 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
613 return 0;
614}
615
616/* Offset of logical sectors relative to physical sectors.
617 *
618 * If device has more than one logical sector per physical sector
619 * (aka 512 byte emulation), vendors might offset the "sector 0" address
620 * so sector 63 is "naturally aligned" - e.g. FAT partition table.
621 * This avoids Read/Mod/Write penalties when using FAT partition table
622 * and updating "well aligned" (FS perspective) physical sectors on every
623 * transaction.
624 */
625static inline u16 ata_id_logical_sector_offset(const u16 *id,
626 u8 log2_per_phys)
627{
628 u16 word_209 = id[209];
629
630 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
631 u16 first = word_209 & 0x3fff;
632 if (first > 0)
633 return (1 << log2_per_phys) - first;
634 }
635 return 0;
Christoph Hellwig18f0f972009-11-17 10:00:47 -0500636}
637
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100638static inline bool ata_id_has_lba48(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100639{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200640 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100641 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200642 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100643 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200644 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
Alan Coxc7293872007-08-22 23:31:43 +0100645}
646
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100647static inline bool ata_id_lba48_enabled(const u16 *id)
Bartlomiej Zolnierkiewicz942dcd82008-10-10 22:39:30 +0200648{
649 if (ata_id_has_lba48(id) == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100650 return false;
Bartlomiej Zolnierkiewicz942dcd82008-10-10 22:39:30 +0200651 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100652 return false;
Bartlomiej Zolnierkiewicz942dcd82008-10-10 22:39:30 +0200653 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
654}
655
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100656static inline bool ata_id_hpa_enabled(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100657{
658 /* Yes children, word 83 valid bits cover word 82 data */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200659 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100660 return false;
Alan Coxc7293872007-08-22 23:31:43 +0100661 /* And 87 covers 85-87 */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200662 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100663 return false;
Alan Coxc7293872007-08-22 23:31:43 +0100664 /* Check command sets enabled as well as supported */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200665 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100666 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200667 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
Alan Coxc7293872007-08-22 23:31:43 +0100668}
669
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100670static inline bool ata_id_has_wcache(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100671{
672 /* Yes children, word 83 valid bits cover word 82 data */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200673 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100674 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200675 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
Alan Coxc7293872007-08-22 23:31:43 +0100676}
677
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100678static inline bool ata_id_has_pm(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100679{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200680 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100681 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200682 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
Alan Coxc7293872007-08-22 23:31:43 +0100683}
684
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100685static inline bool ata_id_rahead_enabled(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100686{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200687 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100688 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200689 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
Alan Coxc7293872007-08-22 23:31:43 +0100690}
691
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100692static inline bool ata_id_wcache_enabled(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100693{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200694 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100695 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200696 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
Alan Coxc7293872007-08-22 23:31:43 +0100697}
698
699/**
700 * ata_id_major_version - get ATA level of drive
701 * @id: Identify data
702 *
703 * Caveats:
704 * ATA-1 considers identify optional
705 * ATA-2 introduces mandatory identify
706 * ATA-3 introduces word 80 and accurate reporting
707 *
708 * The practical impact of this is that ata_id_major_version cannot
Jeff Garzik2dcb4072007-10-19 06:42:56 -0400709 * reliably report on drives below ATA3.
Alan Coxc7293872007-08-22 23:31:43 +0100710 */
711
Tejun Heo3d2ca912006-02-12 22:47:04 +0900712static inline unsigned int ata_id_major_version(const u16 *id)
713{
714 unsigned int mver;
715
Alan Coxb352e572006-08-10 18:52:12 +0100716 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
717 return 0;
718
Tejun Heo3d2ca912006-02-12 22:47:04 +0900719 for (mver = 14; mver >= 1; mver--)
720 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
721 break;
722 return mver;
723}
724
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100725static inline bool ata_id_is_sata(const u16 *id)
Tejun Heo32d90912007-02-21 20:25:08 +0900726{
Bartlomiej Zolnierkiewicz367d7e72008-10-10 22:39:30 +0200727 /*
728 * See if word 93 is 0 AND drive is at least ATA-5 compatible
729 * verifying that word 80 by casting it to a signed type --
730 * this trick allows us to filter out the reserved values of
731 * 0x0000 and 0xffff along with the earlier ATA revisions...
732 */
733 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100734 return true;
735 return false;
Tejun Heo32d90912007-02-21 20:25:08 +0900736}
737
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100738static inline bool ata_id_has_tpm(const u16 *id)
Alan Coxae8d4ee2007-11-04 22:05:49 -0500739{
740 /* The TPM bits are only valid on ATA8 */
741 if (ata_id_major_version(id) < 8)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100742 return false;
Alan Coxae8d4ee2007-11-04 22:05:49 -0500743 if ((id[48] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100744 return false;
Alan Coxae8d4ee2007-11-04 22:05:49 -0500745 return id[48] & (1 << 0);
746}
747
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100748static inline bool ata_id_has_dword_io(const u16 *id)
Alan Coxae8d4ee2007-11-04 22:05:49 -0500749{
750 /* ATA 8 reuses this flag for "trusted" computing */
751 if (ata_id_major_version(id) > 7)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100752 return false;
753 return id[ATA_ID_DWORD_IO] & (1 << 0);
Alan Coxae8d4ee2007-11-04 22:05:49 -0500754}
755
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100756static inline bool ata_id_has_unload(const u16 *id)
Elias Oltmannsea6ce532008-09-19 23:46:01 +0200757{
758 if (ata_id_major_version(id) >= 7 &&
759 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
760 id[ATA_ID_CFSSE] & (1 << 13))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100761 return true;
762 return false;
Elias Oltmannsea6ce532008-09-19 23:46:01 +0200763}
764
Hannes Reinecke6b3b9d72011-03-07 08:56:44 +0100765static inline bool ata_id_has_wwn(const u16 *id)
766{
767 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
768}
769
Martin K. Petersen4bca3282009-05-15 00:40:35 -0400770static inline int ata_id_form_factor(const u16 *id)
771{
772 u16 val = id[168];
773
774 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
775 return 0;
776
777 val &= 0xf;
778
779 if (val > 5)
780 return 0;
781
782 return val;
783}
784
785static inline int ata_id_rotation_rate(const u16 *id)
786{
787 u16 val = id[217];
788
789 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
790 return 0;
791
792 if (val > 1 && val < 0x401)
793 return 0;
794
795 return val;
796}
797
Marc Carinoed369112013-08-24 23:22:50 -0700798static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
799{
800 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
801}
802
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100803static inline bool ata_id_has_trim(const u16 *id)
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400804{
805 if (ata_id_major_version(id) >= 7 &&
806 (id[ATA_ID_DATA_SET_MGMT] & 1))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100807 return true;
808 return false;
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400809}
810
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100811static inline bool ata_id_has_zero_after_trim(const u16 *id)
Martin K. Petersene78db4d2009-11-26 22:46:03 -0500812{
813 /* DSM supported, deterministic read, and read zero after trim set */
814 if (ata_id_has_trim(id) &&
815 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100816 return true;
Martin K. Petersene78db4d2009-11-26 22:46:03 -0500817
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100818 return false;
Martin K. Petersene78db4d2009-11-26 22:46:03 -0500819}
820
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100821static inline bool ata_id_current_chs_valid(const u16 *id)
Albert Lee8bf62ece2005-05-12 15:29:42 -0400822{
Jeff Garzik9bec2e32006-08-31 00:02:15 -0400823 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
824 has not been issued to the device then the values of
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200825 id[ATA_ID_CUR_CYLS] to id[ATA_ID_CUR_SECTORS] are vendor specific. */
826 return (id[ATA_ID_FIELD_VALID] & 1) && /* Current translation valid */
827 id[ATA_ID_CUR_CYLS] && /* cylinders in current translation */
828 id[ATA_ID_CUR_HEADS] && /* heads in current translation */
829 id[ATA_ID_CUR_HEADS] <= 16 &&
830 id[ATA_ID_CUR_SECTORS]; /* sectors in current translation */
Albert Lee8bf62ece2005-05-12 15:29:42 -0400831}
832
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100833static inline bool ata_id_is_cfa(const u16 *id)
Alan Coxb352e572006-08-10 18:52:12 +0100834{
Ben Gardner4b7d1c02010-02-23 12:41:22 -0600835 if ((id[ATA_ID_CONFIG] == 0x848A) || /* Traditional CF */
836 (id[ATA_ID_CONFIG] == 0x844A)) /* Delkin Devices CF */
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100837 return true;
Sergei Shtylyov2999b582009-02-01 20:46:39 +0400838 /*
839 * CF specs don't require specific value in the word 0 anymore and yet
840 * they forbid to report the ATA version in the word 80 and require the
841 * CFA feature set support to be indicated in the word 83 in this case.
842 * Unfortunately, some cards only follow either of this requirements,
843 * and while those that don't indicate CFA feature support need some
844 * sort of quirk list, it seems impractical for the ones that do...
845 */
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100846 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
Alan Coxb352e572006-08-10 18:52:12 +0100847}
848
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100849static inline bool ata_id_is_ssd(const u16 *id)
Jens Axboe8bff7c62008-09-24 13:05:10 +0200850{
851 return id[ATA_ID_ROT_SPEED] == 0x01;
852}
853
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100854static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
Bartlomiej Zolnierkiewicz6dae44f2009-06-15 18:52:52 +0200855{
856 /* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */
857 if (pio > 4 && ata_id_is_cfa(id))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100858 return false;
Bartlomiej Zolnierkiewicz6dae44f2009-06-15 18:52:52 +0200859 /* For PIO3 and higher it is mandatory. */
860 if (pio > 2)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100861 return true;
Bartlomiej Zolnierkiewicz6dae44f2009-06-15 18:52:52 +0200862 /* Turn it on when possible. */
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100863 return ata_id_has_iordy(id);
Bartlomiej Zolnierkiewicz6dae44f2009-06-15 18:52:52 +0200864}
865
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100866static inline bool ata_drive_40wire(const u16 *dev_id)
Alan Coxfc085152006-10-10 14:28:11 -0700867{
Tejun Heo32d90912007-02-21 20:25:08 +0900868 if (ata_id_is_sata(dev_id))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100869 return false; /* SATA */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200870 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100871 return false; /* 80 wire */
872 return true;
Alan Coxfc085152006-10-10 14:28:11 -0700873}
874
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100875static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
Alan Cox6bbfd532007-11-05 22:58:58 +0000876{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200877 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100878 return false; /* 80 wire */
879 return true;
Alan Cox6bbfd532007-11-05 22:58:58 +0000880}
881
Jeff Garzik057ace52005-10-22 14:27:05 -0400882static inline int atapi_cdb_len(const u16 *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700883{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200884 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700885 switch (tmp) {
886 case 0: return 12;
887 case 1: return 16;
888 default: return -1;
889 }
890}
891
Shan Haid8668fc2013-03-18 10:30:43 +0800892static inline int atapi_command_packet_set(const u16 *dev_id)
Tony Battersbyf8d8e572007-10-30 11:44:35 -0400893{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200894 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
Tony Battersbyf8d8e572007-10-30 11:44:35 -0400895}
896
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100897static inline bool atapi_id_dmadir(const u16 *dev_id)
Tejun Heo91163002008-02-21 13:25:50 +0900898{
899 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
900}
901
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +0200902/*
903 * ata_id_is_lba_capacity_ok() performs a sanity check on
904 * the claimed LBA capacity value for the device.
905 *
906 * Returns 1 if LBA capacity looks sensible, 0 otherwise.
907 *
908 * It is called only once for each device.
909 */
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100910static inline bool ata_id_is_lba_capacity_ok(u16 *id)
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +0200911{
912 unsigned long lba_sects, chs_sects, head, tail;
913
914 /* No non-LBA info .. so valid! */
915 if (id[ATA_ID_CYLS] == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100916 return true;
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +0200917
918 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
919
920 /*
921 * The ATA spec tells large drives to return
922 * C/H/S = 16383/16/63 independent of their size.
923 * Some drives can be jumpered to use 15 heads instead of 16.
924 * Some drives can be jumpered to use 4092 cyls instead of 16383.
925 */
926 if ((id[ATA_ID_CYLS] == 16383 ||
927 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
928 id[ATA_ID_SECTORS] == 63 &&
929 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
930 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100931 return true;
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +0200932
933 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
934
935 /* perform a rough sanity check on lba_sects: within 10% is OK */
936 if (lba_sects - chs_sects < chs_sects/10)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100937 return true;
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +0200938
939 /* some drives have the word order reversed */
940 head = (lba_sects >> 16) & 0xffff;
941 tail = lba_sects & 0xffff;
942 lba_sects = head | (tail << 16);
943
944 if (lba_sects - chs_sects < chs_sects/10) {
945 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100946 return true; /* LBA capacity is (now) good */
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +0200947 }
948
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100949 return false; /* LBA capacity value may be bad */
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +0200950}
951
Bartlomiej Zolnierkiewicz93734a22008-10-10 22:39:31 +0200952static inline void ata_id_to_hd_driveid(u16 *id)
953{
954#ifdef __BIG_ENDIAN
955 /* accessed in struct hd_driveid as 8-bit values */
956 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
957 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
958 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
959 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
960 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
961
962 /* as 32-bit values */
963 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
964 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
965
966 /* as 64-bit value */
967 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
968 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
969#endif
970}
971
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400972/*
Martin K. Petersend0634c42009-11-26 12:00:43 -0500973 * Write LBA Range Entries to the buffer that will cover the extent from
974 * sector to sector + count. This is used for TRIM and for ADD LBA(S)
975 * TO NV CACHE PINNED SET.
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400976 */
Martin K. Petersend0634c42009-11-26 12:00:43 -0500977static inline unsigned ata_set_lba_range_entries(void *_buffer,
978 unsigned buf_size, u64 sector, unsigned long count)
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400979{
980 __le64 *buffer = _buffer;
Martin K. Petersend0634c42009-11-26 12:00:43 -0500981 unsigned i = 0, used_bytes;
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400982
Martin K. Petersend0634c42009-11-26 12:00:43 -0500983 while (i < buf_size / 8 ) { /* 6-byte LBA + 2-byte range per entry */
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400984 u64 entry = sector |
985 ((u64)(count > 0xffff ? 0xffff : count) << 48);
986 buffer[i++] = __cpu_to_le64(entry);
987 if (count <= 0xffff)
988 break;
989 count -= 0xffff;
990 sector += 0xffff;
991 }
992
Martin K. Petersend0634c42009-11-26 12:00:43 -0500993 used_bytes = ALIGN(i * 8, 512);
994 memset(buffer + i, 0, used_bytes - i * 8);
995 return used_bytes;
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400996}
997
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100998static inline bool ata_ok(u8 status)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700999{
1000 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1001 == ATA_DRDY);
1002}
1003
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001004static inline bool lba_28_ok(u64 block, u32 n_block)
Albert Leec6a33e22005-10-12 15:12:26 +08001005{
Mark Lord45c4d012010-04-07 13:52:08 -04001006 /* check the ending block number: must be LESS THAN 0x0fffffff */
1007 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= 256);
Albert Leec6a33e22005-10-12 15:12:26 +08001008}
1009
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001010static inline bool lba_48_ok(u64 block, u32 n_block)
Albert Leec6a33e22005-10-12 15:12:26 +08001011{
1012 /* check the ending block number */
1013 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
1014}
1015
Tejun Heo814600e2007-07-01 19:05:58 +09001016#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1017#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1018#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1019#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1020
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021#endif /* __LINUX_ATA_H__ */