blob: 11fc2a27fa2ea90da2b65ef282a5db139c594c71 [file] [log] [blame]
Thomas Petazzonif6e916b2012-11-20 23:00:52 +01001config IRQCHIP
2 def_bool y
3 depends on OF_IRQ
4
Rob Herring81243e42012-11-20 21:21:40 -06005config ARM_GIC
6 bool
7 select IRQ_DOMAIN
Yingjoe Chen9a1091e2014-11-25 16:04:19 +08008 select IRQ_DOMAIN_HIERARCHY
Rob Herring81243e42012-11-20 21:21:40 -06009 select MULTI_IRQ_HANDLER
10
Linus Walleija27d21e2015-12-18 10:44:53 +010011config ARM_GIC_MAX_NR
12 int
13 default 2 if ARCH_REALVIEW
14 default 1
15
Suravee Suthikulpanit853a33c2014-11-25 18:47:22 +000016config ARM_GIC_V2M
17 bool
18 depends on ARM_GIC
19 depends on PCI && PCI_MSI
20 select PCI_MSI_IRQ_DOMAIN
21
Rob Herring81243e42012-11-20 21:21:40 -060022config GIC_NON_BANKED
23 bool
24
Marc Zyngier021f6532014-06-30 16:01:31 +010025config ARM_GIC_V3
26 bool
27 select IRQ_DOMAIN
28 select MULTI_IRQ_HANDLER
Marc Zyngier443acc42014-11-24 14:35:09 +000029 select IRQ_DOMAIN_HIERARCHY
Marc Zyngier021f6532014-06-30 16:01:31 +010030
Marc Zyngier19812722014-11-24 14:35:19 +000031config ARM_GIC_V3_ITS
32 bool
33 select PCI_MSI_IRQ_DOMAIN
Uwe Kleine-König292ec082013-06-26 09:18:48 +020034
Ma Jun717c3db2015-12-17 19:56:35 +080035config HISILICON_IRQ_MBIGEN
36 bool "Support mbigen interrupt controller"
37 default n
38 depends on ARM_GIC_V3 && ARM_GIC_V3_ITS && GENERIC_MSI_IRQ_DOMAIN
39 help
40 Enable the mbigen interrupt controller used on
41 Hisilicon platform.
42
Rob Herring44430ec2012-10-27 17:25:26 -050043config ARM_NVIC
44 bool
45 select IRQ_DOMAIN
Stefan Agner2d9f59f2015-05-16 11:44:16 +020046 select IRQ_DOMAIN_HIERARCHY
Rob Herring44430ec2012-10-27 17:25:26 -050047 select GENERIC_IRQ_CHIP
48
49config ARM_VIC
50 bool
51 select IRQ_DOMAIN
52 select MULTI_IRQ_HANDLER
53
54config ARM_VIC_NR
55 int
56 default 4 if ARCH_S5PV210
Rob Herring44430ec2012-10-27 17:25:26 -050057 default 2
58 depends on ARM_VIC
59 help
60 The maximum number of VICs available in the system, for
61 power management.
62
Boris BREZILLONb1479eb2014-07-10 19:14:18 +020063config ATMEL_AIC_IRQ
64 bool
65 select GENERIC_IRQ_CHIP
66 select IRQ_DOMAIN
67 select MULTI_IRQ_HANDLER
68 select SPARSE_IRQ
69
70config ATMEL_AIC5_IRQ
71 bool
72 select GENERIC_IRQ_CHIP
73 select IRQ_DOMAIN
74 select MULTI_IRQ_HANDLER
75 select SPARSE_IRQ
76
Ralf Baechle0509cfd2015-07-08 14:46:08 +020077config I8259
78 bool
79 select IRQ_DOMAIN
80
Kevin Cernekee5f7f0312014-12-25 09:49:06 -080081config BCM7038_L1_IRQ
82 bool
83 select GENERIC_IRQ_CHIP
84 select IRQ_DOMAIN
85
Kevin Cernekeea4fcbb82014-11-06 22:44:27 -080086config BCM7120_L2_IRQ
87 bool
88 select GENERIC_IRQ_CHIP
89 select IRQ_DOMAIN
90
Florian Fainelli7f646e92014-05-23 17:40:53 -070091config BRCMSTB_L2_IRQ
92 bool
Florian Fainelli7f646e92014-05-23 17:40:53 -070093 select GENERIC_IRQ_CHIP
94 select IRQ_DOMAIN
95
Sebastian Hesselbarth350d71b92013-09-09 14:01:20 +020096config DW_APB_ICTL
97 bool
Jisheng Zhange1588492014-10-22 20:59:10 +080098 select GENERIC_IRQ_CHIP
Sebastian Hesselbarth350d71b92013-09-09 14:01:20 +020099 select IRQ_DOMAIN
100
James Hoganb6ef9162013-04-22 15:43:50 +0100101config IMGPDC_IRQ
102 bool
103 select GENERIC_IRQ_CHIP
104 select IRQ_DOMAIN
105
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200106config IRQ_MIPS_CPU
107 bool
108 select GENERIC_IRQ_CHIP
109 select IRQ_DOMAIN
110
Alexander Shiyanafc98d92014-02-02 12:07:46 +0400111config CLPS711X_IRQCHIP
112 bool
113 depends on ARCH_CLPS711X
114 select IRQ_DOMAIN
115 select MULTI_IRQ_HANDLER
116 select SPARSE_IRQ
117 default y
118
Stefan Kristiansson4db8e6d2014-05-26 23:31:42 +0300119config OR1K_PIC
120 bool
121 select IRQ_DOMAIN
122
Felipe Balbi85980662014-09-15 16:15:02 -0500123config OMAP_IRQCHIP
124 bool
125 select GENERIC_IRQ_CHIP
126 select IRQ_DOMAIN
127
Sebastian Hesselbarth9dbd90f2013-06-06 18:27:09 +0200128config ORION_IRQCHIP
129 bool
130 select IRQ_DOMAIN
131 select MULTI_IRQ_HANDLER
132
Magnus Damm44358042013-02-18 23:28:34 +0900133config RENESAS_INTC_IRQPIN
134 bool
135 select IRQ_DOMAIN
136
Magnus Dammfbc83b72013-02-27 17:15:01 +0900137config RENESAS_IRQC
138 bool
Magnus Damm99c221d2015-09-28 18:42:37 +0900139 select GENERIC_IRQ_CHIP
Magnus Dammfbc83b72013-02-27 17:15:01 +0900140 select IRQ_DOMAIN
141
Lee Jones07088482015-02-18 15:13:58 +0000142config ST_IRQCHIP
143 bool
144 select REGMAP
145 select MFD_SYSCON
146 help
147 Enables SysCfg Controlled IRQs on STi based platforms.
148
Christian Ruppertb06eb012013-06-25 18:29:57 +0200149config TB10X_IRQC
150 bool
151 select IRQ_DOMAIN
152 select GENERIC_IRQ_CHIP
153
Damien Riegeld01f8632015-12-21 15:11:23 -0500154config TS4800_IRQ
155 tristate "TS-4800 IRQ controller"
156 select IRQ_DOMAIN
157 help
158 Support for the TS-4800 FPGA IRQ controller
159
Linus Walleij2389d502012-10-31 22:04:31 +0100160config VERSATILE_FPGA_IRQ
161 bool
162 select IRQ_DOMAIN
163
164config VERSATILE_FPGA_IRQ_NR
165 int
166 default 4
167 depends on VERSATILE_FPGA_IRQ
Max Filippov26a8e962013-12-01 12:04:57 +0400168
169config XTENSA_MX
170 bool
171 select IRQ_DOMAIN
Sricharan R96ca8482013-12-03 15:57:23 +0530172
173config IRQ_CROSSBAR
174 bool
175 help
Masanari Iidaf54619f2014-09-18 12:09:42 +0900176 Support for a CROSSBAR ip that precedes the main interrupt controller.
Sricharan R96ca8482013-12-03 15:57:23 +0530177 The primary irqchip invokes the crossbar's callback which inturn allocates
178 a free irq and configures the IP. Thus the peripheral interrupts are
179 routed to one of the free irqchip interrupt lines.
Grygorii Strashko89323f82014-07-23 17:40:30 +0300180
181config KEYSTONE_IRQ
182 tristate "Keystone 2 IRQ controller IP"
183 depends on ARCH_KEYSTONE
184 help
185 Support for Texas Instruments Keystone 2 IRQ controller IP which
186 is part of the Keystone 2 IPC mechanism
Andrew Bresticker8a19b8f2014-09-18 14:47:19 -0700187
188config MIPS_GIC
189 bool
190 select MIPS_CM
Yoshinori Sato8a764482015-05-10 02:30:47 +0900191
Paul Burton44e08e72015-05-24 16:11:31 +0100192config INGENIC_IRQ
193 bool
194 depends on MACH_INGENIC
195 default y
Linus Torvalds78c10e52015-06-27 12:44:34 -0700196
Yoshinori Sato8a764482015-05-10 02:30:47 +0900197config RENESAS_H8300H_INTC
198 bool
199 select IRQ_DOMAIN
200
201config RENESAS_H8S_INTC
202 bool
Linus Torvalds78c10e52015-06-27 12:44:34 -0700203 select IRQ_DOMAIN
Shenwei Wange324c4d2015-08-24 14:04:15 -0500204
205config IMX_GPCV2
206 bool
207 select IRQ_DOMAIN
208 help
209 Enables the wakeup IRQs for IMX platforms with GPCv2 block
Oleksij Rempel7e4ac672015-10-12 21:15:34 +0200210
211config IRQ_MXS
212 def_bool y if MACH_ASM9260 || ARCH_MXS
213 select IRQ_DOMAIN
214 select STMP_DEVICE