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Christoph Hellwig21d34712015-11-26 09:08:36 +01001/*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/blkdev.h>
16#include <linux/blk-mq.h>
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +010017#include <linux/delay.h>
Christoph Hellwig21d34712015-11-26 09:08:36 +010018#include <linux/errno.h>
Christoph Hellwig1673f1f2015-11-26 10:54:19 +010019#include <linux/hdreg.h>
Christoph Hellwig21d34712015-11-26 09:08:36 +010020#include <linux/kernel.h>
Christoph Hellwig5bae7f72015-11-28 15:39:07 +010021#include <linux/module.h>
22#include <linux/list_sort.h>
Christoph Hellwig21d34712015-11-26 09:08:36 +010023#include <linux/slab.h>
24#include <linux/types.h>
Christoph Hellwig1673f1f2015-11-26 10:54:19 +010025#include <linux/pr.h>
26#include <linux/ptrace.h>
27#include <linux/nvme_ioctl.h>
28#include <linux/t10-pi.h>
Andy Lutomirskic5552fd2017-02-07 10:08:45 -080029#include <linux/pm_qos.h>
Christoph Hellwig1673f1f2015-11-26 10:54:19 +010030#include <asm/unaligned.h>
Christoph Hellwig21d34712015-11-26 09:08:36 +010031
32#include "nvme.h"
Sagi Grimberg038bd4c2016-06-13 16:45:28 +020033#include "fabrics.h"
Christoph Hellwig21d34712015-11-26 09:08:36 +010034
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +010035#define NVME_MINORS (1U << MINORBITS)
36
Marc Olson8ae4e442017-09-06 17:23:56 -070037unsigned int admin_timeout = 60;
38module_param(admin_timeout, uint, 0644);
Ming Linba0ba7d2016-02-10 10:03:30 -080039MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
Ming Lin576d55d2016-02-10 10:03:32 -080040EXPORT_SYMBOL_GPL(admin_timeout);
Ming Linba0ba7d2016-02-10 10:03:30 -080041
Marc Olson8ae4e442017-09-06 17:23:56 -070042unsigned int nvme_io_timeout = 30;
43module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
Ming Linba0ba7d2016-02-10 10:03:30 -080044MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
Ming Lin576d55d2016-02-10 10:03:32 -080045EXPORT_SYMBOL_GPL(nvme_io_timeout);
Ming Linba0ba7d2016-02-10 10:03:30 -080046
Christoph Hellwigb3b1b0b2017-06-12 18:30:51 +020047static unsigned char shutdown_timeout = 5;
Ming Linba0ba7d2016-02-10 10:03:30 -080048module_param(shutdown_timeout, byte, 0644);
49MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
50
Christoph Hellwig44e44b22017-04-05 19:18:11 +020051static u8 nvme_max_retries = 5;
52module_param_named(max_retries, nvme_max_retries, byte, 0644);
Keith Buschf80ec962016-07-12 16:20:31 -070053MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
Christoph Hellwig5bae7f72015-11-28 15:39:07 +010054
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +010055static int nvme_char_major;
56module_param(nvme_char_major, int, 0);
57
Kai-Heng Feng9947d6a2017-06-07 15:25:43 +080058static unsigned long default_ps_max_latency_us = 100000;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -080059module_param(default_ps_max_latency_us, ulong, 0644);
60MODULE_PARM_DESC(default_ps_max_latency_us,
61 "max power saving latency for new devices; use PM QOS to change per device");
62
Andy Lutomirskic35e30b2017-04-21 16:19:24 -070063static bool force_apst;
64module_param(force_apst, bool, 0644);
65MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
66
Jens Axboef5d11842017-06-27 12:03:06 -060067static bool streams;
68module_param(streams, bool, 0644);
69MODULE_PARM_DESC(streams, "turn on support for Streams write directives");
70
Sagi Grimberg9a6327d2017-06-07 20:31:55 +020071struct workqueue_struct *nvme_wq;
72EXPORT_SYMBOL_GPL(nvme_wq);
73
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +010074static LIST_HEAD(nvme_ctrl_list);
Ming Lin9f2482b2016-02-10 10:03:31 -080075static DEFINE_SPINLOCK(dev_list_lock);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +010076
Christoph Hellwig9843f682017-10-18 13:10:01 +020077static DEFINE_IDA(nvme_instance_ida);
78
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +010079static struct class *nvme_class;
80
Arnav Dawnb6dccf72017-07-12 16:10:40 +053081static __le32 nvme_get_log_dw10(u8 lid, size_t size)
82{
83 return cpu_to_le32((((size / 4) - 1) << 16) | lid);
84}
85
Christoph Hellwigd86c4d82017-06-15 15:41:08 +020086int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
87{
88 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
89 return -EBUSY;
90 if (!queue_work(nvme_wq, &ctrl->reset_work))
91 return -EBUSY;
92 return 0;
93}
94EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
95
96static int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
97{
98 int ret;
99
100 ret = nvme_reset_ctrl(ctrl);
101 if (!ret)
102 flush_work(&ctrl->reset_work);
103 return ret;
104}
105
Christoph Hellwig2a842ac2017-06-03 09:38:04 +0200106static blk_status_t nvme_error_status(struct request *req)
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200107{
108 switch (nvme_req(req)->status & 0x7ff) {
109 case NVME_SC_SUCCESS:
Christoph Hellwig2a842ac2017-06-03 09:38:04 +0200110 return BLK_STS_OK;
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200111 case NVME_SC_CAP_EXCEEDED:
Christoph Hellwig2a842ac2017-06-03 09:38:04 +0200112 return BLK_STS_NOSPC;
Junxiong Guane02ab022017-04-21 12:59:07 +0200113 case NVME_SC_ONCS_NOT_SUPPORTED:
Christoph Hellwig2a842ac2017-06-03 09:38:04 +0200114 return BLK_STS_NOTSUPP;
Junxiong Guane02ab022017-04-21 12:59:07 +0200115 case NVME_SC_WRITE_FAULT:
116 case NVME_SC_READ_ERROR:
117 case NVME_SC_UNWRITTEN_BLOCK:
Christoph Hellwiga751da32017-08-22 10:17:03 +0200118 case NVME_SC_ACCESS_DENIED:
119 case NVME_SC_READ_ONLY:
Christoph Hellwig2a842ac2017-06-03 09:38:04 +0200120 return BLK_STS_MEDIUM;
Christoph Hellwiga751da32017-08-22 10:17:03 +0200121 case NVME_SC_GUARD_CHECK:
122 case NVME_SC_APPTAG_CHECK:
123 case NVME_SC_REFTAG_CHECK:
124 case NVME_SC_INVALID_PI:
125 return BLK_STS_PROTECTION;
126 case NVME_SC_RESERVATION_CONFLICT:
127 return BLK_STS_NEXUS;
Christoph Hellwig2a842ac2017-06-03 09:38:04 +0200128 default:
129 return BLK_STS_IOERR;
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200130 }
131}
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200132
Christoph Hellwigf6324b12017-04-05 19:18:09 +0200133static inline bool nvme_req_needs_retry(struct request *req)
Christoph Hellwig77f02a72017-03-30 13:41:32 +0200134{
Christoph Hellwigf6324b12017-04-05 19:18:09 +0200135 if (blk_noretry_request(req))
136 return false;
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200137 if (nvme_req(req)->status & NVME_SC_DNR)
Christoph Hellwigf6324b12017-04-05 19:18:09 +0200138 return false;
Christoph Hellwig44e44b22017-04-05 19:18:11 +0200139 if (nvme_req(req)->retries >= nvme_max_retries)
Christoph Hellwigf6324b12017-04-05 19:18:09 +0200140 return false;
141 return true;
Christoph Hellwig77f02a72017-03-30 13:41:32 +0200142}
143
144void nvme_complete_rq(struct request *req)
145{
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200146 if (unlikely(nvme_req(req)->status && nvme_req_needs_retry(req))) {
147 nvme_req(req)->retries++;
Sagi Grimberg8d7b8fa2017-07-04 18:16:58 +0300148 blk_mq_requeue_request(req, true);
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200149 return;
Christoph Hellwig77f02a72017-03-30 13:41:32 +0200150 }
151
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200152 blk_mq_end_request(req, nvme_error_status(req));
Christoph Hellwig77f02a72017-03-30 13:41:32 +0200153}
154EXPORT_SYMBOL_GPL(nvme_complete_rq);
155
Ming Linc55a2fd2016-05-18 14:05:02 -0700156void nvme_cancel_request(struct request *req, void *data, bool reserved)
157{
158 int status;
159
160 if (!blk_mq_request_started(req))
161 return;
162
163 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
164 "Cancelling I/O %d", req->tag);
165
166 status = NVME_SC_ABORT_REQ;
167 if (blk_queue_dying(req->q))
168 status |= NVME_SC_DNR;
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200169 nvme_req(req)->status = status;
Christoph Hellwig08e00292017-04-20 16:03:09 +0200170 blk_mq_complete_request(req);
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200171
Ming Linc55a2fd2016-05-18 14:05:02 -0700172}
173EXPORT_SYMBOL_GPL(nvme_cancel_request);
174
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200175bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
176 enum nvme_ctrl_state new_state)
177{
Gabriel Krisman Bertazif6b6a282016-07-29 16:15:18 -0300178 enum nvme_ctrl_state old_state;
Christoph Hellwig0a72bbb2017-08-22 11:42:24 +0200179 unsigned long flags;
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200180 bool changed = false;
181
Christoph Hellwig0a72bbb2017-08-22 11:42:24 +0200182 spin_lock_irqsave(&ctrl->lock, flags);
Gabriel Krisman Bertazif6b6a282016-07-29 16:15:18 -0300183
184 old_state = ctrl->state;
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200185 switch (new_state) {
186 case NVME_CTRL_LIVE:
187 switch (old_state) {
Christoph Hellwig7d2e8002016-06-13 16:45:22 +0200188 case NVME_CTRL_NEW:
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200189 case NVME_CTRL_RESETTING:
Christoph Hellwigdef61ec2016-07-06 21:55:49 +0900190 case NVME_CTRL_RECONNECTING:
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200191 changed = true;
192 /* FALLTHRU */
193 default:
194 break;
195 }
196 break;
197 case NVME_CTRL_RESETTING:
198 switch (old_state) {
199 case NVME_CTRL_NEW:
200 case NVME_CTRL_LIVE:
Christoph Hellwigdef61ec2016-07-06 21:55:49 +0900201 changed = true;
202 /* FALLTHRU */
203 default:
204 break;
205 }
206 break;
207 case NVME_CTRL_RECONNECTING:
208 switch (old_state) {
209 case NVME_CTRL_LIVE:
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200210 changed = true;
211 /* FALLTHRU */
212 default:
213 break;
214 }
215 break;
216 case NVME_CTRL_DELETING:
217 switch (old_state) {
218 case NVME_CTRL_LIVE:
219 case NVME_CTRL_RESETTING:
Christoph Hellwigdef61ec2016-07-06 21:55:49 +0900220 case NVME_CTRL_RECONNECTING:
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200221 changed = true;
222 /* FALLTHRU */
223 default:
224 break;
225 }
226 break;
Keith Busch0ff9d4e2016-05-12 08:37:14 -0600227 case NVME_CTRL_DEAD:
228 switch (old_state) {
229 case NVME_CTRL_DELETING:
230 changed = true;
231 /* FALLTHRU */
232 default:
233 break;
234 }
235 break;
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200236 default:
237 break;
238 }
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200239
240 if (changed)
241 ctrl->state = new_state;
242
Christoph Hellwig0a72bbb2017-08-22 11:42:24 +0200243 spin_unlock_irqrestore(&ctrl->lock, flags);
Gabriel Krisman Bertazif6b6a282016-07-29 16:15:18 -0300244
Christoph Hellwigbb8d2612016-04-26 13:51:57 +0200245 return changed;
246}
247EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
248
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100249static void nvme_free_ns(struct kref *kref)
250{
251 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
252
Matias Bjørlingb0b4e092016-09-16 14:25:07 +0200253 if (ns->ndev)
254 nvme_nvm_unregister(ns);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100255
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100256 put_disk(ns->disk);
Keith Busch075790e2016-02-24 09:15:53 -0700257 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
258 nvme_put_ctrl(ns->ctrl);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100259 kfree(ns);
260}
261
Christoph Hellwig5bae7f72015-11-28 15:39:07 +0100262static void nvme_put_ns(struct nvme_ns *ns)
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100263{
264 kref_put(&ns->kref, nvme_free_ns);
265}
266
Christoph Hellwig41609822015-11-20 09:00:02 +0100267struct request *nvme_alloc_request(struct request_queue *q,
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200268 struct nvme_command *cmd, unsigned int flags, int qid)
Christoph Hellwig21d34712015-11-26 09:08:36 +0100269{
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100270 unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100271 struct request *req;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100272
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200273 if (qid == NVME_QID_ANY) {
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100274 req = blk_mq_alloc_request(q, op, flags);
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200275 } else {
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100276 req = blk_mq_alloc_request_hctx(q, op, flags,
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200277 qid ? qid - 1 : 0);
278 }
Christoph Hellwig21d34712015-11-26 09:08:36 +0100279 if (IS_ERR(req))
Christoph Hellwig41609822015-11-20 09:00:02 +0100280 return req;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100281
Christoph Hellwig21d34712015-11-26 09:08:36 +0100282 req->cmd_flags |= REQ_FAILFAST_DRIVER;
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800283 nvme_req(req)->cmd = cmd;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100284
Christoph Hellwig41609822015-11-20 09:00:02 +0100285 return req;
286}
Ming Lin576d55d2016-02-10 10:03:32 -0800287EXPORT_SYMBOL_GPL(nvme_alloc_request);
Christoph Hellwig41609822015-11-20 09:00:02 +0100288
Jens Axboef5d11842017-06-27 12:03:06 -0600289static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable)
290{
291 struct nvme_command c;
292
293 memset(&c, 0, sizeof(c));
294
295 c.directive.opcode = nvme_admin_directive_send;
Arnav Dawn62346ea2017-07-12 16:11:53 +0530296 c.directive.nsid = cpu_to_le32(NVME_NSID_ALL);
Jens Axboef5d11842017-06-27 12:03:06 -0600297 c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE;
298 c.directive.dtype = NVME_DIR_IDENTIFY;
299 c.directive.tdtype = NVME_DIR_STREAMS;
300 c.directive.endir = enable ? NVME_DIR_ENDIR : 0;
301
302 return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0);
303}
304
305static int nvme_disable_streams(struct nvme_ctrl *ctrl)
306{
307 return nvme_toggle_streams(ctrl, false);
308}
309
310static int nvme_enable_streams(struct nvme_ctrl *ctrl)
311{
312 return nvme_toggle_streams(ctrl, true);
313}
314
315static int nvme_get_stream_params(struct nvme_ctrl *ctrl,
316 struct streams_directive_params *s, u32 nsid)
317{
318 struct nvme_command c;
319
320 memset(&c, 0, sizeof(c));
321 memset(s, 0, sizeof(*s));
322
323 c.directive.opcode = nvme_admin_directive_recv;
324 c.directive.nsid = cpu_to_le32(nsid);
Kwan (Hingkwan) Huen-SSIa082b422017-08-09 11:26:29 -0700325 c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1);
Jens Axboef5d11842017-06-27 12:03:06 -0600326 c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM;
327 c.directive.dtype = NVME_DIR_STREAMS;
328
329 return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s));
330}
331
332static int nvme_configure_directives(struct nvme_ctrl *ctrl)
333{
334 struct streams_directive_params s;
335 int ret;
336
337 if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES))
338 return 0;
339 if (!streams)
340 return 0;
341
342 ret = nvme_enable_streams(ctrl);
343 if (ret)
344 return ret;
345
Arnav Dawn62346ea2017-07-12 16:11:53 +0530346 ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL);
Jens Axboef5d11842017-06-27 12:03:06 -0600347 if (ret)
348 return ret;
349
350 ctrl->nssa = le16_to_cpu(s.nssa);
351 if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) {
352 dev_info(ctrl->device, "too few streams (%u) available\n",
353 ctrl->nssa);
354 nvme_disable_streams(ctrl);
355 return 0;
356 }
357
358 ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1);
359 dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams);
360 return 0;
361}
362
363/*
364 * Check if 'req' has a write hint associated with it. If it does, assign
365 * a valid namespace stream to the write.
366 */
367static void nvme_assign_write_stream(struct nvme_ctrl *ctrl,
368 struct request *req, u16 *control,
369 u32 *dsmgmt)
370{
371 enum rw_hint streamid = req->write_hint;
372
373 if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE)
374 streamid = 0;
375 else {
376 streamid--;
377 if (WARN_ON_ONCE(streamid > ctrl->nr_streams))
378 return;
379
380 *control |= NVME_RW_DTYPE_STREAMS;
381 *dsmgmt |= streamid << 16;
382 }
383
384 if (streamid < ARRAY_SIZE(req->q->write_hints))
385 req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9;
386}
387
Ming Lin8093f7c2016-04-12 13:10:14 -0600388static inline void nvme_setup_flush(struct nvme_ns *ns,
389 struct nvme_command *cmnd)
390{
391 memset(cmnd, 0, sizeof(*cmnd));
392 cmnd->common.opcode = nvme_cmd_flush;
393 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
394}
395
Christoph Hellwigfc17b652017-06-03 09:38:05 +0200396static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
Ming Lin8093f7c2016-04-12 13:10:14 -0600397 struct nvme_command *cmnd)
398{
Christoph Hellwigb35ba012017-02-08 14:46:50 +0100399 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
Ming Lin8093f7c2016-04-12 13:10:14 -0600400 struct nvme_dsm_range *range;
Christoph Hellwigb35ba012017-02-08 14:46:50 +0100401 struct bio *bio;
Ming Lin8093f7c2016-04-12 13:10:14 -0600402
Christoph Hellwigb35ba012017-02-08 14:46:50 +0100403 range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC);
Ming Lin8093f7c2016-04-12 13:10:14 -0600404 if (!range)
Christoph Hellwigfc17b652017-06-03 09:38:05 +0200405 return BLK_STS_RESOURCE;
Ming Lin8093f7c2016-04-12 13:10:14 -0600406
Christoph Hellwigb35ba012017-02-08 14:46:50 +0100407 __rq_for_each_bio(bio, req) {
408 u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
409 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
410
411 range[n].cattr = cpu_to_le32(0);
412 range[n].nlb = cpu_to_le32(nlb);
413 range[n].slba = cpu_to_le64(slba);
414 n++;
415 }
416
417 if (WARN_ON_ONCE(n != segments)) {
418 kfree(range);
Christoph Hellwigfc17b652017-06-03 09:38:05 +0200419 return BLK_STS_IOERR;
Christoph Hellwigb35ba012017-02-08 14:46:50 +0100420 }
Ming Lin8093f7c2016-04-12 13:10:14 -0600421
422 memset(cmnd, 0, sizeof(*cmnd));
423 cmnd->dsm.opcode = nvme_cmd_dsm;
424 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
Christoph Hellwigf1dd03a2017-03-31 17:00:05 +0200425 cmnd->dsm.nr = cpu_to_le32(segments - 1);
Ming Lin8093f7c2016-04-12 13:10:14 -0600426 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
427
Christoph Hellwigf9d03f92016-12-08 15:20:32 -0700428 req->special_vec.bv_page = virt_to_page(range);
429 req->special_vec.bv_offset = offset_in_page(range);
Christoph Hellwigb35ba012017-02-08 14:46:50 +0100430 req->special_vec.bv_len = sizeof(*range) * segments;
Christoph Hellwigf9d03f92016-12-08 15:20:32 -0700431 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
Ming Lin8093f7c2016-04-12 13:10:14 -0600432
Christoph Hellwigfc17b652017-06-03 09:38:05 +0200433 return BLK_STS_OK;
Ming Lin8093f7c2016-04-12 13:10:14 -0600434}
Ming Lin8093f7c2016-04-12 13:10:14 -0600435
Christoph Hellwigebe6d872017-06-12 18:36:32 +0200436static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
437 struct request *req, struct nvme_command *cmnd)
Ming Lin8093f7c2016-04-12 13:10:14 -0600438{
Jens Axboef5d11842017-06-27 12:03:06 -0600439 struct nvme_ctrl *ctrl = ns->ctrl;
Ming Lin8093f7c2016-04-12 13:10:14 -0600440 u16 control = 0;
441 u32 dsmgmt = 0;
442
Christoph Hellwigebe6d872017-06-12 18:36:32 +0200443 /*
444 * If formated with metadata, require the block layer provide a buffer
445 * unless this namespace is formated such that the metadata can be
446 * stripped/generated by the controller with PRACT=1.
447 */
Sagi Grimberg8fa61122017-06-15 16:31:29 +0300448 if (ns && ns->ms &&
449 (!ns->pi_type || ns->ms != sizeof(struct t10_pi_tuple)) &&
Christoph Hellwigebe6d872017-06-12 18:36:32 +0200450 !blk_integrity_rq(req) && !blk_rq_is_passthrough(req))
451 return BLK_STS_NOTSUPP;
452
Ming Lin8093f7c2016-04-12 13:10:14 -0600453 if (req->cmd_flags & REQ_FUA)
454 control |= NVME_RW_FUA;
455 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
456 control |= NVME_RW_LR;
457
458 if (req->cmd_flags & REQ_RAHEAD)
459 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
460
461 memset(cmnd, 0, sizeof(*cmnd));
462 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
Ming Lin8093f7c2016-04-12 13:10:14 -0600463 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
464 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
465 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
466
Jens Axboef5d11842017-06-27 12:03:06 -0600467 if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams)
468 nvme_assign_write_stream(ctrl, req, &control, &dsmgmt);
469
Ming Lin8093f7c2016-04-12 13:10:14 -0600470 if (ns->ms) {
471 switch (ns->pi_type) {
472 case NVME_NS_DPS_PI_TYPE3:
473 control |= NVME_RW_PRINFO_PRCHK_GUARD;
474 break;
475 case NVME_NS_DPS_PI_TYPE1:
476 case NVME_NS_DPS_PI_TYPE2:
477 control |= NVME_RW_PRINFO_PRCHK_GUARD |
478 NVME_RW_PRINFO_PRCHK_REF;
479 cmnd->rw.reftag = cpu_to_le32(
480 nvme_block_nr(ns, blk_rq_pos(req)));
481 break;
482 }
483 if (!blk_integrity_rq(req))
484 control |= NVME_RW_PRINFO_PRACT;
485 }
486
487 cmnd->rw.control = cpu_to_le16(control);
488 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
Christoph Hellwigebe6d872017-06-12 18:36:32 +0200489 return 0;
Ming Lin8093f7c2016-04-12 13:10:14 -0600490}
491
Christoph Hellwigfc17b652017-06-03 09:38:05 +0200492blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
Ming Lin8093f7c2016-04-12 13:10:14 -0600493 struct nvme_command *cmd)
494{
Christoph Hellwigfc17b652017-06-03 09:38:05 +0200495 blk_status_t ret = BLK_STS_OK;
Ming Lin8093f7c2016-04-12 13:10:14 -0600496
Christoph Hellwig987f6992017-04-05 19:18:08 +0200497 if (!(req->rq_flags & RQF_DONTPREP)) {
Christoph Hellwig44e44b22017-04-05 19:18:11 +0200498 nvme_req(req)->retries = 0;
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200499 nvme_req(req)->flags = 0;
Christoph Hellwig987f6992017-04-05 19:18:08 +0200500 req->rq_flags |= RQF_DONTPREP;
501 }
502
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100503 switch (req_op(req)) {
504 case REQ_OP_DRV_IN:
505 case REQ_OP_DRV_OUT:
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800506 memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100507 break;
508 case REQ_OP_FLUSH:
Ming Lin8093f7c2016-04-12 13:10:14 -0600509 nvme_setup_flush(ns, cmd);
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100510 break;
Christoph Hellwige850fd12017-04-05 19:21:13 +0200511 case REQ_OP_WRITE_ZEROES:
512 /* currently only aliased to deallocate for a few ctrls: */
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100513 case REQ_OP_DISCARD:
Ming Lin8093f7c2016-04-12 13:10:14 -0600514 ret = nvme_setup_discard(ns, req, cmd);
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100515 break;
516 case REQ_OP_READ:
517 case REQ_OP_WRITE:
Christoph Hellwigebe6d872017-06-12 18:36:32 +0200518 ret = nvme_setup_rw(ns, req, cmd);
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100519 break;
520 default:
521 WARN_ON_ONCE(1);
Christoph Hellwigfc17b652017-06-03 09:38:05 +0200522 return BLK_STS_IOERR;
Christoph Hellwigaebf5262017-01-31 16:57:31 +0100523 }
Ming Lin8093f7c2016-04-12 13:10:14 -0600524
James Smart721b3912016-10-21 23:33:34 +0300525 cmd->common.command_id = req->tag;
Ming Lin8093f7c2016-04-12 13:10:14 -0600526 return ret;
527}
528EXPORT_SYMBOL_GPL(nvme_setup_cmd);
529
Christoph Hellwig41609822015-11-20 09:00:02 +0100530/*
531 * Returns 0 on success. If the result is negative, it's a Linux error code;
532 * if the result is positive, it's an NVM Express status code
533 */
534int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800535 union nvme_result *result, void *buffer, unsigned bufflen,
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200536 unsigned timeout, int qid, int at_head, int flags)
Christoph Hellwig41609822015-11-20 09:00:02 +0100537{
538 struct request *req;
539 int ret;
540
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200541 req = nvme_alloc_request(q, cmd, flags, qid);
Christoph Hellwig41609822015-11-20 09:00:02 +0100542 if (IS_ERR(req))
543 return PTR_ERR(req);
544
545 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
546
Christoph Hellwig21d34712015-11-26 09:08:36 +0100547 if (buffer && bufflen) {
548 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
549 if (ret)
550 goto out;
Christoph Hellwig41609822015-11-20 09:00:02 +0100551 }
552
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200553 blk_execute_rq(req->q, NULL, req, at_head);
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800554 if (result)
555 *result = nvme_req(req)->result;
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200556 if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
557 ret = -EINTR;
558 else
559 ret = nvme_req(req)->status;
Christoph Hellwig41609822015-11-20 09:00:02 +0100560 out:
561 blk_mq_free_request(req);
562 return ret;
563}
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200564EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
Christoph Hellwig41609822015-11-20 09:00:02 +0100565
566int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
567 void *buffer, unsigned bufflen)
568{
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200569 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
570 NVME_QID_ANY, 0, 0);
Christoph Hellwig41609822015-11-20 09:00:02 +0100571}
Ming Lin576d55d2016-02-10 10:03:32 -0800572EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
Christoph Hellwig41609822015-11-20 09:00:02 +0100573
Christoph Hellwig1cad6562017-08-29 17:46:01 -0400574static void *nvme_add_user_metadata(struct bio *bio, void __user *ubuf,
575 unsigned len, u32 seed, bool write)
576{
577 struct bio_integrity_payload *bip;
578 int ret = -ENOMEM;
579 void *buf;
580
581 buf = kmalloc(len, GFP_KERNEL);
582 if (!buf)
583 goto out;
584
585 ret = -EFAULT;
586 if (write && copy_from_user(buf, ubuf, len))
587 goto out_free_meta;
588
589 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
590 if (IS_ERR(bip)) {
591 ret = PTR_ERR(bip);
592 goto out_free_meta;
593 }
594
595 bip->bip_iter.bi_size = len;
596 bip->bip_iter.bi_sector = seed;
597 ret = bio_integrity_add_page(bio, virt_to_page(buf), len,
598 offset_in_page(buf));
599 if (ret == len)
600 return buf;
601 ret = -ENOMEM;
602out_free_meta:
603 kfree(buf);
604out:
605 return ERR_PTR(ret);
606}
607
Keith Busch63263d62017-08-29 17:46:04 -0400608static int nvme_submit_user_cmd(struct request_queue *q,
Keith Busch485783c2017-08-29 17:46:03 -0400609 struct nvme_command *cmd, void __user *ubuffer,
610 unsigned bufflen, void __user *meta_buffer, unsigned meta_len,
611 u32 meta_seed, u32 *result, unsigned timeout)
Christoph Hellwig41609822015-11-20 09:00:02 +0100612{
Christoph Hellwig7a5abb42016-06-06 23:20:49 +0200613 bool write = nvme_is_write(cmd);
Keith Busch0b7f1f22015-10-23 09:47:28 -0600614 struct nvme_ns *ns = q->queuedata;
615 struct gendisk *disk = ns ? ns->disk : NULL;
Christoph Hellwig41609822015-11-20 09:00:02 +0100616 struct request *req;
Keith Busch0b7f1f22015-10-23 09:47:28 -0600617 struct bio *bio = NULL;
618 void *meta = NULL;
Christoph Hellwig41609822015-11-20 09:00:02 +0100619 int ret;
620
Christoph Hellwigeb71f432016-06-13 16:45:23 +0200621 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
Christoph Hellwig41609822015-11-20 09:00:02 +0100622 if (IS_ERR(req))
623 return PTR_ERR(req);
624
625 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
626
627 if (ubuffer && bufflen) {
Christoph Hellwig21d34712015-11-26 09:08:36 +0100628 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
629 GFP_KERNEL);
630 if (ret)
631 goto out;
632 bio = req->bio;
Christoph Hellwig74d46992017-08-23 19:10:32 +0200633 bio->bi_disk = disk;
Christoph Hellwig1cad6562017-08-29 17:46:01 -0400634 if (disk && meta_buffer && meta_len) {
635 meta = nvme_add_user_metadata(bio, meta_buffer, meta_len,
636 meta_seed, write);
637 if (IS_ERR(meta)) {
638 ret = PTR_ERR(meta);
Keith Busch0b7f1f22015-10-23 09:47:28 -0600639 goto out_unmap;
640 }
Keith Busch0b7f1f22015-10-23 09:47:28 -0600641 }
642 }
Christoph Hellwig1cad6562017-08-29 17:46:01 -0400643
Keith Busch0b7f1f22015-10-23 09:47:28 -0600644 blk_execute_rq(req->q, disk, req, 0);
Christoph Hellwig27fa9bc2017-04-20 16:02:57 +0200645 if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
646 ret = -EINTR;
647 else
648 ret = nvme_req(req)->status;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100649 if (result)
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800650 *result = le32_to_cpu(nvme_req(req)->result.u32);
Keith Busch0b7f1f22015-10-23 09:47:28 -0600651 if (meta && !ret && !write) {
652 if (copy_to_user(meta_buffer, meta, meta_len))
653 ret = -EFAULT;
654 }
Keith Busch0b7f1f22015-10-23 09:47:28 -0600655 kfree(meta);
656 out_unmap:
Christoph Hellwig74d46992017-08-23 19:10:32 +0200657 if (bio)
Keith Busch0b7f1f22015-10-23 09:47:28 -0600658 blk_rq_unmap_user(bio);
Christoph Hellwig21d34712015-11-26 09:08:36 +0100659 out:
660 blk_mq_free_request(req);
661 return ret;
662}
663
Christoph Hellwig2a842ac2017-06-03 09:38:04 +0200664static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status)
Sagi Grimberg038bd4c2016-06-13 16:45:28 +0200665{
666 struct nvme_ctrl *ctrl = rq->end_io_data;
667
668 blk_mq_free_request(rq);
669
Christoph Hellwig2a842ac2017-06-03 09:38:04 +0200670 if (status) {
Sagi Grimberg038bd4c2016-06-13 16:45:28 +0200671 dev_err(ctrl->device,
Christoph Hellwig2a842ac2017-06-03 09:38:04 +0200672 "failed nvme_keep_alive_end_io error=%d\n",
673 status);
Sagi Grimberg038bd4c2016-06-13 16:45:28 +0200674 return;
675 }
676
677 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
678}
679
680static int nvme_keep_alive(struct nvme_ctrl *ctrl)
681{
682 struct nvme_command c;
683 struct request *rq;
684
685 memset(&c, 0, sizeof(c));
686 c.common.opcode = nvme_admin_keep_alive;
687
688 rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
689 NVME_QID_ANY);
690 if (IS_ERR(rq))
691 return PTR_ERR(rq);
692
693 rq->timeout = ctrl->kato * HZ;
694 rq->end_io_data = ctrl;
695
696 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
697
698 return 0;
699}
700
701static void nvme_keep_alive_work(struct work_struct *work)
702{
703 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
704 struct nvme_ctrl, ka_work);
705
706 if (nvme_keep_alive(ctrl)) {
707 /* allocation failure, reset the controller */
708 dev_err(ctrl->device, "keep-alive failed\n");
Christoph Hellwig39bdc592017-06-12 18:21:19 +0200709 nvme_reset_ctrl(ctrl);
Sagi Grimberg038bd4c2016-06-13 16:45:28 +0200710 return;
711 }
712}
713
714void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
715{
716 if (unlikely(ctrl->kato == 0))
717 return;
718
719 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
720 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
721}
722EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
723
724void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
725{
726 if (unlikely(ctrl->kato == 0))
727 return;
728
729 cancel_delayed_work_sync(&ctrl->ka_work);
730}
731EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
732
Keith Busch3f7f25a92017-06-20 15:09:56 -0400733static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
Christoph Hellwig21d34712015-11-26 09:08:36 +0100734{
735 struct nvme_command c = { };
736 int error;
737
738 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
739 c.identify.opcode = nvme_admin_identify;
Parav Pandit986994a2017-01-26 17:17:28 +0200740 c.identify.cns = NVME_ID_CNS_CTRL;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100741
742 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
743 if (!*id)
744 return -ENOMEM;
745
746 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
747 sizeof(struct nvme_id_ctrl));
748 if (error)
749 kfree(*id);
750 return error;
751}
752
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200753static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid,
754 u8 *eui64, u8 *nguid, uuid_t *uuid)
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +0200755{
756 struct nvme_command c = { };
757 int status;
758 void *data;
759 int pos;
760 int len;
761
762 c.identify.opcode = nvme_admin_identify;
763 c.identify.nsid = cpu_to_le32(nsid);
764 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
765
766 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
767 if (!data)
768 return -ENOMEM;
769
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200770 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +0200771 NVME_IDENTIFY_DATA_SIZE);
772 if (status)
773 goto free_data;
774
775 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
776 struct nvme_ns_id_desc *cur = data + pos;
777
778 if (cur->nidl == 0)
779 break;
780
781 switch (cur->nidt) {
782 case NVME_NIDT_EUI64:
783 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200784 dev_warn(ctrl->device,
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +0200785 "ctrl returned bogus length: %d for NVME_NIDT_EUI64\n",
786 cur->nidl);
787 goto free_data;
788 }
789 len = NVME_NIDT_EUI64_LEN;
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200790 memcpy(eui64, data + pos + sizeof(*cur), len);
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +0200791 break;
792 case NVME_NIDT_NGUID:
793 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200794 dev_warn(ctrl->device,
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +0200795 "ctrl returned bogus length: %d for NVME_NIDT_NGUID\n",
796 cur->nidl);
797 goto free_data;
798 }
799 len = NVME_NIDT_NGUID_LEN;
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200800 memcpy(nguid, data + pos + sizeof(*cur), len);
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +0200801 break;
802 case NVME_NIDT_UUID:
803 if (cur->nidl != NVME_NIDT_UUID_LEN) {
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200804 dev_warn(ctrl->device,
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +0200805 "ctrl returned bogus length: %d for NVME_NIDT_UUID\n",
806 cur->nidl);
807 goto free_data;
808 }
809 len = NVME_NIDT_UUID_LEN;
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200810 uuid_copy(uuid, data + pos + sizeof(*cur));
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +0200811 break;
812 default:
813 /* Skip unnkown types */
814 len = cur->nidl;
815 break;
816 }
817
818 len += sizeof(*cur);
819 }
820free_data:
821 kfree(data);
822 return status;
823}
824
Keith Busch540c8012015-10-22 15:45:06 -0600825static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
826{
827 struct nvme_command c = { };
828
829 c.identify.opcode = nvme_admin_identify;
Parav Pandit986994a2017-01-26 17:17:28 +0200830 c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
Keith Busch540c8012015-10-22 15:45:06 -0600831 c.identify.nsid = cpu_to_le32(nsid);
832 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
833}
834
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200835static struct nvme_id_ns *nvme_identify_ns(struct nvme_ctrl *ctrl,
836 unsigned nsid)
Christoph Hellwig21d34712015-11-26 09:08:36 +0100837{
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200838 struct nvme_id_ns *id;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100839 struct nvme_command c = { };
840 int error;
841
842 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
Max Gurtovoy778f0672017-01-26 17:17:27 +0200843 c.identify.opcode = nvme_admin_identify;
844 c.identify.nsid = cpu_to_le32(nsid);
Parav Pandit986994a2017-01-26 17:17:28 +0200845 c.identify.cns = NVME_ID_CNS_NS;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100846
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200847 id = kmalloc(sizeof(*id), GFP_KERNEL);
848 if (!id)
849 return NULL;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100850
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +0200851 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
852 if (error) {
853 dev_warn(ctrl->device, "Identify namespace failed\n");
854 kfree(id);
855 return NULL;
856 }
857
858 return id;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100859}
860
Keith Busch3f7f25a92017-06-20 15:09:56 -0400861static int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
Andy Lutomirski1a6fe742016-09-16 11:16:10 -0700862 void *buffer, size_t buflen, u32 *result)
Christoph Hellwig21d34712015-11-26 09:08:36 +0100863{
864 struct nvme_command c;
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800865 union nvme_result res;
Christoph Hellwig1cb3cce2016-02-29 15:59:47 +0100866 int ret;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100867
868 memset(&c, 0, sizeof(c));
869 c.features.opcode = nvme_admin_set_features;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100870 c.features.fid = cpu_to_le32(fid);
871 c.features.dword11 = cpu_to_le32(dword11);
872
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800873 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
Andy Lutomirski1a6fe742016-09-16 11:16:10 -0700874 buffer, buflen, 0, NVME_QID_ANY, 0, 0);
Andy Lutomirski9b47f77a2016-08-24 03:52:12 -0700875 if (ret >= 0 && result)
Christoph Hellwigd49187e2016-11-10 07:32:33 -0800876 *result = le32_to_cpu(res.u32);
Christoph Hellwig1cb3cce2016-02-29 15:59:47 +0100877 return ret;
Christoph Hellwig21d34712015-11-26 09:08:36 +0100878}
879
Christoph Hellwig9a0be7a2015-11-26 11:09:06 +0100880int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
881{
882 u32 q_count = (*count - 1) | ((*count - 1) << 16);
883 u32 result;
884 int status, nr_io_queues;
885
Andy Lutomirski1a6fe742016-09-16 11:16:10 -0700886 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
Christoph Hellwig9a0be7a2015-11-26 11:09:06 +0100887 &result);
Christoph Hellwigf5fa90d2016-06-06 23:20:50 +0200888 if (status < 0)
Christoph Hellwig9a0be7a2015-11-26 11:09:06 +0100889 return status;
890
Christoph Hellwigf5fa90d2016-06-06 23:20:50 +0200891 /*
892 * Degraded controllers might return an error when setting the queue
893 * count. We still want to be able to bring them online and offer
894 * access to the admin queue, as that might be only way to fix them up.
895 */
896 if (status > 0) {
Johannes Thumshirnf0425db2017-06-09 16:17:21 +0200897 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
Christoph Hellwigf5fa90d2016-06-06 23:20:50 +0200898 *count = 0;
899 } else {
900 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
901 *count = min(*count, nr_io_queues);
902 }
903
Christoph Hellwig9a0be7a2015-11-26 11:09:06 +0100904 return 0;
905}
Ming Lin576d55d2016-02-10 10:03:32 -0800906EXPORT_SYMBOL_GPL(nvme_set_queue_count);
Christoph Hellwig9a0be7a2015-11-26 11:09:06 +0100907
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100908static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
909{
910 struct nvme_user_io io;
911 struct nvme_command c;
912 unsigned length, meta_len;
913 void __user *metadata;
914
915 if (copy_from_user(&io, uio, sizeof(io)))
916 return -EFAULT;
Keith Busch63088ec2016-02-24 09:15:57 -0700917 if (io.flags)
918 return -EINVAL;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100919
920 switch (io.opcode) {
921 case nvme_cmd_write:
922 case nvme_cmd_read:
923 case nvme_cmd_compare:
924 break;
925 default:
926 return -EINVAL;
927 }
928
929 length = (io.nblocks + 1) << ns->lba_shift;
930 meta_len = (io.nblocks + 1) * ns->ms;
931 metadata = (void __user *)(uintptr_t)io.metadata;
932
933 if (ns->ext) {
934 length += meta_len;
935 meta_len = 0;
936 } else if (meta_len) {
937 if ((io.metadata & 3) || !io.metadata)
938 return -EINVAL;
939 }
940
941 memset(&c, 0, sizeof(c));
942 c.rw.opcode = io.opcode;
943 c.rw.flags = io.flags;
944 c.rw.nsid = cpu_to_le32(ns->ns_id);
945 c.rw.slba = cpu_to_le64(io.slba);
946 c.rw.length = cpu_to_le16(io.nblocks);
947 c.rw.control = cpu_to_le16(io.control);
948 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
949 c.rw.reftag = cpu_to_le32(io.reftag);
950 c.rw.apptag = cpu_to_le16(io.apptag);
951 c.rw.appmask = cpu_to_le16(io.appmask);
952
Keith Busch63263d62017-08-29 17:46:04 -0400953 return nvme_submit_user_cmd(ns->queue, &c,
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100954 (void __user *)(uintptr_t)io.addr, length,
955 metadata, meta_len, io.slba, NULL, 0);
956}
957
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +0100958static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100959 struct nvme_passthru_cmd __user *ucmd)
960{
961 struct nvme_passthru_cmd cmd;
962 struct nvme_command c;
963 unsigned timeout = 0;
964 int status;
965
966 if (!capable(CAP_SYS_ADMIN))
967 return -EACCES;
968 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
969 return -EFAULT;
Keith Busch63088ec2016-02-24 09:15:57 -0700970 if (cmd.flags)
971 return -EINVAL;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100972
973 memset(&c, 0, sizeof(c));
974 c.common.opcode = cmd.opcode;
975 c.common.flags = cmd.flags;
976 c.common.nsid = cpu_to_le32(cmd.nsid);
977 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
978 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
979 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
980 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
981 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
982 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
983 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
984 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
985
986 if (cmd.timeout_ms)
987 timeout = msecs_to_jiffies(cmd.timeout_ms);
988
989 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
Arnd Bergmannd1ea7be2015-12-08 16:22:17 +0100990 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
Keith Busch63263d62017-08-29 17:46:04 -0400991 (void __user *)(uintptr_t)cmd.metadata, cmd.metadata,
992 0, &cmd.result, timeout);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +0100993 if (status >= 0) {
994 if (put_user(cmd.result, &ucmd->result))
995 return -EFAULT;
996 }
997
998 return status;
999}
1000
1001static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
1002 unsigned int cmd, unsigned long arg)
1003{
1004 struct nvme_ns *ns = bdev->bd_disk->private_data;
1005
1006 switch (cmd) {
1007 case NVME_IOCTL_ID:
1008 force_successful_syscall_return();
1009 return ns->ns_id;
1010 case NVME_IOCTL_ADMIN_CMD:
1011 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
1012 case NVME_IOCTL_IO_CMD:
1013 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
1014 case NVME_IOCTL_SUBMIT_IO:
1015 return nvme_submit_io(ns, (void __user *)arg);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001016 default:
Matias Bjørling84d4add2017-01-31 13:17:16 +01001017#ifdef CONFIG_NVM
1018 if (ns->ndev)
1019 return nvme_nvm_ioctl(ns, cmd, arg);
1020#endif
Scott Bauera98e58e52017-02-03 12:50:32 -07001021 if (is_sed_ioctl(cmd))
Christoph Hellwig4f1244c2017-02-17 13:59:39 +01001022 return sed_ioctl(ns->ctrl->opal_dev, cmd,
Scott Bauere225c202017-02-14 17:29:36 -07001023 (void __user *) arg);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001024 return -ENOTTY;
1025 }
1026}
1027
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001028static int nvme_open(struct block_device *bdev, fmode_t mode)
1029{
Christoph Hellwigc6424a92017-10-18 13:22:00 +02001030 struct nvme_ns *ns = bdev->bd_disk->private_data;
1031
1032 if (!kref_get_unless_zero(&ns->kref))
1033 return -ENXIO;
1034 if (!try_module_get(ns->ctrl->ops->module)) {
1035 kref_put(&ns->kref, nvme_free_ns);
1036 return -ENXIO;
1037 }
1038
1039 return 0;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001040}
1041
1042static void nvme_release(struct gendisk *disk, fmode_t mode)
1043{
Sagi Grimberge439bb12016-02-10 10:03:29 -08001044 struct nvme_ns *ns = disk->private_data;
1045
1046 module_put(ns->ctrl->ops->module);
1047 nvme_put_ns(ns);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001048}
1049
1050static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1051{
1052 /* some standard values */
1053 geo->heads = 1 << 6;
1054 geo->sectors = 1 << 5;
1055 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1056 return 0;
1057}
1058
1059#ifdef CONFIG_BLK_DEV_INTEGRITY
Christoph Hellwigc81bfba2017-05-20 15:14:45 +02001060static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
1061 u16 bs)
1062{
1063 struct nvme_ns *ns = disk->private_data;
1064 u16 old_ms = ns->ms;
1065 u8 pi_type = 0;
1066
1067 ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms);
1068 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
1069
1070 /* PI implementation requires metadata equal t10 pi tuple size */
1071 if (ns->ms == sizeof(struct t10_pi_tuple))
1072 pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1073
1074 if (blk_get_integrity(disk) &&
1075 (ns->pi_type != pi_type || ns->ms != old_ms ||
1076 bs != queue_logical_block_size(disk->queue) ||
1077 (ns->ms && ns->ext)))
1078 blk_integrity_unregister(disk);
1079
1080 ns->pi_type = pi_type;
1081}
1082
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001083static void nvme_init_integrity(struct nvme_ns *ns)
1084{
1085 struct blk_integrity integrity;
1086
Jay Freyenseefa9a89f2016-07-20 21:26:16 -06001087 memset(&integrity, 0, sizeof(integrity));
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001088 switch (ns->pi_type) {
1089 case NVME_NS_DPS_PI_TYPE3:
1090 integrity.profile = &t10_pi_type3_crc;
Nicholas Bellingerba36c212016-04-09 03:04:42 +00001091 integrity.tag_size = sizeof(u16) + sizeof(u32);
1092 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001093 break;
1094 case NVME_NS_DPS_PI_TYPE1:
1095 case NVME_NS_DPS_PI_TYPE2:
1096 integrity.profile = &t10_pi_type1_crc;
Nicholas Bellingerba36c212016-04-09 03:04:42 +00001097 integrity.tag_size = sizeof(u16);
1098 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001099 break;
1100 default:
1101 integrity.profile = NULL;
1102 break;
1103 }
1104 integrity.tuple_size = ns->ms;
1105 blk_integrity_register(ns->disk, &integrity);
1106 blk_queue_max_integrity_segments(ns->queue, 1);
1107}
1108#else
Christoph Hellwigc81bfba2017-05-20 15:14:45 +02001109static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
1110 u16 bs)
1111{
1112}
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001113static void nvme_init_integrity(struct nvme_ns *ns)
1114{
1115}
1116#endif /* CONFIG_BLK_DEV_INTEGRITY */
1117
Scott Bauer6b8190d2017-06-15 10:44:30 -06001118static void nvme_set_chunk_size(struct nvme_ns *ns)
1119{
1120 u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9));
1121 blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size));
1122}
1123
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001124static void nvme_config_discard(struct nvme_ns *ns)
1125{
Keith Busch08095e72016-03-04 13:15:17 -07001126 struct nvme_ctrl *ctrl = ns->ctrl;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001127 u32 logical_block_size = queue_logical_block_size(ns->queue);
Keith Busch08095e72016-03-04 13:15:17 -07001128
Christoph Hellwigb35ba012017-02-08 14:46:50 +01001129 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1130 NVME_DSM_MAX_RANGES);
1131
Jens Axboef5d11842017-06-27 12:03:06 -06001132 if (ctrl->nr_streams && ns->sws && ns->sgs) {
1133 unsigned int sz = logical_block_size * ns->sws * ns->sgs;
1134
1135 ns->queue->limits.discard_alignment = sz;
1136 ns->queue->limits.discard_granularity = sz;
1137 } else {
1138 ns->queue->limits.discard_alignment = logical_block_size;
1139 ns->queue->limits.discard_granularity = logical_block_size;
1140 }
Minfei Huangbd0fc282016-05-17 15:58:41 +08001141 blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
Christoph Hellwigb35ba012017-02-08 14:46:50 +01001142 blk_queue_max_discard_segments(ns->queue, NVME_DSM_MAX_RANGES);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001143 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
Christoph Hellwige850fd12017-04-05 19:21:13 +02001144
1145 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
1146 blk_queue_max_write_zeroes_sectors(ns->queue, UINT_MAX);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001147}
1148
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02001149static void nvme_report_ns_ids(struct nvme_ctrl *ctrl, unsigned int nsid,
1150 struct nvme_id_ns *id, u8 *eui64, u8 *nguid, uuid_t *uuid)
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001151{
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02001152 if (ctrl->vs >= NVME_VS(1, 1, 0))
1153 memcpy(eui64, id->eui64, sizeof(id->eui64));
1154 if (ctrl->vs >= NVME_VS(1, 2, 0))
1155 memcpy(nguid, id->nguid, sizeof(id->nguid));
1156 if (ctrl->vs >= NVME_VS(1, 3, 0)) {
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +02001157 /* Don't treat error as fatal we potentially
1158 * already have a NGUID or EUI-64
1159 */
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02001160 if (nvme_identify_ns_descs(ctrl, nsid, eui64, nguid, uuid))
1161 dev_warn(ctrl->device,
Johannes Thumshirn3b22ba22017-06-07 11:45:34 +02001162 "%s: Identify Descriptors failed\n", __func__);
1163 }
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02001164}
1165
1166static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
1167{
1168 struct nvme_ns *ns = disk->private_data;
Jens Axboef5d11842017-06-27 12:03:06 -06001169 struct nvme_ctrl *ctrl = ns->ctrl;
Christoph Hellwigc81bfba2017-05-20 15:14:45 +02001170 u16 bs;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001171
1172 /*
1173 * If identify namespace failed, use default 512 byte block size so
1174 * block layer can use before failing read/write for 0 capacity.
1175 */
Christoph Hellwigc81bfba2017-05-20 15:14:45 +02001176 ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001177 if (ns->lba_shift == 0)
1178 ns->lba_shift = 9;
1179 bs = 1 << ns->lba_shift;
Scott Bauer6b8190d2017-06-15 10:44:30 -06001180 ns->noiob = le16_to_cpu(id->noiob);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001181
1182 blk_mq_freeze_queue(disk->queue);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001183
Jens Axboef5d11842017-06-27 12:03:06 -06001184 if (ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)
Christoph Hellwigc81bfba2017-05-20 15:14:45 +02001185 nvme_prep_integrity(disk, id, bs);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001186 blk_queue_logical_block_size(ns->queue, bs);
Scott Bauer6b8190d2017-06-15 10:44:30 -06001187 if (ns->noiob)
1188 nvme_set_chunk_size(ns);
Keith Busch4b9d5b12015-11-20 09:13:30 +01001189 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001190 nvme_init_integrity(ns);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001191 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
1192 set_capacity(disk, 0);
1193 else
1194 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1195
Jens Axboef5d11842017-06-27 12:03:06 -06001196 if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001197 nvme_config_discard(ns);
1198 blk_mq_unfreeze_queue(disk->queue);
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02001199}
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001200
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02001201static int nvme_revalidate_disk(struct gendisk *disk)
1202{
1203 struct nvme_ns *ns = disk->private_data;
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02001204 struct nvme_ctrl *ctrl = ns->ctrl;
1205 struct nvme_id_ns *id;
Christoph Hellwig1d5df6a2017-08-17 14:10:00 +02001206 u8 eui64[8] = { 0 }, nguid[16] = { 0 };
1207 uuid_t uuid = uuid_null;
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02001208 int ret = 0;
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02001209
1210 if (test_bit(NVME_NS_DEAD, &ns->flags)) {
1211 set_capacity(disk, 0);
1212 return -ENODEV;
1213 }
1214
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02001215 id = nvme_identify_ns(ctrl, ns->ns_id);
1216 if (!id)
1217 return -ENODEV;
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02001218
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02001219 if (id->ncap == 0) {
1220 ret = -ENODEV;
1221 goto out;
1222 }
1223
Christoph Hellwig1d5df6a2017-08-17 14:10:00 +02001224 nvme_report_ns_ids(ctrl, ns->ns_id, id, eui64, nguid, &uuid);
1225 if (!uuid_equal(&ns->uuid, &uuid) ||
1226 memcmp(&ns->nguid, &nguid, sizeof(ns->nguid)) ||
1227 memcmp(&ns->eui, &eui64, sizeof(ns->eui))) {
1228 dev_err(ctrl->device,
1229 "identifiers changed for nsid %d\n", ns->ns_id);
1230 ret = -ENODEV;
1231 }
1232
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02001233out:
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001234 kfree(id);
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02001235 return ret;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001236}
1237
1238static char nvme_pr_type(enum pr_type type)
1239{
1240 switch (type) {
1241 case PR_WRITE_EXCLUSIVE:
1242 return 1;
1243 case PR_EXCLUSIVE_ACCESS:
1244 return 2;
1245 case PR_WRITE_EXCLUSIVE_REG_ONLY:
1246 return 3;
1247 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
1248 return 4;
1249 case PR_WRITE_EXCLUSIVE_ALL_REGS:
1250 return 5;
1251 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
1252 return 6;
1253 default:
1254 return 0;
1255 }
1256};
1257
1258static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
1259 u64 key, u64 sa_key, u8 op)
1260{
1261 struct nvme_ns *ns = bdev->bd_disk->private_data;
1262 struct nvme_command c;
1263 u8 data[16] = { 0, };
1264
1265 put_unaligned_le64(key, &data[0]);
1266 put_unaligned_le64(sa_key, &data[8]);
1267
1268 memset(&c, 0, sizeof(c));
1269 c.common.opcode = op;
1270 c.common.nsid = cpu_to_le32(ns->ns_id);
1271 c.common.cdw10[0] = cpu_to_le32(cdw10);
1272
1273 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
1274}
1275
1276static int nvme_pr_register(struct block_device *bdev, u64 old,
1277 u64 new, unsigned flags)
1278{
1279 u32 cdw10;
1280
1281 if (flags & ~PR_FL_IGNORE_KEY)
1282 return -EOPNOTSUPP;
1283
1284 cdw10 = old ? 2 : 0;
1285 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
1286 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
1287 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
1288}
1289
1290static int nvme_pr_reserve(struct block_device *bdev, u64 key,
1291 enum pr_type type, unsigned flags)
1292{
1293 u32 cdw10;
1294
1295 if (flags & ~PR_FL_IGNORE_KEY)
1296 return -EOPNOTSUPP;
1297
1298 cdw10 = nvme_pr_type(type) << 8;
1299 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
1300 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
1301}
1302
1303static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
1304 enum pr_type type, bool abort)
1305{
1306 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
1307 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
1308}
1309
1310static int nvme_pr_clear(struct block_device *bdev, u64 key)
1311{
Dan Carpenter8c0b3912015-12-09 13:24:06 +03001312 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001313 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
1314}
1315
1316static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
1317{
1318 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
1319 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
1320}
1321
1322static const struct pr_ops nvme_pr_ops = {
1323 .pr_register = nvme_pr_register,
1324 .pr_reserve = nvme_pr_reserve,
1325 .pr_release = nvme_pr_release,
1326 .pr_preempt = nvme_pr_preempt,
1327 .pr_clear = nvme_pr_clear,
1328};
1329
Scott Bauera98e58e52017-02-03 12:50:32 -07001330#ifdef CONFIG_BLK_SED_OPAL
Christoph Hellwig4f1244c2017-02-17 13:59:39 +01001331int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
1332 bool send)
Scott Bauera98e58e52017-02-03 12:50:32 -07001333{
Christoph Hellwig4f1244c2017-02-17 13:59:39 +01001334 struct nvme_ctrl *ctrl = data;
Scott Bauera98e58e52017-02-03 12:50:32 -07001335 struct nvme_command cmd;
Scott Bauera98e58e52017-02-03 12:50:32 -07001336
1337 memset(&cmd, 0, sizeof(cmd));
1338 if (send)
1339 cmd.common.opcode = nvme_admin_security_send;
1340 else
1341 cmd.common.opcode = nvme_admin_security_recv;
Scott Bauera98e58e52017-02-03 12:50:32 -07001342 cmd.common.nsid = 0;
1343 cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
1344 cmd.common.cdw10[1] = cpu_to_le32(len);
1345
1346 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
1347 ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0);
1348}
1349EXPORT_SYMBOL_GPL(nvme_sec_submit);
1350#endif /* CONFIG_BLK_SED_OPAL */
1351
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01001352static const struct block_device_operations nvme_fops = {
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001353 .owner = THIS_MODULE,
1354 .ioctl = nvme_ioctl,
Christoph Hellwig761f2e12017-10-05 18:46:46 +02001355 .compat_ioctl = nvme_ioctl,
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001356 .open = nvme_open,
1357 .release = nvme_release,
1358 .getgeo = nvme_getgeo,
1359 .revalidate_disk= nvme_revalidate_disk,
1360 .pr_ops = &nvme_pr_ops,
1361};
1362
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001363static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
1364{
1365 unsigned long timeout =
1366 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1367 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
1368 int ret;
1369
1370 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
Keith Busch0df1e4f2016-10-11 13:31:58 -04001371 if (csts == ~0)
1372 return -ENODEV;
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001373 if ((csts & NVME_CSTS_RDY) == bit)
1374 break;
1375
1376 msleep(100);
1377 if (fatal_signal_pending(current))
1378 return -EINTR;
1379 if (time_after(jiffies, timeout)) {
Sagi Grimberg1b3c47c2016-02-10 08:51:15 -07001380 dev_err(ctrl->device,
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001381 "Device not ready; aborting %s\n", enabled ?
1382 "initialisation" : "reset");
1383 return -ENODEV;
1384 }
1385 }
1386
1387 return ret;
1388}
1389
1390/*
1391 * If the device has been passed off to us in an enabled state, just clear
1392 * the enabled bit. The spec says we should set the 'shutdown notification
1393 * bits', but doing so may cause the device to complete commands to the
1394 * admin queue ... and we don't know what memory that might be pointing at!
1395 */
1396int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1397{
1398 int ret;
1399
1400 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1401 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
1402
1403 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1404 if (ret)
1405 return ret;
Guilherme G. Piccoli54adc012016-06-14 18:22:41 -03001406
Guilherme G. Piccolib5a10c52016-12-28 22:13:15 -02001407 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
Guilherme G. Piccoli54adc012016-06-14 18:22:41 -03001408 msleep(NVME_QUIRK_DELAY_AMOUNT);
1409
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001410 return nvme_wait_ready(ctrl, cap, false);
1411}
Ming Lin576d55d2016-02-10 10:03:32 -08001412EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001413
1414int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1415{
1416 /*
1417 * Default to a 4K page size, with the intention to update this
1418 * path in the future to accomodate architectures with differing
1419 * kernel and IO page sizes.
1420 */
1421 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
1422 int ret;
1423
1424 if (page_shift < dev_page_min) {
Sagi Grimberg1b3c47c2016-02-10 08:51:15 -07001425 dev_err(ctrl->device,
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001426 "Minimum device page size %u too large for host (%u)\n",
1427 1 << dev_page_min, 1 << page_shift);
1428 return -ENODEV;
1429 }
1430
1431 ctrl->page_size = 1 << page_shift;
1432
1433 ctrl->ctrl_config = NVME_CC_CSS_NVM;
1434 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
Max Gurtovoy60b43f62017-08-13 19:21:07 +03001435 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001436 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1437 ctrl->ctrl_config |= NVME_CC_ENABLE;
1438
1439 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1440 if (ret)
1441 return ret;
1442 return nvme_wait_ready(ctrl, cap, true);
1443}
Ming Lin576d55d2016-02-10 10:03:32 -08001444EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001445
1446int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
1447{
Martin K. Petersen07fbd322017-08-25 19:14:50 -04001448 unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ);
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001449 u32 csts;
1450 int ret;
1451
1452 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1453 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
1454
1455 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1456 if (ret)
1457 return ret;
1458
1459 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1460 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
1461 break;
1462
1463 msleep(100);
1464 if (fatal_signal_pending(current))
1465 return -EINTR;
1466 if (time_after(jiffies, timeout)) {
Sagi Grimberg1b3c47c2016-02-10 08:51:15 -07001467 dev_err(ctrl->device,
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001468 "Device shutdown incomplete; abort shutdown\n");
1469 return -ENODEV;
1470 }
1471 }
1472
1473 return ret;
1474}
Ming Lin576d55d2016-02-10 10:03:32 -08001475EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
Christoph Hellwig5fd4ce12015-11-28 15:03:49 +01001476
Christoph Hellwigda358252016-03-02 18:07:11 +01001477static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1478 struct request_queue *q)
1479{
Jens Axboe7c88cb02016-04-12 15:43:09 -06001480 bool vwc = false;
1481
Christoph Hellwigda358252016-03-02 18:07:11 +01001482 if (ctrl->max_hw_sectors) {
Christoph Hellwig45686b62016-03-02 18:07:12 +01001483 u32 max_segments =
1484 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
1485
Christoph Hellwigda358252016-03-02 18:07:11 +01001486 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
Christoph Hellwig45686b62016-03-02 18:07:12 +01001487 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
Christoph Hellwigda358252016-03-02 18:07:11 +01001488 }
Keith Busche6282ae2016-12-19 11:37:50 -05001489 if (ctrl->quirks & NVME_QUIRK_STRIPE_SIZE)
1490 blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
Christoph Hellwigda358252016-03-02 18:07:11 +01001491 blk_queue_virt_boundary(q, ctrl->page_size - 1);
Jens Axboe7c88cb02016-04-12 15:43:09 -06001492 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1493 vwc = true;
1494 blk_queue_write_cache(q, vwc, vwc);
Christoph Hellwigda358252016-03-02 18:07:11 +01001495}
1496
Jon Derrickdbf86b32017-08-16 09:51:29 +02001497static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
1498{
1499 __le64 ts;
1500 int ret;
1501
1502 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
1503 return 0;
1504
1505 ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
1506 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
1507 NULL);
1508 if (ret)
1509 dev_warn_once(ctrl->device,
1510 "could not set timestamp (%d)\n", ret);
1511 return ret;
1512}
1513
Keith Busch634b8322017-08-10 11:23:31 +02001514static int nvme_configure_apst(struct nvme_ctrl *ctrl)
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001515{
1516 /*
1517 * APST (Autonomous Power State Transition) lets us program a
1518 * table of power state transitions that the controller will
1519 * perform automatically. We configure it with a simple
1520 * heuristic: we are willing to spend at most 2% of the time
1521 * transitioning between power states. Therefore, when running
1522 * in any given state, we will enter the next lower-power
Andy Lutomirski76e4ad02017-04-21 16:19:22 -07001523 * non-operational state after waiting 50 * (enlat + exlat)
Kai-Heng Fengda875912017-06-07 15:25:42 +08001524 * microseconds, as long as that state's exit latency is under
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001525 * the requested maximum latency.
1526 *
1527 * We will not autonomously enter any non-operational state for
1528 * which the total latency exceeds ps_max_latency_us. Users
1529 * can set ps_max_latency_us to zero to turn off APST.
1530 */
1531
1532 unsigned apste;
1533 struct nvme_feat_auto_pst *table;
Andy Lutomirskifb0dc392017-04-21 16:19:23 -07001534 u64 max_lat_us = 0;
1535 int max_ps = -1;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001536 int ret;
1537
1538 /*
1539 * If APST isn't supported or if we haven't been initialized yet,
1540 * then don't do anything.
1541 */
1542 if (!ctrl->apsta)
Keith Busch634b8322017-08-10 11:23:31 +02001543 return 0;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001544
1545 if (ctrl->npss > 31) {
1546 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
Keith Busch634b8322017-08-10 11:23:31 +02001547 return 0;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001548 }
1549
1550 table = kzalloc(sizeof(*table), GFP_KERNEL);
1551 if (!table)
Keith Busch634b8322017-08-10 11:23:31 +02001552 return 0;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001553
Kai-Heng Feng76a5af82017-06-26 16:39:54 -04001554 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001555 /* Turn off APST. */
1556 apste = 0;
Andy Lutomirskifb0dc392017-04-21 16:19:23 -07001557 dev_dbg(ctrl->device, "APST disabled\n");
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001558 } else {
1559 __le64 target = cpu_to_le64(0);
1560 int state;
1561
1562 /*
1563 * Walk through all states from lowest- to highest-power.
1564 * According to the spec, lower-numbered states use more
1565 * power. NPSS, despite the name, is the index of the
1566 * lowest-power state, not the number of states.
1567 */
1568 for (state = (int)ctrl->npss; state >= 0; state--) {
Kai-Heng Fengda875912017-06-07 15:25:42 +08001569 u64 total_latency_us, exit_latency_us, transition_ms;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001570
1571 if (target)
1572 table->entries[state] = target;
1573
1574 /*
Andy Lutomirskiff5350a2017-04-20 13:37:55 -07001575 * Don't allow transitions to the deepest state
1576 * if it's quirked off.
1577 */
1578 if (state == ctrl->npss &&
1579 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
1580 continue;
1581
1582 /*
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001583 * Is this state a useful non-operational state for
1584 * higher-power states to autonomously transition to?
1585 */
1586 if (!(ctrl->psd[state].flags &
1587 NVME_PS_FLAGS_NON_OP_STATE))
1588 continue;
1589
Kai-Heng Fengda875912017-06-07 15:25:42 +08001590 exit_latency_us =
1591 (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
1592 if (exit_latency_us > ctrl->ps_max_latency_us)
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001593 continue;
1594
Kai-Heng Fengda875912017-06-07 15:25:42 +08001595 total_latency_us =
1596 exit_latency_us +
1597 le32_to_cpu(ctrl->psd[state].entry_lat);
1598
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001599 /*
1600 * This state is good. Use it as the APST idle
1601 * target for higher power states.
1602 */
1603 transition_ms = total_latency_us + 19;
1604 do_div(transition_ms, 20);
1605 if (transition_ms > (1 << 24) - 1)
1606 transition_ms = (1 << 24) - 1;
1607
1608 target = cpu_to_le64((state << 3) |
1609 (transition_ms << 8));
Andy Lutomirskifb0dc392017-04-21 16:19:23 -07001610
1611 if (max_ps == -1)
1612 max_ps = state;
1613
1614 if (total_latency_us > max_lat_us)
1615 max_lat_us = total_latency_us;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001616 }
1617
1618 apste = 1;
Andy Lutomirskifb0dc392017-04-21 16:19:23 -07001619
1620 if (max_ps == -1) {
1621 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
1622 } else {
1623 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
1624 max_ps, max_lat_us, (int)sizeof(*table), table);
1625 }
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001626 }
1627
1628 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
1629 table, sizeof(*table), NULL);
1630 if (ret)
1631 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
1632
1633 kfree(table);
Keith Busch634b8322017-08-10 11:23:31 +02001634 return ret;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001635}
1636
1637static void nvme_set_latency_tolerance(struct device *dev, s32 val)
1638{
1639 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1640 u64 latency;
1641
1642 switch (val) {
1643 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
1644 case PM_QOS_LATENCY_ANY:
1645 latency = U64_MAX;
1646 break;
1647
1648 default:
1649 latency = val;
1650 }
1651
1652 if (ctrl->ps_max_latency_us != latency) {
1653 ctrl->ps_max_latency_us = latency;
1654 nvme_configure_apst(ctrl);
1655 }
1656}
1657
Andy Lutomirskibd4da3a2017-02-22 13:32:36 -07001658struct nvme_core_quirk_entry {
1659 /*
1660 * NVMe model and firmware strings are padded with spaces. For
1661 * simplicity, strings in the quirk table are padded with NULLs
1662 * instead.
1663 */
1664 u16 vid;
1665 const char *mn;
1666 const char *fr;
1667 unsigned long quirks;
1668};
1669
1670static const struct nvme_core_quirk_entry core_quirks[] = {
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001671 {
Andy Lutomirskibe569452017-04-20 13:37:56 -07001672 /*
1673 * This Toshiba device seems to die using any APST states. See:
1674 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
1675 */
1676 .vid = 0x1179,
1677 .mn = "THNSF5256GPUK TOSHIBA",
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001678 .quirks = NVME_QUIRK_NO_APST,
Andy Lutomirskibe569452017-04-20 13:37:56 -07001679 }
Andy Lutomirskibd4da3a2017-02-22 13:32:36 -07001680};
1681
1682/* match is null-terminated but idstr is space-padded. */
1683static bool string_matches(const char *idstr, const char *match, size_t len)
1684{
1685 size_t matchlen;
1686
1687 if (!match)
1688 return true;
1689
1690 matchlen = strlen(match);
1691 WARN_ON_ONCE(matchlen > len);
1692
1693 if (memcmp(idstr, match, matchlen))
1694 return false;
1695
1696 for (; matchlen < len; matchlen++)
1697 if (idstr[matchlen] != ' ')
1698 return false;
1699
1700 return true;
1701}
1702
1703static bool quirk_matches(const struct nvme_id_ctrl *id,
1704 const struct nvme_core_quirk_entry *q)
1705{
1706 return q->vid == le16_to_cpu(id->vid) &&
1707 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
1708 string_matches(id->fr, q->fr, sizeof(id->fr));
1709}
1710
Christoph Hellwig180de0072017-06-26 12:39:02 +02001711static void nvme_init_subnqn(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
1712{
1713 size_t nqnlen;
1714 int off;
1715
1716 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
1717 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
1718 strcpy(ctrl->subnqn, id->subnqn);
1719 return;
1720 }
1721
1722 if (ctrl->vs >= NVME_VS(1, 2, 1))
1723 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
1724
1725 /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */
1726 off = snprintf(ctrl->subnqn, NVMF_NQN_SIZE,
1727 "nqn.2014.08.org.nvmexpress:%4x%4x",
1728 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
1729 memcpy(ctrl->subnqn + off, id->sn, sizeof(id->sn));
1730 off += sizeof(id->sn);
1731 memcpy(ctrl->subnqn + off, id->mn, sizeof(id->mn));
1732 off += sizeof(id->mn);
1733 memset(ctrl->subnqn + off, 0, sizeof(ctrl->subnqn) - off);
1734}
1735
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001736/*
1737 * Initialize the cached copies of the Identify data and various controller
1738 * register in our nvme_ctrl structure. This should be called as soon as
1739 * the admin queue is fully up and running.
1740 */
1741int nvme_init_identify(struct nvme_ctrl *ctrl)
1742{
1743 struct nvme_id_ctrl *id;
1744 u64 cap;
1745 int ret, page_shift;
Christoph Hellwiga229dbf2016-06-06 23:20:48 +02001746 u32 max_hw_sectors;
Kai-Heng Feng76a5af82017-06-26 16:39:54 -04001747 bool prev_apst_enabled;
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001748
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001749 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
1750 if (ret) {
Sagi Grimberg1b3c47c2016-02-10 08:51:15 -07001751 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001752 return ret;
1753 }
1754
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001755 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
1756 if (ret) {
Sagi Grimberg1b3c47c2016-02-10 08:51:15 -07001757 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001758 return ret;
1759 }
1760 page_shift = NVME_CAP_MPSMIN(cap) + 12;
1761
Gabriel Krisman Bertazi8ef20742016-10-19 09:51:05 -06001762 if (ctrl->vs >= NVME_VS(1, 1, 0))
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001763 ctrl->subsystem = NVME_CAP_NSSRC(cap);
1764
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001765 ret = nvme_identify_ctrl(ctrl, &id);
1766 if (ret) {
Sagi Grimberg1b3c47c2016-02-10 08:51:15 -07001767 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001768 return -EIO;
1769 }
1770
Christoph Hellwig180de0072017-06-26 12:39:02 +02001771 nvme_init_subnqn(ctrl, id);
1772
Andy Lutomirskibd4da3a2017-02-22 13:32:36 -07001773 if (!ctrl->identified) {
1774 /*
1775 * Check for quirks. Quirk can depend on firmware version,
1776 * so, in principle, the set of quirks present can change
1777 * across a reset. As a possible future enhancement, we
1778 * could re-scan for quirks every time we reinitialize
1779 * the device, but we'd have to make sure that the driver
1780 * behaves intelligently if the quirks change.
1781 */
1782
1783 int i;
1784
1785 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
1786 if (quirk_matches(id, &core_quirks[i]))
1787 ctrl->quirks |= core_quirks[i].quirks;
1788 }
1789 }
1790
Andy Lutomirskic35e30b2017-04-21 16:19:24 -07001791 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
Johannes Thumshirnf0425db2017-06-09 16:17:21 +02001792 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
Andy Lutomirskic35e30b2017-04-21 16:19:24 -07001793 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
1794 }
1795
Scott Bauer8a9ae522017-02-17 13:59:40 +01001796 ctrl->oacs = le16_to_cpu(id->oacs);
Keith Busch118472a2016-02-18 09:57:48 -07001797 ctrl->vid = le16_to_cpu(id->vid);
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001798 ctrl->oncs = le16_to_cpup(&id->oncs);
Christoph Hellwig6bf25d12015-11-20 09:36:44 +01001799 atomic_set(&ctrl->abort_limit, id->acl + 1);
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001800 ctrl->vwc = id->vwc;
Ming Lin931e1c22016-02-26 13:24:19 -08001801 ctrl->cntlid = le16_to_cpup(&id->cntlid);
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001802 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
1803 memcpy(ctrl->model, id->mn, sizeof(id->mn));
1804 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
1805 if (id->mdts)
Christoph Hellwiga229dbf2016-06-06 23:20:48 +02001806 max_hw_sectors = 1 << (id->mdts + page_shift - 9);
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001807 else
Christoph Hellwiga229dbf2016-06-06 23:20:48 +02001808 max_hw_sectors = UINT_MAX;
1809 ctrl->max_hw_sectors =
1810 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001811
Christoph Hellwigda358252016-03-02 18:07:11 +01001812 nvme_set_queue_limits(ctrl, ctrl->admin_q);
Christoph Hellwig07bfcd02016-06-13 16:45:26 +02001813 ctrl->sgls = le32_to_cpu(id->sgls);
Sagi Grimberg038bd4c2016-06-13 16:45:28 +02001814 ctrl->kas = le16_to_cpu(id->kas);
Christoph Hellwig07bfcd02016-06-13 16:45:26 +02001815
Martin K. Petersen07fbd322017-08-25 19:14:50 -04001816 if (id->rtd3e) {
1817 /* us -> s */
1818 u32 transition_time = le32_to_cpu(id->rtd3e) / 1000000;
1819
1820 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
1821 shutdown_timeout, 60);
1822
1823 if (ctrl->shutdown_timeout != shutdown_timeout)
1824 dev_warn(ctrl->device,
1825 "Shutdown timeout set to %u seconds\n",
1826 ctrl->shutdown_timeout);
1827 } else
1828 ctrl->shutdown_timeout = shutdown_timeout;
1829
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001830 ctrl->npss = id->npss;
Kai-Heng Feng76a5af82017-06-26 16:39:54 -04001831 ctrl->apsta = id->apsta;
1832 prev_apst_enabled = ctrl->apst_enabled;
Andy Lutomirskic35e30b2017-04-21 16:19:24 -07001833 if (ctrl->quirks & NVME_QUIRK_NO_APST) {
1834 if (force_apst && id->apsta) {
Johannes Thumshirnf0425db2017-06-09 16:17:21 +02001835 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
Kai-Heng Feng76a5af82017-06-26 16:39:54 -04001836 ctrl->apst_enabled = true;
Andy Lutomirskic35e30b2017-04-21 16:19:24 -07001837 } else {
Kai-Heng Feng76a5af82017-06-26 16:39:54 -04001838 ctrl->apst_enabled = false;
Andy Lutomirskic35e30b2017-04-21 16:19:24 -07001839 }
1840 } else {
Kai-Heng Feng76a5af82017-06-26 16:39:54 -04001841 ctrl->apst_enabled = id->apsta;
Andy Lutomirskic35e30b2017-04-21 16:19:24 -07001842 }
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001843 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
1844
Christoph Hellwigd3d5b872017-05-20 15:14:44 +02001845 if (ctrl->ops->flags & NVME_F_FABRICS) {
Christoph Hellwig07bfcd02016-06-13 16:45:26 +02001846 ctrl->icdoff = le16_to_cpu(id->icdoff);
1847 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
1848 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
1849 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
1850
1851 /*
1852 * In fabrics we need to verify the cntlid matches the
1853 * admin connect
1854 */
Keith Busch634b8322017-08-10 11:23:31 +02001855 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
Christoph Hellwig07bfcd02016-06-13 16:45:26 +02001856 ret = -EINVAL;
Keith Busch634b8322017-08-10 11:23:31 +02001857 goto out_free;
1858 }
Sagi Grimberg038bd4c2016-06-13 16:45:28 +02001859
1860 if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
Johannes Thumshirnf0425db2017-06-09 16:17:21 +02001861 dev_err(ctrl->device,
Sagi Grimberg038bd4c2016-06-13 16:45:28 +02001862 "keep-alive support is mandatory for fabrics\n");
1863 ret = -EINVAL;
Keith Busch634b8322017-08-10 11:23:31 +02001864 goto out_free;
Sagi Grimberg038bd4c2016-06-13 16:45:28 +02001865 }
Christoph Hellwig07bfcd02016-06-13 16:45:26 +02001866 } else {
1867 ctrl->cntlid = le16_to_cpu(id->cntlid);
Christoph Hellwigfe6d53c2017-05-12 17:16:10 +02001868 ctrl->hmpre = le32_to_cpu(id->hmpre);
1869 ctrl->hmmin = le32_to_cpu(id->hmmin);
Christoph Hellwig044a9df2017-09-11 12:09:28 -04001870 ctrl->hmminds = le32_to_cpu(id->hmminds);
1871 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
Christoph Hellwig07bfcd02016-06-13 16:45:26 +02001872 }
Christoph Hellwigda358252016-03-02 18:07:11 +01001873
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001874 kfree(id);
Andy Lutomirskibd4da3a2017-02-22 13:32:36 -07001875
Kai-Heng Feng76a5af82017-06-26 16:39:54 -04001876 if (ctrl->apst_enabled && !prev_apst_enabled)
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001877 dev_pm_qos_expose_latency_tolerance(ctrl->device);
Kai-Heng Feng76a5af82017-06-26 16:39:54 -04001878 else if (!ctrl->apst_enabled && prev_apst_enabled)
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001879 dev_pm_qos_hide_latency_tolerance(ctrl->device);
1880
Keith Busch634b8322017-08-10 11:23:31 +02001881 ret = nvme_configure_apst(ctrl);
1882 if (ret < 0)
1883 return ret;
Jon Derrickdbf86b32017-08-16 09:51:29 +02001884
1885 ret = nvme_configure_timestamp(ctrl);
1886 if (ret < 0)
1887 return ret;
Keith Busch634b8322017-08-10 11:23:31 +02001888
1889 ret = nvme_configure_directives(ctrl);
1890 if (ret < 0)
1891 return ret;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001892
Andy Lutomirskibd4da3a2017-02-22 13:32:36 -07001893 ctrl->identified = true;
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08001894
Keith Busch634b8322017-08-10 11:23:31 +02001895 return 0;
1896
1897out_free:
1898 kfree(id);
Christoph Hellwig07bfcd02016-06-13 16:45:26 +02001899 return ret;
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001900}
Ming Lin576d55d2016-02-10 10:03:32 -08001901EXPORT_SYMBOL_GPL(nvme_init_identify);
Christoph Hellwig7fd89302015-11-28 15:37:52 +01001902
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001903static int nvme_dev_open(struct inode *inode, struct file *file)
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001904{
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001905 struct nvme_ctrl *ctrl;
1906 int instance = iminor(inode);
1907 int ret = -ENODEV;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001908
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001909 spin_lock(&dev_list_lock);
1910 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
1911 if (ctrl->instance != instance)
1912 continue;
1913
1914 if (!ctrl->admin_q) {
1915 ret = -EWOULDBLOCK;
1916 break;
1917 }
1918 if (!kref_get_unless_zero(&ctrl->kref))
1919 break;
1920 file->private_data = ctrl;
1921 ret = 0;
1922 break;
1923 }
1924 spin_unlock(&dev_list_lock);
1925
1926 return ret;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001927}
1928
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001929static int nvme_dev_release(struct inode *inode, struct file *file)
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001930{
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001931 nvme_put_ctrl(file->private_data);
1932 return 0;
Christoph Hellwig1673f1f2015-11-26 10:54:19 +01001933}
1934
Christoph Hellwigbfd89472015-12-24 15:27:01 +01001935static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
1936{
1937 struct nvme_ns *ns;
1938 int ret;
1939
1940 mutex_lock(&ctrl->namespaces_mutex);
1941 if (list_empty(&ctrl->namespaces)) {
1942 ret = -ENOTTY;
1943 goto out_unlock;
1944 }
1945
1946 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
1947 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
Sagi Grimberg1b3c47c2016-02-10 08:51:15 -07001948 dev_warn(ctrl->device,
Christoph Hellwigbfd89472015-12-24 15:27:01 +01001949 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
1950 ret = -EINVAL;
1951 goto out_unlock;
1952 }
1953
Sagi Grimberg1b3c47c2016-02-10 08:51:15 -07001954 dev_warn(ctrl->device,
Christoph Hellwigbfd89472015-12-24 15:27:01 +01001955 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
1956 kref_get(&ns->kref);
1957 mutex_unlock(&ctrl->namespaces_mutex);
1958
1959 ret = nvme_user_cmd(ctrl, ns, argp);
1960 nvme_put_ns(ns);
1961 return ret;
1962
1963out_unlock:
1964 mutex_unlock(&ctrl->namespaces_mutex);
1965 return ret;
1966}
1967
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001968static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1969 unsigned long arg)
1970{
1971 struct nvme_ctrl *ctrl = file->private_data;
1972 void __user *argp = (void __user *)arg;
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001973
1974 switch (cmd) {
1975 case NVME_IOCTL_ADMIN_CMD:
1976 return nvme_user_cmd(ctrl, NULL, argp);
1977 case NVME_IOCTL_IO_CMD:
Christoph Hellwigbfd89472015-12-24 15:27:01 +01001978 return nvme_dev_user_cmd(ctrl, argp);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001979 case NVME_IOCTL_RESET:
Sagi Grimberg1b3c47c2016-02-10 08:51:15 -07001980 dev_warn(ctrl->device, "resetting controller\n");
Christoph Hellwigd86c4d82017-06-15 15:41:08 +02001981 return nvme_reset_ctrl_sync(ctrl);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001982 case NVME_IOCTL_SUBSYS_RESET:
1983 return nvme_reset_subsystem(ctrl);
Keith Busch9ec3bb22016-04-29 15:45:18 -06001984 case NVME_IOCTL_RESCAN:
1985 nvme_queue_scan(ctrl);
1986 return 0;
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01001987 default:
1988 return -ENOTTY;
1989 }
1990}
1991
1992static const struct file_operations nvme_dev_fops = {
1993 .owner = THIS_MODULE,
1994 .open = nvme_dev_open,
1995 .release = nvme_dev_release,
1996 .unlocked_ioctl = nvme_dev_ioctl,
1997 .compat_ioctl = nvme_dev_ioctl,
1998};
1999
2000static ssize_t nvme_sysfs_reset(struct device *dev,
2001 struct device_attribute *attr, const char *buf,
2002 size_t count)
2003{
2004 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2005 int ret;
2006
Christoph Hellwigd86c4d82017-06-15 15:41:08 +02002007 ret = nvme_reset_ctrl_sync(ctrl);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002008 if (ret < 0)
2009 return ret;
2010 return count;
2011}
2012static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
2013
Keith Busch9ec3bb22016-04-29 15:45:18 -06002014static ssize_t nvme_sysfs_rescan(struct device *dev,
2015 struct device_attribute *attr, const char *buf,
2016 size_t count)
2017{
2018 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2019
2020 nvme_queue_scan(ctrl);
2021 return count;
2022}
2023static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
2024
Keith Busch118472a2016-02-18 09:57:48 -07002025static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
2026 char *buf)
2027{
Simon A. F. Lund40267ef2016-09-16 14:25:08 +02002028 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
Keith Busch118472a2016-02-18 09:57:48 -07002029 struct nvme_ctrl *ctrl = ns->ctrl;
2030 int serial_len = sizeof(ctrl->serial);
2031 int model_len = sizeof(ctrl->model);
2032
Johannes Thumshirn6484f5d2017-07-12 15:38:56 +02002033 if (!uuid_is_null(&ns->uuid))
2034 return sprintf(buf, "uuid.%pU\n", &ns->uuid);
2035
Johannes Thumshirn90985b82017-06-07 11:45:31 +02002036 if (memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
2037 return sprintf(buf, "eui.%16phN\n", ns->nguid);
Keith Busch118472a2016-02-18 09:57:48 -07002038
2039 if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
2040 return sprintf(buf, "eui.%8phN\n", ns->eui);
2041
Martin Wilck758f3732017-07-20 18:34:02 +02002042 while (serial_len > 0 && (ctrl->serial[serial_len - 1] == ' ' ||
2043 ctrl->serial[serial_len - 1] == '\0'))
Keith Busch118472a2016-02-18 09:57:48 -07002044 serial_len--;
Martin Wilck758f3732017-07-20 18:34:02 +02002045 while (model_len > 0 && (ctrl->model[model_len - 1] == ' ' ||
2046 ctrl->model[model_len - 1] == '\0'))
Keith Busch118472a2016-02-18 09:57:48 -07002047 model_len--;
2048
2049 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
2050 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
2051}
2052static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
2053
Johannes Thumshirnd934f982017-06-07 11:45:35 +02002054static ssize_t nguid_show(struct device *dev, struct device_attribute *attr,
2055 char *buf)
2056{
2057 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2058 return sprintf(buf, "%pU\n", ns->nguid);
2059}
2060static DEVICE_ATTR(nguid, S_IRUGO, nguid_show, NULL);
2061
Keith Busch2b9b6e82015-12-22 10:10:45 -07002062static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
2063 char *buf)
2064{
Simon A. F. Lund40267ef2016-09-16 14:25:08 +02002065 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
Johannes Thumshirnd934f982017-06-07 11:45:35 +02002066
2067 /* For backward compatibility expose the NGUID to userspace if
2068 * we have no UUID set
2069 */
2070 if (uuid_is_null(&ns->uuid)) {
2071 printk_ratelimited(KERN_WARNING
2072 "No UUID available providing old NGUID\n");
2073 return sprintf(buf, "%pU\n", ns->nguid);
2074 }
2075 return sprintf(buf, "%pU\n", &ns->uuid);
Keith Busch2b9b6e82015-12-22 10:10:45 -07002076}
2077static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
2078
2079static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
2080 char *buf)
2081{
Simon A. F. Lund40267ef2016-09-16 14:25:08 +02002082 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
Keith Busch2b9b6e82015-12-22 10:10:45 -07002083 return sprintf(buf, "%8phd\n", ns->eui);
2084}
2085static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
2086
2087static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
2088 char *buf)
2089{
Simon A. F. Lund40267ef2016-09-16 14:25:08 +02002090 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
Keith Busch2b9b6e82015-12-22 10:10:45 -07002091 return sprintf(buf, "%d\n", ns->ns_id);
2092}
2093static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
2094
2095static struct attribute *nvme_ns_attrs[] = {
Keith Busch118472a2016-02-18 09:57:48 -07002096 &dev_attr_wwid.attr,
Keith Busch2b9b6e82015-12-22 10:10:45 -07002097 &dev_attr_uuid.attr,
Johannes Thumshirnd934f982017-06-07 11:45:35 +02002098 &dev_attr_nguid.attr,
Keith Busch2b9b6e82015-12-22 10:10:45 -07002099 &dev_attr_eui.attr,
2100 &dev_attr_nsid.attr,
2101 NULL,
2102};
2103
Ming Lin1a353d82016-06-13 16:45:24 +02002104static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
Keith Busch2b9b6e82015-12-22 10:10:45 -07002105 struct attribute *a, int n)
2106{
2107 struct device *dev = container_of(kobj, struct device, kobj);
Simon A. F. Lund40267ef2016-09-16 14:25:08 +02002108 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
Keith Busch2b9b6e82015-12-22 10:10:45 -07002109
2110 if (a == &dev_attr_uuid.attr) {
Johannes Thumshirnd934f982017-06-07 11:45:35 +02002111 if (uuid_is_null(&ns->uuid) ||
2112 !memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
2113 return 0;
2114 }
2115 if (a == &dev_attr_nguid.attr) {
Johannes Thumshirn90985b82017-06-07 11:45:31 +02002116 if (!memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
Keith Busch2b9b6e82015-12-22 10:10:45 -07002117 return 0;
2118 }
2119 if (a == &dev_attr_eui.attr) {
2120 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
2121 return 0;
2122 }
2123 return a->mode;
2124}
2125
2126static const struct attribute_group nvme_ns_attr_group = {
2127 .attrs = nvme_ns_attrs,
Ming Lin1a353d82016-06-13 16:45:24 +02002128 .is_visible = nvme_ns_attrs_are_visible,
Keith Busch2b9b6e82015-12-22 10:10:45 -07002129};
2130
Ming Lin931e1c22016-02-26 13:24:19 -08002131#define nvme_show_str_function(field) \
Keith Busch779ff7562016-01-12 15:09:31 -07002132static ssize_t field##_show(struct device *dev, \
2133 struct device_attribute *attr, char *buf) \
2134{ \
2135 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
2136 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
2137} \
2138static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
2139
Ming Lin931e1c22016-02-26 13:24:19 -08002140#define nvme_show_int_function(field) \
2141static ssize_t field##_show(struct device *dev, \
2142 struct device_attribute *attr, char *buf) \
2143{ \
2144 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
2145 return sprintf(buf, "%d\n", ctrl->field); \
2146} \
2147static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
2148
2149nvme_show_str_function(model);
2150nvme_show_str_function(serial);
2151nvme_show_str_function(firmware_rev);
2152nvme_show_int_function(cntlid);
Keith Busch779ff7562016-01-12 15:09:31 -07002153
Ming Lin1a353d82016-06-13 16:45:24 +02002154static ssize_t nvme_sysfs_delete(struct device *dev,
2155 struct device_attribute *attr, const char *buf,
2156 size_t count)
2157{
2158 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2159
2160 if (device_remove_file_self(dev, attr))
2161 ctrl->ops->delete_ctrl(ctrl);
2162 return count;
2163}
2164static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
2165
2166static ssize_t nvme_sysfs_show_transport(struct device *dev,
2167 struct device_attribute *attr,
2168 char *buf)
2169{
2170 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2171
2172 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
2173}
2174static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
2175
Sagi Grimberg8432bdb22016-11-28 01:47:40 +02002176static ssize_t nvme_sysfs_show_state(struct device *dev,
2177 struct device_attribute *attr,
2178 char *buf)
2179{
2180 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2181 static const char *const state_name[] = {
2182 [NVME_CTRL_NEW] = "new",
2183 [NVME_CTRL_LIVE] = "live",
2184 [NVME_CTRL_RESETTING] = "resetting",
2185 [NVME_CTRL_RECONNECTING]= "reconnecting",
2186 [NVME_CTRL_DELETING] = "deleting",
2187 [NVME_CTRL_DEAD] = "dead",
2188 };
2189
2190 if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
2191 state_name[ctrl->state])
2192 return sprintf(buf, "%s\n", state_name[ctrl->state]);
2193
2194 return sprintf(buf, "unknown state\n");
2195}
2196
2197static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
2198
Ming Lin1a353d82016-06-13 16:45:24 +02002199static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
2200 struct device_attribute *attr,
2201 char *buf)
2202{
2203 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2204
Christoph Hellwig180de0072017-06-26 12:39:02 +02002205 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subnqn);
Ming Lin1a353d82016-06-13 16:45:24 +02002206}
2207static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
2208
2209static ssize_t nvme_sysfs_show_address(struct device *dev,
2210 struct device_attribute *attr,
2211 char *buf)
2212{
2213 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2214
2215 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
2216}
2217static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
2218
Keith Busch779ff7562016-01-12 15:09:31 -07002219static struct attribute *nvme_dev_attrs[] = {
2220 &dev_attr_reset_controller.attr,
Keith Busch9ec3bb22016-04-29 15:45:18 -06002221 &dev_attr_rescan_controller.attr,
Keith Busch779ff7562016-01-12 15:09:31 -07002222 &dev_attr_model.attr,
2223 &dev_attr_serial.attr,
2224 &dev_attr_firmware_rev.attr,
Ming Lin931e1c22016-02-26 13:24:19 -08002225 &dev_attr_cntlid.attr,
Ming Lin1a353d82016-06-13 16:45:24 +02002226 &dev_attr_delete_controller.attr,
2227 &dev_attr_transport.attr,
2228 &dev_attr_subsysnqn.attr,
2229 &dev_attr_address.attr,
Sagi Grimberg8432bdb22016-11-28 01:47:40 +02002230 &dev_attr_state.attr,
Keith Busch779ff7562016-01-12 15:09:31 -07002231 NULL
2232};
2233
Ming Lin1a353d82016-06-13 16:45:24 +02002234static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
2235 struct attribute *a, int n)
2236{
2237 struct device *dev = container_of(kobj, struct device, kobj);
2238 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2239
Christoph Hellwig49d3d502017-06-26 12:39:03 +02002240 if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl)
2241 return 0;
2242 if (a == &dev_attr_address.attr && !ctrl->ops->get_address)
2243 return 0;
Ming Lin1a353d82016-06-13 16:45:24 +02002244
2245 return a->mode;
2246}
2247
Keith Busch779ff7562016-01-12 15:09:31 -07002248static struct attribute_group nvme_dev_attrs_group = {
Ming Lin1a353d82016-06-13 16:45:24 +02002249 .attrs = nvme_dev_attrs,
2250 .is_visible = nvme_dev_attrs_are_visible,
Keith Busch779ff7562016-01-12 15:09:31 -07002251};
2252
2253static const struct attribute_group *nvme_dev_attr_groups[] = {
2254 &nvme_dev_attrs_group,
2255 NULL,
2256};
2257
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002258static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2259{
2260 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2261 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2262
2263 return nsa->ns_id - nsb->ns_id;
2264}
2265
Keith Busch32f0c4a2016-07-13 11:45:02 -06002266static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002267{
Keith Busch32f0c4a2016-07-13 11:45:02 -06002268 struct nvme_ns *ns, *ret = NULL;
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002269
Keith Busch32f0c4a2016-07-13 11:45:02 -06002270 mutex_lock(&ctrl->namespaces_mutex);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002271 list_for_each_entry(ns, &ctrl->namespaces, list) {
Keith Busch32f0c4a2016-07-13 11:45:02 -06002272 if (ns->ns_id == nsid) {
Christoph Hellwig2dd41222017-10-18 13:20:01 +02002273 if (!kref_get_unless_zero(&ns->kref))
2274 continue;
Keith Busch32f0c4a2016-07-13 11:45:02 -06002275 ret = ns;
2276 break;
2277 }
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002278 if (ns->ns_id > nsid)
2279 break;
2280 }
Keith Busch32f0c4a2016-07-13 11:45:02 -06002281 mutex_unlock(&ctrl->namespaces_mutex);
2282 return ret;
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002283}
2284
Jens Axboef5d11842017-06-27 12:03:06 -06002285static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns)
2286{
2287 struct streams_directive_params s;
2288 int ret;
2289
2290 if (!ctrl->nr_streams)
2291 return 0;
2292
2293 ret = nvme_get_stream_params(ctrl, &s, ns->ns_id);
2294 if (ret)
2295 return ret;
2296
2297 ns->sws = le32_to_cpu(s.sws);
2298 ns->sgs = le16_to_cpu(s.sgs);
2299
2300 if (ns->sws) {
2301 unsigned int bs = 1 << ns->lba_shift;
2302
2303 blk_queue_io_min(ns->queue, bs * ns->sws);
2304 if (ns->sgs)
2305 blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs);
2306 }
2307
2308 return 0;
2309}
2310
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002311static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
2312{
2313 struct nvme_ns *ns;
2314 struct gendisk *disk;
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02002315 struct nvme_id_ns *id;
2316 char disk_name[DISK_NAME_LEN];
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002317 int node = dev_to_node(ctrl->dev);
2318
2319 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2320 if (!ns)
2321 return;
2322
Keith Busch075790e2016-02-24 09:15:53 -07002323 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
2324 if (ns->instance < 0)
2325 goto out_free_ns;
2326
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002327 ns->queue = blk_mq_init_queue(ctrl->tagset);
2328 if (IS_ERR(ns->queue))
Keith Busch075790e2016-02-24 09:15:53 -07002329 goto out_release_instance;
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002330 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2331 ns->queue->queuedata = ns;
2332 ns->ctrl = ctrl;
2333
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002334 kref_init(&ns->kref);
2335 ns->ns_id = nsid;
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002336 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002337
2338 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
Christoph Hellwigda358252016-03-02 18:07:11 +01002339 nvme_set_queue_limits(ctrl, ns->queue);
Jens Axboef5d11842017-06-27 12:03:06 -06002340 nvme_setup_streams_ns(ctrl, ns);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002341
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02002342 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002343
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02002344 id = nvme_identify_ns(ctrl, nsid);
2345 if (!id)
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02002346 goto out_free_queue;
2347
Christoph Hellwigcdbff4f2017-08-16 16:14:47 +02002348 if (id->ncap == 0)
2349 goto out_free_id;
2350
2351 nvme_report_ns_ids(ctrl, ns->ns_id, id, ns->eui, ns->nguid, &ns->uuid);
2352
Christoph Hellwig608cc4b2017-09-06 11:45:24 +02002353 if ((ctrl->quirks & NVME_QUIRK_LIGHTNVM) && id->vs[0] == 0x1) {
2354 if (nvme_nvm_register(ns, disk_name, node)) {
2355 dev_warn(ctrl->device, "LightNVM init failure\n");
2356 goto out_free_id;
2357 }
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02002358 }
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002359
Matias Bjørling3dc87dd2016-11-28 22:38:53 +01002360 disk = alloc_disk_node(0, node);
2361 if (!disk)
2362 goto out_free_id;
2363
2364 disk->fops = &nvme_fops;
2365 disk->private_data = ns;
2366 disk->queue = ns->queue;
2367 disk->flags = GENHD_FL_EXT_DEVT;
2368 memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
2369 ns->disk = disk;
2370
2371 __nvme_revalidate_disk(disk, id);
2372
Keith Busch32f0c4a2016-07-13 11:45:02 -06002373 mutex_lock(&ctrl->namespaces_mutex);
2374 list_add_tail(&ns->list, &ctrl->namespaces);
2375 mutex_unlock(&ctrl->namespaces_mutex);
2376
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002377 kref_get(&ctrl->kref);
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02002378
2379 kfree(id);
2380
Dan Williams0d52c7562016-06-15 19:44:20 -07002381 device_add_disk(ctrl->device, ns->disk);
Keith Busch2b9b6e82015-12-22 10:10:45 -07002382 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
2383 &nvme_ns_attr_group))
2384 pr_warn("%s: failed to create sysfs group for identification\n",
2385 ns->disk->disk_name);
Matias Bjørling3dc87dd2016-11-28 22:38:53 +01002386 if (ns->ndev && nvme_nvm_register_sysfs(ns))
2387 pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
2388 ns->disk->disk_name);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002389 return;
Matias Bjørlingac81bfa92016-09-16 14:25:04 +02002390 out_free_id:
2391 kfree(id);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002392 out_free_queue:
2393 blk_cleanup_queue(ns->queue);
Keith Busch075790e2016-02-24 09:15:53 -07002394 out_release_instance:
2395 ida_simple_remove(&ctrl->ns_ida, ns->instance);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002396 out_free_ns:
2397 kfree(ns);
2398}
2399
2400static void nvme_ns_remove(struct nvme_ns *ns)
2401{
Keith Busch646017a2016-02-24 09:15:54 -07002402 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
2403 return;
2404
Matias Bjørlingb0b4e092016-09-16 14:25:07 +02002405 if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002406 if (blk_get_integrity(ns->disk))
2407 blk_integrity_unregister(ns->disk);
Keith Busch2b9b6e82015-12-22 10:10:45 -07002408 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
2409 &nvme_ns_attr_group);
Matias Bjørling3dc87dd2016-11-28 22:38:53 +01002410 if (ns->ndev)
2411 nvme_nvm_unregister_sysfs(ns);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002412 del_gendisk(ns->disk);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002413 blk_cleanup_queue(ns->queue);
2414 }
Keith Busch32f0c4a2016-07-13 11:45:02 -06002415
2416 mutex_lock(&ns->ctrl->namespaces_mutex);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002417 list_del_init(&ns->list);
Keith Busch32f0c4a2016-07-13 11:45:02 -06002418 mutex_unlock(&ns->ctrl->namespaces_mutex);
2419
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002420 nvme_put_ns(ns);
2421}
2422
Keith Busch540c8012015-10-22 15:45:06 -06002423static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
2424{
2425 struct nvme_ns *ns;
2426
Keith Busch32f0c4a2016-07-13 11:45:02 -06002427 ns = nvme_find_get_ns(ctrl, nsid);
Keith Busch540c8012015-10-22 15:45:06 -06002428 if (ns) {
Matias Bjørlingb0b4e092016-09-16 14:25:07 +02002429 if (ns->disk && revalidate_disk(ns->disk))
Keith Busch540c8012015-10-22 15:45:06 -06002430 nvme_ns_remove(ns);
Keith Busch32f0c4a2016-07-13 11:45:02 -06002431 nvme_put_ns(ns);
Keith Busch540c8012015-10-22 15:45:06 -06002432 } else
2433 nvme_alloc_ns(ctrl, nsid);
2434}
2435
Sunad Bhandary47b0e502016-05-27 15:59:43 +05302436static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
2437 unsigned nsid)
2438{
2439 struct nvme_ns *ns, *next;
2440
2441 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
2442 if (ns->ns_id > nsid)
2443 nvme_ns_remove(ns);
2444 }
2445}
2446
Keith Busch540c8012015-10-22 15:45:06 -06002447static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
2448{
2449 struct nvme_ns *ns;
2450 __le32 *ns_list;
2451 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
2452 int ret = 0;
2453
2454 ns_list = kzalloc(0x1000, GFP_KERNEL);
2455 if (!ns_list)
2456 return -ENOMEM;
2457
2458 for (i = 0; i < num_lists; i++) {
2459 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
2460 if (ret)
Sunad Bhandary47b0e502016-05-27 15:59:43 +05302461 goto free;
Keith Busch540c8012015-10-22 15:45:06 -06002462
2463 for (j = 0; j < min(nn, 1024U); j++) {
2464 nsid = le32_to_cpu(ns_list[j]);
2465 if (!nsid)
2466 goto out;
2467
2468 nvme_validate_ns(ctrl, nsid);
2469
2470 while (++prev < nsid) {
Keith Busch32f0c4a2016-07-13 11:45:02 -06002471 ns = nvme_find_get_ns(ctrl, prev);
2472 if (ns) {
Keith Busch540c8012015-10-22 15:45:06 -06002473 nvme_ns_remove(ns);
Keith Busch32f0c4a2016-07-13 11:45:02 -06002474 nvme_put_ns(ns);
2475 }
Keith Busch540c8012015-10-22 15:45:06 -06002476 }
2477 }
2478 nn -= j;
2479 }
2480 out:
Sunad Bhandary47b0e502016-05-27 15:59:43 +05302481 nvme_remove_invalid_namespaces(ctrl, prev);
2482 free:
Keith Busch540c8012015-10-22 15:45:06 -06002483 kfree(ns_list);
2484 return ret;
2485}
2486
Christoph Hellwig5955be22016-04-26 13:51:59 +02002487static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002488{
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002489 unsigned i;
2490
Keith Busch540c8012015-10-22 15:45:06 -06002491 for (i = 1; i <= nn; i++)
2492 nvme_validate_ns(ctrl, i);
2493
Sunad Bhandary47b0e502016-05-27 15:59:43 +05302494 nvme_remove_invalid_namespaces(ctrl, nn);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002495}
2496
Christoph Hellwig5955be22016-04-26 13:51:59 +02002497static void nvme_scan_work(struct work_struct *work)
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002498{
Christoph Hellwig5955be22016-04-26 13:51:59 +02002499 struct nvme_ctrl *ctrl =
2500 container_of(work, struct nvme_ctrl, scan_work);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002501 struct nvme_id_ctrl *id;
Keith Busch540c8012015-10-22 15:45:06 -06002502 unsigned nn;
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002503
Christoph Hellwig5955be22016-04-26 13:51:59 +02002504 if (ctrl->state != NVME_CTRL_LIVE)
2505 return;
2506
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002507 if (nvme_identify_ctrl(ctrl, &id))
2508 return;
Keith Busch540c8012015-10-22 15:45:06 -06002509
2510 nn = le32_to_cpu(id->nn);
Gabriel Krisman Bertazi8ef20742016-10-19 09:51:05 -06002511 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
Keith Busch540c8012015-10-22 15:45:06 -06002512 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
2513 if (!nvme_scan_ns_list(ctrl, nn))
2514 goto done;
2515 }
Christoph Hellwig5955be22016-04-26 13:51:59 +02002516 nvme_scan_ns_sequential(ctrl, nn);
Keith Busch540c8012015-10-22 15:45:06 -06002517 done:
Keith Busch32f0c4a2016-07-13 11:45:02 -06002518 mutex_lock(&ctrl->namespaces_mutex);
Keith Busch540c8012015-10-22 15:45:06 -06002519 list_sort(NULL, &ctrl->namespaces, ns_cmp);
Christoph Hellwig69d3b8a2015-12-24 15:27:00 +01002520 mutex_unlock(&ctrl->namespaces_mutex);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002521 kfree(id);
2522}
Christoph Hellwig5955be22016-04-26 13:51:59 +02002523
2524void nvme_queue_scan(struct nvme_ctrl *ctrl)
2525{
2526 /*
2527 * Do not queue new scan work when a controller is reset during
2528 * removal.
2529 */
2530 if (ctrl->state == NVME_CTRL_LIVE)
Sagi Grimbergc669ccd2017-05-04 13:33:14 +03002531 queue_work(nvme_wq, &ctrl->scan_work);
Christoph Hellwig5955be22016-04-26 13:51:59 +02002532}
2533EXPORT_SYMBOL_GPL(nvme_queue_scan);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002534
Keith Busch32f0c4a2016-07-13 11:45:02 -06002535/*
2536 * This function iterates the namespace list unlocked to allow recovery from
2537 * controller failure. It is up to the caller to ensure the namespace list is
2538 * not modified by scan work while this function is executing.
2539 */
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002540void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
2541{
2542 struct nvme_ns *ns, *next;
2543
Keith Busch0ff9d4e2016-05-12 08:37:14 -06002544 /*
2545 * The dead states indicates the controller was not gracefully
2546 * disconnected. In that case, we won't be able to flush any data while
2547 * removing the namespaces' disks; fail all the queues now to avoid
2548 * potentially having to clean up the failed sync later.
2549 */
2550 if (ctrl->state == NVME_CTRL_DEAD)
2551 nvme_kill_queues(ctrl);
2552
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002553 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
2554 nvme_ns_remove(ns);
2555}
Ming Lin576d55d2016-02-10 10:03:32 -08002556EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002557
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002558static void nvme_async_event_work(struct work_struct *work)
2559{
2560 struct nvme_ctrl *ctrl =
2561 container_of(work, struct nvme_ctrl, async_event_work);
2562
2563 spin_lock_irq(&ctrl->lock);
James Smartcd482822017-09-14 11:03:09 -07002564 while (ctrl->state == NVME_CTRL_LIVE && ctrl->event_limit > 0) {
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002565 int aer_idx = --ctrl->event_limit;
2566
2567 spin_unlock_irq(&ctrl->lock);
2568 ctrl->ops->submit_async_event(ctrl, aer_idx);
2569 spin_lock_irq(&ctrl->lock);
2570 }
2571 spin_unlock_irq(&ctrl->lock);
2572}
2573
Arnav Dawnb6dccf72017-07-12 16:10:40 +05302574static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
2575{
2576
2577 u32 csts;
2578
2579 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
2580 return false;
2581
2582 if (csts == ~0)
2583 return false;
2584
2585 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
2586}
2587
2588static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
2589{
2590 struct nvme_command c = { };
2591 struct nvme_fw_slot_info_log *log;
2592
2593 log = kmalloc(sizeof(*log), GFP_KERNEL);
2594 if (!log)
2595 return;
2596
2597 c.common.opcode = nvme_admin_get_log_page;
Arnav Dawn62346ea2017-07-12 16:11:53 +05302598 c.common.nsid = cpu_to_le32(NVME_NSID_ALL);
Arnav Dawnb6dccf72017-07-12 16:10:40 +05302599 c.common.cdw10[0] = nvme_get_log_dw10(NVME_LOG_FW_SLOT, sizeof(*log));
2600
2601 if (!nvme_submit_sync_cmd(ctrl->admin_q, &c, log, sizeof(*log)))
2602 dev_warn(ctrl->device,
2603 "Get FW SLOT INFO log error\n");
2604 kfree(log);
2605}
2606
2607static void nvme_fw_act_work(struct work_struct *work)
2608{
2609 struct nvme_ctrl *ctrl = container_of(work,
2610 struct nvme_ctrl, fw_act_work);
2611 unsigned long fw_act_timeout;
2612
2613 if (ctrl->mtfa)
2614 fw_act_timeout = jiffies +
2615 msecs_to_jiffies(ctrl->mtfa * 100);
2616 else
2617 fw_act_timeout = jiffies +
2618 msecs_to_jiffies(admin_timeout * 1000);
2619
2620 nvme_stop_queues(ctrl);
2621 while (nvme_ctrl_pp_status(ctrl)) {
2622 if (time_after(jiffies, fw_act_timeout)) {
2623 dev_warn(ctrl->device,
2624 "Fw activation timeout, reset controller\n");
2625 nvme_reset_ctrl(ctrl);
2626 break;
2627 }
2628 msleep(100);
2629 }
2630
2631 if (ctrl->state != NVME_CTRL_LIVE)
2632 return;
2633
2634 nvme_start_queues(ctrl);
2635 /* read FW slot informationi to clear the AER*/
2636 nvme_get_fw_slot_info(ctrl);
2637}
2638
Christoph Hellwig7bf58532016-11-10 07:32:34 -08002639void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
2640 union nvme_result *res)
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002641{
Christoph Hellwig7bf58532016-11-10 07:32:34 -08002642 u32 result = le32_to_cpu(res->u32);
2643 bool done = true;
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002644
Christoph Hellwig7bf58532016-11-10 07:32:34 -08002645 switch (le16_to_cpu(status) >> 1) {
2646 case NVME_SC_SUCCESS:
2647 done = false;
2648 /*FALLTHRU*/
2649 case NVME_SC_ABORT_REQ:
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002650 ++ctrl->event_limit;
James Smartcd482822017-09-14 11:03:09 -07002651 if (ctrl->state == NVME_CTRL_LIVE)
Sagi Grimberg1a40d972017-09-21 17:01:36 +03002652 queue_work(nvme_wq, &ctrl->async_event_work);
Christoph Hellwig7bf58532016-11-10 07:32:34 -08002653 break;
2654 default:
2655 break;
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002656 }
2657
Christoph Hellwig7bf58532016-11-10 07:32:34 -08002658 if (done)
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002659 return;
2660
2661 switch (result & 0xff07) {
2662 case NVME_AER_NOTICE_NS_CHANGED:
2663 dev_info(ctrl->device, "rescanning\n");
2664 nvme_queue_scan(ctrl);
2665 break;
Arnav Dawnb6dccf72017-07-12 16:10:40 +05302666 case NVME_AER_NOTICE_FW_ACT_STARTING:
Sagi Grimberg1a40d972017-09-21 17:01:36 +03002667 queue_work(nvme_wq, &ctrl->fw_act_work);
Arnav Dawnb6dccf72017-07-12 16:10:40 +05302668 break;
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002669 default:
2670 dev_warn(ctrl->device, "async event result %08x\n", result);
2671 }
2672}
2673EXPORT_SYMBOL_GPL(nvme_complete_async_event);
2674
2675void nvme_queue_async_events(struct nvme_ctrl *ctrl)
2676{
2677 ctrl->event_limit = NVME_NR_AERS;
Sagi Grimbergc669ccd2017-05-04 13:33:14 +03002678 queue_work(nvme_wq, &ctrl->async_event_work);
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002679}
2680EXPORT_SYMBOL_GPL(nvme_queue_async_events);
2681
Sagi Grimbergd09f2b42017-07-02 10:56:43 +03002682void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
Ming Lin576d55d2016-02-10 10:03:32 -08002683{
Sagi Grimbergd09f2b42017-07-02 10:56:43 +03002684 nvme_stop_keep_alive(ctrl);
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002685 flush_work(&ctrl->async_event_work);
Christoph Hellwig5955be22016-04-26 13:51:59 +02002686 flush_work(&ctrl->scan_work);
Arnav Dawnb6dccf72017-07-12 16:10:40 +05302687 cancel_work_sync(&ctrl->fw_act_work);
Sagi Grimbergd09f2b42017-07-02 10:56:43 +03002688}
2689EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
Christoph Hellwig5955be22016-04-26 13:51:59 +02002690
Sagi Grimbergd09f2b42017-07-02 10:56:43 +03002691void nvme_start_ctrl(struct nvme_ctrl *ctrl)
2692{
2693 if (ctrl->kato)
2694 nvme_start_keep_alive(ctrl);
2695
2696 if (ctrl->queue_count > 1) {
2697 nvme_queue_scan(ctrl);
2698 nvme_queue_async_events(ctrl);
2699 nvme_start_queues(ctrl);
2700 }
2701}
2702EXPORT_SYMBOL_GPL(nvme_start_ctrl);
2703
2704void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
2705{
Keith Busch53029b02015-11-28 15:41:02 +01002706 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002707
2708 spin_lock(&dev_list_lock);
2709 list_del(&ctrl->node);
2710 spin_unlock(&dev_list_lock);
Keith Busch53029b02015-11-28 15:41:02 +01002711}
Ming Lin576d55d2016-02-10 10:03:32 -08002712EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
Keith Busch53029b02015-11-28 15:41:02 +01002713
2714static void nvme_free_ctrl(struct kref *kref)
2715{
2716 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002717
2718 put_device(ctrl->device);
Christoph Hellwig9843f682017-10-18 13:10:01 +02002719 ida_simple_remove(&nvme_instance_ida, ctrl->instance);
Keith Busch075790e2016-02-24 09:15:53 -07002720 ida_destroy(&ctrl->ns_ida);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002721
2722 ctrl->ops->free_ctrl(ctrl);
2723}
2724
2725void nvme_put_ctrl(struct nvme_ctrl *ctrl)
2726{
2727 kref_put(&ctrl->kref, nvme_free_ctrl);
2728}
Ming Lin576d55d2016-02-10 10:03:32 -08002729EXPORT_SYMBOL_GPL(nvme_put_ctrl);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002730
2731/*
2732 * Initialize a NVMe controller structures. This needs to be called during
2733 * earliest initialization so that we have the initialized structured around
2734 * during probing.
2735 */
2736int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
2737 const struct nvme_ctrl_ops *ops, unsigned long quirks)
2738{
2739 int ret;
2740
Christoph Hellwigbb8d2612016-04-26 13:51:57 +02002741 ctrl->state = NVME_CTRL_NEW;
2742 spin_lock_init(&ctrl->lock);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002743 INIT_LIST_HEAD(&ctrl->namespaces);
Christoph Hellwig69d3b8a2015-12-24 15:27:00 +01002744 mutex_init(&ctrl->namespaces_mutex);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002745 kref_init(&ctrl->kref);
2746 ctrl->dev = dev;
2747 ctrl->ops = ops;
2748 ctrl->quirks = quirks;
Christoph Hellwig5955be22016-04-26 13:51:59 +02002749 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
Christoph Hellwigf866fc422016-04-26 13:52:00 +02002750 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
Arnav Dawnb6dccf72017-07-12 16:10:40 +05302751 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002752
Christoph Hellwig9843f682017-10-18 13:10:01 +02002753 ret = ida_simple_get(&nvme_instance_ida, 0, 0, GFP_KERNEL);
2754 if (ret < 0)
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002755 goto out;
Christoph Hellwig9843f682017-10-18 13:10:01 +02002756 ctrl->instance = ret;
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002757
Keith Busch779ff7562016-01-12 15:09:31 -07002758 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002759 MKDEV(nvme_char_major, ctrl->instance),
Christoph Hellwigf4f0f632016-02-09 12:44:03 -07002760 ctrl, nvme_dev_attr_groups,
Keith Busch779ff7562016-01-12 15:09:31 -07002761 "nvme%d", ctrl->instance);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002762 if (IS_ERR(ctrl->device)) {
2763 ret = PTR_ERR(ctrl->device);
2764 goto out_release_instance;
2765 }
2766 get_device(ctrl->device);
Keith Busch075790e2016-02-24 09:15:53 -07002767 ida_init(&ctrl->ns_ida);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002768
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002769 spin_lock(&dev_list_lock);
2770 list_add_tail(&ctrl->node, &nvme_ctrl_list);
2771 spin_unlock(&dev_list_lock);
2772
Andy Lutomirskic5552fd2017-02-07 10:08:45 -08002773 /*
2774 * Initialize latency tolerance controls. The sysfs files won't
2775 * be visible to userspace unless the device actually supports APST.
2776 */
2777 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
2778 dev_pm_qos_update_user_latency_tolerance(ctrl->device,
2779 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
2780
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002781 return 0;
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002782out_release_instance:
Christoph Hellwig9843f682017-10-18 13:10:01 +02002783 ida_simple_remove(&nvme_instance_ida, ctrl->instance);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002784out:
2785 return ret;
2786}
Ming Lin576d55d2016-02-10 10:03:32 -08002787EXPORT_SYMBOL_GPL(nvme_init_ctrl);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002788
Keith Busch69d9a992016-02-24 09:15:56 -07002789/**
2790 * nvme_kill_queues(): Ends all namespace queues
2791 * @ctrl: the dead controller that needs to end
2792 *
2793 * Call this function when the driver determines it is unable to get the
2794 * controller in a state capable of servicing IO.
2795 */
2796void nvme_kill_queues(struct nvme_ctrl *ctrl)
2797{
2798 struct nvme_ns *ns;
2799
Keith Busch32f0c4a2016-07-13 11:45:02 -06002800 mutex_lock(&ctrl->namespaces_mutex);
Ming Lei82654b62017-06-02 16:32:08 +08002801
Ming Lei443bd902017-06-19 10:21:08 +08002802 /* Forcibly unquiesce queues to avoid blocking dispatch */
Scott Bauer7dd1ab12017-07-25 10:27:06 -06002803 if (ctrl->admin_q)
2804 blk_mq_unquiesce_queue(ctrl->admin_q);
Ming Lei443bd902017-06-19 10:21:08 +08002805
Keith Busch32f0c4a2016-07-13 11:45:02 -06002806 list_for_each_entry(ns, &ctrl->namespaces, list) {
Keith Busch69d9a992016-02-24 09:15:56 -07002807 /*
2808 * Revalidating a dead namespace sets capacity to 0. This will
2809 * end buffered writers dirtying pages that can't be synced.
2810 */
Keith Buschf33447b2017-02-10 18:15:51 -05002811 if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
2812 continue;
2813 revalidate_disk(ns->disk);
Keith Busch69d9a992016-02-24 09:15:56 -07002814 blk_set_queue_dying(ns->queue);
Ming Lei806f0262017-05-22 23:05:03 +08002815
Ming Lei443bd902017-06-19 10:21:08 +08002816 /* Forcibly unquiesce queues to avoid blocking dispatch */
2817 blk_mq_unquiesce_queue(ns->queue);
Keith Busch69d9a992016-02-24 09:15:56 -07002818 }
Keith Busch32f0c4a2016-07-13 11:45:02 -06002819 mutex_unlock(&ctrl->namespaces_mutex);
Keith Busch69d9a992016-02-24 09:15:56 -07002820}
Linus Torvalds237045f2016-03-18 17:13:31 -07002821EXPORT_SYMBOL_GPL(nvme_kill_queues);
Keith Busch69d9a992016-02-24 09:15:56 -07002822
Keith Busch302ad8c2017-03-01 14:22:12 -05002823void nvme_unfreeze(struct nvme_ctrl *ctrl)
2824{
2825 struct nvme_ns *ns;
2826
2827 mutex_lock(&ctrl->namespaces_mutex);
2828 list_for_each_entry(ns, &ctrl->namespaces, list)
2829 blk_mq_unfreeze_queue(ns->queue);
2830 mutex_unlock(&ctrl->namespaces_mutex);
2831}
2832EXPORT_SYMBOL_GPL(nvme_unfreeze);
2833
2834void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
2835{
2836 struct nvme_ns *ns;
2837
2838 mutex_lock(&ctrl->namespaces_mutex);
2839 list_for_each_entry(ns, &ctrl->namespaces, list) {
2840 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
2841 if (timeout <= 0)
2842 break;
2843 }
2844 mutex_unlock(&ctrl->namespaces_mutex);
2845}
2846EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
2847
2848void nvme_wait_freeze(struct nvme_ctrl *ctrl)
2849{
2850 struct nvme_ns *ns;
2851
2852 mutex_lock(&ctrl->namespaces_mutex);
2853 list_for_each_entry(ns, &ctrl->namespaces, list)
2854 blk_mq_freeze_queue_wait(ns->queue);
2855 mutex_unlock(&ctrl->namespaces_mutex);
2856}
2857EXPORT_SYMBOL_GPL(nvme_wait_freeze);
2858
2859void nvme_start_freeze(struct nvme_ctrl *ctrl)
2860{
2861 struct nvme_ns *ns;
2862
2863 mutex_lock(&ctrl->namespaces_mutex);
2864 list_for_each_entry(ns, &ctrl->namespaces, list)
Ming Lei1671d522017-03-27 20:06:57 +08002865 blk_freeze_queue_start(ns->queue);
Keith Busch302ad8c2017-03-01 14:22:12 -05002866 mutex_unlock(&ctrl->namespaces_mutex);
2867}
2868EXPORT_SYMBOL_GPL(nvme_start_freeze);
2869
Keith Busch25646262016-01-04 09:10:57 -07002870void nvme_stop_queues(struct nvme_ctrl *ctrl)
Sagi Grimberg363c9aa2015-12-24 15:26:59 +01002871{
2872 struct nvme_ns *ns;
2873
Keith Busch32f0c4a2016-07-13 11:45:02 -06002874 mutex_lock(&ctrl->namespaces_mutex);
Bart Van Asschea6eaa882016-10-28 17:23:40 -07002875 list_for_each_entry(ns, &ctrl->namespaces, list)
Bart Van Assche3174dd32016-10-28 17:23:19 -07002876 blk_mq_quiesce_queue(ns->queue);
Keith Busch32f0c4a2016-07-13 11:45:02 -06002877 mutex_unlock(&ctrl->namespaces_mutex);
Sagi Grimberg363c9aa2015-12-24 15:26:59 +01002878}
Ming Lin576d55d2016-02-10 10:03:32 -08002879EXPORT_SYMBOL_GPL(nvme_stop_queues);
Sagi Grimberg363c9aa2015-12-24 15:26:59 +01002880
Keith Busch25646262016-01-04 09:10:57 -07002881void nvme_start_queues(struct nvme_ctrl *ctrl)
Sagi Grimberg363c9aa2015-12-24 15:26:59 +01002882{
2883 struct nvme_ns *ns;
2884
Keith Busch32f0c4a2016-07-13 11:45:02 -06002885 mutex_lock(&ctrl->namespaces_mutex);
Sagi Grimberg8d7b8fa2017-07-04 18:16:58 +03002886 list_for_each_entry(ns, &ctrl->namespaces, list)
Ming Leif6601742017-06-06 23:22:04 +08002887 blk_mq_unquiesce_queue(ns->queue);
Keith Busch32f0c4a2016-07-13 11:45:02 -06002888 mutex_unlock(&ctrl->namespaces_mutex);
Sagi Grimberg363c9aa2015-12-24 15:26:59 +01002889}
Ming Lin576d55d2016-02-10 10:03:32 -08002890EXPORT_SYMBOL_GPL(nvme_start_queues);
Sagi Grimberg363c9aa2015-12-24 15:26:59 +01002891
Sagi Grimberg31b84462017-10-11 12:53:07 +03002892int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set)
2893{
2894 if (!ctrl->ops->reinit_request)
2895 return 0;
2896
2897 return blk_mq_tagset_iter(set, set->driver_data,
2898 ctrl->ops->reinit_request);
2899}
2900EXPORT_SYMBOL_GPL(nvme_reinit_tagset);
2901
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002902int __init nvme_core_init(void)
2903{
2904 int result;
2905
Sagi Grimberg9a6327d2017-06-07 20:31:55 +02002906 nvme_wq = alloc_workqueue("nvme-wq",
2907 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
2908 if (!nvme_wq)
2909 return -ENOMEM;
2910
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002911 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
2912 &nvme_dev_fops);
2913 if (result < 0)
Sagi Grimberg9a6327d2017-06-07 20:31:55 +02002914 goto destroy_wq;
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002915 else if (result > 0)
2916 nvme_char_major = result;
2917
2918 nvme_class = class_create(THIS_MODULE, "nvme");
2919 if (IS_ERR(nvme_class)) {
2920 result = PTR_ERR(nvme_class);
2921 goto unregister_chrdev;
2922 }
2923
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002924 return 0;
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002925
Sagi Grimberg9a6327d2017-06-07 20:31:55 +02002926unregister_chrdev:
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002927 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
Sagi Grimberg9a6327d2017-06-07 20:31:55 +02002928destroy_wq:
2929 destroy_workqueue(nvme_wq);
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002930 return result;
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002931}
2932
2933void nvme_core_exit(void)
2934{
Christoph Hellwigf3ca80f2015-11-28 15:40:19 +01002935 class_destroy(nvme_class);
2936 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
Sagi Grimberg9a6327d2017-06-07 20:31:55 +02002937 destroy_workqueue(nvme_wq);
Christoph Hellwig5bae7f72015-11-28 15:39:07 +01002938}
Ming Lin576d55d2016-02-10 10:03:32 -08002939
2940MODULE_LICENSE("GPL");
2941MODULE_VERSION("1.0");
2942module_init(nvme_core_init);
2943module_exit(nvme_core_exit);